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1/*
2 * BRIEF MODULE DESCRIPTION
3 * MyCable XXS1500 board support
4 *
5 * Copyright 2003, 2008 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc. <source@mvista.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 */
22
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/interrupt.h>
26#include <linux/platform_device.h>
27#include <linux/gpio.h>
28#include <linux/delay.h>
29#include <linux/pm.h>
30#include <asm/bootinfo.h>
31#include <asm/reboot.h>
32#include <asm/mach-au1x00/au1000.h>
33#include <prom.h>
34
35const char *get_system_type(void)
36{
37 return "XXS1500";
38}
39
40void __init prom_init(void)
41{
42 unsigned char *memsize_str;
43 unsigned long memsize;
44
45 prom_argc = fw_arg0;
46 prom_argv = (char **)fw_arg1;
47 prom_envp = (char **)fw_arg2;
48
49 prom_init_cmdline();
50
51 memsize_str = prom_getenv("memsize");
52 if (!memsize_str || kstrtoul(memsize_str, 0, &memsize))
53 memsize = 0x04000000;
54
55 add_memory_region(0, memsize, BOOT_MEM_RAM);
56}
57
58void prom_putchar(unsigned char c)
59{
60 alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
61}
62
63static void xxs1500_reset(char *c)
64{
65 /* Jump to the reset vector */
66 __asm__ __volatile__("jr\t%0" : : "r"(0xbfc00000));
67}
68
69static void xxs1500_power_off(void)
70{
71 while (1)
72 asm volatile (
73 " .set mips32 \n"
74 " wait \n"
75 " .set mips0 \n");
76}
77
78void __init board_setup(void)
79{
80 u32 pin_func;
81
82 pm_power_off = xxs1500_power_off;
83 _machine_halt = xxs1500_power_off;
84 _machine_restart = xxs1500_reset;
85
86 alchemy_gpio1_input_enable();
87 alchemy_gpio2_enable();
88
89 /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
90 pin_func = alchemy_rdsys(AU1000_SYS_PINFUNC) & ~SYS_PF_UR3;
91 pin_func |= SYS_PF_UR3;
92 alchemy_wrsys(pin_func, AU1000_SYS_PINFUNC);
93
94 /* Enable UART */
95 alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
96 /* Enable DTR (MCR bit 0) = USB power up */
97 __raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18));
98 wmb();
99}
100
101/******************************************************************************/
102
103static struct resource xxs1500_pcmcia_res[] = {
104 {
105 .name = "pcmcia-io",
106 .flags = IORESOURCE_MEM,
107 .start = AU1000_PCMCIA_IO_PHYS_ADDR,
108 .end = AU1000_PCMCIA_IO_PHYS_ADDR + 0x000400000 - 1,
109 },
110 {
111 .name = "pcmcia-attr",
112 .flags = IORESOURCE_MEM,
113 .start = AU1000_PCMCIA_ATTR_PHYS_ADDR,
114 .end = AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
115 },
116 {
117 .name = "pcmcia-mem",
118 .flags = IORESOURCE_MEM,
119 .start = AU1000_PCMCIA_MEM_PHYS_ADDR,
120 .end = AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
121 },
122};
123
124static struct platform_device xxs1500_pcmcia_dev = {
125 .name = "xxs1500_pcmcia",
126 .id = -1,
127 .num_resources = ARRAY_SIZE(xxs1500_pcmcia_res),
128 .resource = xxs1500_pcmcia_res,
129};
130
131static struct platform_device *xxs1500_devs[] __initdata = {
132 &xxs1500_pcmcia_dev,
133};
134
135static int __init xxs1500_dev_init(void)
136{
137 irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_HIGH);
138 irq_set_irq_type(AU1500_GPIO201_INT, IRQ_TYPE_LEVEL_LOW);
139 irq_set_irq_type(AU1500_GPIO202_INT, IRQ_TYPE_LEVEL_LOW);
140 irq_set_irq_type(AU1500_GPIO203_INT, IRQ_TYPE_LEVEL_LOW);
141 irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
142 irq_set_irq_type(AU1500_GPIO207_INT, IRQ_TYPE_LEVEL_LOW);
143
144 irq_set_irq_type(AU1500_GPIO0_INT, IRQ_TYPE_LEVEL_LOW);
145 irq_set_irq_type(AU1500_GPIO1_INT, IRQ_TYPE_LEVEL_LOW);
146 irq_set_irq_type(AU1500_GPIO2_INT, IRQ_TYPE_LEVEL_LOW);
147 irq_set_irq_type(AU1500_GPIO3_INT, IRQ_TYPE_LEVEL_LOW);
148 irq_set_irq_type(AU1500_GPIO4_INT, IRQ_TYPE_LEVEL_LOW); /* CF irq */
149 irq_set_irq_type(AU1500_GPIO5_INT, IRQ_TYPE_LEVEL_LOW);
150
151 return platform_add_devices(xxs1500_devs,
152 ARRAY_SIZE(xxs1500_devs));
153}
154device_initcall(xxs1500_dev_init);
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * BRIEF MODULE DESCRIPTION
4 * MyCable XXS1500 board support
5 *
6 * Copyright 2003, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 */
9
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/interrupt.h>
13#include <linux/platform_device.h>
14#include <linux/gpio.h>
15#include <linux/delay.h>
16#include <linux/pm.h>
17#include <asm/bootinfo.h>
18#include <asm/reboot.h>
19#include <asm/setup.h>
20#include <asm/mach-au1x00/au1000.h>
21#include <asm/mach-au1x00/gpio-au1000.h>
22#include <prom.h>
23
24const char *get_system_type(void)
25{
26 return "XXS1500";
27}
28
29void prom_putchar(char c)
30{
31 alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
32}
33
34static void xxs1500_reset(char *c)
35{
36 /* Jump to the reset vector */
37 __asm__ __volatile__("jr\t%0" : : "r"(0xbfc00000));
38}
39
40static void xxs1500_power_off(void)
41{
42 while (1)
43 asm volatile (
44 " .set mips32 \n"
45 " wait \n"
46 " .set mips0 \n");
47}
48
49void __init board_setup(void)
50{
51 u32 pin_func;
52
53 pm_power_off = xxs1500_power_off;
54 _machine_halt = xxs1500_power_off;
55 _machine_restart = xxs1500_reset;
56
57 alchemy_gpio1_input_enable();
58 alchemy_gpio2_enable();
59
60 /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
61 pin_func = alchemy_rdsys(AU1000_SYS_PINFUNC) & ~SYS_PF_UR3;
62 pin_func |= SYS_PF_UR3;
63 alchemy_wrsys(pin_func, AU1000_SYS_PINFUNC);
64
65 /* Enable UART */
66 alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
67 /* Enable DTR (MCR bit 0) = USB power up */
68 __raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18));
69 wmb();
70}
71
72/******************************************************************************/
73
74static struct resource xxs1500_pcmcia_res[] = {
75 {
76 .name = "pcmcia-io",
77 .flags = IORESOURCE_MEM,
78 .start = AU1000_PCMCIA_IO_PHYS_ADDR,
79 .end = AU1000_PCMCIA_IO_PHYS_ADDR + 0x000400000 - 1,
80 },
81 {
82 .name = "pcmcia-attr",
83 .flags = IORESOURCE_MEM,
84 .start = AU1000_PCMCIA_ATTR_PHYS_ADDR,
85 .end = AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
86 },
87 {
88 .name = "pcmcia-mem",
89 .flags = IORESOURCE_MEM,
90 .start = AU1000_PCMCIA_MEM_PHYS_ADDR,
91 .end = AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
92 },
93};
94
95static struct platform_device xxs1500_pcmcia_dev = {
96 .name = "xxs1500_pcmcia",
97 .id = -1,
98 .num_resources = ARRAY_SIZE(xxs1500_pcmcia_res),
99 .resource = xxs1500_pcmcia_res,
100};
101
102static struct platform_device *xxs1500_devs[] __initdata = {
103 &xxs1500_pcmcia_dev,
104};
105
106static int __init xxs1500_dev_init(void)
107{
108 irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_HIGH);
109 irq_set_irq_type(AU1500_GPIO201_INT, IRQ_TYPE_LEVEL_LOW);
110 irq_set_irq_type(AU1500_GPIO202_INT, IRQ_TYPE_LEVEL_LOW);
111 irq_set_irq_type(AU1500_GPIO203_INT, IRQ_TYPE_LEVEL_LOW);
112 irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
113 irq_set_irq_type(AU1500_GPIO207_INT, IRQ_TYPE_LEVEL_LOW);
114
115 irq_set_irq_type(AU1500_GPIO0_INT, IRQ_TYPE_LEVEL_LOW);
116 irq_set_irq_type(AU1500_GPIO1_INT, IRQ_TYPE_LEVEL_LOW);
117 irq_set_irq_type(AU1500_GPIO2_INT, IRQ_TYPE_LEVEL_LOW);
118 irq_set_irq_type(AU1500_GPIO3_INT, IRQ_TYPE_LEVEL_LOW);
119 irq_set_irq_type(AU1500_GPIO4_INT, IRQ_TYPE_LEVEL_LOW); /* CF irq */
120 irq_set_irq_type(AU1500_GPIO5_INT, IRQ_TYPE_LEVEL_LOW);
121
122 return platform_add_devices(xxs1500_devs,
123 ARRAY_SIZE(xxs1500_devs));
124}
125device_initcall(xxs1500_dev_init);