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1/*
2 * CE4100's SPI device is more or less the same one as found on PXA
3 *
4 */
5#include <linux/pci.h>
6#include <linux/platform_device.h>
7#include <linux/of_device.h>
8#include <linux/module.h>
9#include <linux/spi/pxa2xx_spi.h>
10#include <linux/clk-provider.h>
11
12#include <linux/dmaengine.h>
13#include <linux/platform_data/dma-dw.h>
14
15enum {
16 PORT_CE4100,
17 PORT_BYT,
18 PORT_BSW0,
19 PORT_BSW1,
20 PORT_BSW2,
21 PORT_QUARK_X1000,
22 PORT_LPT,
23};
24
25struct pxa_spi_info {
26 enum pxa_ssp_type type;
27 int port_id;
28 int num_chipselect;
29 unsigned long max_clk_rate;
30
31 /* DMA channel request parameters */
32 void *tx_param;
33 void *rx_param;
34};
35
36static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
37static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
38
39static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
40static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
41static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
42static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
43static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
44static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
45
46static struct dw_dma_slave lpt_tx_param = { .dst_id = 0 };
47static struct dw_dma_slave lpt_rx_param = { .src_id = 1 };
48
49static bool lpss_dma_filter(struct dma_chan *chan, void *param)
50{
51 struct dw_dma_slave *dws = param;
52
53 if (dws->dma_dev != chan->device->dev)
54 return false;
55
56 chan->private = dws;
57 return true;
58}
59
60static struct pxa_spi_info spi_info_configs[] = {
61 [PORT_CE4100] = {
62 .type = PXA25x_SSP,
63 .port_id = -1,
64 .num_chipselect = -1,
65 .max_clk_rate = 3686400,
66 },
67 [PORT_BYT] = {
68 .type = LPSS_BYT_SSP,
69 .port_id = 0,
70 .num_chipselect = 1,
71 .max_clk_rate = 50000000,
72 .tx_param = &byt_tx_param,
73 .rx_param = &byt_rx_param,
74 },
75 [PORT_BSW0] = {
76 .type = LPSS_BYT_SSP,
77 .port_id = 0,
78 .num_chipselect = 1,
79 .max_clk_rate = 50000000,
80 .tx_param = &bsw0_tx_param,
81 .rx_param = &bsw0_rx_param,
82 },
83 [PORT_BSW1] = {
84 .type = LPSS_BYT_SSP,
85 .port_id = 1,
86 .num_chipselect = 1,
87 .max_clk_rate = 50000000,
88 .tx_param = &bsw1_tx_param,
89 .rx_param = &bsw1_rx_param,
90 },
91 [PORT_BSW2] = {
92 .type = LPSS_BYT_SSP,
93 .port_id = 2,
94 .num_chipselect = 1,
95 .max_clk_rate = 50000000,
96 .tx_param = &bsw2_tx_param,
97 .rx_param = &bsw2_rx_param,
98 },
99 [PORT_QUARK_X1000] = {
100 .type = QUARK_X1000_SSP,
101 .port_id = -1,
102 .num_chipselect = 1,
103 .max_clk_rate = 50000000,
104 },
105 [PORT_LPT] = {
106 .type = LPSS_LPT_SSP,
107 .port_id = 0,
108 .num_chipselect = 1,
109 .max_clk_rate = 50000000,
110 .tx_param = &lpt_tx_param,
111 .rx_param = &lpt_rx_param,
112 },
113};
114
115static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
116 const struct pci_device_id *ent)
117{
118 struct platform_device_info pi;
119 int ret;
120 struct platform_device *pdev;
121 struct pxa2xx_spi_master spi_pdata;
122 struct ssp_device *ssp;
123 struct pxa_spi_info *c;
124 char buf[40];
125 struct pci_dev *dma_dev;
126
127 ret = pcim_enable_device(dev);
128 if (ret)
129 return ret;
130
131 ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
132 if (ret)
133 return ret;
134
135 c = &spi_info_configs[ent->driver_data];
136
137 memset(&spi_pdata, 0, sizeof(spi_pdata));
138 spi_pdata.num_chipselect = (c->num_chipselect > 0) ?
139 c->num_chipselect : dev->devfn;
140
141 dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
142
143 if (c->tx_param) {
144 struct dw_dma_slave *slave = c->tx_param;
145
146 slave->dma_dev = &dma_dev->dev;
147 slave->src_master = 1;
148 slave->dst_master = 0;
149 }
150
151 if (c->rx_param) {
152 struct dw_dma_slave *slave = c->rx_param;
153
154 slave->dma_dev = &dma_dev->dev;
155 slave->src_master = 1;
156 slave->dst_master = 0;
157 }
158
159 spi_pdata.dma_filter = lpss_dma_filter;
160 spi_pdata.tx_param = c->tx_param;
161 spi_pdata.rx_param = c->rx_param;
162 spi_pdata.enable_dma = c->rx_param && c->tx_param;
163
164 ssp = &spi_pdata.ssp;
165 ssp->phys_base = pci_resource_start(dev, 0);
166 ssp->mmio_base = pcim_iomap_table(dev)[0];
167 if (!ssp->mmio_base) {
168 dev_err(&dev->dev, "failed to ioremap() registers\n");
169 return -EIO;
170 }
171 ssp->irq = dev->irq;
172 ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
173 ssp->type = c->type;
174
175 snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
176 ssp->clk = clk_register_fixed_rate(&dev->dev, buf , NULL,
177 CLK_IS_ROOT, c->max_clk_rate);
178 if (IS_ERR(ssp->clk))
179 return PTR_ERR(ssp->clk);
180
181 memset(&pi, 0, sizeof(pi));
182 pi.parent = &dev->dev;
183 pi.name = "pxa2xx-spi";
184 pi.id = ssp->port_id;
185 pi.data = &spi_pdata;
186 pi.size_data = sizeof(spi_pdata);
187
188 pdev = platform_device_register_full(&pi);
189 if (IS_ERR(pdev)) {
190 clk_unregister(ssp->clk);
191 return PTR_ERR(pdev);
192 }
193
194 pci_set_drvdata(dev, pdev);
195
196 return 0;
197}
198
199static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
200{
201 struct platform_device *pdev = pci_get_drvdata(dev);
202 struct pxa2xx_spi_master *spi_pdata;
203
204 spi_pdata = dev_get_platdata(&pdev->dev);
205
206 platform_device_unregister(pdev);
207 clk_unregister(spi_pdata->ssp.clk);
208}
209
210static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
211 { PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 },
212 { PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 },
213 { PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT },
214 { PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 },
215 { PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 },
216 { PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 },
217 { PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT },
218 { },
219};
220MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
221
222static struct pci_driver pxa2xx_spi_pci_driver = {
223 .name = "pxa2xx_spi_pci",
224 .id_table = pxa2xx_spi_pci_devices,
225 .probe = pxa2xx_spi_pci_probe,
226 .remove = pxa2xx_spi_pci_remove,
227};
228
229module_pci_driver(pxa2xx_spi_pci_driver);
230
231MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
232MODULE_LICENSE("GPL v2");
233MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * PCI glue driver for SPI PXA2xx compatible controllers.
4 * CE4100's SPI device is more or less the same one as found on PXA.
5 *
6 * Copyright (C) 2016, 2021 Intel Corporation
7 */
8#include <linux/clk-provider.h>
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/module.h>
12#include <linux/pci.h>
13#include <linux/pm.h>
14#include <linux/pm_runtime.h>
15#include <linux/sprintf.h>
16#include <linux/string.h>
17#include <linux/types.h>
18
19#include <linux/dmaengine.h>
20#include <linux/platform_data/dma-dw.h>
21
22#include "spi-pxa2xx.h"
23
24#define PCI_DEVICE_ID_INTEL_QUARK_X1000 0x0935
25#define PCI_DEVICE_ID_INTEL_BYT 0x0f0e
26#define PCI_DEVICE_ID_INTEL_MRFLD 0x1194
27#define PCI_DEVICE_ID_INTEL_BSW0 0x228e
28#define PCI_DEVICE_ID_INTEL_BSW1 0x2290
29#define PCI_DEVICE_ID_INTEL_BSW2 0x22ac
30#define PCI_DEVICE_ID_INTEL_CE4100 0x2e6a
31#define PCI_DEVICE_ID_INTEL_LPT0_0 0x9c65
32#define PCI_DEVICE_ID_INTEL_LPT0_1 0x9c66
33#define PCI_DEVICE_ID_INTEL_LPT1_0 0x9ce5
34#define PCI_DEVICE_ID_INTEL_LPT1_1 0x9ce6
35
36struct pxa_spi_info {
37 int (*setup)(struct pci_dev *pdev, struct pxa2xx_spi_controller *c);
38};
39
40static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
41static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
42
43static struct dw_dma_slave mrfld3_tx_param = { .dst_id = 15 };
44static struct dw_dma_slave mrfld3_rx_param = { .src_id = 14 };
45static struct dw_dma_slave mrfld5_tx_param = { .dst_id = 13 };
46static struct dw_dma_slave mrfld5_rx_param = { .src_id = 12 };
47static struct dw_dma_slave mrfld6_tx_param = { .dst_id = 11 };
48static struct dw_dma_slave mrfld6_rx_param = { .src_id = 10 };
49
50static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
51static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
52static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
53static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
54static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
55static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
56
57static struct dw_dma_slave lpt1_tx_param = { .dst_id = 0 };
58static struct dw_dma_slave lpt1_rx_param = { .src_id = 1 };
59static struct dw_dma_slave lpt0_tx_param = { .dst_id = 2 };
60static struct dw_dma_slave lpt0_rx_param = { .src_id = 3 };
61
62static void pxa2xx_spi_pci_clk_unregister(void *clk)
63{
64 clk_unregister(clk);
65}
66
67static int pxa2xx_spi_pci_clk_register(struct pci_dev *dev, struct ssp_device *ssp,
68 unsigned long rate)
69{
70 char buf[40];
71
72 snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
73 ssp->clk = clk_register_fixed_rate(&dev->dev, buf, NULL, 0, rate);
74 if (IS_ERR(ssp->clk))
75 return PTR_ERR(ssp->clk);
76
77 return devm_add_action_or_reset(&dev->dev, pxa2xx_spi_pci_clk_unregister, ssp->clk);
78}
79
80static bool lpss_dma_filter(struct dma_chan *chan, void *param)
81{
82 struct dw_dma_slave *dws = param;
83
84 if (dws->dma_dev != chan->device->dev)
85 return false;
86
87 chan->private = dws;
88 return true;
89}
90
91static void lpss_dma_put_device(void *dma_dev)
92{
93 pci_dev_put(dma_dev);
94}
95
96static int lpss_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
97{
98 struct ssp_device *ssp = &c->ssp;
99 struct dw_dma_slave *tx, *rx;
100 struct pci_dev *dma_dev;
101 int ret;
102
103 switch (dev->device) {
104 case PCI_DEVICE_ID_INTEL_BYT:
105 ssp->type = LPSS_BYT_SSP;
106 ssp->port_id = 0;
107 c->tx_param = &byt_tx_param;
108 c->rx_param = &byt_rx_param;
109 break;
110 case PCI_DEVICE_ID_INTEL_BSW0:
111 ssp->type = LPSS_BSW_SSP;
112 ssp->port_id = 0;
113 c->tx_param = &bsw0_tx_param;
114 c->rx_param = &bsw0_rx_param;
115 break;
116 case PCI_DEVICE_ID_INTEL_BSW1:
117 ssp->type = LPSS_BSW_SSP;
118 ssp->port_id = 1;
119 c->tx_param = &bsw1_tx_param;
120 c->rx_param = &bsw1_rx_param;
121 break;
122 case PCI_DEVICE_ID_INTEL_BSW2:
123 ssp->type = LPSS_BSW_SSP;
124 ssp->port_id = 2;
125 c->tx_param = &bsw2_tx_param;
126 c->rx_param = &bsw2_rx_param;
127 break;
128 case PCI_DEVICE_ID_INTEL_LPT0_0:
129 case PCI_DEVICE_ID_INTEL_LPT1_0:
130 ssp->type = LPSS_LPT_SSP;
131 ssp->port_id = 0;
132 c->tx_param = &lpt0_tx_param;
133 c->rx_param = &lpt0_rx_param;
134 break;
135 case PCI_DEVICE_ID_INTEL_LPT0_1:
136 case PCI_DEVICE_ID_INTEL_LPT1_1:
137 ssp->type = LPSS_LPT_SSP;
138 ssp->port_id = 1;
139 c->tx_param = &lpt1_tx_param;
140 c->rx_param = &lpt1_rx_param;
141 break;
142 default:
143 return -ENODEV;
144 }
145
146 c->num_chipselect = 1;
147
148 ret = pxa2xx_spi_pci_clk_register(dev, ssp, 50000000);
149 if (ret)
150 return ret;
151
152 dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
153 ret = devm_add_action_or_reset(&dev->dev, lpss_dma_put_device, dma_dev);
154 if (ret)
155 return ret;
156
157 tx = c->tx_param;
158 tx->dma_dev = &dma_dev->dev;
159 tx->m_master = 0;
160 tx->p_master = 1;
161
162 rx = c->rx_param;
163 rx->dma_dev = &dma_dev->dev;
164 rx->m_master = 0;
165 rx->p_master = 1;
166
167 c->dma_filter = lpss_dma_filter;
168 c->dma_burst_size = 1;
169 c->enable_dma = 1;
170 return 0;
171}
172
173static const struct pxa_spi_info lpss_info_config = {
174 .setup = lpss_spi_setup,
175};
176
177static int ce4100_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
178{
179 struct ssp_device *ssp = &c->ssp;
180
181 ssp->type = PXA25x_SSP;
182 ssp->port_id = dev->devfn;
183 c->num_chipselect = dev->devfn;
184
185 return pxa2xx_spi_pci_clk_register(dev, ssp, 3686400);
186}
187
188static const struct pxa_spi_info ce4100_info_config = {
189 .setup = ce4100_spi_setup,
190};
191
192static int mrfld_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
193{
194 struct ssp_device *ssp = &c->ssp;
195 struct dw_dma_slave *tx, *rx;
196 struct pci_dev *dma_dev;
197 int ret;
198
199 ssp->type = MRFLD_SSP;
200
201 switch (PCI_FUNC(dev->devfn)) {
202 case 0:
203 ssp->port_id = 3;
204 c->num_chipselect = 1;
205 c->tx_param = &mrfld3_tx_param;
206 c->rx_param = &mrfld3_rx_param;
207 break;
208 case 1:
209 ssp->port_id = 5;
210 c->num_chipselect = 4;
211 c->tx_param = &mrfld5_tx_param;
212 c->rx_param = &mrfld5_rx_param;
213 break;
214 case 2:
215 ssp->port_id = 6;
216 c->num_chipselect = 1;
217 c->tx_param = &mrfld6_tx_param;
218 c->rx_param = &mrfld6_rx_param;
219 break;
220 default:
221 return -ENODEV;
222 }
223
224 ret = pxa2xx_spi_pci_clk_register(dev, ssp, 25000000);
225 if (ret)
226 return ret;
227
228 dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(21, 0));
229 ret = devm_add_action_or_reset(&dev->dev, lpss_dma_put_device, dma_dev);
230 if (ret)
231 return ret;
232
233 tx = c->tx_param;
234 tx->dma_dev = &dma_dev->dev;
235
236 rx = c->rx_param;
237 rx->dma_dev = &dma_dev->dev;
238
239 c->dma_filter = lpss_dma_filter;
240 c->dma_burst_size = 8;
241 c->enable_dma = 1;
242 return 0;
243}
244
245static const struct pxa_spi_info mrfld_info_config = {
246 .setup = mrfld_spi_setup,
247};
248
249static int qrk_spi_setup(struct pci_dev *dev, struct pxa2xx_spi_controller *c)
250{
251 struct ssp_device *ssp = &c->ssp;
252
253 ssp->type = QUARK_X1000_SSP;
254 ssp->port_id = dev->devfn;
255 c->num_chipselect = 1;
256
257 return pxa2xx_spi_pci_clk_register(dev, ssp, 50000000);
258}
259
260static const struct pxa_spi_info qrk_info_config = {
261 .setup = qrk_spi_setup,
262};
263
264static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
265 const struct pci_device_id *ent)
266{
267 const struct pxa_spi_info *info;
268 int ret;
269 struct pxa2xx_spi_controller *pdata;
270 struct ssp_device *ssp;
271
272 ret = pcim_enable_device(dev);
273 if (ret)
274 return ret;
275
276 pdata = devm_kzalloc(&dev->dev, sizeof(*pdata), GFP_KERNEL);
277 if (!pdata)
278 return -ENOMEM;
279
280 ssp = &pdata->ssp;
281 ssp->dev = &dev->dev;
282 ssp->phys_base = pci_resource_start(dev, 0);
283 ssp->mmio_base = pcim_iomap_region(dev, 0, "PXA2xx SPI");
284 if (IS_ERR(ssp->mmio_base))
285 return PTR_ERR(ssp->mmio_base);
286
287 info = (struct pxa_spi_info *)ent->driver_data;
288 ret = info->setup(dev, pdata);
289 if (ret)
290 return ret;
291
292 pci_set_master(dev);
293
294 ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES);
295 if (ret < 0)
296 return ret;
297 ssp->irq = pci_irq_vector(dev, 0);
298
299 ret = pxa2xx_spi_probe(&dev->dev, ssp, pdata);
300 if (ret)
301 return ret;
302
303 pm_runtime_set_autosuspend_delay(&dev->dev, 50);
304 pm_runtime_use_autosuspend(&dev->dev);
305 pm_runtime_put_autosuspend(&dev->dev);
306 pm_runtime_allow(&dev->dev);
307
308 return 0;
309}
310
311static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
312{
313 pm_runtime_forbid(&dev->dev);
314 pm_runtime_get_noresume(&dev->dev);
315
316 pxa2xx_spi_remove(&dev->dev);
317}
318
319static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
320 { PCI_DEVICE_DATA(INTEL, QUARK_X1000, &qrk_info_config) },
321 { PCI_DEVICE_DATA(INTEL, BYT, &lpss_info_config) },
322 { PCI_DEVICE_DATA(INTEL, MRFLD, &mrfld_info_config) },
323 { PCI_DEVICE_DATA(INTEL, BSW0, &lpss_info_config) },
324 { PCI_DEVICE_DATA(INTEL, BSW1, &lpss_info_config) },
325 { PCI_DEVICE_DATA(INTEL, BSW2, &lpss_info_config) },
326 { PCI_DEVICE_DATA(INTEL, CE4100, &ce4100_info_config) },
327 { PCI_DEVICE_DATA(INTEL, LPT0_0, &lpss_info_config) },
328 { PCI_DEVICE_DATA(INTEL, LPT0_1, &lpss_info_config) },
329 { PCI_DEVICE_DATA(INTEL, LPT1_0, &lpss_info_config) },
330 { PCI_DEVICE_DATA(INTEL, LPT1_1, &lpss_info_config) },
331 { }
332};
333MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
334
335static struct pci_driver pxa2xx_spi_pci_driver = {
336 .name = "pxa2xx_spi_pci",
337 .id_table = pxa2xx_spi_pci_devices,
338 .driver = {
339 .pm = pm_ptr(&pxa2xx_spi_pm_ops),
340 },
341 .probe = pxa2xx_spi_pci_probe,
342 .remove = pxa2xx_spi_pci_remove,
343};
344
345module_pci_driver(pxa2xx_spi_pci_driver);
346
347MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
348MODULE_LICENSE("GPL v2");
349MODULE_IMPORT_NS("SPI_PXA2xx");
350MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");