1config USB_DWC3
  2	tristate "DesignWare USB3 DRD Core Support"
  3	depends on (USB || USB_GADGET) && HAS_DMA
  4	select USB_XHCI_PLATFORM if USB_SUPPORT && USB_XHCI_HCD
 
  5	help
  6	  Say Y or M here if your system has a Dual Role SuperSpeed
  7	  USB controller based on the DesignWare USB3 IP Core.
  8
  9	  If you choose to build this driver is a dynamically linked
 10	  module, the module will be called dwc3.ko.
 11
 12if USB_DWC3
 13
 14config USB_DWC3_ULPI
 15	bool "Register ULPI PHY Interface"
 16	depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
 17	help
 18	  Select this if you have ULPI type PHY attached to your DWC3
 19	  controller.
 20
 21choice
 22	bool "DWC3 Mode Selection"
 23	default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
 24	default USB_DWC3_HOST if (USB && !USB_GADGET)
 25	default USB_DWC3_GADGET if (!USB && USB_GADGET)
 26
 27config USB_DWC3_HOST
 28	bool "Host only mode"
 29	depends on USB=y || USB=USB_DWC3
 30	help
 31	  Select this when you want to use DWC3 in host mode only,
 32	  thereby the gadget feature will be regressed.
 33
 34config USB_DWC3_GADGET
 35	bool "Gadget only mode"
 36	depends on USB_GADGET=y || USB_GADGET=USB_DWC3
 37	help
 38	  Select this when you want to use DWC3 in gadget mode only,
 39	  thereby the host feature will be regressed.
 40
 41config USB_DWC3_DUAL_ROLE
 42	bool "Dual Role mode"
 43	depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
 
 44	help
 45	  This is the default mode of working of DWC3 controller where
 46	  both host and gadget features are enabled.
 47
 48endchoice
 49
 50comment "Platform Glue Driver Support"
 51
 52config USB_DWC3_OMAP
 53	tristate "Texas Instruments OMAP5 and similar Platforms"
 54	depends on EXTCON && (ARCH_OMAP2PLUS || COMPILE_TEST)
 
 55	depends on OF
 56	default USB_DWC3
 57	help
 58	  Some platforms from Texas Instruments like OMAP5, DRA7xxx and
 59	  AM437x use this IP for USB2/3 functionality.
 60
 61	  Say 'Y' or 'M' here if you have one such device
 62
 63config USB_DWC3_EXYNOS
 64	tristate "Samsung Exynos Platform"
 65	depends on ARCH_EXYNOS && OF || COMPILE_TEST
 66	default USB_DWC3
 67	help
 68	  Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
 69	  say 'Y' or 'M' if you have one such device.
 70
 71config USB_DWC3_PCI
 72	tristate "PCIe-based Platforms"
 73	depends on PCI
 74	default USB_DWC3
 75	help
 76	  If you're using the DesignWare Core IP with a PCIe, please say
 77	  'Y' or 'M' here.
 78
 79	  One such PCIe-based platform is Synopsys' PCIe HAPS model of
 80	  this IP.
 
 
 
 
 
 81
 82config USB_DWC3_KEYSTONE
 83	tristate "Texas Instruments Keystone2 Platforms"
 84	depends on ARCH_KEYSTONE || COMPILE_TEST
 85	default USB_DWC3
 86	help
 87	  Support of USB2/3 functionality in TI Keystone2 platforms.
 88	  Say 'Y' or 'M' here if you have one such device
 89
 
 
 
 
 
 
 
 
 
 
 
 90config USB_DWC3_OF_SIMPLE
 91       tristate "Generic OF Simple Glue Layer"
 92       depends on OF && COMMON_CLK
 93       default USB_DWC3
 94       help
 95         Support USB2/3 functionality in simple SoC integrations.
 96	 Currently supports Xilinx and Qualcomm DWC USB3 IP.
 97	 Say 'Y' or 'M' if you have one such device.
 98
 99config USB_DWC3_ST
100	tristate "STMicroelectronics Platforms"
101	depends on ARCH_STI && OF
102	default USB_DWC3
103	help
104	  STMicroelectronics SoCs with one DesignWare Core USB3 IP
105	  inside (i.e. STiH407).
 
 
 
 
 
 
 
 
 
 
 
 
 
106	  Say 'Y' or 'M' if you have one such device.
107
108endif

  1# SPDX-License-Identifier: GPL-2.0
  2
  3config USB_DWC3
  4	tristate "DesignWare USB3 DRD Core Support"
  5	depends on (USB || USB_GADGET) && HAS_DMA
  6	select USB_XHCI_PLATFORM if USB_XHCI_HCD
  7	select USB_ROLE_SWITCH if USB_DWC3_DUAL_ROLE
  8	help
  9	  Say Y or M here if your system has a Dual Role SuperSpeed
 10	  USB controller based on the DesignWare USB3 IP Core.
 11
 12	  If you choose to build this driver is a dynamically linked
 13	  module, the module will be called dwc3.ko.
 14
 15if USB_DWC3
 16
 17config USB_DWC3_ULPI
 18	bool "Register ULPI PHY Interface"
 19	depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
 20	help
 21	  Select this if you have ULPI type PHY attached to your DWC3
 22	  controller.
 23
 24choice
 25	bool "DWC3 Mode Selection"
 26	default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
 27	default USB_DWC3_HOST if (USB && !USB_GADGET)
 28	default USB_DWC3_GADGET if (!USB && USB_GADGET)
 29
 30config USB_DWC3_HOST
 31	bool "Host only mode"
 32	depends on USB=y || USB=USB_DWC3
 33	help
 34	  Select this when you want to use DWC3 in host mode only,
 35	  thereby the gadget feature will be regressed.
 36
 37config USB_DWC3_GADGET
 38	bool "Gadget only mode"
 39	depends on USB_GADGET=y || USB_GADGET=USB_DWC3
 40	help
 41	  Select this when you want to use DWC3 in gadget mode only,
 42	  thereby the host feature will be regressed.
 43
 44config USB_DWC3_DUAL_ROLE
 45	bool "Dual Role mode"
 46	depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
 47	depends on (EXTCON=y || EXTCON=USB_DWC3)
 48	help
 49	  This is the default mode of working of DWC3 controller where
 50	  both host and gadget features are enabled.
 51
 52endchoice
 53
 54comment "Platform Glue Driver Support"
 55
 56config USB_DWC3_OMAP
 57	tristate "Texas Instruments OMAP5 and similar Platforms"
 58	depends on ARCH_OMAP2PLUS || COMPILE_TEST
 59	depends on EXTCON || !EXTCON
 60	depends on OF
 61	default USB_DWC3
 62	help
 63	  Some platforms from Texas Instruments like OMAP5, DRA7xxx and
 64	  AM437x use this IP for USB2/3 functionality.
 65
 66	  Say 'Y' or 'M' here if you have one such device
 67
 68config USB_DWC3_EXYNOS
 69	tristate "Samsung Exynos Platform"
 70	depends on (ARCH_EXYNOS || COMPILE_TEST) && OF
 71	default USB_DWC3
 72	help
 73	  Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
 74	  say 'Y' or 'M' if you have one such device.
 75
 76config USB_DWC3_PCI
 77	tristate "PCIe-based Platforms"
 78	depends on USB_PCI && ACPI
 79	default USB_DWC3
 80	help
 81	  If you're using the DesignWare Core IP with a PCIe (but not HAPS
 82	  platform), please say 'Y' or 'M' here.
 83
 84config USB_DWC3_HAPS
 85	tristate "Synopsys PCIe-based HAPS Platforms"
 86	depends on USB_PCI
 87	default USB_DWC3
 88	help
 89	  If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
 90	  platform, please say 'Y' or 'M' here.
 91
 92config USB_DWC3_KEYSTONE
 93	tristate "Texas Instruments Keystone2/AM654 Platforms"
 94	depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
 95	default USB_DWC3
 96	help
 97	  Support of USB2/3 functionality in TI Keystone2 and AM654 platforms.
 98	  Say 'Y' or 'M' here if you have one such device
 99
100config USB_DWC3_MESON_G12A
101	tristate "Amlogic Meson G12A Platforms"
102	depends on OF && COMMON_CLK
103	depends on ARCH_MESON || COMPILE_TEST
104	default USB_DWC3
105	select USB_ROLE_SWITCH
106	select REGMAP_MMIO
107	help
108	  Support USB2/3 functionality in Amlogic G12A platforms.
109	  Say 'Y' or 'M' if you have one such device.
110
111config USB_DWC3_OF_SIMPLE
112	tristate "Generic OF Simple Glue Layer"
113	depends on OF && COMMON_CLK
114	default USB_DWC3
115	help
116	  Support USB2/3 functionality in simple SoC integrations.
117	  Currently supports Xilinx and Qualcomm DWC USB3 IP.
118	  Say 'Y' or 'M' if you have one such device.
119
120config USB_DWC3_ST
121	tristate "STMicroelectronics Platforms"
122	depends on (ARCH_STI || COMPILE_TEST) && OF
123	default USB_DWC3
124	help
125	  STMicroelectronics SoCs with one DesignWare Core USB3 IP
126	  inside (i.e. STiH407).
127	  Say 'Y' or 'M' if you have one such device.
128
129config USB_DWC3_QCOM
130	tristate "Qualcomm Platform"
131	depends on ARCH_QCOM || COMPILE_TEST
132	depends on EXTCON || !EXTCON
133	depends on (OF || ACPI)
134	default USB_DWC3
135	help
136	  Some Qualcomm SoCs use DesignWare Core IP for USB2/3
137	  functionality.
138	  This driver also handles Qscratch wrapper which is needed
139	  for peripheral mode support.
140	  Say 'Y' or 'M' if you have one such device.
141
142endif