Linux Audio

Check our new training course

Loading...
v4.6
 
  1/*
  2 * drivers/rtc/rtc-pl031.c
  3 *
  4 * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
  5 *
  6 * Author: Deepak Saxena <dsaxena@plexity.net>
  7 *
  8 * Copyright 2006 (c) MontaVista Software, Inc.
  9 *
 10 * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
 11 * Copyright 2010 (c) ST-Ericsson AB
 12 *
 13 * This program is free software; you can redistribute it and/or
 14 * modify it under the terms of the GNU General Public License
 15 * as published by the Free Software Foundation; either version
 16 * 2 of the License, or (at your option) any later version.
 17 */
 18#include <linux/module.h>
 19#include <linux/rtc.h>
 20#include <linux/init.h>
 21#include <linux/interrupt.h>
 22#include <linux/amba/bus.h>
 23#include <linux/io.h>
 24#include <linux/bcd.h>
 25#include <linux/delay.h>
 26#include <linux/pm_wakeirq.h>
 27#include <linux/slab.h>
 28
 29/*
 30 * Register definitions
 31 */
 32#define	RTC_DR		0x00	/* Data read register */
 33#define	RTC_MR		0x04	/* Match register */
 34#define	RTC_LR		0x08	/* Data load register */
 35#define	RTC_CR		0x0c	/* Control register */
 36#define	RTC_IMSC	0x10	/* Interrupt mask and set register */
 37#define	RTC_RIS		0x14	/* Raw interrupt status register */
 38#define	RTC_MIS		0x18	/* Masked interrupt status register */
 39#define	RTC_ICR		0x1c	/* Interrupt clear register */
 40/* ST variants have additional timer functionality */
 41#define RTC_TDR		0x20	/* Timer data read register */
 42#define RTC_TLR		0x24	/* Timer data load register */
 43#define RTC_TCR		0x28	/* Timer control register */
 44#define RTC_YDR		0x30	/* Year data read register */
 45#define RTC_YMR		0x34	/* Year match register */
 46#define RTC_YLR		0x38	/* Year data load register */
 47
 48#define RTC_CR_EN	(1 << 0)	/* counter enable bit */
 49#define RTC_CR_CWEN	(1 << 26)	/* Clockwatch enable bit */
 50
 51#define RTC_TCR_EN	(1 << 1) /* Periodic timer enable bit */
 52
 53/* Common bit definitions for Interrupt status and control registers */
 54#define RTC_BIT_AI	(1 << 0) /* Alarm interrupt bit */
 55#define RTC_BIT_PI	(1 << 1) /* Periodic interrupt bit. ST variants only. */
 56
 57/* Common bit definations for ST v2 for reading/writing time */
 58#define RTC_SEC_SHIFT 0
 59#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
 60#define RTC_MIN_SHIFT 6
 61#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
 62#define RTC_HOUR_SHIFT 12
 63#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
 64#define RTC_WDAY_SHIFT 17
 65#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
 66#define RTC_MDAY_SHIFT 20
 67#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
 68#define RTC_MON_SHIFT 25
 69#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
 70
 71#define RTC_TIMER_FREQ 32768
 72
 73/**
 74 * struct pl031_vendor_data - per-vendor variations
 75 * @ops: the vendor-specific operations used on this silicon version
 76 * @clockwatch: if this is an ST Microelectronics silicon version with a
 77 *	clockwatch function
 78 * @st_weekday: if this is an ST Microelectronics silicon version that need
 79 *	the weekday fix
 80 * @irqflags: special IRQ flags per variant
 81 */
 82struct pl031_vendor_data {
 83	struct rtc_class_ops ops;
 84	bool clockwatch;
 85	bool st_weekday;
 86	unsigned long irqflags;
 
 
 87};
 88
 89struct pl031_local {
 90	struct pl031_vendor_data *vendor;
 91	struct rtc_device *rtc;
 92	void __iomem *base;
 93};
 94
 95static int pl031_alarm_irq_enable(struct device *dev,
 96	unsigned int enabled)
 97{
 98	struct pl031_local *ldata = dev_get_drvdata(dev);
 99	unsigned long imsc;
100
101	/* Clear any pending alarm interrupts. */
102	writel(RTC_BIT_AI, ldata->base + RTC_ICR);
103
104	imsc = readl(ldata->base + RTC_IMSC);
105
106	if (enabled == 1)
107		writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
108	else
109		writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
110
111	return 0;
112}
113
114/*
115 * Convert Gregorian date to ST v2 RTC format.
116 */
117static int pl031_stv2_tm_to_time(struct device *dev,
118				 struct rtc_time *tm, unsigned long *st_time,
119	unsigned long *bcd_year)
120{
121	int year = tm->tm_year + 1900;
122	int wday = tm->tm_wday;
123
124	/* wday masking is not working in hardware so wday must be valid */
125	if (wday < -1 || wday > 6) {
126		dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
127		return -EINVAL;
128	} else if (wday == -1) {
129		/* wday is not provided, calculate it here */
130		unsigned long time;
131		struct rtc_time calc_tm;
132
133		rtc_tm_to_time(tm, &time);
134		rtc_time_to_tm(time, &calc_tm);
135		wday = calc_tm.tm_wday;
136	}
137
138	*bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);
139
140	*st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
141			|	(tm->tm_mday << RTC_MDAY_SHIFT)
142			|	((wday + 1) << RTC_WDAY_SHIFT)
143			|	(tm->tm_hour << RTC_HOUR_SHIFT)
144			|	(tm->tm_min << RTC_MIN_SHIFT)
145			|	(tm->tm_sec << RTC_SEC_SHIFT);
146
147	return 0;
148}
149
150/*
151 * Convert ST v2 RTC format to Gregorian date.
152 */
153static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
154	struct rtc_time *tm)
155{
156	tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
157	tm->tm_mon  = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
158	tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
159	tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
160	tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
161	tm->tm_min  = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
162	tm->tm_sec  = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
163
164	tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
165	tm->tm_year -= 1900;
166
167	return 0;
168}
169
170static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
171{
172	struct pl031_local *ldata = dev_get_drvdata(dev);
173
174	pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
175			readl(ldata->base + RTC_YDR), tm);
176
177	return 0;
178}
179
180static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm)
181{
182	unsigned long time;
183	unsigned long bcd_year;
184	struct pl031_local *ldata = dev_get_drvdata(dev);
185	int ret;
186
187	ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
188	if (ret == 0) {
189		writel(bcd_year, ldata->base + RTC_YLR);
190		writel(time, ldata->base + RTC_LR);
191	}
192
193	return ret;
194}
195
196static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
197{
198	struct pl031_local *ldata = dev_get_drvdata(dev);
199	int ret;
200
201	ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
202			readl(ldata->base + RTC_YMR), &alarm->time);
203
204	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
205	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
206
207	return ret;
208}
209
210static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
211{
212	struct pl031_local *ldata = dev_get_drvdata(dev);
213	unsigned long time;
214	unsigned long bcd_year;
215	int ret;
216
217	/* At the moment, we can only deal with non-wildcarded alarm times. */
218	ret = rtc_valid_tm(&alarm->time);
219	if (ret == 0) {
220		ret = pl031_stv2_tm_to_time(dev, &alarm->time,
221					    &time, &bcd_year);
222		if (ret == 0) {
223			writel(bcd_year, ldata->base + RTC_YMR);
224			writel(time, ldata->base + RTC_MR);
225
226			pl031_alarm_irq_enable(dev, alarm->enabled);
227		}
228	}
229
230	return ret;
231}
232
233static irqreturn_t pl031_interrupt(int irq, void *dev_id)
234{
235	struct pl031_local *ldata = dev_id;
236	unsigned long rtcmis;
237	unsigned long events = 0;
238
239	rtcmis = readl(ldata->base + RTC_MIS);
240	if (rtcmis & RTC_BIT_AI) {
241		writel(RTC_BIT_AI, ldata->base + RTC_ICR);
242		events |= (RTC_AF | RTC_IRQF);
243		rtc_update_irq(ldata->rtc, 1, events);
244
245		return IRQ_HANDLED;
246	}
247
248	return IRQ_NONE;
249}
250
251static int pl031_read_time(struct device *dev, struct rtc_time *tm)
252{
253	struct pl031_local *ldata = dev_get_drvdata(dev);
254
255	rtc_time_to_tm(readl(ldata->base + RTC_DR), tm);
256
257	return 0;
258}
259
260static int pl031_set_time(struct device *dev, struct rtc_time *tm)
261{
262	unsigned long time;
263	struct pl031_local *ldata = dev_get_drvdata(dev);
264	int ret;
265
266	ret = rtc_tm_to_time(tm, &time);
267
268	if (ret == 0)
269		writel(time, ldata->base + RTC_LR);
270
271	return ret;
272}
273
274static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
275{
276	struct pl031_local *ldata = dev_get_drvdata(dev);
277
278	rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
279
280	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
281	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
282
283	return 0;
284}
285
286static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
287{
288	struct pl031_local *ldata = dev_get_drvdata(dev);
289	unsigned long time;
290	int ret;
291
292	/* At the moment, we can only deal with non-wildcarded alarm times. */
293	ret = rtc_valid_tm(&alarm->time);
294	if (ret == 0) {
295		ret = rtc_tm_to_time(&alarm->time, &time);
296		if (ret == 0) {
297			writel(time, ldata->base + RTC_MR);
298			pl031_alarm_irq_enable(dev, alarm->enabled);
299		}
300	}
301
302	return ret;
303}
304
305static int pl031_remove(struct amba_device *adev)
306{
307	struct pl031_local *ldata = dev_get_drvdata(&adev->dev);
308
309	dev_pm_clear_wake_irq(&adev->dev);
310	device_init_wakeup(&adev->dev, false);
311	free_irq(adev->irq[0], ldata);
312	rtc_device_unregister(ldata->rtc);
313	iounmap(ldata->base);
314	kfree(ldata);
315	amba_release_regions(adev);
316
317	return 0;
318}
319
320static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
321{
322	int ret;
323	struct pl031_local *ldata;
324	struct pl031_vendor_data *vendor = id->data;
325	struct rtc_class_ops *ops = &vendor->ops;
326	unsigned long time, data;
327
328	ret = amba_request_regions(adev, NULL);
329	if (ret)
330		goto err_req;
331
332	ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL);
333	if (!ldata) {
 
 
 
334		ret = -ENOMEM;
335		goto out;
336	}
337	ldata->vendor = vendor;
338
339	ldata->base = ioremap(adev->res.start, resource_size(&adev->res));
340
 
 
 
341	if (!ldata->base) {
342		ret = -ENOMEM;
343		goto out_no_remap;
344	}
345
346	amba_set_drvdata(adev, ldata);
347
348	dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev));
349	dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev));
350
351	data = readl(ldata->base + RTC_CR);
352	/* Enable the clockwatch on ST Variants */
353	if (vendor->clockwatch)
354		data |= RTC_CR_CWEN;
355	else
356		data |= RTC_CR_EN;
357	writel(data, ldata->base + RTC_CR);
358
359	/*
360	 * On ST PL031 variants, the RTC reset value does not provide correct
361	 * weekday for 2000-01-01. Correct the erroneous sunday to saturday.
362	 */
363	if (vendor->st_weekday) {
364		if (readl(ldata->base + RTC_YDR) == 0x2000) {
365			time = readl(ldata->base + RTC_DR);
366			if ((time &
367			     (RTC_MON_MASK | RTC_MDAY_MASK | RTC_WDAY_MASK))
368			    == 0x02120000) {
369				time = time | (0x7 << RTC_WDAY_SHIFT);
370				writel(0x2000, ldata->base + RTC_YLR);
371				writel(time, ldata->base + RTC_LR);
372			}
373		}
374	}
375
376	device_init_wakeup(&adev->dev, true);
377	ldata->rtc = rtc_device_register("pl031", &adev->dev, ops,
378					THIS_MODULE);
379	if (IS_ERR(ldata->rtc)) {
380		ret = PTR_ERR(ldata->rtc);
381		goto out_no_rtc;
382	}
383
384	if (request_irq(adev->irq[0], pl031_interrupt,
385			vendor->irqflags, "rtc-pl031", ldata)) {
386		ret = -EIO;
387		goto out_no_irq;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
388	}
389	dev_pm_set_wake_irq(&adev->dev, adev->irq[0]);
390	return 0;
391
392out_no_irq:
393	rtc_device_unregister(ldata->rtc);
394out_no_rtc:
395	iounmap(ldata->base);
396out_no_remap:
397	kfree(ldata);
398out:
399	amba_release_regions(adev);
400err_req:
401
402	return ret;
403}
404
405/* Operations for the original ARM version */
406static struct pl031_vendor_data arm_pl031 = {
407	.ops = {
408		.read_time = pl031_read_time,
409		.set_time = pl031_set_time,
410		.read_alarm = pl031_read_alarm,
411		.set_alarm = pl031_set_alarm,
412		.alarm_irq_enable = pl031_alarm_irq_enable,
413	},
 
414};
415
416/* The First ST derivative */
417static struct pl031_vendor_data stv1_pl031 = {
418	.ops = {
419		.read_time = pl031_read_time,
420		.set_time = pl031_set_time,
421		.read_alarm = pl031_read_alarm,
422		.set_alarm = pl031_set_alarm,
423		.alarm_irq_enable = pl031_alarm_irq_enable,
424	},
425	.clockwatch = true,
426	.st_weekday = true,
 
427};
428
429/* And the second ST derivative */
430static struct pl031_vendor_data stv2_pl031 = {
431	.ops = {
432		.read_time = pl031_stv2_read_time,
433		.set_time = pl031_stv2_set_time,
434		.read_alarm = pl031_stv2_read_alarm,
435		.set_alarm = pl031_stv2_set_alarm,
436		.alarm_irq_enable = pl031_alarm_irq_enable,
437	},
438	.clockwatch = true,
439	.st_weekday = true,
440	/*
441	 * This variant shares the IRQ with another block and must not
442	 * suspend that IRQ line.
443	 * TODO check if it shares with IRQF_NO_SUSPEND user, else we can
444	 * remove IRQF_COND_SUSPEND
445	 */
446	.irqflags = IRQF_SHARED | IRQF_COND_SUSPEND,
 
 
447};
448
449static struct amba_id pl031_ids[] = {
450	{
451		.id = 0x00041031,
452		.mask = 0x000fffff,
453		.data = &arm_pl031,
454	},
455	/* ST Micro variants */
456	{
457		.id = 0x00180031,
458		.mask = 0x00ffffff,
459		.data = &stv1_pl031,
460	},
461	{
462		.id = 0x00280031,
463		.mask = 0x00ffffff,
464		.data = &stv2_pl031,
465	},
466	{0, 0},
467};
468
469MODULE_DEVICE_TABLE(amba, pl031_ids);
470
471static struct amba_driver pl031_driver = {
472	.drv = {
473		.name = "rtc-pl031",
474	},
475	.id_table = pl031_ids,
476	.probe = pl031_probe,
477	.remove = pl031_remove,
478};
479
480module_amba_driver(pl031_driver);
481
482MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net>");
483MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
484MODULE_LICENSE("GPL");
v5.9
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * drivers/rtc/rtc-pl031.c
  4 *
  5 * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
  6 *
  7 * Author: Deepak Saxena <dsaxena@plexity.net>
  8 *
  9 * Copyright 2006 (c) MontaVista Software, Inc.
 10 *
 11 * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
 12 * Copyright 2010 (c) ST-Ericsson AB
 
 
 
 
 
 13 */
 14#include <linux/module.h>
 15#include <linux/rtc.h>
 16#include <linux/init.h>
 17#include <linux/interrupt.h>
 18#include <linux/amba/bus.h>
 19#include <linux/io.h>
 20#include <linux/bcd.h>
 21#include <linux/delay.h>
 22#include <linux/pm_wakeirq.h>
 23#include <linux/slab.h>
 24
 25/*
 26 * Register definitions
 27 */
 28#define	RTC_DR		0x00	/* Data read register */
 29#define	RTC_MR		0x04	/* Match register */
 30#define	RTC_LR		0x08	/* Data load register */
 31#define	RTC_CR		0x0c	/* Control register */
 32#define	RTC_IMSC	0x10	/* Interrupt mask and set register */
 33#define	RTC_RIS		0x14	/* Raw interrupt status register */
 34#define	RTC_MIS		0x18	/* Masked interrupt status register */
 35#define	RTC_ICR		0x1c	/* Interrupt clear register */
 36/* ST variants have additional timer functionality */
 37#define RTC_TDR		0x20	/* Timer data read register */
 38#define RTC_TLR		0x24	/* Timer data load register */
 39#define RTC_TCR		0x28	/* Timer control register */
 40#define RTC_YDR		0x30	/* Year data read register */
 41#define RTC_YMR		0x34	/* Year match register */
 42#define RTC_YLR		0x38	/* Year data load register */
 43
 44#define RTC_CR_EN	(1 << 0)	/* counter enable bit */
 45#define RTC_CR_CWEN	(1 << 26)	/* Clockwatch enable bit */
 46
 47#define RTC_TCR_EN	(1 << 1) /* Periodic timer enable bit */
 48
 49/* Common bit definitions for Interrupt status and control registers */
 50#define RTC_BIT_AI	(1 << 0) /* Alarm interrupt bit */
 51#define RTC_BIT_PI	(1 << 1) /* Periodic interrupt bit. ST variants only. */
 52
 53/* Common bit definations for ST v2 for reading/writing time */
 54#define RTC_SEC_SHIFT 0
 55#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
 56#define RTC_MIN_SHIFT 6
 57#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
 58#define RTC_HOUR_SHIFT 12
 59#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
 60#define RTC_WDAY_SHIFT 17
 61#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
 62#define RTC_MDAY_SHIFT 20
 63#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
 64#define RTC_MON_SHIFT 25
 65#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
 66
 67#define RTC_TIMER_FREQ 32768
 68
 69/**
 70 * struct pl031_vendor_data - per-vendor variations
 71 * @ops: the vendor-specific operations used on this silicon version
 72 * @clockwatch: if this is an ST Microelectronics silicon version with a
 73 *	clockwatch function
 74 * @st_weekday: if this is an ST Microelectronics silicon version that need
 75 *	the weekday fix
 76 * @irqflags: special IRQ flags per variant
 77 */
 78struct pl031_vendor_data {
 79	struct rtc_class_ops ops;
 80	bool clockwatch;
 81	bool st_weekday;
 82	unsigned long irqflags;
 83	time64_t range_min;
 84	timeu64_t range_max;
 85};
 86
 87struct pl031_local {
 88	struct pl031_vendor_data *vendor;
 89	struct rtc_device *rtc;
 90	void __iomem *base;
 91};
 92
 93static int pl031_alarm_irq_enable(struct device *dev,
 94	unsigned int enabled)
 95{
 96	struct pl031_local *ldata = dev_get_drvdata(dev);
 97	unsigned long imsc;
 98
 99	/* Clear any pending alarm interrupts. */
100	writel(RTC_BIT_AI, ldata->base + RTC_ICR);
101
102	imsc = readl(ldata->base + RTC_IMSC);
103
104	if (enabled == 1)
105		writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
106	else
107		writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
108
109	return 0;
110}
111
112/*
113 * Convert Gregorian date to ST v2 RTC format.
114 */
115static int pl031_stv2_tm_to_time(struct device *dev,
116				 struct rtc_time *tm, unsigned long *st_time,
117	unsigned long *bcd_year)
118{
119	int year = tm->tm_year + 1900;
120	int wday = tm->tm_wday;
121
122	/* wday masking is not working in hardware so wday must be valid */
123	if (wday < -1 || wday > 6) {
124		dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
125		return -EINVAL;
126	} else if (wday == -1) {
127		/* wday is not provided, calculate it here */
 
128		struct rtc_time calc_tm;
129
130		rtc_time64_to_tm(rtc_tm_to_time64(tm), &calc_tm);
 
131		wday = calc_tm.tm_wday;
132	}
133
134	*bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);
135
136	*st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
137			|	(tm->tm_mday << RTC_MDAY_SHIFT)
138			|	((wday + 1) << RTC_WDAY_SHIFT)
139			|	(tm->tm_hour << RTC_HOUR_SHIFT)
140			|	(tm->tm_min << RTC_MIN_SHIFT)
141			|	(tm->tm_sec << RTC_SEC_SHIFT);
142
143	return 0;
144}
145
146/*
147 * Convert ST v2 RTC format to Gregorian date.
148 */
149static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
150	struct rtc_time *tm)
151{
152	tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
153	tm->tm_mon  = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
154	tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
155	tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
156	tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
157	tm->tm_min  = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
158	tm->tm_sec  = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
159
160	tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
161	tm->tm_year -= 1900;
162
163	return 0;
164}
165
166static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
167{
168	struct pl031_local *ldata = dev_get_drvdata(dev);
169
170	pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
171			readl(ldata->base + RTC_YDR), tm);
172
173	return 0;
174}
175
176static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm)
177{
178	unsigned long time;
179	unsigned long bcd_year;
180	struct pl031_local *ldata = dev_get_drvdata(dev);
181	int ret;
182
183	ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
184	if (ret == 0) {
185		writel(bcd_year, ldata->base + RTC_YLR);
186		writel(time, ldata->base + RTC_LR);
187	}
188
189	return ret;
190}
191
192static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
193{
194	struct pl031_local *ldata = dev_get_drvdata(dev);
195	int ret;
196
197	ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
198			readl(ldata->base + RTC_YMR), &alarm->time);
199
200	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
201	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
202
203	return ret;
204}
205
206static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
207{
208	struct pl031_local *ldata = dev_get_drvdata(dev);
209	unsigned long time;
210	unsigned long bcd_year;
211	int ret;
212
213	ret = pl031_stv2_tm_to_time(dev, &alarm->time,
214				    &time, &bcd_year);
215	if (ret == 0) {
216		writel(bcd_year, ldata->base + RTC_YMR);
217		writel(time, ldata->base + RTC_MR);
 
 
 
218
219		pl031_alarm_irq_enable(dev, alarm->enabled);
 
220	}
221
222	return ret;
223}
224
225static irqreturn_t pl031_interrupt(int irq, void *dev_id)
226{
227	struct pl031_local *ldata = dev_id;
228	unsigned long rtcmis;
229	unsigned long events = 0;
230
231	rtcmis = readl(ldata->base + RTC_MIS);
232	if (rtcmis & RTC_BIT_AI) {
233		writel(RTC_BIT_AI, ldata->base + RTC_ICR);
234		events |= (RTC_AF | RTC_IRQF);
235		rtc_update_irq(ldata->rtc, 1, events);
236
237		return IRQ_HANDLED;
238	}
239
240	return IRQ_NONE;
241}
242
243static int pl031_read_time(struct device *dev, struct rtc_time *tm)
244{
245	struct pl031_local *ldata = dev_get_drvdata(dev);
246
247	rtc_time64_to_tm(readl(ldata->base + RTC_DR), tm);
248
249	return 0;
250}
251
252static int pl031_set_time(struct device *dev, struct rtc_time *tm)
253{
 
254	struct pl031_local *ldata = dev_get_drvdata(dev);
 
255
256	writel(rtc_tm_to_time64(tm), ldata->base + RTC_LR);
257
258	return 0;
 
 
 
259}
260
261static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
262{
263	struct pl031_local *ldata = dev_get_drvdata(dev);
264
265	rtc_time64_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
266
267	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
268	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
269
270	return 0;
271}
272
273static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
274{
275	struct pl031_local *ldata = dev_get_drvdata(dev);
 
 
276
277	writel(rtc_tm_to_time64(&alarm->time), ldata->base + RTC_MR);
278	pl031_alarm_irq_enable(dev, alarm->enabled);
 
 
 
 
 
 
 
279
280	return 0;
281}
282
283static int pl031_remove(struct amba_device *adev)
284{
285	struct pl031_local *ldata = dev_get_drvdata(&adev->dev);
286
287	dev_pm_clear_wake_irq(&adev->dev);
288	device_init_wakeup(&adev->dev, false);
289	if (adev->irq[0])
290		free_irq(adev->irq[0], ldata);
 
 
291	amba_release_regions(adev);
292
293	return 0;
294}
295
296static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
297{
298	int ret;
299	struct pl031_local *ldata;
300	struct pl031_vendor_data *vendor = id->data;
301	struct rtc_class_ops *ops;
302	unsigned long time, data;
303
304	ret = amba_request_regions(adev, NULL);
305	if (ret)
306		goto err_req;
307
308	ldata = devm_kzalloc(&adev->dev, sizeof(struct pl031_local),
309			     GFP_KERNEL);
310	ops = devm_kmemdup(&adev->dev, &vendor->ops, sizeof(vendor->ops),
311			   GFP_KERNEL);
312	if (!ldata || !ops) {
313		ret = -ENOMEM;
314		goto out;
315	}
 
 
 
316
317	ldata->vendor = vendor;
318	ldata->base = devm_ioremap(&adev->dev, adev->res.start,
319				   resource_size(&adev->res));
320	if (!ldata->base) {
321		ret = -ENOMEM;
322		goto out;
323	}
324
325	amba_set_drvdata(adev, ldata);
326
327	dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev));
328	dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev));
329
330	data = readl(ldata->base + RTC_CR);
331	/* Enable the clockwatch on ST Variants */
332	if (vendor->clockwatch)
333		data |= RTC_CR_CWEN;
334	else
335		data |= RTC_CR_EN;
336	writel(data, ldata->base + RTC_CR);
337
338	/*
339	 * On ST PL031 variants, the RTC reset value does not provide correct
340	 * weekday for 2000-01-01. Correct the erroneous sunday to saturday.
341	 */
342	if (vendor->st_weekday) {
343		if (readl(ldata->base + RTC_YDR) == 0x2000) {
344			time = readl(ldata->base + RTC_DR);
345			if ((time &
346			     (RTC_MON_MASK | RTC_MDAY_MASK | RTC_WDAY_MASK))
347			    == 0x02120000) {
348				time = time | (0x7 << RTC_WDAY_SHIFT);
349				writel(0x2000, ldata->base + RTC_YLR);
350				writel(time, ldata->base + RTC_LR);
351			}
352		}
353	}
354
355	if (!adev->irq[0]) {
356		/* When there's no interrupt, no point in exposing the alarm */
357		ops->read_alarm = NULL;
358		ops->set_alarm = NULL;
359		ops->alarm_irq_enable = NULL;
 
360	}
361
362	device_init_wakeup(&adev->dev, true);
363	ldata->rtc = devm_rtc_allocate_device(&adev->dev);
364	if (IS_ERR(ldata->rtc))
365		return PTR_ERR(ldata->rtc);
366
367	ldata->rtc->ops = ops;
368	ldata->rtc->range_min = vendor->range_min;
369	ldata->rtc->range_max = vendor->range_max;
370
371	ret = rtc_register_device(ldata->rtc);
372	if (ret)
373		goto out;
374
375	if (adev->irq[0]) {
376		ret = request_irq(adev->irq[0], pl031_interrupt,
377				  vendor->irqflags, "rtc-pl031", ldata);
378		if (ret)
379			goto out;
380		dev_pm_set_wake_irq(&adev->dev, adev->irq[0]);
381	}
 
382	return 0;
383
 
 
 
 
 
 
384out:
385	amba_release_regions(adev);
386err_req:
387
388	return ret;
389}
390
391/* Operations for the original ARM version */
392static struct pl031_vendor_data arm_pl031 = {
393	.ops = {
394		.read_time = pl031_read_time,
395		.set_time = pl031_set_time,
396		.read_alarm = pl031_read_alarm,
397		.set_alarm = pl031_set_alarm,
398		.alarm_irq_enable = pl031_alarm_irq_enable,
399	},
400	.range_max = U32_MAX,
401};
402
403/* The First ST derivative */
404static struct pl031_vendor_data stv1_pl031 = {
405	.ops = {
406		.read_time = pl031_read_time,
407		.set_time = pl031_set_time,
408		.read_alarm = pl031_read_alarm,
409		.set_alarm = pl031_set_alarm,
410		.alarm_irq_enable = pl031_alarm_irq_enable,
411	},
412	.clockwatch = true,
413	.st_weekday = true,
414	.range_max = U32_MAX,
415};
416
417/* And the second ST derivative */
418static struct pl031_vendor_data stv2_pl031 = {
419	.ops = {
420		.read_time = pl031_stv2_read_time,
421		.set_time = pl031_stv2_set_time,
422		.read_alarm = pl031_stv2_read_alarm,
423		.set_alarm = pl031_stv2_set_alarm,
424		.alarm_irq_enable = pl031_alarm_irq_enable,
425	},
426	.clockwatch = true,
427	.st_weekday = true,
428	/*
429	 * This variant shares the IRQ with another block and must not
430	 * suspend that IRQ line.
431	 * TODO check if it shares with IRQF_NO_SUSPEND user, else we can
432	 * remove IRQF_COND_SUSPEND
433	 */
434	.irqflags = IRQF_SHARED | IRQF_COND_SUSPEND,
435	.range_min = RTC_TIMESTAMP_BEGIN_0000,
436	.range_max = RTC_TIMESTAMP_END_9999,
437};
438
439static const struct amba_id pl031_ids[] = {
440	{
441		.id = 0x00041031,
442		.mask = 0x000fffff,
443		.data = &arm_pl031,
444	},
445	/* ST Micro variants */
446	{
447		.id = 0x00180031,
448		.mask = 0x00ffffff,
449		.data = &stv1_pl031,
450	},
451	{
452		.id = 0x00280031,
453		.mask = 0x00ffffff,
454		.data = &stv2_pl031,
455	},
456	{0, 0},
457};
458
459MODULE_DEVICE_TABLE(amba, pl031_ids);
460
461static struct amba_driver pl031_driver = {
462	.drv = {
463		.name = "rtc-pl031",
464	},
465	.id_table = pl031_ids,
466	.probe = pl031_probe,
467	.remove = pl031_remove,
468};
469
470module_amba_driver(pl031_driver);
471
472MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net>");
473MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
474MODULE_LICENSE("GPL");