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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Dummy driver for Intel's Image Signal Processor found on Bay Trail
4 * and Cherry Trail devices. The sole purpose of this driver is to allow
5 * the ISP to be put in D3.
6 *
7 * Copyright (C) 2018 Hans de Goede <hdegoede@redhat.com>
8 *
9 * Based on various non upstream patches for ISP support:
10 * Copyright (C) 2010-2017 Intel Corporation. All rights reserved.
11 * Copyright (c) 2010 Silicon Hive www.siliconhive.com.
12 */
13
14#include <linux/delay.h>
15#include <linux/module.h>
16#include <linux/mod_devicetable.h>
17#include <linux/pci.h>
18#include <linux/pm_runtime.h>
19#include <asm/iosf_mbi.h>
20
21/* PCI configuration regs */
22#define PCI_INTERRUPT_CTRL 0x9c
23
24#define PCI_CSI_CONTROL 0xe8
25#define PCI_CSI_CONTROL_PORTS_OFF_MASK 0x7
26
27/* IOSF BT_MBI_UNIT_PMC regs */
28#define ISPSSPM0 0x39
29#define ISPSSPM0_ISPSSC_OFFSET 0
30#define ISPSSPM0_ISPSSC_MASK 0x00000003
31#define ISPSSPM0_ISPSSS_OFFSET 24
32#define ISPSSPM0_ISPSSS_MASK 0x03000000
33#define ISPSSPM0_IUNIT_POWER_ON 0x0
34#define ISPSSPM0_IUNIT_POWER_OFF 0x3
35
36static int isp_set_power(struct pci_dev *dev, bool enable)
37{
38 unsigned long timeout;
39 u32 val = enable ? ISPSSPM0_IUNIT_POWER_ON : ISPSSPM0_IUNIT_POWER_OFF;
40
41 /* Write to ISPSSPM0 bit[1:0] to power on/off the IUNIT */
42 iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM0,
43 val, ISPSSPM0_ISPSSC_MASK);
44
45 /*
46 * There should be no IUNIT access while power-down is
47 * in progress. HW sighting: 4567865.
48 * Wait up to 50 ms for the IUNIT to shut down.
49 * And we do the same for power on.
50 */
51 timeout = jiffies + msecs_to_jiffies(50);
52 do {
53 u32 tmp;
54
55 /* Wait until ISPSSPM0 bit[25:24] shows the right value */
56 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM0, &tmp);
57 tmp = (tmp & ISPSSPM0_ISPSSS_MASK) >> ISPSSPM0_ISPSSS_OFFSET;
58 if (tmp == val)
59 return 0;
60
61 usleep_range(1000, 2000);
62 } while (time_before(jiffies, timeout));
63
64 dev_err(&dev->dev, "IUNIT power-%s timeout.\n", enable ? "on" : "off");
65 return -EBUSY;
66}
67
68static int isp_probe(struct pci_dev *dev, const struct pci_device_id *id)
69{
70 pm_runtime_allow(&dev->dev);
71 pm_runtime_put_sync_suspend(&dev->dev);
72
73 return 0;
74}
75
76static void isp_remove(struct pci_dev *dev)
77{
78 pm_runtime_get_sync(&dev->dev);
79 pm_runtime_forbid(&dev->dev);
80}
81
82static int isp_pci_suspend(struct device *dev)
83{
84 struct pci_dev *pdev = to_pci_dev(dev);
85 u32 val;
86
87 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, 0);
88
89 /*
90 * MRFLD IUNIT DPHY is located in an always-power-on island
91 * MRFLD HW design need all CSI ports are disabled before
92 * powering down the IUNIT.
93 */
94 pci_read_config_dword(pdev, PCI_CSI_CONTROL, &val);
95 val |= PCI_CSI_CONTROL_PORTS_OFF_MASK;
96 pci_write_config_dword(pdev, PCI_CSI_CONTROL, val);
97
98 /*
99 * We lose config space access when punit power gates
100 * the ISP. Can't use pci_set_power_state() because
101 * pmcsr won't actually change when we write to it.
102 */
103 pci_save_state(pdev);
104 pdev->current_state = PCI_D3cold;
105 isp_set_power(pdev, false);
106
107 return 0;
108}
109
110static int isp_pci_resume(struct device *dev)
111{
112 struct pci_dev *pdev = to_pci_dev(dev);
113
114 isp_set_power(pdev, true);
115 pdev->current_state = PCI_D0;
116 pci_restore_state(pdev);
117
118 return 0;
119}
120
121static UNIVERSAL_DEV_PM_OPS(isp_pm_ops, isp_pci_suspend,
122 isp_pci_resume, NULL);
123
124static const struct pci_device_id isp_id_table[] = {
125 { PCI_VDEVICE(INTEL, 0x0f38), },
126 { PCI_VDEVICE(INTEL, 0x22b8), },
127 { 0, }
128};
129MODULE_DEVICE_TABLE(pci, isp_id_table);
130
131static struct pci_driver isp_pci_driver = {
132 .name = "intel_atomisp2_pm",
133 .id_table = isp_id_table,
134 .probe = isp_probe,
135 .remove = isp_remove,
136 .driver.pm = &isp_pm_ops,
137};
138
139module_pci_driver(isp_pci_driver);
140
141MODULE_DESCRIPTION("Intel AtomISP2 dummy / power-management drv (for suspend)");
142MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
143MODULE_LICENSE("GPL v2");