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1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
27#include <net/vxlan.h>
28#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
39
40#include "qede.h"
41
42static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
44
45MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
46MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
56#define CHIP_NUM_57980S_10 0x1666
57#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
61
62#ifndef PCI_DEVICE_ID_NX2_57980E
63#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
64#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
65#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
66#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
67#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
68#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
69#endif
70
71static const struct pci_device_id qede_pci_tbl[] = {
72 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), 0 },
73 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), 0 },
74 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), 0 },
75 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), 0 },
76 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), 0 },
77 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), 0 },
78 { 0 }
79};
80
81MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
82
83static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
84
85#define TX_TIMEOUT (5 * HZ)
86
87static void qede_remove(struct pci_dev *pdev);
88static int qede_alloc_rx_buffer(struct qede_dev *edev,
89 struct qede_rx_queue *rxq);
90static void qede_link_update(void *dev, struct qed_link_output *link);
91
92static struct pci_driver qede_pci_driver = {
93 .name = "qede",
94 .id_table = qede_pci_tbl,
95 .probe = qede_probe,
96 .remove = qede_remove,
97};
98
99static struct qed_eth_cb_ops qede_ll_ops = {
100 {
101 .link_update = qede_link_update,
102 },
103};
104
105static int qede_netdev_event(struct notifier_block *this, unsigned long event,
106 void *ptr)
107{
108 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
109 struct ethtool_drvinfo drvinfo;
110 struct qede_dev *edev;
111
112 /* Currently only support name change */
113 if (event != NETDEV_CHANGENAME)
114 goto done;
115
116 /* Check whether this is a qede device */
117 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
118 goto done;
119
120 memset(&drvinfo, 0, sizeof(drvinfo));
121 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
122 if (strcmp(drvinfo.driver, "qede"))
123 goto done;
124 edev = netdev_priv(ndev);
125
126 /* Notify qed of the name change */
127 if (!edev->ops || !edev->ops->common)
128 goto done;
129 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
130 "qede");
131
132done:
133 return NOTIFY_DONE;
134}
135
136static struct notifier_block qede_netdev_notifier = {
137 .notifier_call = qede_netdev_event,
138};
139
140static
141int __init qede_init(void)
142{
143 int ret;
144 u32 qed_ver;
145
146 pr_notice("qede_init: %s\n", version);
147
148 qed_ver = qed_get_protocol_version(QED_PROTOCOL_ETH);
149 if (qed_ver != QEDE_ETH_INTERFACE_VERSION) {
150 pr_notice("Version mismatch [%08x != %08x]\n",
151 qed_ver,
152 QEDE_ETH_INTERFACE_VERSION);
153 return -EINVAL;
154 }
155
156 qed_ops = qed_get_eth_ops(QEDE_ETH_INTERFACE_VERSION);
157 if (!qed_ops) {
158 pr_notice("Failed to get qed ethtool operations\n");
159 return -EINVAL;
160 }
161
162 /* Must register notifier before pci ops, since we might miss
163 * interface rename after pci probe and netdev registeration.
164 */
165 ret = register_netdevice_notifier(&qede_netdev_notifier);
166 if (ret) {
167 pr_notice("Failed to register netdevice_notifier\n");
168 qed_put_eth_ops();
169 return -EINVAL;
170 }
171
172 ret = pci_register_driver(&qede_pci_driver);
173 if (ret) {
174 pr_notice("Failed to register driver\n");
175 unregister_netdevice_notifier(&qede_netdev_notifier);
176 qed_put_eth_ops();
177 return -EINVAL;
178 }
179
180 return 0;
181}
182
183static void __exit qede_cleanup(void)
184{
185 pr_notice("qede_cleanup called\n");
186
187 unregister_netdevice_notifier(&qede_netdev_notifier);
188 pci_unregister_driver(&qede_pci_driver);
189 qed_put_eth_ops();
190}
191
192module_init(qede_init);
193module_exit(qede_cleanup);
194
195/* -------------------------------------------------------------------------
196 * START OF FAST-PATH
197 * -------------------------------------------------------------------------
198 */
199
200/* Unmap the data and free skb */
201static int qede_free_tx_pkt(struct qede_dev *edev,
202 struct qede_tx_queue *txq,
203 int *len)
204{
205 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
206 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
207 struct eth_tx_1st_bd *first_bd;
208 struct eth_tx_bd *tx_data_bd;
209 int bds_consumed = 0;
210 int nbds;
211 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
212 int i, split_bd_len = 0;
213
214 if (unlikely(!skb)) {
215 DP_ERR(edev,
216 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
217 idx, txq->sw_tx_cons, txq->sw_tx_prod);
218 return -1;
219 }
220
221 *len = skb->len;
222
223 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
224
225 bds_consumed++;
226
227 nbds = first_bd->data.nbds;
228
229 if (data_split) {
230 struct eth_tx_bd *split = (struct eth_tx_bd *)
231 qed_chain_consume(&txq->tx_pbl);
232 split_bd_len = BD_UNMAP_LEN(split);
233 bds_consumed++;
234 }
235 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
236 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
237
238 /* Unmap the data of the skb frags */
239 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
240 tx_data_bd = (struct eth_tx_bd *)
241 qed_chain_consume(&txq->tx_pbl);
242 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
243 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
244 }
245
246 while (bds_consumed++ < nbds)
247 qed_chain_consume(&txq->tx_pbl);
248
249 /* Free skb */
250 dev_kfree_skb_any(skb);
251 txq->sw_tx_ring[idx].skb = NULL;
252 txq->sw_tx_ring[idx].flags = 0;
253
254 return 0;
255}
256
257/* Unmap the data and free skb when mapping failed during start_xmit */
258static void qede_free_failed_tx_pkt(struct qede_dev *edev,
259 struct qede_tx_queue *txq,
260 struct eth_tx_1st_bd *first_bd,
261 int nbd,
262 bool data_split)
263{
264 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
265 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
266 struct eth_tx_bd *tx_data_bd;
267 int i, split_bd_len = 0;
268
269 /* Return prod to its position before this skb was handled */
270 qed_chain_set_prod(&txq->tx_pbl,
271 le16_to_cpu(txq->tx_db.data.bd_prod),
272 first_bd);
273
274 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
275
276 if (data_split) {
277 struct eth_tx_bd *split = (struct eth_tx_bd *)
278 qed_chain_produce(&txq->tx_pbl);
279 split_bd_len = BD_UNMAP_LEN(split);
280 nbd--;
281 }
282
283 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
284 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
285
286 /* Unmap the data of the skb frags */
287 for (i = 0; i < nbd; i++) {
288 tx_data_bd = (struct eth_tx_bd *)
289 qed_chain_produce(&txq->tx_pbl);
290 if (tx_data_bd->nbytes)
291 dma_unmap_page(&edev->pdev->dev,
292 BD_UNMAP_ADDR(tx_data_bd),
293 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
294 }
295
296 /* Return again prod to its position before this skb was handled */
297 qed_chain_set_prod(&txq->tx_pbl,
298 le16_to_cpu(txq->tx_db.data.bd_prod),
299 first_bd);
300
301 /* Free skb */
302 dev_kfree_skb_any(skb);
303 txq->sw_tx_ring[idx].skb = NULL;
304 txq->sw_tx_ring[idx].flags = 0;
305}
306
307static u32 qede_xmit_type(struct qede_dev *edev,
308 struct sk_buff *skb,
309 int *ipv6_ext)
310{
311 u32 rc = XMIT_L4_CSUM;
312 __be16 l3_proto;
313
314 if (skb->ip_summed != CHECKSUM_PARTIAL)
315 return XMIT_PLAIN;
316
317 l3_proto = vlan_get_protocol(skb);
318 if (l3_proto == htons(ETH_P_IPV6) &&
319 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
320 *ipv6_ext = 1;
321
322 if (skb_is_gso(skb))
323 rc |= XMIT_LSO;
324
325 return rc;
326}
327
328static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
329 struct eth_tx_2nd_bd *second_bd,
330 struct eth_tx_3rd_bd *third_bd)
331{
332 u8 l4_proto;
333 u16 bd2_bits1 = 0, bd2_bits2 = 0;
334
335 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
336
337 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
338 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
339 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
340
341 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
342 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
343
344 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
345 l4_proto = ipv6_hdr(skb)->nexthdr;
346 else
347 l4_proto = ip_hdr(skb)->protocol;
348
349 if (l4_proto == IPPROTO_UDP)
350 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
351
352 if (third_bd)
353 third_bd->data.bitfields |=
354 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
355 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
356 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
357
358 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
359 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
360}
361
362static int map_frag_to_bd(struct qede_dev *edev,
363 skb_frag_t *frag,
364 struct eth_tx_bd *bd)
365{
366 dma_addr_t mapping;
367
368 /* Map skb non-linear frag data for DMA */
369 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
370 skb_frag_size(frag),
371 DMA_TO_DEVICE);
372 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
373 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
374 return -ENOMEM;
375 }
376
377 /* Setup the data pointer of the frag data */
378 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
379
380 return 0;
381}
382
383/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
384#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
385static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
386 u8 xmit_type)
387{
388 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
389
390 if (xmit_type & XMIT_LSO) {
391 int hlen;
392
393 hlen = skb_transport_header(skb) +
394 tcp_hdrlen(skb) - skb->data;
395
396 /* linear payload would require its own BD */
397 if (skb_headlen(skb) > hlen)
398 allowed_frags--;
399 }
400
401 return (skb_shinfo(skb)->nr_frags > allowed_frags);
402}
403#endif
404
405/* Main transmit function */
406static
407netdev_tx_t qede_start_xmit(struct sk_buff *skb,
408 struct net_device *ndev)
409{
410 struct qede_dev *edev = netdev_priv(ndev);
411 struct netdev_queue *netdev_txq;
412 struct qede_tx_queue *txq;
413 struct eth_tx_1st_bd *first_bd;
414 struct eth_tx_2nd_bd *second_bd = NULL;
415 struct eth_tx_3rd_bd *third_bd = NULL;
416 struct eth_tx_bd *tx_data_bd = NULL;
417 u16 txq_index;
418 u8 nbd = 0;
419 dma_addr_t mapping;
420 int rc, frag_idx = 0, ipv6_ext = 0;
421 u8 xmit_type;
422 u16 idx;
423 u16 hlen;
424 bool data_split = false;
425
426 /* Get tx-queue context and netdev index */
427 txq_index = skb_get_queue_mapping(skb);
428 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
429 txq = QEDE_TX_QUEUE(edev, txq_index);
430 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
431
432 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
433 (MAX_SKB_FRAGS + 1));
434
435 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
436
437#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
438 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
439 if (skb_linearize(skb)) {
440 DP_NOTICE(edev,
441 "SKB linearization failed - silently dropping this SKB\n");
442 dev_kfree_skb_any(skb);
443 return NETDEV_TX_OK;
444 }
445 }
446#endif
447
448 /* Fill the entry in the SW ring and the BDs in the FW ring */
449 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
450 txq->sw_tx_ring[idx].skb = skb;
451 first_bd = (struct eth_tx_1st_bd *)
452 qed_chain_produce(&txq->tx_pbl);
453 memset(first_bd, 0, sizeof(*first_bd));
454 first_bd->data.bd_flags.bitfields =
455 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
456
457 /* Map skb linear data for DMA and set in the first BD */
458 mapping = dma_map_single(&edev->pdev->dev, skb->data,
459 skb_headlen(skb), DMA_TO_DEVICE);
460 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
461 DP_NOTICE(edev, "SKB mapping failed\n");
462 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
463 return NETDEV_TX_OK;
464 }
465 nbd++;
466 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
467
468 /* In case there is IPv6 with extension headers or LSO we need 2nd and
469 * 3rd BDs.
470 */
471 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
472 second_bd = (struct eth_tx_2nd_bd *)
473 qed_chain_produce(&txq->tx_pbl);
474 memset(second_bd, 0, sizeof(*second_bd));
475
476 nbd++;
477 third_bd = (struct eth_tx_3rd_bd *)
478 qed_chain_produce(&txq->tx_pbl);
479 memset(third_bd, 0, sizeof(*third_bd));
480
481 nbd++;
482 /* We need to fill in additional data in second_bd... */
483 tx_data_bd = (struct eth_tx_bd *)second_bd;
484 }
485
486 if (skb_vlan_tag_present(skb)) {
487 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
488 first_bd->data.bd_flags.bitfields |=
489 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
490 }
491
492 /* Fill the parsing flags & params according to the requested offload */
493 if (xmit_type & XMIT_L4_CSUM) {
494 u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT;
495
496 /* We don't re-calculate IP checksum as it is already done by
497 * the upper stack
498 */
499 first_bd->data.bd_flags.bitfields |=
500 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
501
502 first_bd->data.bitfields |= cpu_to_le16(temp);
503
504 /* If the packet is IPv6 with extension header, indicate that
505 * to FW and pass few params, since the device cracker doesn't
506 * support parsing IPv6 with extension header/s.
507 */
508 if (unlikely(ipv6_ext))
509 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
510 }
511
512 if (xmit_type & XMIT_LSO) {
513 first_bd->data.bd_flags.bitfields |=
514 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
515 third_bd->data.lso_mss =
516 cpu_to_le16(skb_shinfo(skb)->gso_size);
517
518 first_bd->data.bd_flags.bitfields |=
519 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
520 hlen = skb_transport_header(skb) +
521 tcp_hdrlen(skb) - skb->data;
522
523 /* @@@TBD - if will not be removed need to check */
524 third_bd->data.bitfields |=
525 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
526
527 /* Make life easier for FW guys who can't deal with header and
528 * data on same BD. If we need to split, use the second bd...
529 */
530 if (unlikely(skb_headlen(skb) > hlen)) {
531 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
532 "TSO split header size is %d (%x:%x)\n",
533 first_bd->nbytes, first_bd->addr.hi,
534 first_bd->addr.lo);
535
536 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
537 le32_to_cpu(first_bd->addr.lo)) +
538 hlen;
539
540 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
541 le16_to_cpu(first_bd->nbytes) -
542 hlen);
543
544 /* this marks the BD as one that has no
545 * individual mapping
546 */
547 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
548
549 first_bd->nbytes = cpu_to_le16(hlen);
550
551 tx_data_bd = (struct eth_tx_bd *)third_bd;
552 data_split = true;
553 }
554 }
555
556 /* Handle fragmented skb */
557 /* special handle for frags inside 2nd and 3rd bds.. */
558 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
559 rc = map_frag_to_bd(edev,
560 &skb_shinfo(skb)->frags[frag_idx],
561 tx_data_bd);
562 if (rc) {
563 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
564 data_split);
565 return NETDEV_TX_OK;
566 }
567
568 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
569 tx_data_bd = (struct eth_tx_bd *)third_bd;
570 else
571 tx_data_bd = NULL;
572
573 frag_idx++;
574 }
575
576 /* map last frags into 4th, 5th .... */
577 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
578 tx_data_bd = (struct eth_tx_bd *)
579 qed_chain_produce(&txq->tx_pbl);
580
581 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
582
583 rc = map_frag_to_bd(edev,
584 &skb_shinfo(skb)->frags[frag_idx],
585 tx_data_bd);
586 if (rc) {
587 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
588 data_split);
589 return NETDEV_TX_OK;
590 }
591 }
592
593 /* update the first BD with the actual num BDs */
594 first_bd->data.nbds = nbd;
595
596 netdev_tx_sent_queue(netdev_txq, skb->len);
597
598 skb_tx_timestamp(skb);
599
600 /* Advance packet producer only before sending the packet since mapping
601 * of pages may fail.
602 */
603 txq->sw_tx_prod++;
604
605 /* 'next page' entries are counted in the producer value */
606 txq->tx_db.data.bd_prod =
607 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
608
609 /* wmb makes sure that the BDs data is updated before updating the
610 * producer, otherwise FW may read old data from the BDs.
611 */
612 wmb();
613 barrier();
614 writel(txq->tx_db.raw, txq->doorbell_addr);
615
616 /* mmiowb is needed to synchronize doorbell writes from more than one
617 * processor. It guarantees that the write arrives to the device before
618 * the queue lock is released and another start_xmit is called (possibly
619 * on another CPU). Without this barrier, the next doorbell can bypass
620 * this doorbell. This is applicable to IA64/Altix systems.
621 */
622 mmiowb();
623
624 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
625 < (MAX_SKB_FRAGS + 1))) {
626 netif_tx_stop_queue(netdev_txq);
627 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
628 "Stop queue was called\n");
629 /* paired memory barrier is in qede_tx_int(), we have to keep
630 * ordering of set_bit() in netif_tx_stop_queue() and read of
631 * fp->bd_tx_cons
632 */
633 smp_mb();
634
635 if (qed_chain_get_elem_left(&txq->tx_pbl)
636 >= (MAX_SKB_FRAGS + 1) &&
637 (edev->state == QEDE_STATE_OPEN)) {
638 netif_tx_wake_queue(netdev_txq);
639 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
640 "Wake queue was called\n");
641 }
642 }
643
644 return NETDEV_TX_OK;
645}
646
647static int qede_txq_has_work(struct qede_tx_queue *txq)
648{
649 u16 hw_bd_cons;
650
651 /* Tell compiler that consumer and producer can change */
652 barrier();
653 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
654 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
655 return 0;
656
657 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
658}
659
660static int qede_tx_int(struct qede_dev *edev,
661 struct qede_tx_queue *txq)
662{
663 struct netdev_queue *netdev_txq;
664 u16 hw_bd_cons;
665 unsigned int pkts_compl = 0, bytes_compl = 0;
666 int rc;
667
668 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
669
670 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
671 barrier();
672
673 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
674 int len = 0;
675
676 rc = qede_free_tx_pkt(edev, txq, &len);
677 if (rc) {
678 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
679 hw_bd_cons,
680 qed_chain_get_cons_idx(&txq->tx_pbl));
681 break;
682 }
683
684 bytes_compl += len;
685 pkts_compl++;
686 txq->sw_tx_cons++;
687 }
688
689 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
690
691 /* Need to make the tx_bd_cons update visible to start_xmit()
692 * before checking for netif_tx_queue_stopped(). Without the
693 * memory barrier, there is a small possibility that
694 * start_xmit() will miss it and cause the queue to be stopped
695 * forever.
696 * On the other hand we need an rmb() here to ensure the proper
697 * ordering of bit testing in the following
698 * netif_tx_queue_stopped(txq) call.
699 */
700 smp_mb();
701
702 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
703 /* Taking tx_lock is needed to prevent reenabling the queue
704 * while it's empty. This could have happen if rx_action() gets
705 * suspended in qede_tx_int() after the condition before
706 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
707 *
708 * stops the queue->sees fresh tx_bd_cons->releases the queue->
709 * sends some packets consuming the whole queue again->
710 * stops the queue
711 */
712
713 __netif_tx_lock(netdev_txq, smp_processor_id());
714
715 if ((netif_tx_queue_stopped(netdev_txq)) &&
716 (edev->state == QEDE_STATE_OPEN) &&
717 (qed_chain_get_elem_left(&txq->tx_pbl)
718 >= (MAX_SKB_FRAGS + 1))) {
719 netif_tx_wake_queue(netdev_txq);
720 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
721 "Wake queue was called\n");
722 }
723
724 __netif_tx_unlock(netdev_txq);
725 }
726
727 return 0;
728}
729
730static bool qede_has_rx_work(struct qede_rx_queue *rxq)
731{
732 u16 hw_comp_cons, sw_comp_cons;
733
734 /* Tell compiler that status block fields can change */
735 barrier();
736
737 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
738 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
739
740 return hw_comp_cons != sw_comp_cons;
741}
742
743static bool qede_has_tx_work(struct qede_fastpath *fp)
744{
745 u8 tc;
746
747 for (tc = 0; tc < fp->edev->num_tc; tc++)
748 if (qede_txq_has_work(&fp->txqs[tc]))
749 return true;
750 return false;
751}
752
753static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
754{
755 qed_chain_consume(&rxq->rx_bd_ring);
756 rxq->sw_rx_cons++;
757}
758
759/* This function reuses the buffer(from an offset) from
760 * consumer index to producer index in the bd ring
761 */
762static inline void qede_reuse_page(struct qede_dev *edev,
763 struct qede_rx_queue *rxq,
764 struct sw_rx_data *curr_cons)
765{
766 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
767 struct sw_rx_data *curr_prod;
768 dma_addr_t new_mapping;
769
770 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
771 *curr_prod = *curr_cons;
772
773 new_mapping = curr_prod->mapping + curr_prod->page_offset;
774
775 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
776 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
777
778 rxq->sw_rx_prod++;
779 curr_cons->data = NULL;
780}
781
782/* In case of allocation failures reuse buffers
783 * from consumer index to produce buffers for firmware
784 */
785static void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
786 struct qede_dev *edev, u8 count)
787{
788 struct sw_rx_data *curr_cons;
789
790 for (; count > 0; count--) {
791 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
792 qede_reuse_page(edev, rxq, curr_cons);
793 qede_rx_bd_ring_consume(rxq);
794 }
795}
796
797static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
798 struct qede_rx_queue *rxq,
799 struct sw_rx_data *curr_cons)
800{
801 /* Move to the next segment in the page */
802 curr_cons->page_offset += rxq->rx_buf_seg_size;
803
804 if (curr_cons->page_offset == PAGE_SIZE) {
805 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
806 /* Since we failed to allocate new buffer
807 * current buffer can be used again.
808 */
809 curr_cons->page_offset -= rxq->rx_buf_seg_size;
810
811 return -ENOMEM;
812 }
813
814 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
815 PAGE_SIZE, DMA_FROM_DEVICE);
816 } else {
817 /* Increment refcount of the page as we don't want
818 * network stack to take the ownership of the page
819 * which can be recycled multiple times by the driver.
820 */
821 atomic_inc(&curr_cons->data->_count);
822 qede_reuse_page(edev, rxq, curr_cons);
823 }
824
825 return 0;
826}
827
828static inline void qede_update_rx_prod(struct qede_dev *edev,
829 struct qede_rx_queue *rxq)
830{
831 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
832 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
833 struct eth_rx_prod_data rx_prods = {0};
834
835 /* Update producers */
836 rx_prods.bd_prod = cpu_to_le16(bd_prod);
837 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
838
839 /* Make sure that the BD and SGE data is updated before updating the
840 * producers since FW might read the BD/SGE right after the producer
841 * is updated.
842 */
843 wmb();
844
845 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
846 (u32 *)&rx_prods);
847
848 /* mmiowb is needed to synchronize doorbell writes from more than one
849 * processor. It guarantees that the write arrives to the device before
850 * the napi lock is released and another qede_poll is called (possibly
851 * on another CPU). Without this barrier, the next doorbell can bypass
852 * this doorbell. This is applicable to IA64/Altix systems.
853 */
854 mmiowb();
855}
856
857static u32 qede_get_rxhash(struct qede_dev *edev,
858 u8 bitfields,
859 __le32 rss_hash,
860 enum pkt_hash_types *rxhash_type)
861{
862 enum rss_hash_type htype;
863
864 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
865
866 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
867 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
868 (htype == RSS_HASH_TYPE_IPV6)) ?
869 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
870 return le32_to_cpu(rss_hash);
871 }
872 *rxhash_type = PKT_HASH_TYPE_NONE;
873 return 0;
874}
875
876static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
877{
878 skb_checksum_none_assert(skb);
879
880 if (csum_flag & QEDE_CSUM_UNNECESSARY)
881 skb->ip_summed = CHECKSUM_UNNECESSARY;
882}
883
884static inline void qede_skb_receive(struct qede_dev *edev,
885 struct qede_fastpath *fp,
886 struct sk_buff *skb,
887 u16 vlan_tag)
888{
889 if (vlan_tag)
890 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
891 vlan_tag);
892
893 napi_gro_receive(&fp->napi, skb);
894}
895
896static void qede_set_gro_params(struct qede_dev *edev,
897 struct sk_buff *skb,
898 struct eth_fast_path_rx_tpa_start_cqe *cqe)
899{
900 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
901
902 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
903 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
904 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
905 else
906 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
907
908 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
909 cqe->header_len;
910}
911
912static int qede_fill_frag_skb(struct qede_dev *edev,
913 struct qede_rx_queue *rxq,
914 u8 tpa_agg_index,
915 u16 len_on_bd)
916{
917 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
918 NUM_RX_BDS_MAX];
919 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
920 struct sk_buff *skb = tpa_info->skb;
921
922 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
923 goto out;
924
925 /* Add one frag and update the appropriate fields in the skb */
926 skb_fill_page_desc(skb, tpa_info->frag_id++,
927 current_bd->data, current_bd->page_offset,
928 len_on_bd);
929
930 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
931 /* Incr page ref count to reuse on allocation failure
932 * so that it doesn't get freed while freeing SKB.
933 */
934 atomic_inc(¤t_bd->data->_count);
935 goto out;
936 }
937
938 qed_chain_consume(&rxq->rx_bd_ring);
939 rxq->sw_rx_cons++;
940
941 skb->data_len += len_on_bd;
942 skb->truesize += rxq->rx_buf_seg_size;
943 skb->len += len_on_bd;
944
945 return 0;
946
947out:
948 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
949 qede_recycle_rx_bd_ring(rxq, edev, 1);
950 return -ENOMEM;
951}
952
953static void qede_tpa_start(struct qede_dev *edev,
954 struct qede_rx_queue *rxq,
955 struct eth_fast_path_rx_tpa_start_cqe *cqe)
956{
957 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
958 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
959 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
960 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
961 dma_addr_t mapping = tpa_info->replace_buf_mapping;
962 struct sw_rx_data *sw_rx_data_cons;
963 struct sw_rx_data *sw_rx_data_prod;
964 enum pkt_hash_types rxhash_type;
965 u32 rxhash;
966
967 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
968 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
969
970 /* Use pre-allocated replacement buffer - we can't release the agg.
971 * start until its over and we don't want to risk allocation failing
972 * here, so re-allocate when aggregation will be over.
973 */
974 dma_unmap_addr_set(sw_rx_data_prod, mapping,
975 dma_unmap_addr(replace_buf, mapping));
976
977 sw_rx_data_prod->data = replace_buf->data;
978 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
979 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
980 sw_rx_data_prod->page_offset = replace_buf->page_offset;
981
982 rxq->sw_rx_prod++;
983
984 /* move partial skb from cons to pool (don't unmap yet)
985 * save mapping, incase we drop the packet later on.
986 */
987 tpa_info->start_buf = *sw_rx_data_cons;
988 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
989 le32_to_cpu(rx_bd_cons->addr.lo));
990
991 tpa_info->start_buf_mapping = mapping;
992 rxq->sw_rx_cons++;
993
994 /* set tpa state to start only if we are able to allocate skb
995 * for this aggregation, otherwise mark as error and aggregation will
996 * be dropped
997 */
998 tpa_info->skb = netdev_alloc_skb(edev->ndev,
999 le16_to_cpu(cqe->len_on_first_bd));
1000 if (unlikely(!tpa_info->skb)) {
1001 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
1002 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1003 goto cons_buf;
1004 }
1005
1006 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1007 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1008
1009 /* Start filling in the aggregation info */
1010 tpa_info->frag_id = 0;
1011 tpa_info->agg_state = QEDE_AGG_STATE_START;
1012
1013 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1014 cqe->rss_hash, &rxhash_type);
1015 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1016 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1017 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1018 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1019 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1020 else
1021 tpa_info->vlan_tag = 0;
1022
1023 /* This is needed in order to enable forwarding support */
1024 qede_set_gro_params(edev, tpa_info->skb, cqe);
1025
1026cons_buf: /* We still need to handle bd_len_list to consume buffers */
1027 if (likely(cqe->ext_bd_len_list[0]))
1028 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1029 le16_to_cpu(cqe->ext_bd_len_list[0]));
1030
1031 if (unlikely(cqe->ext_bd_len_list[1])) {
1032 DP_ERR(edev,
1033 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1034 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1035 }
1036}
1037
1038#ifdef CONFIG_INET
1039static void qede_gro_ip_csum(struct sk_buff *skb)
1040{
1041 const struct iphdr *iph = ip_hdr(skb);
1042 struct tcphdr *th;
1043
1044 skb_set_transport_header(skb, sizeof(struct iphdr));
1045 th = tcp_hdr(skb);
1046
1047 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1048 iph->saddr, iph->daddr, 0);
1049
1050 tcp_gro_complete(skb);
1051}
1052
1053static void qede_gro_ipv6_csum(struct sk_buff *skb)
1054{
1055 struct ipv6hdr *iph = ipv6_hdr(skb);
1056 struct tcphdr *th;
1057
1058 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1059 th = tcp_hdr(skb);
1060
1061 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1062 &iph->saddr, &iph->daddr, 0);
1063 tcp_gro_complete(skb);
1064}
1065#endif
1066
1067static void qede_gro_receive(struct qede_dev *edev,
1068 struct qede_fastpath *fp,
1069 struct sk_buff *skb,
1070 u16 vlan_tag)
1071{
1072 /* FW can send a single MTU sized packet from gro flow
1073 * due to aggregation timeout/last segment etc. which
1074 * is not expected to be a gro packet. If a skb has zero
1075 * frags then simply push it in the stack as non gso skb.
1076 */
1077 if (unlikely(!skb->data_len)) {
1078 skb_shinfo(skb)->gso_type = 0;
1079 skb_shinfo(skb)->gso_size = 0;
1080 goto send_skb;
1081 }
1082
1083#ifdef CONFIG_INET
1084 if (skb_shinfo(skb)->gso_size) {
1085 skb_set_network_header(skb, 0);
1086
1087 switch (skb->protocol) {
1088 case htons(ETH_P_IP):
1089 qede_gro_ip_csum(skb);
1090 break;
1091 case htons(ETH_P_IPV6):
1092 qede_gro_ipv6_csum(skb);
1093 break;
1094 default:
1095 DP_ERR(edev,
1096 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1097 ntohs(skb->protocol));
1098 }
1099 }
1100#endif
1101
1102send_skb:
1103 skb_record_rx_queue(skb, fp->rss_id);
1104 qede_skb_receive(edev, fp, skb, vlan_tag);
1105}
1106
1107static inline void qede_tpa_cont(struct qede_dev *edev,
1108 struct qede_rx_queue *rxq,
1109 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1110{
1111 int i;
1112
1113 for (i = 0; cqe->len_list[i]; i++)
1114 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1115 le16_to_cpu(cqe->len_list[i]));
1116
1117 if (unlikely(i > 1))
1118 DP_ERR(edev,
1119 "Strange - TPA cont with more than a single len_list entry\n");
1120}
1121
1122static void qede_tpa_end(struct qede_dev *edev,
1123 struct qede_fastpath *fp,
1124 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1125{
1126 struct qede_rx_queue *rxq = fp->rxq;
1127 struct qede_agg_info *tpa_info;
1128 struct sk_buff *skb;
1129 int i;
1130
1131 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1132 skb = tpa_info->skb;
1133
1134 for (i = 0; cqe->len_list[i]; i++)
1135 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1136 le16_to_cpu(cqe->len_list[i]));
1137 if (unlikely(i > 1))
1138 DP_ERR(edev,
1139 "Strange - TPA emd with more than a single len_list entry\n");
1140
1141 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1142 goto err;
1143
1144 /* Sanity */
1145 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1146 DP_ERR(edev,
1147 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1148 cqe->num_of_bds, tpa_info->frag_id);
1149 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1150 DP_ERR(edev,
1151 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1152 le16_to_cpu(cqe->total_packet_len), skb->len);
1153
1154 memcpy(skb->data,
1155 page_address(tpa_info->start_buf.data) +
1156 tpa_info->start_cqe.placement_offset +
1157 tpa_info->start_buf.page_offset,
1158 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1159
1160 /* Recycle [mapped] start buffer for the next replacement */
1161 tpa_info->replace_buf = tpa_info->start_buf;
1162 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1163
1164 /* Finalize the SKB */
1165 skb->protocol = eth_type_trans(skb, edev->ndev);
1166 skb->ip_summed = CHECKSUM_UNNECESSARY;
1167
1168 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1169 * to skb_shinfo(skb)->gso_segs
1170 */
1171 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1172
1173 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1174
1175 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1176
1177 return;
1178err:
1179 /* The BD starting the aggregation is still mapped; Re-use it for
1180 * future aggregations [as replacement buffer]
1181 */
1182 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1183 sizeof(struct sw_rx_data));
1184 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1185 tpa_info->start_buf.data = NULL;
1186 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1187 dev_kfree_skb_any(tpa_info->skb);
1188 tpa_info->skb = NULL;
1189}
1190
1191static u8 qede_check_csum(u16 flag)
1192{
1193 u16 csum_flag = 0;
1194 u8 csum = 0;
1195
1196 if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1197 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
1198 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1199 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1200 csum = QEDE_CSUM_UNNECESSARY;
1201 }
1202
1203 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1204 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1205
1206 if (csum_flag & flag)
1207 return QEDE_CSUM_ERROR;
1208
1209 return csum;
1210}
1211
1212static int qede_rx_int(struct qede_fastpath *fp, int budget)
1213{
1214 struct qede_dev *edev = fp->edev;
1215 struct qede_rx_queue *rxq = fp->rxq;
1216
1217 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1218 int rx_pkt = 0;
1219 u8 csum_flag;
1220
1221 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1222 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1223
1224 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1225 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1226 * read before it is written by FW, then FW writes CQE and SB, and then
1227 * the CPU reads the hw_comp_cons, it will use an old CQE.
1228 */
1229 rmb();
1230
1231 /* Loop to complete all indicated BDs */
1232 while (sw_comp_cons != hw_comp_cons) {
1233 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1234 enum pkt_hash_types rxhash_type;
1235 enum eth_rx_cqe_type cqe_type;
1236 struct sw_rx_data *sw_rx_data;
1237 union eth_rx_cqe *cqe;
1238 struct sk_buff *skb;
1239 struct page *data;
1240 __le16 flags;
1241 u16 len, pad;
1242 u32 rx_hash;
1243
1244 /* Get the CQE from the completion ring */
1245 cqe = (union eth_rx_cqe *)
1246 qed_chain_consume(&rxq->rx_comp_ring);
1247 cqe_type = cqe->fast_path_regular.type;
1248
1249 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1250 edev->ops->eth_cqe_completion(
1251 edev->cdev, fp->rss_id,
1252 (struct eth_slow_path_rx_cqe *)cqe);
1253 goto next_cqe;
1254 }
1255
1256 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1257 switch (cqe_type) {
1258 case ETH_RX_CQE_TYPE_TPA_START:
1259 qede_tpa_start(edev, rxq,
1260 &cqe->fast_path_tpa_start);
1261 goto next_cqe;
1262 case ETH_RX_CQE_TYPE_TPA_CONT:
1263 qede_tpa_cont(edev, rxq,
1264 &cqe->fast_path_tpa_cont);
1265 goto next_cqe;
1266 case ETH_RX_CQE_TYPE_TPA_END:
1267 qede_tpa_end(edev, fp,
1268 &cqe->fast_path_tpa_end);
1269 goto next_rx_only;
1270 default:
1271 break;
1272 }
1273 }
1274
1275 /* Get the data from the SW ring */
1276 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1277 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1278 data = sw_rx_data->data;
1279
1280 fp_cqe = &cqe->fast_path_regular;
1281 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1282 pad = fp_cqe->placement_offset;
1283 flags = cqe->fast_path_regular.pars_flags.flags;
1284
1285 /* If this is an error packet then drop it */
1286 parse_flag = le16_to_cpu(flags);
1287
1288 csum_flag = qede_check_csum(parse_flag);
1289 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1290 DP_NOTICE(edev,
1291 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1292 sw_comp_cons, parse_flag);
1293 rxq->rx_hw_errors++;
1294 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1295 goto next_cqe;
1296 }
1297
1298 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1299 if (unlikely(!skb)) {
1300 DP_NOTICE(edev,
1301 "Build_skb failed, dropping incoming packet\n");
1302 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1303 rxq->rx_alloc_errors++;
1304 goto next_cqe;
1305 }
1306
1307 /* Copy data into SKB */
1308 if (len + pad <= QEDE_RX_HDR_SIZE) {
1309 memcpy(skb_put(skb, len),
1310 page_address(data) + pad +
1311 sw_rx_data->page_offset, len);
1312 qede_reuse_page(edev, rxq, sw_rx_data);
1313 } else {
1314 struct skb_frag_struct *frag;
1315 unsigned int pull_len;
1316 unsigned char *va;
1317
1318 frag = &skb_shinfo(skb)->frags[0];
1319
1320 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1321 pad + sw_rx_data->page_offset,
1322 len, rxq->rx_buf_seg_size);
1323
1324 va = skb_frag_address(frag);
1325 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1326
1327 /* Align the pull_len to optimize memcpy */
1328 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1329
1330 skb_frag_size_sub(frag, pull_len);
1331 frag->page_offset += pull_len;
1332 skb->data_len -= pull_len;
1333 skb->tail += pull_len;
1334
1335 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1336 sw_rx_data))) {
1337 DP_ERR(edev, "Failed to allocate rx buffer\n");
1338 /* Incr page ref count to reuse on allocation
1339 * failure so that it doesn't get freed while
1340 * freeing SKB.
1341 */
1342
1343 atomic_inc(&sw_rx_data->data->_count);
1344 rxq->rx_alloc_errors++;
1345 qede_recycle_rx_bd_ring(rxq, edev,
1346 fp_cqe->bd_num);
1347 dev_kfree_skb_any(skb);
1348 goto next_cqe;
1349 }
1350 }
1351
1352 qede_rx_bd_ring_consume(rxq);
1353
1354 if (fp_cqe->bd_num != 1) {
1355 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1356 u8 num_frags;
1357
1358 pkt_len -= len;
1359
1360 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1361 num_frags--) {
1362 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1363 rxq->rx_buf_size : pkt_len;
1364 if (unlikely(!cur_size)) {
1365 DP_ERR(edev,
1366 "Still got %d BDs for mapping jumbo, but length became 0\n",
1367 num_frags);
1368 qede_recycle_rx_bd_ring(rxq, edev,
1369 num_frags);
1370 dev_kfree_skb_any(skb);
1371 goto next_cqe;
1372 }
1373
1374 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1375 qede_recycle_rx_bd_ring(rxq, edev,
1376 num_frags);
1377 dev_kfree_skb_any(skb);
1378 goto next_cqe;
1379 }
1380
1381 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1382 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1383 qede_rx_bd_ring_consume(rxq);
1384
1385 dma_unmap_page(&edev->pdev->dev,
1386 sw_rx_data->mapping,
1387 PAGE_SIZE, DMA_FROM_DEVICE);
1388
1389 skb_fill_page_desc(skb,
1390 skb_shinfo(skb)->nr_frags++,
1391 sw_rx_data->data, 0,
1392 cur_size);
1393
1394 skb->truesize += PAGE_SIZE;
1395 skb->data_len += cur_size;
1396 skb->len += cur_size;
1397 pkt_len -= cur_size;
1398 }
1399
1400 if (unlikely(pkt_len))
1401 DP_ERR(edev,
1402 "Mapped all BDs of jumbo, but still have %d bytes\n",
1403 pkt_len);
1404 }
1405
1406 skb->protocol = eth_type_trans(skb, edev->ndev);
1407
1408 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1409 fp_cqe->rss_hash,
1410 &rxhash_type);
1411
1412 skb_set_hash(skb, rx_hash, rxhash_type);
1413
1414 qede_set_skb_csum(skb, csum_flag);
1415
1416 skb_record_rx_queue(skb, fp->rss_id);
1417
1418 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
1419next_rx_only:
1420 rx_pkt++;
1421
1422next_cqe: /* don't consume bd rx buffer */
1423 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1424 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1425 /* CR TPA - revisit how to handle budget in TPA perhaps
1426 * increase on "end"
1427 */
1428 if (rx_pkt == budget)
1429 break;
1430 } /* repeat while sw_comp_cons != hw_comp_cons... */
1431
1432 /* Update producers */
1433 qede_update_rx_prod(edev, rxq);
1434
1435 return rx_pkt;
1436}
1437
1438static int qede_poll(struct napi_struct *napi, int budget)
1439{
1440 int work_done = 0;
1441 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1442 napi);
1443 struct qede_dev *edev = fp->edev;
1444
1445 while (1) {
1446 u8 tc;
1447
1448 for (tc = 0; tc < edev->num_tc; tc++)
1449 if (qede_txq_has_work(&fp->txqs[tc]))
1450 qede_tx_int(edev, &fp->txqs[tc]);
1451
1452 if (qede_has_rx_work(fp->rxq)) {
1453 work_done += qede_rx_int(fp, budget - work_done);
1454
1455 /* must not complete if we consumed full budget */
1456 if (work_done >= budget)
1457 break;
1458 }
1459
1460 /* Fall out from the NAPI loop if needed */
1461 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1462 qed_sb_update_sb_idx(fp->sb_info);
1463 /* *_has_*_work() reads the status block,
1464 * thus we need to ensure that status block indices
1465 * have been actually read (qed_sb_update_sb_idx)
1466 * prior to this check (*_has_*_work) so that
1467 * we won't write the "newer" value of the status block
1468 * to HW (if there was a DMA right after
1469 * qede_has_rx_work and if there is no rmb, the memory
1470 * reading (qed_sb_update_sb_idx) may be postponed
1471 * to right before *_ack_sb). In this case there
1472 * will never be another interrupt until there is
1473 * another update of the status block, while there
1474 * is still unhandled work.
1475 */
1476 rmb();
1477
1478 if (!(qede_has_rx_work(fp->rxq) ||
1479 qede_has_tx_work(fp))) {
1480 napi_complete(napi);
1481 /* Update and reenable interrupts */
1482 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1483 1 /*update*/);
1484 break;
1485 }
1486 }
1487 }
1488
1489 return work_done;
1490}
1491
1492static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1493{
1494 struct qede_fastpath *fp = fp_cookie;
1495
1496 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1497
1498 napi_schedule_irqoff(&fp->napi);
1499 return IRQ_HANDLED;
1500}
1501
1502/* -------------------------------------------------------------------------
1503 * END OF FAST-PATH
1504 * -------------------------------------------------------------------------
1505 */
1506
1507static int qede_open(struct net_device *ndev);
1508static int qede_close(struct net_device *ndev);
1509static int qede_set_mac_addr(struct net_device *ndev, void *p);
1510static void qede_set_rx_mode(struct net_device *ndev);
1511static void qede_config_rx_mode(struct net_device *ndev);
1512
1513static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1514 enum qed_filter_xcast_params_type opcode,
1515 unsigned char mac[ETH_ALEN])
1516{
1517 struct qed_filter_params filter_cmd;
1518
1519 memset(&filter_cmd, 0, sizeof(filter_cmd));
1520 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1521 filter_cmd.filter.ucast.type = opcode;
1522 filter_cmd.filter.ucast.mac_valid = 1;
1523 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1524
1525 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1526}
1527
1528static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1529 enum qed_filter_xcast_params_type opcode,
1530 u16 vid)
1531{
1532 struct qed_filter_params filter_cmd;
1533
1534 memset(&filter_cmd, 0, sizeof(filter_cmd));
1535 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1536 filter_cmd.filter.ucast.type = opcode;
1537 filter_cmd.filter.ucast.vlan_valid = 1;
1538 filter_cmd.filter.ucast.vlan = vid;
1539
1540 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1541}
1542
1543void qede_fill_by_demand_stats(struct qede_dev *edev)
1544{
1545 struct qed_eth_stats stats;
1546
1547 edev->ops->get_vport_stats(edev->cdev, &stats);
1548 edev->stats.no_buff_discards = stats.no_buff_discards;
1549 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1550 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1551 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1552 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1553 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1554 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1555 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1556 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1557
1558 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1559 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1560 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1561 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1562 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1563 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1564 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1565 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1566 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1567 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1568 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1569 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1570
1571 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
1572 edev->stats.rx_127_byte_packets = stats.rx_127_byte_packets;
1573 edev->stats.rx_255_byte_packets = stats.rx_255_byte_packets;
1574 edev->stats.rx_511_byte_packets = stats.rx_511_byte_packets;
1575 edev->stats.rx_1023_byte_packets = stats.rx_1023_byte_packets;
1576 edev->stats.rx_1518_byte_packets = stats.rx_1518_byte_packets;
1577 edev->stats.rx_1522_byte_packets = stats.rx_1522_byte_packets;
1578 edev->stats.rx_2047_byte_packets = stats.rx_2047_byte_packets;
1579 edev->stats.rx_4095_byte_packets = stats.rx_4095_byte_packets;
1580 edev->stats.rx_9216_byte_packets = stats.rx_9216_byte_packets;
1581 edev->stats.rx_16383_byte_packets = stats.rx_16383_byte_packets;
1582 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1583 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1584 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1585 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1586 edev->stats.rx_align_errors = stats.rx_align_errors;
1587 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1588 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1589 edev->stats.rx_jabbers = stats.rx_jabbers;
1590 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1591 edev->stats.rx_fragments = stats.rx_fragments;
1592 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1593 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1594 edev->stats.tx_128_to_255_byte_packets =
1595 stats.tx_128_to_255_byte_packets;
1596 edev->stats.tx_256_to_511_byte_packets =
1597 stats.tx_256_to_511_byte_packets;
1598 edev->stats.tx_512_to_1023_byte_packets =
1599 stats.tx_512_to_1023_byte_packets;
1600 edev->stats.tx_1024_to_1518_byte_packets =
1601 stats.tx_1024_to_1518_byte_packets;
1602 edev->stats.tx_1519_to_2047_byte_packets =
1603 stats.tx_1519_to_2047_byte_packets;
1604 edev->stats.tx_2048_to_4095_byte_packets =
1605 stats.tx_2048_to_4095_byte_packets;
1606 edev->stats.tx_4096_to_9216_byte_packets =
1607 stats.tx_4096_to_9216_byte_packets;
1608 edev->stats.tx_9217_to_16383_byte_packets =
1609 stats.tx_9217_to_16383_byte_packets;
1610 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1611 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1612 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1613 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1614 edev->stats.brb_truncates = stats.brb_truncates;
1615 edev->stats.brb_discards = stats.brb_discards;
1616 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1617}
1618
1619static struct rtnl_link_stats64 *qede_get_stats64(
1620 struct net_device *dev,
1621 struct rtnl_link_stats64 *stats)
1622{
1623 struct qede_dev *edev = netdev_priv(dev);
1624
1625 qede_fill_by_demand_stats(edev);
1626
1627 stats->rx_packets = edev->stats.rx_ucast_pkts +
1628 edev->stats.rx_mcast_pkts +
1629 edev->stats.rx_bcast_pkts;
1630 stats->tx_packets = edev->stats.tx_ucast_pkts +
1631 edev->stats.tx_mcast_pkts +
1632 edev->stats.tx_bcast_pkts;
1633
1634 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1635 edev->stats.rx_mcast_bytes +
1636 edev->stats.rx_bcast_bytes;
1637
1638 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1639 edev->stats.tx_mcast_bytes +
1640 edev->stats.tx_bcast_bytes;
1641
1642 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1643 stats->multicast = edev->stats.rx_mcast_pkts +
1644 edev->stats.rx_bcast_pkts;
1645
1646 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1647
1648 stats->collisions = edev->stats.tx_total_collisions;
1649 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1650 stats->rx_frame_errors = edev->stats.rx_align_errors;
1651
1652 return stats;
1653}
1654
1655static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1656{
1657 struct qed_update_vport_params params;
1658 int rc;
1659
1660 /* Proceed only if action actually needs to be performed */
1661 if (edev->accept_any_vlan == action)
1662 return;
1663
1664 memset(¶ms, 0, sizeof(params));
1665
1666 params.vport_id = 0;
1667 params.accept_any_vlan = action;
1668 params.update_accept_any_vlan_flg = 1;
1669
1670 rc = edev->ops->vport_update(edev->cdev, ¶ms);
1671 if (rc) {
1672 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1673 action ? "enable" : "disable");
1674 } else {
1675 DP_INFO(edev, "%s accept-any-vlan\n",
1676 action ? "enabled" : "disabled");
1677 edev->accept_any_vlan = action;
1678 }
1679}
1680
1681static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1682{
1683 struct qede_dev *edev = netdev_priv(dev);
1684 struct qede_vlan *vlan, *tmp;
1685 int rc;
1686
1687 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1688
1689 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1690 if (!vlan) {
1691 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1692 return -ENOMEM;
1693 }
1694 INIT_LIST_HEAD(&vlan->list);
1695 vlan->vid = vid;
1696 vlan->configured = false;
1697
1698 /* Verify vlan isn't already configured */
1699 list_for_each_entry(tmp, &edev->vlan_list, list) {
1700 if (tmp->vid == vlan->vid) {
1701 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1702 "vlan already configured\n");
1703 kfree(vlan);
1704 return -EEXIST;
1705 }
1706 }
1707
1708 /* If interface is down, cache this VLAN ID and return */
1709 if (edev->state != QEDE_STATE_OPEN) {
1710 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1711 "Interface is down, VLAN %d will be configured when interface is up\n",
1712 vid);
1713 if (vid != 0)
1714 edev->non_configured_vlans++;
1715 list_add(&vlan->list, &edev->vlan_list);
1716
1717 return 0;
1718 }
1719
1720 /* Check for the filter limit.
1721 * Note - vlan0 has a reserved filter and can be added without
1722 * worrying about quota
1723 */
1724 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1725 (vlan->vid == 0)) {
1726 rc = qede_set_ucast_rx_vlan(edev,
1727 QED_FILTER_XCAST_TYPE_ADD,
1728 vlan->vid);
1729 if (rc) {
1730 DP_ERR(edev, "Failed to configure VLAN %d\n",
1731 vlan->vid);
1732 kfree(vlan);
1733 return -EINVAL;
1734 }
1735 vlan->configured = true;
1736
1737 /* vlan0 filter isn't consuming out of our quota */
1738 if (vlan->vid != 0)
1739 edev->configured_vlans++;
1740 } else {
1741 /* Out of quota; Activate accept-any-VLAN mode */
1742 if (!edev->non_configured_vlans)
1743 qede_config_accept_any_vlan(edev, true);
1744
1745 edev->non_configured_vlans++;
1746 }
1747
1748 list_add(&vlan->list, &edev->vlan_list);
1749
1750 return 0;
1751}
1752
1753static void qede_del_vlan_from_list(struct qede_dev *edev,
1754 struct qede_vlan *vlan)
1755{
1756 /* vlan0 filter isn't consuming out of our quota */
1757 if (vlan->vid != 0) {
1758 if (vlan->configured)
1759 edev->configured_vlans--;
1760 else
1761 edev->non_configured_vlans--;
1762 }
1763
1764 list_del(&vlan->list);
1765 kfree(vlan);
1766}
1767
1768static int qede_configure_vlan_filters(struct qede_dev *edev)
1769{
1770 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1771 struct qed_dev_eth_info *dev_info;
1772 struct qede_vlan *vlan = NULL;
1773
1774 if (list_empty(&edev->vlan_list))
1775 return 0;
1776
1777 dev_info = &edev->dev_info;
1778
1779 /* Configure non-configured vlans */
1780 list_for_each_entry(vlan, &edev->vlan_list, list) {
1781 if (vlan->configured)
1782 continue;
1783
1784 /* We have used all our credits, now enable accept_any_vlan */
1785 if ((vlan->vid != 0) &&
1786 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1787 accept_any_vlan = 1;
1788 continue;
1789 }
1790
1791 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1792
1793 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1794 vlan->vid);
1795 if (rc) {
1796 DP_ERR(edev, "Failed to configure VLAN %u\n",
1797 vlan->vid);
1798 real_rc = rc;
1799 continue;
1800 }
1801
1802 vlan->configured = true;
1803 /* vlan0 filter doesn't consume our VLAN filter's quota */
1804 if (vlan->vid != 0) {
1805 edev->non_configured_vlans--;
1806 edev->configured_vlans++;
1807 }
1808 }
1809
1810 /* enable accept_any_vlan mode if we have more VLANs than credits,
1811 * or remove accept_any_vlan mode if we've actually removed
1812 * a non-configured vlan, and all remaining vlans are truly configured.
1813 */
1814
1815 if (accept_any_vlan)
1816 qede_config_accept_any_vlan(edev, true);
1817 else if (!edev->non_configured_vlans)
1818 qede_config_accept_any_vlan(edev, false);
1819
1820 return real_rc;
1821}
1822
1823static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
1824{
1825 struct qede_dev *edev = netdev_priv(dev);
1826 struct qede_vlan *vlan = NULL;
1827 int rc;
1828
1829 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
1830
1831 /* Find whether entry exists */
1832 list_for_each_entry(vlan, &edev->vlan_list, list)
1833 if (vlan->vid == vid)
1834 break;
1835
1836 if (!vlan || (vlan->vid != vid)) {
1837 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1838 "Vlan isn't configured\n");
1839 return 0;
1840 }
1841
1842 if (edev->state != QEDE_STATE_OPEN) {
1843 /* As interface is already down, we don't have a VPORT
1844 * instance to remove vlan filter. So just update vlan list
1845 */
1846 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1847 "Interface is down, removing VLAN from list only\n");
1848 qede_del_vlan_from_list(edev, vlan);
1849 return 0;
1850 }
1851
1852 /* Remove vlan */
1853 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
1854 if (rc) {
1855 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
1856 return -EINVAL;
1857 }
1858
1859 qede_del_vlan_from_list(edev, vlan);
1860
1861 /* We have removed a VLAN - try to see if we can
1862 * configure non-configured VLAN from the list.
1863 */
1864 rc = qede_configure_vlan_filters(edev);
1865
1866 return rc;
1867}
1868
1869static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
1870{
1871 struct qede_vlan *vlan = NULL;
1872
1873 if (list_empty(&edev->vlan_list))
1874 return;
1875
1876 list_for_each_entry(vlan, &edev->vlan_list, list) {
1877 if (!vlan->configured)
1878 continue;
1879
1880 vlan->configured = false;
1881
1882 /* vlan0 filter isn't consuming out of our quota */
1883 if (vlan->vid != 0) {
1884 edev->non_configured_vlans++;
1885 edev->configured_vlans--;
1886 }
1887
1888 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1889 "marked vlan %d as non-configured\n",
1890 vlan->vid);
1891 }
1892
1893 edev->accept_any_vlan = false;
1894}
1895
1896static const struct net_device_ops qede_netdev_ops = {
1897 .ndo_open = qede_open,
1898 .ndo_stop = qede_close,
1899 .ndo_start_xmit = qede_start_xmit,
1900 .ndo_set_rx_mode = qede_set_rx_mode,
1901 .ndo_set_mac_address = qede_set_mac_addr,
1902 .ndo_validate_addr = eth_validate_addr,
1903 .ndo_change_mtu = qede_change_mtu,
1904 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
1905 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
1906 .ndo_get_stats64 = qede_get_stats64,
1907};
1908
1909/* -------------------------------------------------------------------------
1910 * START OF PROBE / REMOVE
1911 * -------------------------------------------------------------------------
1912 */
1913
1914static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
1915 struct pci_dev *pdev,
1916 struct qed_dev_eth_info *info,
1917 u32 dp_module,
1918 u8 dp_level)
1919{
1920 struct net_device *ndev;
1921 struct qede_dev *edev;
1922
1923 ndev = alloc_etherdev_mqs(sizeof(*edev),
1924 info->num_queues,
1925 info->num_queues);
1926 if (!ndev) {
1927 pr_err("etherdev allocation failed\n");
1928 return NULL;
1929 }
1930
1931 edev = netdev_priv(ndev);
1932 edev->ndev = ndev;
1933 edev->cdev = cdev;
1934 edev->pdev = pdev;
1935 edev->dp_module = dp_module;
1936 edev->dp_level = dp_level;
1937 edev->ops = qed_ops;
1938 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
1939 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
1940
1941 SET_NETDEV_DEV(ndev, &pdev->dev);
1942
1943 memset(&edev->stats, 0, sizeof(edev->stats));
1944 memcpy(&edev->dev_info, info, sizeof(*info));
1945
1946 edev->num_tc = edev->dev_info.num_tc;
1947
1948 INIT_LIST_HEAD(&edev->vlan_list);
1949
1950 return edev;
1951}
1952
1953static void qede_init_ndev(struct qede_dev *edev)
1954{
1955 struct net_device *ndev = edev->ndev;
1956 struct pci_dev *pdev = edev->pdev;
1957 u32 hw_features;
1958
1959 pci_set_drvdata(pdev, ndev);
1960
1961 ndev->mem_start = edev->dev_info.common.pci_mem_start;
1962 ndev->base_addr = ndev->mem_start;
1963 ndev->mem_end = edev->dev_info.common.pci_mem_end;
1964 ndev->irq = edev->dev_info.common.pci_irq;
1965
1966 ndev->watchdog_timeo = TX_TIMEOUT;
1967
1968 ndev->netdev_ops = &qede_netdev_ops;
1969
1970 qede_set_ethtool_ops(ndev);
1971
1972 /* user-changeble features */
1973 hw_features = NETIF_F_GRO | NETIF_F_SG |
1974 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1975 NETIF_F_TSO | NETIF_F_TSO6;
1976
1977 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1978 NETIF_F_HIGHDMA;
1979 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1980 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
1981 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
1982
1983 ndev->hw_features = hw_features;
1984
1985 /* Set network device HW mac */
1986 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
1987}
1988
1989/* This function converts from 32b param to two params of level and module
1990 * Input 32b decoding:
1991 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
1992 * 'happy' flow, e.g. memory allocation failed.
1993 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
1994 * and provide important parameters.
1995 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
1996 * module. VERBOSE prints are for tracking the specific flow in low level.
1997 *
1998 * Notice that the level should be that of the lowest required logs.
1999 */
2000void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
2001{
2002 *p_dp_level = QED_LEVEL_NOTICE;
2003 *p_dp_module = 0;
2004
2005 if (debug & QED_LOG_VERBOSE_MASK) {
2006 *p_dp_level = QED_LEVEL_VERBOSE;
2007 *p_dp_module = (debug & 0x3FFFFFFF);
2008 } else if (debug & QED_LOG_INFO_MASK) {
2009 *p_dp_level = QED_LEVEL_INFO;
2010 } else if (debug & QED_LOG_NOTICE_MASK) {
2011 *p_dp_level = QED_LEVEL_NOTICE;
2012 }
2013}
2014
2015static void qede_free_fp_array(struct qede_dev *edev)
2016{
2017 if (edev->fp_array) {
2018 struct qede_fastpath *fp;
2019 int i;
2020
2021 for_each_rss(i) {
2022 fp = &edev->fp_array[i];
2023
2024 kfree(fp->sb_info);
2025 kfree(fp->rxq);
2026 kfree(fp->txqs);
2027 }
2028 kfree(edev->fp_array);
2029 }
2030 edev->num_rss = 0;
2031}
2032
2033static int qede_alloc_fp_array(struct qede_dev *edev)
2034{
2035 struct qede_fastpath *fp;
2036 int i;
2037
2038 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2039 sizeof(*edev->fp_array), GFP_KERNEL);
2040 if (!edev->fp_array) {
2041 DP_NOTICE(edev, "fp array allocation failed\n");
2042 goto err;
2043 }
2044
2045 for_each_rss(i) {
2046 fp = &edev->fp_array[i];
2047
2048 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2049 if (!fp->sb_info) {
2050 DP_NOTICE(edev, "sb info struct allocation failed\n");
2051 goto err;
2052 }
2053
2054 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2055 if (!fp->rxq) {
2056 DP_NOTICE(edev, "RXQ struct allocation failed\n");
2057 goto err;
2058 }
2059
2060 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2061 if (!fp->txqs) {
2062 DP_NOTICE(edev, "TXQ array allocation failed\n");
2063 goto err;
2064 }
2065 }
2066
2067 return 0;
2068err:
2069 qede_free_fp_array(edev);
2070 return -ENOMEM;
2071}
2072
2073static void qede_sp_task(struct work_struct *work)
2074{
2075 struct qede_dev *edev = container_of(work, struct qede_dev,
2076 sp_task.work);
2077 mutex_lock(&edev->qede_lock);
2078
2079 if (edev->state == QEDE_STATE_OPEN) {
2080 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2081 qede_config_rx_mode(edev->ndev);
2082 }
2083
2084 mutex_unlock(&edev->qede_lock);
2085}
2086
2087static void qede_update_pf_params(struct qed_dev *cdev)
2088{
2089 struct qed_pf_params pf_params;
2090
2091 /* 64 rx + 64 tx */
2092 memset(&pf_params, 0, sizeof(struct qed_pf_params));
2093 pf_params.eth_pf_params.num_cons = 128;
2094 qed_ops->common->update_pf_params(cdev, &pf_params);
2095}
2096
2097enum qede_probe_mode {
2098 QEDE_PROBE_NORMAL,
2099};
2100
2101static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
2102 enum qede_probe_mode mode)
2103{
2104 struct qed_slowpath_params params;
2105 struct qed_dev_eth_info dev_info;
2106 struct qede_dev *edev;
2107 struct qed_dev *cdev;
2108 int rc;
2109
2110 if (unlikely(dp_level & QED_LEVEL_INFO))
2111 pr_notice("Starting qede probe\n");
2112
2113 cdev = qed_ops->common->probe(pdev, QED_PROTOCOL_ETH,
2114 dp_module, dp_level);
2115 if (!cdev) {
2116 rc = -ENODEV;
2117 goto err0;
2118 }
2119
2120 qede_update_pf_params(cdev);
2121
2122 /* Start the Slowpath-process */
2123 memset(¶ms, 0, sizeof(struct qed_slowpath_params));
2124 params.int_mode = QED_INT_MODE_MSIX;
2125 params.drv_major = QEDE_MAJOR_VERSION;
2126 params.drv_minor = QEDE_MINOR_VERSION;
2127 params.drv_rev = QEDE_REVISION_VERSION;
2128 params.drv_eng = QEDE_ENGINEERING_VERSION;
2129 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2130 rc = qed_ops->common->slowpath_start(cdev, ¶ms);
2131 if (rc) {
2132 pr_notice("Cannot start slowpath\n");
2133 goto err1;
2134 }
2135
2136 /* Learn information crucial for qede to progress */
2137 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2138 if (rc)
2139 goto err2;
2140
2141 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2142 dp_level);
2143 if (!edev) {
2144 rc = -ENOMEM;
2145 goto err2;
2146 }
2147
2148 qede_init_ndev(edev);
2149
2150 rc = register_netdev(edev->ndev);
2151 if (rc) {
2152 DP_NOTICE(edev, "Cannot register net-device\n");
2153 goto err3;
2154 }
2155
2156 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2157
2158 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2159
2160 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2161 mutex_init(&edev->qede_lock);
2162
2163 DP_INFO(edev, "Ending successfully qede probe\n");
2164
2165 return 0;
2166
2167err3:
2168 free_netdev(edev->ndev);
2169err2:
2170 qed_ops->common->slowpath_stop(cdev);
2171err1:
2172 qed_ops->common->remove(cdev);
2173err0:
2174 return rc;
2175}
2176
2177static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2178{
2179 u32 dp_module = 0;
2180 u8 dp_level = 0;
2181
2182 qede_config_debug(debug, &dp_module, &dp_level);
2183
2184 return __qede_probe(pdev, dp_module, dp_level,
2185 QEDE_PROBE_NORMAL);
2186}
2187
2188enum qede_remove_mode {
2189 QEDE_REMOVE_NORMAL,
2190};
2191
2192static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2193{
2194 struct net_device *ndev = pci_get_drvdata(pdev);
2195 struct qede_dev *edev = netdev_priv(ndev);
2196 struct qed_dev *cdev = edev->cdev;
2197
2198 DP_INFO(edev, "Starting qede_remove\n");
2199
2200 cancel_delayed_work_sync(&edev->sp_task);
2201 unregister_netdev(ndev);
2202
2203 edev->ops->common->set_power_state(cdev, PCI_D0);
2204
2205 pci_set_drvdata(pdev, NULL);
2206
2207 free_netdev(ndev);
2208
2209 /* Use global ops since we've freed edev */
2210 qed_ops->common->slowpath_stop(cdev);
2211 qed_ops->common->remove(cdev);
2212
2213 pr_notice("Ending successfully qede_remove\n");
2214}
2215
2216static void qede_remove(struct pci_dev *pdev)
2217{
2218 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2219}
2220
2221/* -------------------------------------------------------------------------
2222 * START OF LOAD / UNLOAD
2223 * -------------------------------------------------------------------------
2224 */
2225
2226static int qede_set_num_queues(struct qede_dev *edev)
2227{
2228 int rc;
2229 u16 rss_num;
2230
2231 /* Setup queues according to possible resources*/
2232 if (edev->req_rss)
2233 rss_num = edev->req_rss;
2234 else
2235 rss_num = netif_get_num_default_rss_queues() *
2236 edev->dev_info.common.num_hwfns;
2237
2238 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2239
2240 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2241 if (rc > 0) {
2242 /* Managed to request interrupts for our queues */
2243 edev->num_rss = rc;
2244 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2245 QEDE_RSS_CNT(edev), rss_num);
2246 rc = 0;
2247 }
2248 return rc;
2249}
2250
2251static void qede_free_mem_sb(struct qede_dev *edev,
2252 struct qed_sb_info *sb_info)
2253{
2254 if (sb_info->sb_virt)
2255 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2256 (void *)sb_info->sb_virt, sb_info->sb_phys);
2257}
2258
2259/* This function allocates fast-path status block memory */
2260static int qede_alloc_mem_sb(struct qede_dev *edev,
2261 struct qed_sb_info *sb_info,
2262 u16 sb_id)
2263{
2264 struct status_block *sb_virt;
2265 dma_addr_t sb_phys;
2266 int rc;
2267
2268 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2269 sizeof(*sb_virt),
2270 &sb_phys, GFP_KERNEL);
2271 if (!sb_virt) {
2272 DP_ERR(edev, "Status block allocation failed\n");
2273 return -ENOMEM;
2274 }
2275
2276 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2277 sb_virt, sb_phys, sb_id,
2278 QED_SB_TYPE_L2_QUEUE);
2279 if (rc) {
2280 DP_ERR(edev, "Status block initialization failed\n");
2281 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2282 sb_virt, sb_phys);
2283 return rc;
2284 }
2285
2286 return 0;
2287}
2288
2289static void qede_free_rx_buffers(struct qede_dev *edev,
2290 struct qede_rx_queue *rxq)
2291{
2292 u16 i;
2293
2294 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2295 struct sw_rx_data *rx_buf;
2296 struct page *data;
2297
2298 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2299 data = rx_buf->data;
2300
2301 dma_unmap_page(&edev->pdev->dev,
2302 rx_buf->mapping,
2303 PAGE_SIZE, DMA_FROM_DEVICE);
2304
2305 rx_buf->data = NULL;
2306 __free_page(data);
2307 }
2308}
2309
2310static void qede_free_sge_mem(struct qede_dev *edev,
2311 struct qede_rx_queue *rxq) {
2312 int i;
2313
2314 if (edev->gro_disable)
2315 return;
2316
2317 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2318 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2319 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2320
2321 if (replace_buf->data) {
2322 dma_unmap_page(&edev->pdev->dev,
2323 dma_unmap_addr(replace_buf, mapping),
2324 PAGE_SIZE, DMA_FROM_DEVICE);
2325 __free_page(replace_buf->data);
2326 }
2327 }
2328}
2329
2330static void qede_free_mem_rxq(struct qede_dev *edev,
2331 struct qede_rx_queue *rxq)
2332{
2333 qede_free_sge_mem(edev, rxq);
2334
2335 /* Free rx buffers */
2336 qede_free_rx_buffers(edev, rxq);
2337
2338 /* Free the parallel SW ring */
2339 kfree(rxq->sw_rx_ring);
2340
2341 /* Free the real RQ ring used by FW */
2342 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2343 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2344}
2345
2346static int qede_alloc_rx_buffer(struct qede_dev *edev,
2347 struct qede_rx_queue *rxq)
2348{
2349 struct sw_rx_data *sw_rx_data;
2350 struct eth_rx_bd *rx_bd;
2351 dma_addr_t mapping;
2352 struct page *data;
2353 u16 rx_buf_size;
2354
2355 rx_buf_size = rxq->rx_buf_size;
2356
2357 data = alloc_pages(GFP_ATOMIC, 0);
2358 if (unlikely(!data)) {
2359 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2360 return -ENOMEM;
2361 }
2362
2363 /* Map the entire page as it would be used
2364 * for multiple RX buffer segment size mapping.
2365 */
2366 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2367 PAGE_SIZE, DMA_FROM_DEVICE);
2368 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2369 __free_page(data);
2370 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2371 return -ENOMEM;
2372 }
2373
2374 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
2375 sw_rx_data->page_offset = 0;
2376 sw_rx_data->data = data;
2377 sw_rx_data->mapping = mapping;
2378
2379 /* Advance PROD and get BD pointer */
2380 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2381 WARN_ON(!rx_bd);
2382 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2383 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2384
2385 rxq->sw_rx_prod++;
2386
2387 return 0;
2388}
2389
2390static int qede_alloc_sge_mem(struct qede_dev *edev,
2391 struct qede_rx_queue *rxq)
2392{
2393 dma_addr_t mapping;
2394 int i;
2395
2396 if (edev->gro_disable)
2397 return 0;
2398
2399 if (edev->ndev->mtu > PAGE_SIZE) {
2400 edev->gro_disable = 1;
2401 return 0;
2402 }
2403
2404 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2405 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2406 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2407
2408 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2409 if (unlikely(!replace_buf->data)) {
2410 DP_NOTICE(edev,
2411 "Failed to allocate TPA skb pool [replacement buffer]\n");
2412 goto err;
2413 }
2414
2415 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2416 rxq->rx_buf_size, DMA_FROM_DEVICE);
2417 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2418 DP_NOTICE(edev,
2419 "Failed to map TPA replacement buffer\n");
2420 goto err;
2421 }
2422
2423 dma_unmap_addr_set(replace_buf, mapping, mapping);
2424 tpa_info->replace_buf.page_offset = 0;
2425
2426 tpa_info->replace_buf_mapping = mapping;
2427 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2428 }
2429
2430 return 0;
2431err:
2432 qede_free_sge_mem(edev, rxq);
2433 edev->gro_disable = 1;
2434 return -ENOMEM;
2435}
2436
2437/* This function allocates all memory needed per Rx queue */
2438static int qede_alloc_mem_rxq(struct qede_dev *edev,
2439 struct qede_rx_queue *rxq)
2440{
2441 int i, rc, size;
2442
2443 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2444
2445 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2446 edev->ndev->mtu;
2447 if (rxq->rx_buf_size > PAGE_SIZE)
2448 rxq->rx_buf_size = PAGE_SIZE;
2449
2450 /* Segment size to spilt a page in multiple equal parts */
2451 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2452
2453 /* Allocate the parallel driver ring for Rx buffers */
2454 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2455 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2456 if (!rxq->sw_rx_ring) {
2457 DP_ERR(edev, "Rx buffers ring allocation failed\n");
2458 rc = -ENOMEM;
2459 goto err;
2460 }
2461
2462 /* Allocate FW Rx ring */
2463 rc = edev->ops->common->chain_alloc(edev->cdev,
2464 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2465 QED_CHAIN_MODE_NEXT_PTR,
2466 RX_RING_SIZE,
2467 sizeof(struct eth_rx_bd),
2468 &rxq->rx_bd_ring);
2469
2470 if (rc)
2471 goto err;
2472
2473 /* Allocate FW completion ring */
2474 rc = edev->ops->common->chain_alloc(edev->cdev,
2475 QED_CHAIN_USE_TO_CONSUME,
2476 QED_CHAIN_MODE_PBL,
2477 RX_RING_SIZE,
2478 sizeof(union eth_rx_cqe),
2479 &rxq->rx_comp_ring);
2480 if (rc)
2481 goto err;
2482
2483 /* Allocate buffers for the Rx ring */
2484 for (i = 0; i < rxq->num_rx_buffers; i++) {
2485 rc = qede_alloc_rx_buffer(edev, rxq);
2486 if (rc) {
2487 DP_ERR(edev,
2488 "Rx buffers allocation failed at index %d\n", i);
2489 goto err;
2490 }
2491 }
2492
2493 rc = qede_alloc_sge_mem(edev, rxq);
2494err:
2495 return rc;
2496}
2497
2498static void qede_free_mem_txq(struct qede_dev *edev,
2499 struct qede_tx_queue *txq)
2500{
2501 /* Free the parallel SW ring */
2502 kfree(txq->sw_tx_ring);
2503
2504 /* Free the real RQ ring used by FW */
2505 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2506}
2507
2508/* This function allocates all memory needed per Tx queue */
2509static int qede_alloc_mem_txq(struct qede_dev *edev,
2510 struct qede_tx_queue *txq)
2511{
2512 int size, rc;
2513 union eth_tx_bd_types *p_virt;
2514
2515 txq->num_tx_buffers = edev->q_num_tx_buffers;
2516
2517 /* Allocate the parallel driver ring for Tx buffers */
2518 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2519 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2520 if (!txq->sw_tx_ring) {
2521 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2522 goto err;
2523 }
2524
2525 rc = edev->ops->common->chain_alloc(edev->cdev,
2526 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2527 QED_CHAIN_MODE_PBL,
2528 NUM_TX_BDS_MAX,
2529 sizeof(*p_virt),
2530 &txq->tx_pbl);
2531 if (rc)
2532 goto err;
2533
2534 return 0;
2535
2536err:
2537 qede_free_mem_txq(edev, txq);
2538 return -ENOMEM;
2539}
2540
2541/* This function frees all memory of a single fp */
2542static void qede_free_mem_fp(struct qede_dev *edev,
2543 struct qede_fastpath *fp)
2544{
2545 int tc;
2546
2547 qede_free_mem_sb(edev, fp->sb_info);
2548
2549 qede_free_mem_rxq(edev, fp->rxq);
2550
2551 for (tc = 0; tc < edev->num_tc; tc++)
2552 qede_free_mem_txq(edev, &fp->txqs[tc]);
2553}
2554
2555/* This function allocates all memory needed for a single fp (i.e. an entity
2556 * which contains status block, one rx queue and multiple per-TC tx queues.
2557 */
2558static int qede_alloc_mem_fp(struct qede_dev *edev,
2559 struct qede_fastpath *fp)
2560{
2561 int rc, tc;
2562
2563 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2564 if (rc)
2565 goto err;
2566
2567 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2568 if (rc)
2569 goto err;
2570
2571 for (tc = 0; tc < edev->num_tc; tc++) {
2572 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2573 if (rc)
2574 goto err;
2575 }
2576
2577 return 0;
2578err:
2579 return rc;
2580}
2581
2582static void qede_free_mem_load(struct qede_dev *edev)
2583{
2584 int i;
2585
2586 for_each_rss(i) {
2587 struct qede_fastpath *fp = &edev->fp_array[i];
2588
2589 qede_free_mem_fp(edev, fp);
2590 }
2591}
2592
2593/* This function allocates all qede memory at NIC load. */
2594static int qede_alloc_mem_load(struct qede_dev *edev)
2595{
2596 int rc = 0, rss_id;
2597
2598 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2599 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2600
2601 rc = qede_alloc_mem_fp(edev, fp);
2602 if (rc) {
2603 DP_ERR(edev,
2604 "Failed to allocate memory for fastpath - rss id = %d\n",
2605 rss_id);
2606 qede_free_mem_load(edev);
2607 return rc;
2608 }
2609 }
2610
2611 return 0;
2612}
2613
2614/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2615static void qede_init_fp(struct qede_dev *edev)
2616{
2617 int rss_id, txq_index, tc;
2618 struct qede_fastpath *fp;
2619
2620 for_each_rss(rss_id) {
2621 fp = &edev->fp_array[rss_id];
2622
2623 fp->edev = edev;
2624 fp->rss_id = rss_id;
2625
2626 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2627
2628 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2629
2630 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2631 fp->rxq->rxq_id = rss_id;
2632
2633 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2634 for (tc = 0; tc < edev->num_tc; tc++) {
2635 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2636 fp->txqs[tc].index = txq_index;
2637 }
2638
2639 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
2640 edev->ndev->name, rss_id);
2641 }
2642
2643 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
2644}
2645
2646static int qede_set_real_num_queues(struct qede_dev *edev)
2647{
2648 int rc = 0;
2649
2650 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
2651 if (rc) {
2652 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
2653 return rc;
2654 }
2655 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
2656 if (rc) {
2657 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
2658 return rc;
2659 }
2660
2661 return 0;
2662}
2663
2664static void qede_napi_disable_remove(struct qede_dev *edev)
2665{
2666 int i;
2667
2668 for_each_rss(i) {
2669 napi_disable(&edev->fp_array[i].napi);
2670
2671 netif_napi_del(&edev->fp_array[i].napi);
2672 }
2673}
2674
2675static void qede_napi_add_enable(struct qede_dev *edev)
2676{
2677 int i;
2678
2679 /* Add NAPI objects */
2680 for_each_rss(i) {
2681 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
2682 qede_poll, NAPI_POLL_WEIGHT);
2683 napi_enable(&edev->fp_array[i].napi);
2684 }
2685}
2686
2687static void qede_sync_free_irqs(struct qede_dev *edev)
2688{
2689 int i;
2690
2691 for (i = 0; i < edev->int_info.used_cnt; i++) {
2692 if (edev->int_info.msix_cnt) {
2693 synchronize_irq(edev->int_info.msix[i].vector);
2694 free_irq(edev->int_info.msix[i].vector,
2695 &edev->fp_array[i]);
2696 } else {
2697 edev->ops->common->simd_handler_clean(edev->cdev, i);
2698 }
2699 }
2700
2701 edev->int_info.used_cnt = 0;
2702}
2703
2704static int qede_req_msix_irqs(struct qede_dev *edev)
2705{
2706 int i, rc;
2707
2708 /* Sanitize number of interrupts == number of prepared RSS queues */
2709 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
2710 DP_ERR(edev,
2711 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
2712 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
2713 return -EINVAL;
2714 }
2715
2716 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
2717 rc = request_irq(edev->int_info.msix[i].vector,
2718 qede_msix_fp_int, 0, edev->fp_array[i].name,
2719 &edev->fp_array[i]);
2720 if (rc) {
2721 DP_ERR(edev, "Request fp %d irq failed\n", i);
2722 qede_sync_free_irqs(edev);
2723 return rc;
2724 }
2725 DP_VERBOSE(edev, NETIF_MSG_INTR,
2726 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
2727 edev->fp_array[i].name, i,
2728 &edev->fp_array[i]);
2729 edev->int_info.used_cnt++;
2730 }
2731
2732 return 0;
2733}
2734
2735static void qede_simd_fp_handler(void *cookie)
2736{
2737 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
2738
2739 napi_schedule_irqoff(&fp->napi);
2740}
2741
2742static int qede_setup_irqs(struct qede_dev *edev)
2743{
2744 int i, rc = 0;
2745
2746 /* Learn Interrupt configuration */
2747 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
2748 if (rc)
2749 return rc;
2750
2751 if (edev->int_info.msix_cnt) {
2752 rc = qede_req_msix_irqs(edev);
2753 if (rc)
2754 return rc;
2755 edev->ndev->irq = edev->int_info.msix[0].vector;
2756 } else {
2757 const struct qed_common_ops *ops;
2758
2759 /* qed should learn receive the RSS ids and callbacks */
2760 ops = edev->ops->common;
2761 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
2762 ops->simd_handler_config(edev->cdev,
2763 &edev->fp_array[i], i,
2764 qede_simd_fp_handler);
2765 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
2766 }
2767 return 0;
2768}
2769
2770static int qede_drain_txq(struct qede_dev *edev,
2771 struct qede_tx_queue *txq,
2772 bool allow_drain)
2773{
2774 int rc, cnt = 1000;
2775
2776 while (txq->sw_tx_cons != txq->sw_tx_prod) {
2777 if (!cnt) {
2778 if (allow_drain) {
2779 DP_NOTICE(edev,
2780 "Tx queue[%d] is stuck, requesting MCP to drain\n",
2781 txq->index);
2782 rc = edev->ops->common->drain(edev->cdev);
2783 if (rc)
2784 return rc;
2785 return qede_drain_txq(edev, txq, false);
2786 }
2787 DP_NOTICE(edev,
2788 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2789 txq->index, txq->sw_tx_prod,
2790 txq->sw_tx_cons);
2791 return -ENODEV;
2792 }
2793 cnt--;
2794 usleep_range(1000, 2000);
2795 barrier();
2796 }
2797
2798 /* FW finished processing, wait for HW to transmit all tx packets */
2799 usleep_range(1000, 2000);
2800
2801 return 0;
2802}
2803
2804static int qede_stop_queues(struct qede_dev *edev)
2805{
2806 struct qed_update_vport_params vport_update_params;
2807 struct qed_dev *cdev = edev->cdev;
2808 int rc, tc, i;
2809
2810 /* Disable the vport */
2811 memset(&vport_update_params, 0, sizeof(vport_update_params));
2812 vport_update_params.vport_id = 0;
2813 vport_update_params.update_vport_active_flg = 1;
2814 vport_update_params.vport_active_flg = 0;
2815 vport_update_params.update_rss_flg = 0;
2816
2817 rc = edev->ops->vport_update(cdev, &vport_update_params);
2818 if (rc) {
2819 DP_ERR(edev, "Failed to update vport\n");
2820 return rc;
2821 }
2822
2823 /* Flush Tx queues. If needed, request drain from MCP */
2824 for_each_rss(i) {
2825 struct qede_fastpath *fp = &edev->fp_array[i];
2826
2827 for (tc = 0; tc < edev->num_tc; tc++) {
2828 struct qede_tx_queue *txq = &fp->txqs[tc];
2829
2830 rc = qede_drain_txq(edev, txq, true);
2831 if (rc)
2832 return rc;
2833 }
2834 }
2835
2836 /* Stop all Queues in reverse order*/
2837 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
2838 struct qed_stop_rxq_params rx_params;
2839
2840 /* Stop the Tx Queue(s)*/
2841 for (tc = 0; tc < edev->num_tc; tc++) {
2842 struct qed_stop_txq_params tx_params;
2843
2844 tx_params.rss_id = i;
2845 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
2846 rc = edev->ops->q_tx_stop(cdev, &tx_params);
2847 if (rc) {
2848 DP_ERR(edev, "Failed to stop TXQ #%d\n",
2849 tx_params.tx_queue_id);
2850 return rc;
2851 }
2852 }
2853
2854 /* Stop the Rx Queue*/
2855 memset(&rx_params, 0, sizeof(rx_params));
2856 rx_params.rss_id = i;
2857 rx_params.rx_queue_id = i;
2858
2859 rc = edev->ops->q_rx_stop(cdev, &rx_params);
2860 if (rc) {
2861 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2862 return rc;
2863 }
2864 }
2865
2866 /* Stop the vport */
2867 rc = edev->ops->vport_stop(cdev, 0);
2868 if (rc)
2869 DP_ERR(edev, "Failed to stop VPORT\n");
2870
2871 return rc;
2872}
2873
2874static int qede_start_queues(struct qede_dev *edev)
2875{
2876 int rc, tc, i;
2877 int vlan_removal_en = 1;
2878 struct qed_dev *cdev = edev->cdev;
2879 struct qed_update_vport_rss_params *rss_params = &edev->rss_params;
2880 struct qed_update_vport_params vport_update_params;
2881 struct qed_queue_start_common_params q_params;
2882 struct qed_start_vport_params start = {0};
2883
2884 if (!edev->num_rss) {
2885 DP_ERR(edev,
2886 "Cannot update V-VPORT as active as there are no Rx queues\n");
2887 return -EINVAL;
2888 }
2889
2890 start.gro_enable = !edev->gro_disable;
2891 start.mtu = edev->ndev->mtu;
2892 start.vport_id = 0;
2893 start.drop_ttl0 = true;
2894 start.remove_inner_vlan = vlan_removal_en;
2895
2896 rc = edev->ops->vport_start(cdev, &start);
2897
2898 if (rc) {
2899 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2900 return rc;
2901 }
2902
2903 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2904 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2905 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2906
2907 for_each_rss(i) {
2908 struct qede_fastpath *fp = &edev->fp_array[i];
2909 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
2910
2911 memset(&q_params, 0, sizeof(q_params));
2912 q_params.rss_id = i;
2913 q_params.queue_id = i;
2914 q_params.vport_id = 0;
2915 q_params.sb = fp->sb_info->igu_sb_id;
2916 q_params.sb_idx = RX_PI;
2917
2918 rc = edev->ops->q_rx_start(cdev, &q_params,
2919 fp->rxq->rx_buf_size,
2920 fp->rxq->rx_bd_ring.p_phys_addr,
2921 phys_table,
2922 fp->rxq->rx_comp_ring.page_cnt,
2923 &fp->rxq->hw_rxq_prod_addr);
2924 if (rc) {
2925 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
2926 return rc;
2927 }
2928
2929 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
2930
2931 qede_update_rx_prod(edev, fp->rxq);
2932
2933 for (tc = 0; tc < edev->num_tc; tc++) {
2934 struct qede_tx_queue *txq = &fp->txqs[tc];
2935 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
2936
2937 memset(&q_params, 0, sizeof(q_params));
2938 q_params.rss_id = i;
2939 q_params.queue_id = txq_index;
2940 q_params.vport_id = 0;
2941 q_params.sb = fp->sb_info->igu_sb_id;
2942 q_params.sb_idx = TX_PI(tc);
2943
2944 rc = edev->ops->q_tx_start(cdev, &q_params,
2945 txq->tx_pbl.pbl.p_phys_table,
2946 txq->tx_pbl.page_cnt,
2947 &txq->doorbell_addr);
2948 if (rc) {
2949 DP_ERR(edev, "Start TXQ #%d failed %d\n",
2950 txq_index, rc);
2951 return rc;
2952 }
2953
2954 txq->hw_cons_ptr =
2955 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
2956 SET_FIELD(txq->tx_db.data.params,
2957 ETH_DB_DATA_DEST, DB_DEST_XCM);
2958 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
2959 DB_AGG_CMD_SET);
2960 SET_FIELD(txq->tx_db.data.params,
2961 ETH_DB_DATA_AGG_VAL_SEL,
2962 DQ_XCM_ETH_TX_BD_PROD_CMD);
2963
2964 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2965 }
2966 }
2967
2968 /* Prepare and send the vport enable */
2969 memset(&vport_update_params, 0, sizeof(vport_update_params));
2970 vport_update_params.vport_id = start.vport_id;
2971 vport_update_params.update_vport_active_flg = 1;
2972 vport_update_params.vport_active_flg = 1;
2973
2974 /* Fill struct with RSS params */
2975 if (QEDE_RSS_CNT(edev) > 1) {
2976 vport_update_params.update_rss_flg = 1;
2977 for (i = 0; i < 128; i++)
2978 rss_params->rss_ind_table[i] =
2979 ethtool_rxfh_indir_default(i, QEDE_RSS_CNT(edev));
2980 netdev_rss_key_fill(rss_params->rss_key,
2981 sizeof(rss_params->rss_key));
2982 } else {
2983 memset(rss_params, 0, sizeof(*rss_params));
2984 }
2985 memcpy(&vport_update_params.rss_params, rss_params,
2986 sizeof(*rss_params));
2987
2988 rc = edev->ops->vport_update(cdev, &vport_update_params);
2989 if (rc) {
2990 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2991 return rc;
2992 }
2993
2994 return 0;
2995}
2996
2997static int qede_set_mcast_rx_mac(struct qede_dev *edev,
2998 enum qed_filter_xcast_params_type opcode,
2999 unsigned char *mac, int num_macs)
3000{
3001 struct qed_filter_params filter_cmd;
3002 int i;
3003
3004 memset(&filter_cmd, 0, sizeof(filter_cmd));
3005 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3006 filter_cmd.filter.mcast.type = opcode;
3007 filter_cmd.filter.mcast.num = num_macs;
3008
3009 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3010 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3011
3012 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3013}
3014
3015enum qede_unload_mode {
3016 QEDE_UNLOAD_NORMAL,
3017};
3018
3019static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3020{
3021 struct qed_link_params link_params;
3022 int rc;
3023
3024 DP_INFO(edev, "Starting qede unload\n");
3025
3026 mutex_lock(&edev->qede_lock);
3027 edev->state = QEDE_STATE_CLOSED;
3028
3029 /* Close OS Tx */
3030 netif_tx_disable(edev->ndev);
3031 netif_carrier_off(edev->ndev);
3032
3033 /* Reset the link */
3034 memset(&link_params, 0, sizeof(link_params));
3035 link_params.link_up = false;
3036 edev->ops->common->set_link(edev->cdev, &link_params);
3037 rc = qede_stop_queues(edev);
3038 if (rc) {
3039 qede_sync_free_irqs(edev);
3040 goto out;
3041 }
3042
3043 DP_INFO(edev, "Stopped Queues\n");
3044
3045 qede_vlan_mark_nonconfigured(edev);
3046 edev->ops->fastpath_stop(edev->cdev);
3047
3048 /* Release the interrupts */
3049 qede_sync_free_irqs(edev);
3050 edev->ops->common->set_fp_int(edev->cdev, 0);
3051
3052 qede_napi_disable_remove(edev);
3053
3054 qede_free_mem_load(edev);
3055 qede_free_fp_array(edev);
3056
3057out:
3058 mutex_unlock(&edev->qede_lock);
3059 DP_INFO(edev, "Ending qede unload\n");
3060}
3061
3062enum qede_load_mode {
3063 QEDE_LOAD_NORMAL,
3064};
3065
3066static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3067{
3068 struct qed_link_params link_params;
3069 struct qed_link_output link_output;
3070 int rc;
3071
3072 DP_INFO(edev, "Starting qede load\n");
3073
3074 rc = qede_set_num_queues(edev);
3075 if (rc)
3076 goto err0;
3077
3078 rc = qede_alloc_fp_array(edev);
3079 if (rc)
3080 goto err0;
3081
3082 qede_init_fp(edev);
3083
3084 rc = qede_alloc_mem_load(edev);
3085 if (rc)
3086 goto err1;
3087 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3088 QEDE_RSS_CNT(edev), edev->num_tc);
3089
3090 rc = qede_set_real_num_queues(edev);
3091 if (rc)
3092 goto err2;
3093
3094 qede_napi_add_enable(edev);
3095 DP_INFO(edev, "Napi added and enabled\n");
3096
3097 rc = qede_setup_irqs(edev);
3098 if (rc)
3099 goto err3;
3100 DP_INFO(edev, "Setup IRQs succeeded\n");
3101
3102 rc = qede_start_queues(edev);
3103 if (rc)
3104 goto err4;
3105 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3106
3107 /* Add primary mac and set Rx filters */
3108 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3109
3110 mutex_lock(&edev->qede_lock);
3111 edev->state = QEDE_STATE_OPEN;
3112 mutex_unlock(&edev->qede_lock);
3113
3114 /* Program un-configured VLANs */
3115 qede_configure_vlan_filters(edev);
3116
3117 /* Ask for link-up using current configuration */
3118 memset(&link_params, 0, sizeof(link_params));
3119 link_params.link_up = true;
3120 edev->ops->common->set_link(edev->cdev, &link_params);
3121
3122 /* Query whether link is already-up */
3123 memset(&link_output, 0, sizeof(link_output));
3124 edev->ops->common->get_link(edev->cdev, &link_output);
3125 qede_link_update(edev, &link_output);
3126
3127 DP_INFO(edev, "Ending successfully qede load\n");
3128
3129 return 0;
3130
3131err4:
3132 qede_sync_free_irqs(edev);
3133 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3134err3:
3135 qede_napi_disable_remove(edev);
3136err2:
3137 qede_free_mem_load(edev);
3138err1:
3139 edev->ops->common->set_fp_int(edev->cdev, 0);
3140 qede_free_fp_array(edev);
3141 edev->num_rss = 0;
3142err0:
3143 return rc;
3144}
3145
3146void qede_reload(struct qede_dev *edev,
3147 void (*func)(struct qede_dev *, union qede_reload_args *),
3148 union qede_reload_args *args)
3149{
3150 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3151 /* Call function handler to update parameters
3152 * needed for function load.
3153 */
3154 if (func)
3155 func(edev, args);
3156
3157 qede_load(edev, QEDE_LOAD_NORMAL);
3158
3159 mutex_lock(&edev->qede_lock);
3160 qede_config_rx_mode(edev->ndev);
3161 mutex_unlock(&edev->qede_lock);
3162}
3163
3164/* called with rtnl_lock */
3165static int qede_open(struct net_device *ndev)
3166{
3167 struct qede_dev *edev = netdev_priv(ndev);
3168
3169 netif_carrier_off(ndev);
3170
3171 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3172
3173 return qede_load(edev, QEDE_LOAD_NORMAL);
3174}
3175
3176static int qede_close(struct net_device *ndev)
3177{
3178 struct qede_dev *edev = netdev_priv(ndev);
3179
3180 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3181
3182 return 0;
3183}
3184
3185static void qede_link_update(void *dev, struct qed_link_output *link)
3186{
3187 struct qede_dev *edev = dev;
3188
3189 if (!netif_running(edev->ndev)) {
3190 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3191 return;
3192 }
3193
3194 if (link->link_up) {
3195 if (!netif_carrier_ok(edev->ndev)) {
3196 DP_NOTICE(edev, "Link is up\n");
3197 netif_tx_start_all_queues(edev->ndev);
3198 netif_carrier_on(edev->ndev);
3199 }
3200 } else {
3201 if (netif_carrier_ok(edev->ndev)) {
3202 DP_NOTICE(edev, "Link is down\n");
3203 netif_tx_disable(edev->ndev);
3204 netif_carrier_off(edev->ndev);
3205 }
3206 }
3207}
3208
3209static int qede_set_mac_addr(struct net_device *ndev, void *p)
3210{
3211 struct qede_dev *edev = netdev_priv(ndev);
3212 struct sockaddr *addr = p;
3213 int rc;
3214
3215 ASSERT_RTNL(); /* @@@TBD To be removed */
3216
3217 DP_INFO(edev, "Set_mac_addr called\n");
3218
3219 if (!is_valid_ether_addr(addr->sa_data)) {
3220 DP_NOTICE(edev, "The MAC address is not valid\n");
3221 return -EFAULT;
3222 }
3223
3224 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3225
3226 if (!netif_running(ndev)) {
3227 DP_NOTICE(edev, "The device is currently down\n");
3228 return 0;
3229 }
3230
3231 /* Remove the previous primary mac */
3232 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3233 edev->primary_mac);
3234 if (rc)
3235 return rc;
3236
3237 /* Add MAC filter according to the new unicast HW MAC address */
3238 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3239 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3240 edev->primary_mac);
3241}
3242
3243static int
3244qede_configure_mcast_filtering(struct net_device *ndev,
3245 enum qed_filter_rx_mode_type *accept_flags)
3246{
3247 struct qede_dev *edev = netdev_priv(ndev);
3248 unsigned char *mc_macs, *temp;
3249 struct netdev_hw_addr *ha;
3250 int rc = 0, mc_count;
3251 size_t size;
3252
3253 size = 64 * ETH_ALEN;
3254
3255 mc_macs = kzalloc(size, GFP_KERNEL);
3256 if (!mc_macs) {
3257 DP_NOTICE(edev,
3258 "Failed to allocate memory for multicast MACs\n");
3259 rc = -ENOMEM;
3260 goto exit;
3261 }
3262
3263 temp = mc_macs;
3264
3265 /* Remove all previously configured MAC filters */
3266 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3267 mc_macs, 1);
3268 if (rc)
3269 goto exit;
3270
3271 netif_addr_lock_bh(ndev);
3272
3273 mc_count = netdev_mc_count(ndev);
3274 if (mc_count < 64) {
3275 netdev_for_each_mc_addr(ha, ndev) {
3276 ether_addr_copy(temp, ha->addr);
3277 temp += ETH_ALEN;
3278 }
3279 }
3280
3281 netif_addr_unlock_bh(ndev);
3282
3283 /* Check for all multicast @@@TBD resource allocation */
3284 if ((ndev->flags & IFF_ALLMULTI) ||
3285 (mc_count > 64)) {
3286 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3287 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3288 } else {
3289 /* Add all multicast MAC filters */
3290 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3291 mc_macs, mc_count);
3292 }
3293
3294exit:
3295 kfree(mc_macs);
3296 return rc;
3297}
3298
3299static void qede_set_rx_mode(struct net_device *ndev)
3300{
3301 struct qede_dev *edev = netdev_priv(ndev);
3302
3303 DP_INFO(edev, "qede_set_rx_mode called\n");
3304
3305 if (edev->state != QEDE_STATE_OPEN) {
3306 DP_INFO(edev,
3307 "qede_set_rx_mode called while interface is down\n");
3308 } else {
3309 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3310 schedule_delayed_work(&edev->sp_task, 0);
3311 }
3312}
3313
3314/* Must be called with qede_lock held */
3315static void qede_config_rx_mode(struct net_device *ndev)
3316{
3317 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3318 struct qede_dev *edev = netdev_priv(ndev);
3319 struct qed_filter_params rx_mode;
3320 unsigned char *uc_macs, *temp;
3321 struct netdev_hw_addr *ha;
3322 int rc, uc_count;
3323 size_t size;
3324
3325 netif_addr_lock_bh(ndev);
3326
3327 uc_count = netdev_uc_count(ndev);
3328 size = uc_count * ETH_ALEN;
3329
3330 uc_macs = kzalloc(size, GFP_ATOMIC);
3331 if (!uc_macs) {
3332 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3333 netif_addr_unlock_bh(ndev);
3334 return;
3335 }
3336
3337 temp = uc_macs;
3338 netdev_for_each_uc_addr(ha, ndev) {
3339 ether_addr_copy(temp, ha->addr);
3340 temp += ETH_ALEN;
3341 }
3342
3343 netif_addr_unlock_bh(ndev);
3344
3345 /* Configure the struct for the Rx mode */
3346 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3347 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3348
3349 /* Remove all previous unicast secondary macs and multicast macs
3350 * (configrue / leave the primary mac)
3351 */
3352 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3353 edev->primary_mac);
3354 if (rc)
3355 goto out;
3356
3357 /* Check for promiscuous */
3358 if ((ndev->flags & IFF_PROMISC) ||
3359 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3360 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3361 } else {
3362 /* Add MAC filters according to the unicast secondary macs */
3363 int i;
3364
3365 temp = uc_macs;
3366 for (i = 0; i < uc_count; i++) {
3367 rc = qede_set_ucast_rx_mac(edev,
3368 QED_FILTER_XCAST_TYPE_ADD,
3369 temp);
3370 if (rc)
3371 goto out;
3372
3373 temp += ETH_ALEN;
3374 }
3375
3376 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3377 if (rc)
3378 goto out;
3379 }
3380
3381 /* take care of VLAN mode */
3382 if (ndev->flags & IFF_PROMISC) {
3383 qede_config_accept_any_vlan(edev, true);
3384 } else if (!edev->non_configured_vlans) {
3385 /* It's possible that accept_any_vlan mode is set due to a
3386 * previous setting of IFF_PROMISC. If vlan credits are
3387 * sufficient, disable accept_any_vlan.
3388 */
3389 qede_config_accept_any_vlan(edev, false);
3390 }
3391
3392 rx_mode.filter.accept_flags = accept_flags;
3393 edev->ops->filter_config(edev->cdev, &rx_mode);
3394out:
3395 kfree(uc_macs);
3396}
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2/* QLogic qede NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
5 */
6
7#include <linux/crash_dump.h>
8#include <linux/module.h>
9#include <linux/pci.h>
10#include <linux/version.h>
11#include <linux/device.h>
12#include <linux/netdevice.h>
13#include <linux/etherdevice.h>
14#include <linux/skbuff.h>
15#include <linux/errno.h>
16#include <linux/list.h>
17#include <linux/string.h>
18#include <linux/dma-mapping.h>
19#include <linux/interrupt.h>
20#include <asm/byteorder.h>
21#include <asm/param.h>
22#include <linux/io.h>
23#include <linux/netdev_features.h>
24#include <linux/udp.h>
25#include <linux/tcp.h>
26#include <net/udp_tunnel.h>
27#include <linux/ip.h>
28#include <net/ipv6.h>
29#include <net/tcp.h>
30#include <linux/if_ether.h>
31#include <linux/if_vlan.h>
32#include <linux/pkt_sched.h>
33#include <linux/ethtool.h>
34#include <linux/in.h>
35#include <linux/random.h>
36#include <net/ip6_checksum.h>
37#include <linux/bitops.h>
38#include <linux/vmalloc.h>
39#include <linux/aer.h>
40#include "qede.h"
41#include "qede_ptp.h"
42
43static char version[] =
44 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
45
46MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
47MODULE_LICENSE("GPL");
48MODULE_VERSION(DRV_MODULE_VERSION);
49
50static uint debug;
51module_param(debug, uint, 0);
52MODULE_PARM_DESC(debug, " Default debug msglevel");
53
54static const struct qed_eth_ops *qed_ops;
55
56#define CHIP_NUM_57980S_40 0x1634
57#define CHIP_NUM_57980S_10 0x1666
58#define CHIP_NUM_57980S_MF 0x1636
59#define CHIP_NUM_57980S_100 0x1644
60#define CHIP_NUM_57980S_50 0x1654
61#define CHIP_NUM_57980S_25 0x1656
62#define CHIP_NUM_57980S_IOV 0x1664
63#define CHIP_NUM_AH 0x8070
64#define CHIP_NUM_AH_IOV 0x8090
65
66#ifndef PCI_DEVICE_ID_NX2_57980E
67#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
68#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
69#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
70#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
71#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
72#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
73#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
74#define PCI_DEVICE_ID_AH CHIP_NUM_AH
75#define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV
76
77#endif
78
79enum qede_pci_private {
80 QEDE_PRIVATE_PF,
81 QEDE_PRIVATE_VF
82};
83
84static const struct pci_device_id qede_pci_tbl[] = {
85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
88 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
90 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
91#ifdef CONFIG_QED_SRIOV
92 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
93#endif
94 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF},
95#ifdef CONFIG_QED_SRIOV
96 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF},
97#endif
98 { 0 }
99};
100
101MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
102
103static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
104static pci_ers_result_t
105qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state);
106
107#define TX_TIMEOUT (5 * HZ)
108
109/* Utilize last protocol index for XDP */
110#define XDP_PI 11
111
112static void qede_remove(struct pci_dev *pdev);
113static void qede_shutdown(struct pci_dev *pdev);
114static void qede_link_update(void *dev, struct qed_link_output *link);
115static void qede_schedule_recovery_handler(void *dev);
116static void qede_recovery_handler(struct qede_dev *edev);
117static void qede_schedule_hw_err_handler(void *dev,
118 enum qed_hw_err_type err_type);
119static void qede_get_eth_tlv_data(void *edev, void *data);
120static void qede_get_generic_tlv_data(void *edev,
121 struct qed_generic_tlvs *data);
122static void qede_generic_hw_err_handler(struct qede_dev *edev);
123#ifdef CONFIG_QED_SRIOV
124static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
125 __be16 vlan_proto)
126{
127 struct qede_dev *edev = netdev_priv(ndev);
128
129 if (vlan > 4095) {
130 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
131 return -EINVAL;
132 }
133
134 if (vlan_proto != htons(ETH_P_8021Q))
135 return -EPROTONOSUPPORT;
136
137 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
138 vlan, vf);
139
140 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
141}
142
143static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
144{
145 struct qede_dev *edev = netdev_priv(ndev);
146
147 DP_VERBOSE(edev, QED_MSG_IOV, "Setting MAC %pM to VF [%d]\n", mac, vfidx);
148
149 if (!is_valid_ether_addr(mac)) {
150 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
151 return -EINVAL;
152 }
153
154 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
155}
156
157static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
158{
159 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
160 struct qed_dev_info *qed_info = &edev->dev_info.common;
161 struct qed_update_vport_params *vport_params;
162 int rc;
163
164 vport_params = vzalloc(sizeof(*vport_params));
165 if (!vport_params)
166 return -ENOMEM;
167 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
168
169 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
170
171 /* Enable/Disable Tx switching for PF */
172 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
173 !qed_info->b_inter_pf_switch && qed_info->tx_switching) {
174 vport_params->vport_id = 0;
175 vport_params->update_tx_switching_flg = 1;
176 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0;
177 edev->ops->vport_update(edev->cdev, vport_params);
178 }
179
180 vfree(vport_params);
181 return rc;
182}
183#endif
184
185static const struct pci_error_handlers qede_err_handler = {
186 .error_detected = qede_io_error_detected,
187};
188
189static struct pci_driver qede_pci_driver = {
190 .name = "qede",
191 .id_table = qede_pci_tbl,
192 .probe = qede_probe,
193 .remove = qede_remove,
194 .shutdown = qede_shutdown,
195#ifdef CONFIG_QED_SRIOV
196 .sriov_configure = qede_sriov_configure,
197#endif
198 .err_handler = &qede_err_handler,
199};
200
201static struct qed_eth_cb_ops qede_ll_ops = {
202 {
203#ifdef CONFIG_RFS_ACCEL
204 .arfs_filter_op = qede_arfs_filter_op,
205#endif
206 .link_update = qede_link_update,
207 .schedule_recovery_handler = qede_schedule_recovery_handler,
208 .schedule_hw_err_handler = qede_schedule_hw_err_handler,
209 .get_generic_tlv_data = qede_get_generic_tlv_data,
210 .get_protocol_tlv_data = qede_get_eth_tlv_data,
211 },
212 .force_mac = qede_force_mac,
213 .ports_update = qede_udp_ports_update,
214};
215
216static int qede_netdev_event(struct notifier_block *this, unsigned long event,
217 void *ptr)
218{
219 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
220 struct ethtool_drvinfo drvinfo;
221 struct qede_dev *edev;
222
223 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
224 goto done;
225
226 /* Check whether this is a qede device */
227 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
228 goto done;
229
230 memset(&drvinfo, 0, sizeof(drvinfo));
231 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
232 if (strcmp(drvinfo.driver, "qede"))
233 goto done;
234 edev = netdev_priv(ndev);
235
236 switch (event) {
237 case NETDEV_CHANGENAME:
238 /* Notify qed of the name change */
239 if (!edev->ops || !edev->ops->common)
240 goto done;
241 edev->ops->common->set_name(edev->cdev, edev->ndev->name);
242 break;
243 case NETDEV_CHANGEADDR:
244 edev = netdev_priv(ndev);
245 qede_rdma_event_changeaddr(edev);
246 break;
247 }
248
249done:
250 return NOTIFY_DONE;
251}
252
253static struct notifier_block qede_netdev_notifier = {
254 .notifier_call = qede_netdev_event,
255};
256
257static
258int __init qede_init(void)
259{
260 int ret;
261
262 pr_info("qede_init: %s\n", version);
263
264 qede_forced_speed_maps_init();
265
266 qed_ops = qed_get_eth_ops();
267 if (!qed_ops) {
268 pr_notice("Failed to get qed ethtool operations\n");
269 return -EINVAL;
270 }
271
272 /* Must register notifier before pci ops, since we might miss
273 * interface rename after pci probe and netdev registration.
274 */
275 ret = register_netdevice_notifier(&qede_netdev_notifier);
276 if (ret) {
277 pr_notice("Failed to register netdevice_notifier\n");
278 qed_put_eth_ops();
279 return -EINVAL;
280 }
281
282 ret = pci_register_driver(&qede_pci_driver);
283 if (ret) {
284 pr_notice("Failed to register driver\n");
285 unregister_netdevice_notifier(&qede_netdev_notifier);
286 qed_put_eth_ops();
287 return -EINVAL;
288 }
289
290 return 0;
291}
292
293static void __exit qede_cleanup(void)
294{
295 if (debug & QED_LOG_INFO_MASK)
296 pr_info("qede_cleanup called\n");
297
298 unregister_netdevice_notifier(&qede_netdev_notifier);
299 pci_unregister_driver(&qede_pci_driver);
300 qed_put_eth_ops();
301}
302
303module_init(qede_init);
304module_exit(qede_cleanup);
305
306static int qede_open(struct net_device *ndev);
307static int qede_close(struct net_device *ndev);
308
309void qede_fill_by_demand_stats(struct qede_dev *edev)
310{
311 struct qede_stats_common *p_common = &edev->stats.common;
312 struct qed_eth_stats stats;
313
314 edev->ops->get_vport_stats(edev->cdev, &stats);
315
316 p_common->no_buff_discards = stats.common.no_buff_discards;
317 p_common->packet_too_big_discard = stats.common.packet_too_big_discard;
318 p_common->ttl0_discard = stats.common.ttl0_discard;
319 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes;
320 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes;
321 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes;
322 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts;
323 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts;
324 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts;
325 p_common->mftag_filter_discards = stats.common.mftag_filter_discards;
326 p_common->mac_filter_discards = stats.common.mac_filter_discards;
327 p_common->gft_filter_drop = stats.common.gft_filter_drop;
328
329 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes;
330 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes;
331 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes;
332 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts;
333 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts;
334 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts;
335 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts;
336 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts;
337 p_common->coalesced_events = stats.common.tpa_coalesced_events;
338 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num;
339 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts;
340 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes;
341
342 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets;
343 p_common->rx_65_to_127_byte_packets =
344 stats.common.rx_65_to_127_byte_packets;
345 p_common->rx_128_to_255_byte_packets =
346 stats.common.rx_128_to_255_byte_packets;
347 p_common->rx_256_to_511_byte_packets =
348 stats.common.rx_256_to_511_byte_packets;
349 p_common->rx_512_to_1023_byte_packets =
350 stats.common.rx_512_to_1023_byte_packets;
351 p_common->rx_1024_to_1518_byte_packets =
352 stats.common.rx_1024_to_1518_byte_packets;
353 p_common->rx_crc_errors = stats.common.rx_crc_errors;
354 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames;
355 p_common->rx_pause_frames = stats.common.rx_pause_frames;
356 p_common->rx_pfc_frames = stats.common.rx_pfc_frames;
357 p_common->rx_align_errors = stats.common.rx_align_errors;
358 p_common->rx_carrier_errors = stats.common.rx_carrier_errors;
359 p_common->rx_oversize_packets = stats.common.rx_oversize_packets;
360 p_common->rx_jabbers = stats.common.rx_jabbers;
361 p_common->rx_undersize_packets = stats.common.rx_undersize_packets;
362 p_common->rx_fragments = stats.common.rx_fragments;
363 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets;
364 p_common->tx_65_to_127_byte_packets =
365 stats.common.tx_65_to_127_byte_packets;
366 p_common->tx_128_to_255_byte_packets =
367 stats.common.tx_128_to_255_byte_packets;
368 p_common->tx_256_to_511_byte_packets =
369 stats.common.tx_256_to_511_byte_packets;
370 p_common->tx_512_to_1023_byte_packets =
371 stats.common.tx_512_to_1023_byte_packets;
372 p_common->tx_1024_to_1518_byte_packets =
373 stats.common.tx_1024_to_1518_byte_packets;
374 p_common->tx_pause_frames = stats.common.tx_pause_frames;
375 p_common->tx_pfc_frames = stats.common.tx_pfc_frames;
376 p_common->brb_truncates = stats.common.brb_truncates;
377 p_common->brb_discards = stats.common.brb_discards;
378 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames;
379 p_common->link_change_count = stats.common.link_change_count;
380 p_common->ptp_skip_txts = edev->ptp_skip_txts;
381
382 if (QEDE_IS_BB(edev)) {
383 struct qede_stats_bb *p_bb = &edev->stats.bb;
384
385 p_bb->rx_1519_to_1522_byte_packets =
386 stats.bb.rx_1519_to_1522_byte_packets;
387 p_bb->rx_1519_to_2047_byte_packets =
388 stats.bb.rx_1519_to_2047_byte_packets;
389 p_bb->rx_2048_to_4095_byte_packets =
390 stats.bb.rx_2048_to_4095_byte_packets;
391 p_bb->rx_4096_to_9216_byte_packets =
392 stats.bb.rx_4096_to_9216_byte_packets;
393 p_bb->rx_9217_to_16383_byte_packets =
394 stats.bb.rx_9217_to_16383_byte_packets;
395 p_bb->tx_1519_to_2047_byte_packets =
396 stats.bb.tx_1519_to_2047_byte_packets;
397 p_bb->tx_2048_to_4095_byte_packets =
398 stats.bb.tx_2048_to_4095_byte_packets;
399 p_bb->tx_4096_to_9216_byte_packets =
400 stats.bb.tx_4096_to_9216_byte_packets;
401 p_bb->tx_9217_to_16383_byte_packets =
402 stats.bb.tx_9217_to_16383_byte_packets;
403 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count;
404 p_bb->tx_total_collisions = stats.bb.tx_total_collisions;
405 } else {
406 struct qede_stats_ah *p_ah = &edev->stats.ah;
407
408 p_ah->rx_1519_to_max_byte_packets =
409 stats.ah.rx_1519_to_max_byte_packets;
410 p_ah->tx_1519_to_max_byte_packets =
411 stats.ah.tx_1519_to_max_byte_packets;
412 }
413}
414
415static void qede_get_stats64(struct net_device *dev,
416 struct rtnl_link_stats64 *stats)
417{
418 struct qede_dev *edev = netdev_priv(dev);
419 struct qede_stats_common *p_common;
420
421 qede_fill_by_demand_stats(edev);
422 p_common = &edev->stats.common;
423
424 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts +
425 p_common->rx_bcast_pkts;
426 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts +
427 p_common->tx_bcast_pkts;
428
429 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes +
430 p_common->rx_bcast_bytes;
431 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes +
432 p_common->tx_bcast_bytes;
433
434 stats->tx_errors = p_common->tx_err_drop_pkts;
435 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts;
436
437 stats->rx_fifo_errors = p_common->no_buff_discards;
438
439 if (QEDE_IS_BB(edev))
440 stats->collisions = edev->stats.bb.tx_total_collisions;
441 stats->rx_crc_errors = p_common->rx_crc_errors;
442 stats->rx_frame_errors = p_common->rx_align_errors;
443}
444
445#ifdef CONFIG_QED_SRIOV
446static int qede_get_vf_config(struct net_device *dev, int vfidx,
447 struct ifla_vf_info *ivi)
448{
449 struct qede_dev *edev = netdev_priv(dev);
450
451 if (!edev->ops)
452 return -EINVAL;
453
454 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
455}
456
457static int qede_set_vf_rate(struct net_device *dev, int vfidx,
458 int min_tx_rate, int max_tx_rate)
459{
460 struct qede_dev *edev = netdev_priv(dev);
461
462 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
463 max_tx_rate);
464}
465
466static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
467{
468 struct qede_dev *edev = netdev_priv(dev);
469
470 if (!edev->ops)
471 return -EINVAL;
472
473 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
474}
475
476static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
477 int link_state)
478{
479 struct qede_dev *edev = netdev_priv(dev);
480
481 if (!edev->ops)
482 return -EINVAL;
483
484 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
485}
486
487static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)
488{
489 struct qede_dev *edev = netdev_priv(dev);
490
491 if (!edev->ops)
492 return -EINVAL;
493
494 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting);
495}
496#endif
497
498static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
499{
500 struct qede_dev *edev = netdev_priv(dev);
501
502 if (!netif_running(dev))
503 return -EAGAIN;
504
505 switch (cmd) {
506 case SIOCSHWTSTAMP:
507 return qede_ptp_hw_ts(edev, ifr);
508 default:
509 DP_VERBOSE(edev, QED_MSG_DEBUG,
510 "default IOCTL cmd 0x%x\n", cmd);
511 return -EOPNOTSUPP;
512 }
513
514 return 0;
515}
516
517static void qede_tx_log_print(struct qede_dev *edev, struct qede_tx_queue *txq)
518{
519 DP_NOTICE(edev,
520 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n",
521 txq->index, le16_to_cpu(*txq->hw_cons_ptr),
522 qed_chain_get_cons_idx(&txq->tx_pbl),
523 qed_chain_get_prod_idx(&txq->tx_pbl),
524 jiffies);
525}
526
527static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue)
528{
529 struct qede_dev *edev = netdev_priv(dev);
530 struct qede_tx_queue *txq;
531 int cos;
532
533 netif_carrier_off(dev);
534 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue);
535
536 if (!(edev->fp_array[txqueue].type & QEDE_FASTPATH_TX))
537 return;
538
539 for_each_cos_in_txq(edev, cos) {
540 txq = &edev->fp_array[txqueue].txq[cos];
541
542 if (qed_chain_get_cons_idx(&txq->tx_pbl) !=
543 qed_chain_get_prod_idx(&txq->tx_pbl))
544 qede_tx_log_print(edev, txq);
545 }
546
547 if (IS_VF(edev))
548 return;
549
550 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
551 edev->state == QEDE_STATE_RECOVERY) {
552 DP_INFO(edev,
553 "Avoid handling a Tx timeout while another HW error is being handled\n");
554 return;
555 }
556
557 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags);
558 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
559 schedule_delayed_work(&edev->sp_task, 0);
560}
561
562static int qede_setup_tc(struct net_device *ndev, u8 num_tc)
563{
564 struct qede_dev *edev = netdev_priv(ndev);
565 int cos, count, offset;
566
567 if (num_tc > edev->dev_info.num_tc)
568 return -EINVAL;
569
570 netdev_reset_tc(ndev);
571 netdev_set_num_tc(ndev, num_tc);
572
573 for_each_cos_in_txq(edev, cos) {
574 count = QEDE_TSS_COUNT(edev);
575 offset = cos * QEDE_TSS_COUNT(edev);
576 netdev_set_tc_queue(ndev, cos, count, offset);
577 }
578
579 return 0;
580}
581
582static int
583qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f,
584 __be16 proto)
585{
586 switch (f->command) {
587 case FLOW_CLS_REPLACE:
588 return qede_add_tc_flower_fltr(edev, proto, f);
589 case FLOW_CLS_DESTROY:
590 return qede_delete_flow_filter(edev, f->cookie);
591 default:
592 return -EOPNOTSUPP;
593 }
594}
595
596static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
597 void *cb_priv)
598{
599 struct flow_cls_offload *f;
600 struct qede_dev *edev = cb_priv;
601
602 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data))
603 return -EOPNOTSUPP;
604
605 switch (type) {
606 case TC_SETUP_CLSFLOWER:
607 f = type_data;
608 return qede_set_flower(edev, f, f->common.protocol);
609 default:
610 return -EOPNOTSUPP;
611 }
612}
613
614static LIST_HEAD(qede_block_cb_list);
615
616static int
617qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type,
618 void *type_data)
619{
620 struct qede_dev *edev = netdev_priv(dev);
621 struct tc_mqprio_qopt *mqprio;
622
623 switch (type) {
624 case TC_SETUP_BLOCK:
625 return flow_block_cb_setup_simple(type_data,
626 &qede_block_cb_list,
627 qede_setup_tc_block_cb,
628 edev, edev, true);
629 case TC_SETUP_QDISC_MQPRIO:
630 mqprio = type_data;
631
632 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
633 return qede_setup_tc(dev, mqprio->num_tc);
634 default:
635 return -EOPNOTSUPP;
636 }
637}
638
639static const struct net_device_ops qede_netdev_ops = {
640 .ndo_open = qede_open,
641 .ndo_stop = qede_close,
642 .ndo_start_xmit = qede_start_xmit,
643 .ndo_select_queue = qede_select_queue,
644 .ndo_set_rx_mode = qede_set_rx_mode,
645 .ndo_set_mac_address = qede_set_mac_addr,
646 .ndo_validate_addr = eth_validate_addr,
647 .ndo_change_mtu = qede_change_mtu,
648 .ndo_do_ioctl = qede_ioctl,
649 .ndo_tx_timeout = qede_tx_timeout,
650#ifdef CONFIG_QED_SRIOV
651 .ndo_set_vf_mac = qede_set_vf_mac,
652 .ndo_set_vf_vlan = qede_set_vf_vlan,
653 .ndo_set_vf_trust = qede_set_vf_trust,
654#endif
655 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
656 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
657 .ndo_fix_features = qede_fix_features,
658 .ndo_set_features = qede_set_features,
659 .ndo_get_stats64 = qede_get_stats64,
660#ifdef CONFIG_QED_SRIOV
661 .ndo_set_vf_link_state = qede_set_vf_link_state,
662 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
663 .ndo_get_vf_config = qede_get_vf_config,
664 .ndo_set_vf_rate = qede_set_vf_rate,
665#endif
666 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port,
667 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port,
668 .ndo_features_check = qede_features_check,
669 .ndo_bpf = qede_xdp,
670#ifdef CONFIG_RFS_ACCEL
671 .ndo_rx_flow_steer = qede_rx_flow_steer,
672#endif
673 .ndo_xdp_xmit = qede_xdp_transmit,
674 .ndo_setup_tc = qede_setup_tc_offload,
675};
676
677static const struct net_device_ops qede_netdev_vf_ops = {
678 .ndo_open = qede_open,
679 .ndo_stop = qede_close,
680 .ndo_start_xmit = qede_start_xmit,
681 .ndo_select_queue = qede_select_queue,
682 .ndo_set_rx_mode = qede_set_rx_mode,
683 .ndo_set_mac_address = qede_set_mac_addr,
684 .ndo_validate_addr = eth_validate_addr,
685 .ndo_change_mtu = qede_change_mtu,
686 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
687 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
688 .ndo_fix_features = qede_fix_features,
689 .ndo_set_features = qede_set_features,
690 .ndo_get_stats64 = qede_get_stats64,
691 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port,
692 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port,
693 .ndo_features_check = qede_features_check,
694};
695
696static const struct net_device_ops qede_netdev_vf_xdp_ops = {
697 .ndo_open = qede_open,
698 .ndo_stop = qede_close,
699 .ndo_start_xmit = qede_start_xmit,
700 .ndo_select_queue = qede_select_queue,
701 .ndo_set_rx_mode = qede_set_rx_mode,
702 .ndo_set_mac_address = qede_set_mac_addr,
703 .ndo_validate_addr = eth_validate_addr,
704 .ndo_change_mtu = qede_change_mtu,
705 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
706 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
707 .ndo_fix_features = qede_fix_features,
708 .ndo_set_features = qede_set_features,
709 .ndo_get_stats64 = qede_get_stats64,
710 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port,
711 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port,
712 .ndo_features_check = qede_features_check,
713 .ndo_bpf = qede_xdp,
714 .ndo_xdp_xmit = qede_xdp_transmit,
715};
716
717/* -------------------------------------------------------------------------
718 * START OF PROBE / REMOVE
719 * -------------------------------------------------------------------------
720 */
721
722static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
723 struct pci_dev *pdev,
724 struct qed_dev_eth_info *info,
725 u32 dp_module, u8 dp_level)
726{
727 struct net_device *ndev;
728 struct qede_dev *edev;
729
730 ndev = alloc_etherdev_mqs(sizeof(*edev),
731 info->num_queues * info->num_tc,
732 info->num_queues);
733 if (!ndev) {
734 pr_err("etherdev allocation failed\n");
735 return NULL;
736 }
737
738 edev = netdev_priv(ndev);
739 edev->ndev = ndev;
740 edev->cdev = cdev;
741 edev->pdev = pdev;
742 edev->dp_module = dp_module;
743 edev->dp_level = dp_level;
744 edev->ops = qed_ops;
745
746 if (is_kdump_kernel()) {
747 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN;
748 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN;
749 } else {
750 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
751 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
752 }
753
754 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
755 info->num_queues, info->num_queues);
756
757 SET_NETDEV_DEV(ndev, &pdev->dev);
758
759 memset(&edev->stats, 0, sizeof(edev->stats));
760 memcpy(&edev->dev_info, info, sizeof(*info));
761
762 /* As ethtool doesn't have the ability to show WoL behavior as
763 * 'default', if device supports it declare it's enabled.
764 */
765 if (edev->dev_info.common.wol_support)
766 edev->wol_enabled = true;
767
768 INIT_LIST_HEAD(&edev->vlan_list);
769
770 return edev;
771}
772
773static void qede_init_ndev(struct qede_dev *edev)
774{
775 struct net_device *ndev = edev->ndev;
776 struct pci_dev *pdev = edev->pdev;
777 bool udp_tunnel_enable = false;
778 netdev_features_t hw_features;
779
780 pci_set_drvdata(pdev, ndev);
781
782 ndev->mem_start = edev->dev_info.common.pci_mem_start;
783 ndev->base_addr = ndev->mem_start;
784 ndev->mem_end = edev->dev_info.common.pci_mem_end;
785 ndev->irq = edev->dev_info.common.pci_irq;
786
787 ndev->watchdog_timeo = TX_TIMEOUT;
788
789 if (IS_VF(edev)) {
790 if (edev->dev_info.xdp_supported)
791 ndev->netdev_ops = &qede_netdev_vf_xdp_ops;
792 else
793 ndev->netdev_ops = &qede_netdev_vf_ops;
794 } else {
795 ndev->netdev_ops = &qede_netdev_ops;
796 }
797
798 qede_set_ethtool_ops(ndev);
799
800 ndev->priv_flags |= IFF_UNICAST_FLT;
801
802 /* user-changeble features */
803 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG |
804 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
805 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC;
806
807 if (edev->dev_info.common.b_arfs_capable)
808 hw_features |= NETIF_F_NTUPLE;
809
810 if (edev->dev_info.common.vxlan_enable ||
811 edev->dev_info.common.geneve_enable)
812 udp_tunnel_enable = true;
813
814 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) {
815 hw_features |= NETIF_F_TSO_ECN;
816 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
817 NETIF_F_SG | NETIF_F_TSO |
818 NETIF_F_TSO_ECN | NETIF_F_TSO6 |
819 NETIF_F_RXCSUM;
820 }
821
822 if (udp_tunnel_enable) {
823 hw_features |= (NETIF_F_GSO_UDP_TUNNEL |
824 NETIF_F_GSO_UDP_TUNNEL_CSUM);
825 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL |
826 NETIF_F_GSO_UDP_TUNNEL_CSUM);
827
828 qede_set_udp_tunnels(edev);
829 }
830
831 if (edev->dev_info.common.gre_enable) {
832 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM);
833 ndev->hw_enc_features |= (NETIF_F_GSO_GRE |
834 NETIF_F_GSO_GRE_CSUM);
835 }
836
837 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
838 NETIF_F_HIGHDMA;
839 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
840 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
841 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
842
843 ndev->hw_features = hw_features;
844
845 /* MTU range: 46 - 9600 */
846 ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
847 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
848
849 /* Set network device HW mac */
850 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
851
852 ndev->mtu = edev->dev_info.common.mtu;
853}
854
855/* This function converts from 32b param to two params of level and module
856 * Input 32b decoding:
857 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
858 * 'happy' flow, e.g. memory allocation failed.
859 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
860 * and provide important parameters.
861 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
862 * module. VERBOSE prints are for tracking the specific flow in low level.
863 *
864 * Notice that the level should be that of the lowest required logs.
865 */
866void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
867{
868 *p_dp_level = QED_LEVEL_NOTICE;
869 *p_dp_module = 0;
870
871 if (debug & QED_LOG_VERBOSE_MASK) {
872 *p_dp_level = QED_LEVEL_VERBOSE;
873 *p_dp_module = (debug & 0x3FFFFFFF);
874 } else if (debug & QED_LOG_INFO_MASK) {
875 *p_dp_level = QED_LEVEL_INFO;
876 } else if (debug & QED_LOG_NOTICE_MASK) {
877 *p_dp_level = QED_LEVEL_NOTICE;
878 }
879}
880
881static void qede_free_fp_array(struct qede_dev *edev)
882{
883 if (edev->fp_array) {
884 struct qede_fastpath *fp;
885 int i;
886
887 for_each_queue(i) {
888 fp = &edev->fp_array[i];
889
890 kfree(fp->sb_info);
891 /* Handle mem alloc failure case where qede_init_fp
892 * didn't register xdp_rxq_info yet.
893 * Implicit only (fp->type & QEDE_FASTPATH_RX)
894 */
895 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq))
896 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq);
897 kfree(fp->rxq);
898 kfree(fp->xdp_tx);
899 kfree(fp->txq);
900 }
901 kfree(edev->fp_array);
902 }
903
904 edev->num_queues = 0;
905 edev->fp_num_tx = 0;
906 edev->fp_num_rx = 0;
907}
908
909static int qede_alloc_fp_array(struct qede_dev *edev)
910{
911 u8 fp_combined, fp_rx = edev->fp_num_rx;
912 struct qede_fastpath *fp;
913 int i;
914
915 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
916 sizeof(*edev->fp_array), GFP_KERNEL);
917 if (!edev->fp_array) {
918 DP_NOTICE(edev, "fp array allocation failed\n");
919 goto err;
920 }
921
922 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
923
924 /* Allocate the FP elements for Rx queues followed by combined and then
925 * the Tx. This ordering should be maintained so that the respective
926 * queues (Rx or Tx) will be together in the fastpath array and the
927 * associated ids will be sequential.
928 */
929 for_each_queue(i) {
930 fp = &edev->fp_array[i];
931
932 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
933 if (!fp->sb_info) {
934 DP_NOTICE(edev, "sb info struct allocation failed\n");
935 goto err;
936 }
937
938 if (fp_rx) {
939 fp->type = QEDE_FASTPATH_RX;
940 fp_rx--;
941 } else if (fp_combined) {
942 fp->type = QEDE_FASTPATH_COMBINED;
943 fp_combined--;
944 } else {
945 fp->type = QEDE_FASTPATH_TX;
946 }
947
948 if (fp->type & QEDE_FASTPATH_TX) {
949 fp->txq = kcalloc(edev->dev_info.num_tc,
950 sizeof(*fp->txq), GFP_KERNEL);
951 if (!fp->txq)
952 goto err;
953 }
954
955 if (fp->type & QEDE_FASTPATH_RX) {
956 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
957 if (!fp->rxq)
958 goto err;
959
960 if (edev->xdp_prog) {
961 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
962 GFP_KERNEL);
963 if (!fp->xdp_tx)
964 goto err;
965 fp->type |= QEDE_FASTPATH_XDP;
966 }
967 }
968 }
969
970 return 0;
971err:
972 qede_free_fp_array(edev);
973 return -ENOMEM;
974}
975
976/* The qede lock is used to protect driver state change and driver flows that
977 * are not reentrant.
978 */
979void __qede_lock(struct qede_dev *edev)
980{
981 mutex_lock(&edev->qede_lock);
982}
983
984void __qede_unlock(struct qede_dev *edev)
985{
986 mutex_unlock(&edev->qede_lock);
987}
988
989/* This version of the lock should be used when acquiring the RTNL lock is also
990 * needed in addition to the internal qede lock.
991 */
992static void qede_lock(struct qede_dev *edev)
993{
994 rtnl_lock();
995 __qede_lock(edev);
996}
997
998static void qede_unlock(struct qede_dev *edev)
999{
1000 __qede_unlock(edev);
1001 rtnl_unlock();
1002}
1003
1004static void qede_sp_task(struct work_struct *work)
1005{
1006 struct qede_dev *edev = container_of(work, struct qede_dev,
1007 sp_task.work);
1008
1009 /* The locking scheme depends on the specific flag:
1010 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to
1011 * ensure that ongoing flows are ended and new ones are not started.
1012 * In other cases - only the internal qede lock should be acquired.
1013 */
1014
1015 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) {
1016#ifdef CONFIG_QED_SRIOV
1017 /* SRIOV must be disabled outside the lock to avoid a deadlock.
1018 * The recovery of the active VFs is currently not supported.
1019 */
1020 if (pci_num_vf(edev->pdev))
1021 qede_sriov_configure(edev->pdev, 0);
1022#endif
1023 qede_lock(edev);
1024 qede_recovery_handler(edev);
1025 qede_unlock(edev);
1026 }
1027
1028 __qede_lock(edev);
1029
1030 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
1031 if (edev->state == QEDE_STATE_OPEN)
1032 qede_config_rx_mode(edev->ndev);
1033
1034#ifdef CONFIG_RFS_ACCEL
1035 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) {
1036 if (edev->state == QEDE_STATE_OPEN)
1037 qede_process_arfs_filters(edev, false);
1038 }
1039#endif
1040 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags))
1041 qede_generic_hw_err_handler(edev);
1042 __qede_unlock(edev);
1043
1044 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) {
1045#ifdef CONFIG_QED_SRIOV
1046 /* SRIOV must be disabled outside the lock to avoid a deadlock.
1047 * The recovery of the active VFs is currently not supported.
1048 */
1049 if (pci_num_vf(edev->pdev))
1050 qede_sriov_configure(edev->pdev, 0);
1051#endif
1052 edev->ops->common->recovery_process(edev->cdev);
1053 }
1054}
1055
1056static void qede_update_pf_params(struct qed_dev *cdev)
1057{
1058 struct qed_pf_params pf_params;
1059 u16 num_cons;
1060
1061 /* 64 rx + 64 tx + 64 XDP */
1062 memset(&pf_params, 0, sizeof(struct qed_pf_params));
1063
1064 /* 1 rx + 1 xdp + max tx cos */
1065 num_cons = QED_MIN_L2_CONS;
1066
1067 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons;
1068
1069 /* Same for VFs - make sure they'll have sufficient connections
1070 * to support XDP Tx queues.
1071 */
1072 pf_params.eth_pf_params.num_vf_cons = 48;
1073
1074 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR;
1075 qed_ops->common->update_pf_params(cdev, &pf_params);
1076}
1077
1078#define QEDE_FW_VER_STR_SIZE 80
1079
1080static void qede_log_probe(struct qede_dev *edev)
1081{
1082 struct qed_dev_info *p_dev_info = &edev->dev_info.common;
1083 u8 buf[QEDE_FW_VER_STR_SIZE];
1084 size_t left_size;
1085
1086 snprintf(buf, QEDE_FW_VER_STR_SIZE,
1087 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d",
1088 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev,
1089 p_dev_info->fw_eng,
1090 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >>
1091 QED_MFW_VERSION_3_OFFSET,
1092 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >>
1093 QED_MFW_VERSION_2_OFFSET,
1094 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >>
1095 QED_MFW_VERSION_1_OFFSET,
1096 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >>
1097 QED_MFW_VERSION_0_OFFSET);
1098
1099 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf);
1100 if (p_dev_info->mbi_version && left_size)
1101 snprintf(buf + strlen(buf), left_size,
1102 " [MBI %d.%d.%d]",
1103 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >>
1104 QED_MBI_VERSION_2_OFFSET,
1105 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >>
1106 QED_MBI_VERSION_1_OFFSET,
1107 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >>
1108 QED_MBI_VERSION_0_OFFSET);
1109
1110 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number,
1111 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn),
1112 buf, edev->ndev->name);
1113}
1114
1115enum qede_probe_mode {
1116 QEDE_PROBE_NORMAL,
1117 QEDE_PROBE_RECOVERY,
1118};
1119
1120static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1121 bool is_vf, enum qede_probe_mode mode)
1122{
1123 struct qed_probe_params probe_params;
1124 struct qed_slowpath_params sp_params;
1125 struct qed_dev_eth_info dev_info;
1126 struct qede_dev *edev;
1127 struct qed_dev *cdev;
1128 int rc;
1129
1130 if (unlikely(dp_level & QED_LEVEL_INFO))
1131 pr_notice("Starting qede probe\n");
1132
1133 memset(&probe_params, 0, sizeof(probe_params));
1134 probe_params.protocol = QED_PROTOCOL_ETH;
1135 probe_params.dp_module = dp_module;
1136 probe_params.dp_level = dp_level;
1137 probe_params.is_vf = is_vf;
1138 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY);
1139 cdev = qed_ops->common->probe(pdev, &probe_params);
1140 if (!cdev) {
1141 rc = -ENODEV;
1142 goto err0;
1143 }
1144
1145 qede_update_pf_params(cdev);
1146
1147 /* Start the Slowpath-process */
1148 memset(&sp_params, 0, sizeof(sp_params));
1149 sp_params.int_mode = QED_INT_MODE_MSIX;
1150 sp_params.drv_major = QEDE_MAJOR_VERSION;
1151 sp_params.drv_minor = QEDE_MINOR_VERSION;
1152 sp_params.drv_rev = QEDE_REVISION_VERSION;
1153 sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
1154 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1155 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
1156 if (rc) {
1157 pr_notice("Cannot start slowpath\n");
1158 goto err1;
1159 }
1160
1161 /* Learn information crucial for qede to progress */
1162 rc = qed_ops->fill_dev_info(cdev, &dev_info);
1163 if (rc)
1164 goto err2;
1165
1166 if (mode != QEDE_PROBE_RECOVERY) {
1167 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1168 dp_level);
1169 if (!edev) {
1170 rc = -ENOMEM;
1171 goto err2;
1172 }
1173 } else {
1174 struct net_device *ndev = pci_get_drvdata(pdev);
1175
1176 edev = netdev_priv(ndev);
1177 edev->cdev = cdev;
1178 memset(&edev->stats, 0, sizeof(edev->stats));
1179 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info));
1180 }
1181
1182 if (is_vf)
1183 set_bit(QEDE_FLAGS_IS_VF, &edev->flags);
1184
1185 qede_init_ndev(edev);
1186
1187 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY));
1188 if (rc)
1189 goto err3;
1190
1191 if (mode != QEDE_PROBE_RECOVERY) {
1192 /* Prepare the lock prior to the registration of the netdev,
1193 * as once it's registered we might reach flows requiring it
1194 * [it's even possible to reach a flow needing it directly
1195 * from there, although it's unlikely].
1196 */
1197 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1198 mutex_init(&edev->qede_lock);
1199
1200 rc = register_netdev(edev->ndev);
1201 if (rc) {
1202 DP_NOTICE(edev, "Cannot register net-device\n");
1203 goto err4;
1204 }
1205 }
1206
1207 edev->ops->common->set_name(cdev, edev->ndev->name);
1208
1209 /* PTP not supported on VFs */
1210 if (!is_vf)
1211 qede_ptp_enable(edev);
1212
1213 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1214
1215#ifdef CONFIG_DCB
1216 if (!IS_VF(edev))
1217 qede_set_dcbnl_ops(edev->ndev);
1218#endif
1219
1220 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
1221
1222 qede_log_probe(edev);
1223 return 0;
1224
1225err4:
1226 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY));
1227err3:
1228 free_netdev(edev->ndev);
1229err2:
1230 qed_ops->common->slowpath_stop(cdev);
1231err1:
1232 qed_ops->common->remove(cdev);
1233err0:
1234 return rc;
1235}
1236
1237static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1238{
1239 bool is_vf = false;
1240 u32 dp_module = 0;
1241 u8 dp_level = 0;
1242
1243 switch ((enum qede_pci_private)id->driver_data) {
1244 case QEDE_PRIVATE_VF:
1245 if (debug & QED_LOG_VERBOSE_MASK)
1246 dev_err(&pdev->dev, "Probing a VF\n");
1247 is_vf = true;
1248 break;
1249 default:
1250 if (debug & QED_LOG_VERBOSE_MASK)
1251 dev_err(&pdev->dev, "Probing a PF\n");
1252 }
1253
1254 qede_config_debug(debug, &dp_module, &dp_level);
1255
1256 return __qede_probe(pdev, dp_module, dp_level, is_vf,
1257 QEDE_PROBE_NORMAL);
1258}
1259
1260enum qede_remove_mode {
1261 QEDE_REMOVE_NORMAL,
1262 QEDE_REMOVE_RECOVERY,
1263};
1264
1265static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1266{
1267 struct net_device *ndev = pci_get_drvdata(pdev);
1268 struct qede_dev *edev;
1269 struct qed_dev *cdev;
1270
1271 if (!ndev) {
1272 dev_info(&pdev->dev, "Device has already been removed\n");
1273 return;
1274 }
1275
1276 edev = netdev_priv(ndev);
1277 cdev = edev->cdev;
1278
1279 DP_INFO(edev, "Starting qede_remove\n");
1280
1281 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY));
1282
1283 if (mode != QEDE_REMOVE_RECOVERY) {
1284 unregister_netdev(ndev);
1285
1286 cancel_delayed_work_sync(&edev->sp_task);
1287
1288 edev->ops->common->set_power_state(cdev, PCI_D0);
1289
1290 pci_set_drvdata(pdev, NULL);
1291 }
1292
1293 qede_ptp_disable(edev);
1294
1295 /* Use global ops since we've freed edev */
1296 qed_ops->common->slowpath_stop(cdev);
1297 if (system_state == SYSTEM_POWER_OFF)
1298 return;
1299 qed_ops->common->remove(cdev);
1300 edev->cdev = NULL;
1301
1302 /* Since this can happen out-of-sync with other flows,
1303 * don't release the netdevice until after slowpath stop
1304 * has been called to guarantee various other contexts
1305 * [e.g., QED register callbacks] won't break anything when
1306 * accessing the netdevice.
1307 */
1308 if (mode != QEDE_REMOVE_RECOVERY)
1309 free_netdev(ndev);
1310
1311 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
1312}
1313
1314static void qede_remove(struct pci_dev *pdev)
1315{
1316 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1317}
1318
1319static void qede_shutdown(struct pci_dev *pdev)
1320{
1321 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1322}
1323
1324/* -------------------------------------------------------------------------
1325 * START OF LOAD / UNLOAD
1326 * -------------------------------------------------------------------------
1327 */
1328
1329static int qede_set_num_queues(struct qede_dev *edev)
1330{
1331 int rc;
1332 u16 rss_num;
1333
1334 /* Setup queues according to possible resources*/
1335 if (edev->req_queues)
1336 rss_num = edev->req_queues;
1337 else
1338 rss_num = netif_get_num_default_rss_queues() *
1339 edev->dev_info.common.num_hwfns;
1340
1341 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1342
1343 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1344 if (rc > 0) {
1345 /* Managed to request interrupts for our queues */
1346 edev->num_queues = rc;
1347 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1348 QEDE_QUEUE_CNT(edev), rss_num);
1349 rc = 0;
1350 }
1351
1352 edev->fp_num_tx = edev->req_num_tx;
1353 edev->fp_num_rx = edev->req_num_rx;
1354
1355 return rc;
1356}
1357
1358static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info,
1359 u16 sb_id)
1360{
1361 if (sb_info->sb_virt) {
1362 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id,
1363 QED_SB_TYPE_L2_QUEUE);
1364 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1365 (void *)sb_info->sb_virt, sb_info->sb_phys);
1366 memset(sb_info, 0, sizeof(*sb_info));
1367 }
1368}
1369
1370/* This function allocates fast-path status block memory */
1371static int qede_alloc_mem_sb(struct qede_dev *edev,
1372 struct qed_sb_info *sb_info, u16 sb_id)
1373{
1374 struct status_block_e4 *sb_virt;
1375 dma_addr_t sb_phys;
1376 int rc;
1377
1378 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1379 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
1380 if (!sb_virt) {
1381 DP_ERR(edev, "Status block allocation failed\n");
1382 return -ENOMEM;
1383 }
1384
1385 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1386 sb_virt, sb_phys, sb_id,
1387 QED_SB_TYPE_L2_QUEUE);
1388 if (rc) {
1389 DP_ERR(edev, "Status block initialization failed\n");
1390 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1391 sb_virt, sb_phys);
1392 return rc;
1393 }
1394
1395 return 0;
1396}
1397
1398static void qede_free_rx_buffers(struct qede_dev *edev,
1399 struct qede_rx_queue *rxq)
1400{
1401 u16 i;
1402
1403 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1404 struct sw_rx_data *rx_buf;
1405 struct page *data;
1406
1407 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1408 data = rx_buf->data;
1409
1410 dma_unmap_page(&edev->pdev->dev,
1411 rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
1412
1413 rx_buf->data = NULL;
1414 __free_page(data);
1415 }
1416}
1417
1418static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1419{
1420 /* Free rx buffers */
1421 qede_free_rx_buffers(edev, rxq);
1422
1423 /* Free the parallel SW ring */
1424 kfree(rxq->sw_rx_ring);
1425
1426 /* Free the real RQ ring used by FW */
1427 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1428 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1429}
1430
1431static void qede_set_tpa_param(struct qede_rx_queue *rxq)
1432{
1433 int i;
1434
1435 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
1436 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
1437
1438 tpa_info->state = QEDE_AGG_STATE_NONE;
1439 }
1440}
1441
1442/* This function allocates all memory needed per Rx queue */
1443static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1444{
1445 struct qed_chain_init_params params = {
1446 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1447 .num_elems = RX_RING_SIZE,
1448 };
1449 struct qed_dev *cdev = edev->cdev;
1450 int i, rc, size;
1451
1452 rxq->num_rx_buffers = edev->q_num_rx_buffers;
1453
1454 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
1455
1456 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD;
1457 size = rxq->rx_headroom +
1458 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1459
1460 /* Make sure that the headroom and payload fit in a single page */
1461 if (rxq->rx_buf_size + size > PAGE_SIZE)
1462 rxq->rx_buf_size = PAGE_SIZE - size;
1463
1464 /* Segment size to split a page in multiple equal parts,
1465 * unless XDP is used in which case we'd use the entire page.
1466 */
1467 if (!edev->xdp_prog) {
1468 size = size + rxq->rx_buf_size;
1469 rxq->rx_buf_seg_size = roundup_pow_of_two(size);
1470 } else {
1471 rxq->rx_buf_seg_size = PAGE_SIZE;
1472 edev->ndev->features &= ~NETIF_F_GRO_HW;
1473 }
1474
1475 /* Allocate the parallel driver ring for Rx buffers */
1476 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
1477 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
1478 if (!rxq->sw_rx_ring) {
1479 DP_ERR(edev, "Rx buffers ring allocation failed\n");
1480 rc = -ENOMEM;
1481 goto err;
1482 }
1483
1484 /* Allocate FW Rx ring */
1485 params.mode = QED_CHAIN_MODE_NEXT_PTR;
1486 params.intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE;
1487 params.elem_size = sizeof(struct eth_rx_bd);
1488
1489 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_bd_ring, ¶ms);
1490 if (rc)
1491 goto err;
1492
1493 /* Allocate FW completion ring */
1494 params.mode = QED_CHAIN_MODE_PBL;
1495 params.intended_use = QED_CHAIN_USE_TO_CONSUME;
1496 params.elem_size = sizeof(union eth_rx_cqe);
1497
1498 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_comp_ring, ¶ms);
1499 if (rc)
1500 goto err;
1501
1502 /* Allocate buffers for the Rx ring */
1503 rxq->filled_buffers = 0;
1504 for (i = 0; i < rxq->num_rx_buffers; i++) {
1505 rc = qede_alloc_rx_buffer(rxq, false);
1506 if (rc) {
1507 DP_ERR(edev,
1508 "Rx buffers allocation failed at index %d\n", i);
1509 goto err;
1510 }
1511 }
1512
1513 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW);
1514 if (!edev->gro_disable)
1515 qede_set_tpa_param(rxq);
1516err:
1517 return rc;
1518}
1519
1520static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1521{
1522 /* Free the parallel SW ring */
1523 if (txq->is_xdp)
1524 kfree(txq->sw_tx_ring.xdp);
1525 else
1526 kfree(txq->sw_tx_ring.skbs);
1527
1528 /* Free the real RQ ring used by FW */
1529 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
1530}
1531
1532/* This function allocates all memory needed per Tx queue */
1533static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1534{
1535 struct qed_chain_init_params params = {
1536 .mode = QED_CHAIN_MODE_PBL,
1537 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1538 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1539 .num_elems = edev->q_num_tx_buffers,
1540 .elem_size = sizeof(union eth_tx_bd_types),
1541 };
1542 int size, rc;
1543
1544 txq->num_tx_buffers = edev->q_num_tx_buffers;
1545
1546 /* Allocate the parallel driver ring for Tx buffers */
1547 if (txq->is_xdp) {
1548 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers;
1549 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL);
1550 if (!txq->sw_tx_ring.xdp)
1551 goto err;
1552 } else {
1553 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers;
1554 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
1555 if (!txq->sw_tx_ring.skbs)
1556 goto err;
1557 }
1558
1559 rc = edev->ops->common->chain_alloc(edev->cdev, &txq->tx_pbl, ¶ms);
1560 if (rc)
1561 goto err;
1562
1563 return 0;
1564
1565err:
1566 qede_free_mem_txq(edev, txq);
1567 return -ENOMEM;
1568}
1569
1570/* This function frees all memory of a single fp */
1571static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1572{
1573 qede_free_mem_sb(edev, fp->sb_info, fp->id);
1574
1575 if (fp->type & QEDE_FASTPATH_RX)
1576 qede_free_mem_rxq(edev, fp->rxq);
1577
1578 if (fp->type & QEDE_FASTPATH_XDP)
1579 qede_free_mem_txq(edev, fp->xdp_tx);
1580
1581 if (fp->type & QEDE_FASTPATH_TX) {
1582 int cos;
1583
1584 for_each_cos_in_txq(edev, cos)
1585 qede_free_mem_txq(edev, &fp->txq[cos]);
1586 }
1587}
1588
1589/* This function allocates all memory needed for a single fp (i.e. an entity
1590 * which contains status block, one rx queue and/or multiple per-TC tx queues.
1591 */
1592static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1593{
1594 int rc = 0;
1595
1596 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
1597 if (rc)
1598 goto out;
1599
1600 if (fp->type & QEDE_FASTPATH_RX) {
1601 rc = qede_alloc_mem_rxq(edev, fp->rxq);
1602 if (rc)
1603 goto out;
1604 }
1605
1606 if (fp->type & QEDE_FASTPATH_XDP) {
1607 rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
1608 if (rc)
1609 goto out;
1610 }
1611
1612 if (fp->type & QEDE_FASTPATH_TX) {
1613 int cos;
1614
1615 for_each_cos_in_txq(edev, cos) {
1616 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]);
1617 if (rc)
1618 goto out;
1619 }
1620 }
1621
1622out:
1623 return rc;
1624}
1625
1626static void qede_free_mem_load(struct qede_dev *edev)
1627{
1628 int i;
1629
1630 for_each_queue(i) {
1631 struct qede_fastpath *fp = &edev->fp_array[i];
1632
1633 qede_free_mem_fp(edev, fp);
1634 }
1635}
1636
1637/* This function allocates all qede memory at NIC load. */
1638static int qede_alloc_mem_load(struct qede_dev *edev)
1639{
1640 int rc = 0, queue_id;
1641
1642 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
1643 struct qede_fastpath *fp = &edev->fp_array[queue_id];
1644
1645 rc = qede_alloc_mem_fp(edev, fp);
1646 if (rc) {
1647 DP_ERR(edev,
1648 "Failed to allocate memory for fastpath - rss id = %d\n",
1649 queue_id);
1650 qede_free_mem_load(edev);
1651 return rc;
1652 }
1653 }
1654
1655 return 0;
1656}
1657
1658static void qede_empty_tx_queue(struct qede_dev *edev,
1659 struct qede_tx_queue *txq)
1660{
1661 unsigned int pkts_compl = 0, bytes_compl = 0;
1662 struct netdev_queue *netdev_txq;
1663 int rc, len = 0;
1664
1665 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
1666
1667 while (qed_chain_get_cons_idx(&txq->tx_pbl) !=
1668 qed_chain_get_prod_idx(&txq->tx_pbl)) {
1669 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1670 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1671 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl),
1672 qed_chain_get_prod_idx(&txq->tx_pbl));
1673
1674 rc = qede_free_tx_pkt(edev, txq, &len);
1675 if (rc) {
1676 DP_NOTICE(edev,
1677 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1678 txq->index,
1679 qed_chain_get_cons_idx(&txq->tx_pbl),
1680 qed_chain_get_prod_idx(&txq->tx_pbl));
1681 break;
1682 }
1683
1684 bytes_compl += len;
1685 pkts_compl++;
1686 txq->sw_tx_cons++;
1687 }
1688
1689 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
1690}
1691
1692static void qede_empty_tx_queues(struct qede_dev *edev)
1693{
1694 int i;
1695
1696 for_each_queue(i)
1697 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
1698 int cos;
1699
1700 for_each_cos_in_txq(edev, cos) {
1701 struct qede_fastpath *fp;
1702
1703 fp = &edev->fp_array[i];
1704 qede_empty_tx_queue(edev,
1705 &fp->txq[cos]);
1706 }
1707 }
1708}
1709
1710/* This function inits fp content and resets the SB, RXQ and TXQ structures */
1711static void qede_init_fp(struct qede_dev *edev)
1712{
1713 int queue_id, rxq_index = 0, txq_index = 0;
1714 struct qede_fastpath *fp;
1715 bool init_xdp = false;
1716
1717 for_each_queue(queue_id) {
1718 fp = &edev->fp_array[queue_id];
1719
1720 fp->edev = edev;
1721 fp->id = queue_id;
1722
1723 if (fp->type & QEDE_FASTPATH_XDP) {
1724 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
1725 rxq_index);
1726 fp->xdp_tx->is_xdp = 1;
1727
1728 spin_lock_init(&fp->xdp_tx->xdp_tx_lock);
1729 init_xdp = true;
1730 }
1731
1732 if (fp->type & QEDE_FASTPATH_RX) {
1733 fp->rxq->rxq_id = rxq_index++;
1734
1735 /* Determine how to map buffers for this queue */
1736 if (fp->type & QEDE_FASTPATH_XDP)
1737 fp->rxq->data_direction = DMA_BIDIRECTIONAL;
1738 else
1739 fp->rxq->data_direction = DMA_FROM_DEVICE;
1740 fp->rxq->dev = &edev->pdev->dev;
1741
1742 /* Driver have no error path from here */
1743 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev,
1744 fp->rxq->rxq_id) < 0);
1745
1746 if (xdp_rxq_info_reg_mem_model(&fp->rxq->xdp_rxq,
1747 MEM_TYPE_PAGE_ORDER0,
1748 NULL)) {
1749 DP_NOTICE(edev,
1750 "Failed to register XDP memory model\n");
1751 }
1752 }
1753
1754 if (fp->type & QEDE_FASTPATH_TX) {
1755 int cos;
1756
1757 for_each_cos_in_txq(edev, cos) {
1758 struct qede_tx_queue *txq = &fp->txq[cos];
1759 u16 ndev_tx_id;
1760
1761 txq->cos = cos;
1762 txq->index = txq_index;
1763 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq);
1764 txq->ndev_txq_id = ndev_tx_id;
1765
1766 if (edev->dev_info.is_legacy)
1767 txq->is_legacy = true;
1768 txq->dev = &edev->pdev->dev;
1769 }
1770
1771 txq_index++;
1772 }
1773
1774 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1775 edev->ndev->name, queue_id);
1776 }
1777
1778 if (init_xdp) {
1779 edev->total_xdp_queues = QEDE_RSS_COUNT(edev);
1780 DP_INFO(edev, "Total XDP queues: %u\n", edev->total_xdp_queues);
1781 }
1782}
1783
1784static int qede_set_real_num_queues(struct qede_dev *edev)
1785{
1786 int rc = 0;
1787
1788 rc = netif_set_real_num_tx_queues(edev->ndev,
1789 QEDE_TSS_COUNT(edev) *
1790 edev->dev_info.num_tc);
1791 if (rc) {
1792 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
1793 return rc;
1794 }
1795
1796 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
1797 if (rc) {
1798 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
1799 return rc;
1800 }
1801
1802 return 0;
1803}
1804
1805static void qede_napi_disable_remove(struct qede_dev *edev)
1806{
1807 int i;
1808
1809 for_each_queue(i) {
1810 napi_disable(&edev->fp_array[i].napi);
1811
1812 netif_napi_del(&edev->fp_array[i].napi);
1813 }
1814}
1815
1816static void qede_napi_add_enable(struct qede_dev *edev)
1817{
1818 int i;
1819
1820 /* Add NAPI objects */
1821 for_each_queue(i) {
1822 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
1823 qede_poll, NAPI_POLL_WEIGHT);
1824 napi_enable(&edev->fp_array[i].napi);
1825 }
1826}
1827
1828static void qede_sync_free_irqs(struct qede_dev *edev)
1829{
1830 int i;
1831
1832 for (i = 0; i < edev->int_info.used_cnt; i++) {
1833 if (edev->int_info.msix_cnt) {
1834 synchronize_irq(edev->int_info.msix[i].vector);
1835 free_irq(edev->int_info.msix[i].vector,
1836 &edev->fp_array[i]);
1837 } else {
1838 edev->ops->common->simd_handler_clean(edev->cdev, i);
1839 }
1840 }
1841
1842 edev->int_info.used_cnt = 0;
1843}
1844
1845static int qede_req_msix_irqs(struct qede_dev *edev)
1846{
1847 int i, rc;
1848
1849 /* Sanitize number of interrupts == number of prepared RSS queues */
1850 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
1851 DP_ERR(edev,
1852 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
1853 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
1854 return -EINVAL;
1855 }
1856
1857 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
1858#ifdef CONFIG_RFS_ACCEL
1859 struct qede_fastpath *fp = &edev->fp_array[i];
1860
1861 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) {
1862 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap,
1863 edev->int_info.msix[i].vector);
1864 if (rc) {
1865 DP_ERR(edev, "Failed to add CPU rmap\n");
1866 qede_free_arfs(edev);
1867 }
1868 }
1869#endif
1870 rc = request_irq(edev->int_info.msix[i].vector,
1871 qede_msix_fp_int, 0, edev->fp_array[i].name,
1872 &edev->fp_array[i]);
1873 if (rc) {
1874 DP_ERR(edev, "Request fp %d irq failed\n", i);
1875 qede_sync_free_irqs(edev);
1876 return rc;
1877 }
1878 DP_VERBOSE(edev, NETIF_MSG_INTR,
1879 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
1880 edev->fp_array[i].name, i,
1881 &edev->fp_array[i]);
1882 edev->int_info.used_cnt++;
1883 }
1884
1885 return 0;
1886}
1887
1888static void qede_simd_fp_handler(void *cookie)
1889{
1890 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
1891
1892 napi_schedule_irqoff(&fp->napi);
1893}
1894
1895static int qede_setup_irqs(struct qede_dev *edev)
1896{
1897 int i, rc = 0;
1898
1899 /* Learn Interrupt configuration */
1900 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
1901 if (rc)
1902 return rc;
1903
1904 if (edev->int_info.msix_cnt) {
1905 rc = qede_req_msix_irqs(edev);
1906 if (rc)
1907 return rc;
1908 edev->ndev->irq = edev->int_info.msix[0].vector;
1909 } else {
1910 const struct qed_common_ops *ops;
1911
1912 /* qed should learn receive the RSS ids and callbacks */
1913 ops = edev->ops->common;
1914 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
1915 ops->simd_handler_config(edev->cdev,
1916 &edev->fp_array[i], i,
1917 qede_simd_fp_handler);
1918 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
1919 }
1920 return 0;
1921}
1922
1923static int qede_drain_txq(struct qede_dev *edev,
1924 struct qede_tx_queue *txq, bool allow_drain)
1925{
1926 int rc, cnt = 1000;
1927
1928 while (txq->sw_tx_cons != txq->sw_tx_prod) {
1929 if (!cnt) {
1930 if (allow_drain) {
1931 DP_NOTICE(edev,
1932 "Tx queue[%d] is stuck, requesting MCP to drain\n",
1933 txq->index);
1934 rc = edev->ops->common->drain(edev->cdev);
1935 if (rc)
1936 return rc;
1937 return qede_drain_txq(edev, txq, false);
1938 }
1939 DP_NOTICE(edev,
1940 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
1941 txq->index, txq->sw_tx_prod,
1942 txq->sw_tx_cons);
1943 return -ENODEV;
1944 }
1945 cnt--;
1946 usleep_range(1000, 2000);
1947 barrier();
1948 }
1949
1950 /* FW finished processing, wait for HW to transmit all tx packets */
1951 usleep_range(1000, 2000);
1952
1953 return 0;
1954}
1955
1956static int qede_stop_txq(struct qede_dev *edev,
1957 struct qede_tx_queue *txq, int rss_id)
1958{
1959 /* delete doorbell from doorbell recovery mechanism */
1960 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr,
1961 &txq->tx_db);
1962
1963 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
1964}
1965
1966static int qede_stop_queues(struct qede_dev *edev)
1967{
1968 struct qed_update_vport_params *vport_update_params;
1969 struct qed_dev *cdev = edev->cdev;
1970 struct qede_fastpath *fp;
1971 int rc, i;
1972
1973 /* Disable the vport */
1974 vport_update_params = vzalloc(sizeof(*vport_update_params));
1975 if (!vport_update_params)
1976 return -ENOMEM;
1977
1978 vport_update_params->vport_id = 0;
1979 vport_update_params->update_vport_active_flg = 1;
1980 vport_update_params->vport_active_flg = 0;
1981 vport_update_params->update_rss_flg = 0;
1982
1983 rc = edev->ops->vport_update(cdev, vport_update_params);
1984 vfree(vport_update_params);
1985
1986 if (rc) {
1987 DP_ERR(edev, "Failed to update vport\n");
1988 return rc;
1989 }
1990
1991 /* Flush Tx queues. If needed, request drain from MCP */
1992 for_each_queue(i) {
1993 fp = &edev->fp_array[i];
1994
1995 if (fp->type & QEDE_FASTPATH_TX) {
1996 int cos;
1997
1998 for_each_cos_in_txq(edev, cos) {
1999 rc = qede_drain_txq(edev, &fp->txq[cos], true);
2000 if (rc)
2001 return rc;
2002 }
2003 }
2004
2005 if (fp->type & QEDE_FASTPATH_XDP) {
2006 rc = qede_drain_txq(edev, fp->xdp_tx, true);
2007 if (rc)
2008 return rc;
2009 }
2010 }
2011
2012 /* Stop all Queues in reverse order */
2013 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
2014 fp = &edev->fp_array[i];
2015
2016 /* Stop the Tx Queue(s) */
2017 if (fp->type & QEDE_FASTPATH_TX) {
2018 int cos;
2019
2020 for_each_cos_in_txq(edev, cos) {
2021 rc = qede_stop_txq(edev, &fp->txq[cos], i);
2022 if (rc)
2023 return rc;
2024 }
2025 }
2026
2027 /* Stop the Rx Queue */
2028 if (fp->type & QEDE_FASTPATH_RX) {
2029 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
2030 if (rc) {
2031 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2032 return rc;
2033 }
2034 }
2035
2036 /* Stop the XDP forwarding queue */
2037 if (fp->type & QEDE_FASTPATH_XDP) {
2038 rc = qede_stop_txq(edev, fp->xdp_tx, i);
2039 if (rc)
2040 return rc;
2041
2042 bpf_prog_put(fp->rxq->xdp_prog);
2043 }
2044 }
2045
2046 /* Stop the vport */
2047 rc = edev->ops->vport_stop(cdev, 0);
2048 if (rc)
2049 DP_ERR(edev, "Failed to stop VPORT\n");
2050
2051 return rc;
2052}
2053
2054static int qede_start_txq(struct qede_dev *edev,
2055 struct qede_fastpath *fp,
2056 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
2057{
2058 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
2059 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
2060 struct qed_queue_start_common_params params;
2061 struct qed_txq_start_ret_params ret_params;
2062 int rc;
2063
2064 memset(¶ms, 0, sizeof(params));
2065 memset(&ret_params, 0, sizeof(ret_params));
2066
2067 /* Let the XDP queue share the queue-zone with one of the regular txq.
2068 * We don't really care about its coalescing.
2069 */
2070 if (txq->is_xdp)
2071 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
2072 else
2073 params.queue_id = txq->index;
2074
2075 params.p_sb = fp->sb_info;
2076 params.sb_idx = sb_idx;
2077 params.tc = txq->cos;
2078
2079 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table,
2080 page_cnt, &ret_params);
2081 if (rc) {
2082 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
2083 return rc;
2084 }
2085
2086 txq->doorbell_addr = ret_params.p_doorbell;
2087 txq->handle = ret_params.p_handle;
2088
2089 /* Determine the FW consumer address associated */
2090 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
2091
2092 /* Prepare the doorbell parameters */
2093 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
2094 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
2095 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
2096 DQ_XCM_ETH_TX_BD_PROD_CMD);
2097 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2098
2099 /* register doorbell with doorbell recovery mechanism */
2100 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr,
2101 &txq->tx_db, DB_REC_WIDTH_32B,
2102 DB_REC_KERNEL);
2103
2104 return rc;
2105}
2106
2107static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
2108{
2109 int vlan_removal_en = 1;
2110 struct qed_dev *cdev = edev->cdev;
2111 struct qed_dev_info *qed_info = &edev->dev_info.common;
2112 struct qed_update_vport_params *vport_update_params;
2113 struct qed_queue_start_common_params q_params;
2114 struct qed_start_vport_params start = {0};
2115 int rc, i;
2116
2117 if (!edev->num_queues) {
2118 DP_ERR(edev,
2119 "Cannot update V-VPORT as active as there are no Rx queues\n");
2120 return -EINVAL;
2121 }
2122
2123 vport_update_params = vzalloc(sizeof(*vport_update_params));
2124 if (!vport_update_params)
2125 return -ENOMEM;
2126
2127 start.handle_ptp_pkts = !!(edev->ptp);
2128 start.gro_enable = !edev->gro_disable;
2129 start.mtu = edev->ndev->mtu;
2130 start.vport_id = 0;
2131 start.drop_ttl0 = true;
2132 start.remove_inner_vlan = vlan_removal_en;
2133 start.clear_stats = clear_stats;
2134
2135 rc = edev->ops->vport_start(cdev, &start);
2136
2137 if (rc) {
2138 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2139 goto out;
2140 }
2141
2142 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2143 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2144 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2145
2146 for_each_queue(i) {
2147 struct qede_fastpath *fp = &edev->fp_array[i];
2148 dma_addr_t p_phys_table;
2149 u32 page_cnt;
2150
2151 if (fp->type & QEDE_FASTPATH_RX) {
2152 struct qed_rxq_start_ret_params ret_params;
2153 struct qede_rx_queue *rxq = fp->rxq;
2154 __le16 *val;
2155
2156 memset(&ret_params, 0, sizeof(ret_params));
2157 memset(&q_params, 0, sizeof(q_params));
2158 q_params.queue_id = rxq->rxq_id;
2159 q_params.vport_id = 0;
2160 q_params.p_sb = fp->sb_info;
2161 q_params.sb_idx = RX_PI;
2162
2163 p_phys_table =
2164 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
2165 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
2166
2167 rc = edev->ops->q_rx_start(cdev, i, &q_params,
2168 rxq->rx_buf_size,
2169 rxq->rx_bd_ring.p_phys_addr,
2170 p_phys_table,
2171 page_cnt, &ret_params);
2172 if (rc) {
2173 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
2174 rc);
2175 goto out;
2176 }
2177
2178 /* Use the return parameters */
2179 rxq->hw_rxq_prod_addr = ret_params.p_prod;
2180 rxq->handle = ret_params.p_handle;
2181
2182 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
2183 rxq->hw_cons_ptr = val;
2184
2185 qede_update_rx_prod(edev, rxq);
2186 }
2187
2188 if (fp->type & QEDE_FASTPATH_XDP) {
2189 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
2190 if (rc)
2191 goto out;
2192
2193 bpf_prog_add(edev->xdp_prog, 1);
2194 fp->rxq->xdp_prog = edev->xdp_prog;
2195 }
2196
2197 if (fp->type & QEDE_FASTPATH_TX) {
2198 int cos;
2199
2200 for_each_cos_in_txq(edev, cos) {
2201 rc = qede_start_txq(edev, fp, &fp->txq[cos], i,
2202 TX_PI(cos));
2203 if (rc)
2204 goto out;
2205 }
2206 }
2207 }
2208
2209 /* Prepare and send the vport enable */
2210 vport_update_params->vport_id = start.vport_id;
2211 vport_update_params->update_vport_active_flg = 1;
2212 vport_update_params->vport_active_flg = 1;
2213
2214 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) &&
2215 qed_info->tx_switching) {
2216 vport_update_params->update_tx_switching_flg = 1;
2217 vport_update_params->tx_switching_flg = 1;
2218 }
2219
2220 qede_fill_rss_params(edev, &vport_update_params->rss_params,
2221 &vport_update_params->update_rss_flg);
2222
2223 rc = edev->ops->vport_update(cdev, vport_update_params);
2224 if (rc)
2225 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2226
2227out:
2228 vfree(vport_update_params);
2229 return rc;
2230}
2231
2232enum qede_unload_mode {
2233 QEDE_UNLOAD_NORMAL,
2234 QEDE_UNLOAD_RECOVERY,
2235};
2236
2237static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
2238 bool is_locked)
2239{
2240 struct qed_link_params link_params;
2241 int rc;
2242
2243 DP_INFO(edev, "Starting qede unload\n");
2244
2245 if (!is_locked)
2246 __qede_lock(edev);
2247
2248 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2249
2250 if (mode != QEDE_UNLOAD_RECOVERY)
2251 edev->state = QEDE_STATE_CLOSED;
2252
2253 qede_rdma_dev_event_close(edev);
2254
2255 /* Close OS Tx */
2256 netif_tx_disable(edev->ndev);
2257 netif_carrier_off(edev->ndev);
2258
2259 if (mode != QEDE_UNLOAD_RECOVERY) {
2260 /* Reset the link */
2261 memset(&link_params, 0, sizeof(link_params));
2262 link_params.link_up = false;
2263 edev->ops->common->set_link(edev->cdev, &link_params);
2264
2265 rc = qede_stop_queues(edev);
2266 if (rc) {
2267 qede_sync_free_irqs(edev);
2268 goto out;
2269 }
2270
2271 DP_INFO(edev, "Stopped Queues\n");
2272 }
2273
2274 qede_vlan_mark_nonconfigured(edev);
2275 edev->ops->fastpath_stop(edev->cdev);
2276
2277 if (edev->dev_info.common.b_arfs_capable) {
2278 qede_poll_for_freeing_arfs_filters(edev);
2279 qede_free_arfs(edev);
2280 }
2281
2282 /* Release the interrupts */
2283 qede_sync_free_irqs(edev);
2284 edev->ops->common->set_fp_int(edev->cdev, 0);
2285
2286 qede_napi_disable_remove(edev);
2287
2288 if (mode == QEDE_UNLOAD_RECOVERY)
2289 qede_empty_tx_queues(edev);
2290
2291 qede_free_mem_load(edev);
2292 qede_free_fp_array(edev);
2293
2294out:
2295 if (!is_locked)
2296 __qede_unlock(edev);
2297
2298 if (mode != QEDE_UNLOAD_RECOVERY)
2299 DP_NOTICE(edev, "Link is down\n");
2300
2301 edev->ptp_skip_txts = 0;
2302
2303 DP_INFO(edev, "Ending qede unload\n");
2304}
2305
2306enum qede_load_mode {
2307 QEDE_LOAD_NORMAL,
2308 QEDE_LOAD_RELOAD,
2309 QEDE_LOAD_RECOVERY,
2310};
2311
2312static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
2313 bool is_locked)
2314{
2315 struct qed_link_params link_params;
2316 u8 num_tc;
2317 int rc;
2318
2319 DP_INFO(edev, "Starting qede load\n");
2320
2321 if (!is_locked)
2322 __qede_lock(edev);
2323
2324 rc = qede_set_num_queues(edev);
2325 if (rc)
2326 goto out;
2327
2328 rc = qede_alloc_fp_array(edev);
2329 if (rc)
2330 goto out;
2331
2332 qede_init_fp(edev);
2333
2334 rc = qede_alloc_mem_load(edev);
2335 if (rc)
2336 goto err1;
2337 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
2338 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
2339
2340 rc = qede_set_real_num_queues(edev);
2341 if (rc)
2342 goto err2;
2343
2344 if (qede_alloc_arfs(edev)) {
2345 edev->ndev->features &= ~NETIF_F_NTUPLE;
2346 edev->dev_info.common.b_arfs_capable = false;
2347 }
2348
2349 qede_napi_add_enable(edev);
2350 DP_INFO(edev, "Napi added and enabled\n");
2351
2352 rc = qede_setup_irqs(edev);
2353 if (rc)
2354 goto err3;
2355 DP_INFO(edev, "Setup IRQs succeeded\n");
2356
2357 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
2358 if (rc)
2359 goto err4;
2360 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2361
2362 num_tc = netdev_get_num_tc(edev->ndev);
2363 num_tc = num_tc ? num_tc : edev->dev_info.num_tc;
2364 qede_setup_tc(edev->ndev, num_tc);
2365
2366 /* Program un-configured VLANs */
2367 qede_configure_vlan_filters(edev);
2368
2369 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2370
2371 /* Ask for link-up using current configuration */
2372 memset(&link_params, 0, sizeof(link_params));
2373 link_params.link_up = true;
2374 edev->ops->common->set_link(edev->cdev, &link_params);
2375
2376 edev->state = QEDE_STATE_OPEN;
2377
2378 DP_INFO(edev, "Ending successfully qede load\n");
2379
2380 goto out;
2381err4:
2382 qede_sync_free_irqs(edev);
2383 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
2384err3:
2385 qede_napi_disable_remove(edev);
2386err2:
2387 qede_free_mem_load(edev);
2388err1:
2389 edev->ops->common->set_fp_int(edev->cdev, 0);
2390 qede_free_fp_array(edev);
2391 edev->num_queues = 0;
2392 edev->fp_num_tx = 0;
2393 edev->fp_num_rx = 0;
2394out:
2395 if (!is_locked)
2396 __qede_unlock(edev);
2397
2398 return rc;
2399}
2400
2401/* 'func' should be able to run between unload and reload assuming interface
2402 * is actually running, or afterwards in case it's currently DOWN.
2403 */
2404void qede_reload(struct qede_dev *edev,
2405 struct qede_reload_args *args, bool is_locked)
2406{
2407 if (!is_locked)
2408 __qede_lock(edev);
2409
2410 /* Since qede_lock is held, internal state wouldn't change even
2411 * if netdev state would start transitioning. Check whether current
2412 * internal configuration indicates device is up, then reload.
2413 */
2414 if (edev->state == QEDE_STATE_OPEN) {
2415 qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
2416 if (args)
2417 args->func(edev, args);
2418 qede_load(edev, QEDE_LOAD_RELOAD, true);
2419
2420 /* Since no one is going to do it for us, re-configure */
2421 qede_config_rx_mode(edev->ndev);
2422 } else if (args) {
2423 args->func(edev, args);
2424 }
2425
2426 if (!is_locked)
2427 __qede_unlock(edev);
2428}
2429
2430/* called with rtnl_lock */
2431static int qede_open(struct net_device *ndev)
2432{
2433 struct qede_dev *edev = netdev_priv(ndev);
2434 int rc;
2435
2436 netif_carrier_off(ndev);
2437
2438 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2439
2440 rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
2441 if (rc)
2442 return rc;
2443
2444 udp_tunnel_nic_reset_ntf(ndev);
2445
2446 edev->ops->common->update_drv_state(edev->cdev, true);
2447
2448 return 0;
2449}
2450
2451static int qede_close(struct net_device *ndev)
2452{
2453 struct qede_dev *edev = netdev_priv(ndev);
2454
2455 qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
2456
2457 edev->ops->common->update_drv_state(edev->cdev, false);
2458
2459 return 0;
2460}
2461
2462static void qede_link_update(void *dev, struct qed_link_output *link)
2463{
2464 struct qede_dev *edev = dev;
2465
2466 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) {
2467 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n");
2468 return;
2469 }
2470
2471 if (link->link_up) {
2472 if (!netif_carrier_ok(edev->ndev)) {
2473 DP_NOTICE(edev, "Link is up\n");
2474 netif_tx_start_all_queues(edev->ndev);
2475 netif_carrier_on(edev->ndev);
2476 qede_rdma_dev_event_open(edev);
2477 }
2478 } else {
2479 if (netif_carrier_ok(edev->ndev)) {
2480 DP_NOTICE(edev, "Link is down\n");
2481 netif_tx_disable(edev->ndev);
2482 netif_carrier_off(edev->ndev);
2483 qede_rdma_dev_event_close(edev);
2484 }
2485 }
2486}
2487
2488static void qede_schedule_recovery_handler(void *dev)
2489{
2490 struct qede_dev *edev = dev;
2491
2492 if (edev->state == QEDE_STATE_RECOVERY) {
2493 DP_NOTICE(edev,
2494 "Avoid scheduling a recovery handling since already in recovery state\n");
2495 return;
2496 }
2497
2498 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags);
2499 schedule_delayed_work(&edev->sp_task, 0);
2500
2501 DP_INFO(edev, "Scheduled a recovery handler\n");
2502}
2503
2504static void qede_recovery_failed(struct qede_dev *edev)
2505{
2506 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n");
2507
2508 netif_device_detach(edev->ndev);
2509
2510 if (edev->cdev)
2511 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot);
2512}
2513
2514static void qede_recovery_handler(struct qede_dev *edev)
2515{
2516 u32 curr_state = edev->state;
2517 int rc;
2518
2519 DP_NOTICE(edev, "Starting a recovery process\n");
2520
2521 /* No need to acquire first the qede_lock since is done by qede_sp_task
2522 * before calling this function.
2523 */
2524 edev->state = QEDE_STATE_RECOVERY;
2525
2526 edev->ops->common->recovery_prolog(edev->cdev);
2527
2528 if (curr_state == QEDE_STATE_OPEN)
2529 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true);
2530
2531 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY);
2532
2533 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level,
2534 IS_VF(edev), QEDE_PROBE_RECOVERY);
2535 if (rc) {
2536 edev->cdev = NULL;
2537 goto err;
2538 }
2539
2540 if (curr_state == QEDE_STATE_OPEN) {
2541 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true);
2542 if (rc)
2543 goto err;
2544
2545 qede_config_rx_mode(edev->ndev);
2546 udp_tunnel_nic_reset_ntf(edev->ndev);
2547 }
2548
2549 edev->state = curr_state;
2550
2551 DP_NOTICE(edev, "Recovery handling is done\n");
2552
2553 return;
2554
2555err:
2556 qede_recovery_failed(edev);
2557}
2558
2559static void qede_atomic_hw_err_handler(struct qede_dev *edev)
2560{
2561 struct qed_dev *cdev = edev->cdev;
2562
2563 DP_NOTICE(edev,
2564 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n",
2565 edev->err_flags);
2566
2567 /* Get a call trace of the flow that led to the error */
2568 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags));
2569
2570 /* Prevent HW attentions from being reasserted */
2571 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags))
2572 edev->ops->common->attn_clr_enable(cdev, true);
2573
2574 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n");
2575}
2576
2577static void qede_generic_hw_err_handler(struct qede_dev *edev)
2578{
2579 struct qed_dev *cdev = edev->cdev;
2580
2581 DP_NOTICE(edev,
2582 "Generic sleepable HW error handling started - err_flags 0x%lx\n",
2583 edev->err_flags);
2584
2585 /* Trigger a recovery process.
2586 * This is placed in the sleep requiring section just to make
2587 * sure it is the last one, and that all the other operations
2588 * were completed.
2589 */
2590 if (test_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags))
2591 edev->ops->common->recovery_process(cdev);
2592
2593 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2594
2595 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n");
2596}
2597
2598static void qede_set_hw_err_flags(struct qede_dev *edev,
2599 enum qed_hw_err_type err_type)
2600{
2601 unsigned long err_flags = 0;
2602
2603 switch (err_type) {
2604 case QED_HW_ERR_DMAE_FAIL:
2605 set_bit(QEDE_ERR_WARN, &err_flags);
2606 fallthrough;
2607 case QED_HW_ERR_MFW_RESP_FAIL:
2608 case QED_HW_ERR_HW_ATTN:
2609 case QED_HW_ERR_RAMROD_FAIL:
2610 case QED_HW_ERR_FW_ASSERT:
2611 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags);
2612 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags);
2613 break;
2614
2615 default:
2616 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type);
2617 break;
2618 }
2619
2620 edev->err_flags |= err_flags;
2621}
2622
2623static void qede_schedule_hw_err_handler(void *dev,
2624 enum qed_hw_err_type err_type)
2625{
2626 struct qede_dev *edev = dev;
2627
2628 /* Fan failure cannot be masked by handling of another HW error or by a
2629 * concurrent recovery process.
2630 */
2631 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
2632 edev->state == QEDE_STATE_RECOVERY) &&
2633 err_type != QED_HW_ERR_FAN_FAIL) {
2634 DP_INFO(edev,
2635 "Avoid scheduling an error handling while another HW error is being handled\n");
2636 return;
2637 }
2638
2639 if (err_type >= QED_HW_ERR_LAST) {
2640 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type);
2641 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2642 return;
2643 }
2644
2645 qede_set_hw_err_flags(edev, err_type);
2646 qede_atomic_hw_err_handler(edev);
2647 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
2648 schedule_delayed_work(&edev->sp_task, 0);
2649
2650 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type);
2651}
2652
2653static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq)
2654{
2655 struct netdev_queue *netdev_txq;
2656
2657 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
2658 if (netif_xmit_stopped(netdev_txq))
2659 return true;
2660
2661 return false;
2662}
2663
2664static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data)
2665{
2666 struct qede_dev *edev = dev;
2667 struct netdev_hw_addr *ha;
2668 int i;
2669
2670 if (edev->ndev->features & NETIF_F_IP_CSUM)
2671 data->feat_flags |= QED_TLV_IP_CSUM;
2672 if (edev->ndev->features & NETIF_F_TSO)
2673 data->feat_flags |= QED_TLV_LSO;
2674
2675 ether_addr_copy(data->mac[0], edev->ndev->dev_addr);
2676 eth_zero_addr(data->mac[1]);
2677 eth_zero_addr(data->mac[2]);
2678 /* Copy the first two UC macs */
2679 netif_addr_lock_bh(edev->ndev);
2680 i = 1;
2681 netdev_for_each_uc_addr(ha, edev->ndev) {
2682 ether_addr_copy(data->mac[i++], ha->addr);
2683 if (i == QED_TLV_MAC_COUNT)
2684 break;
2685 }
2686
2687 netif_addr_unlock_bh(edev->ndev);
2688}
2689
2690static void qede_get_eth_tlv_data(void *dev, void *data)
2691{
2692 struct qed_mfw_tlv_eth *etlv = data;
2693 struct qede_dev *edev = dev;
2694 struct qede_fastpath *fp;
2695 int i;
2696
2697 etlv->lso_maxoff_size = 0XFFFF;
2698 etlv->lso_maxoff_size_set = true;
2699 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN;
2700 etlv->lso_minseg_size_set = true;
2701 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC);
2702 etlv->prom_mode_set = true;
2703 etlv->tx_descr_size = QEDE_TSS_COUNT(edev);
2704 etlv->tx_descr_size_set = true;
2705 etlv->rx_descr_size = QEDE_RSS_COUNT(edev);
2706 etlv->rx_descr_size_set = true;
2707 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB;
2708 etlv->iov_offload_set = true;
2709
2710 /* Fill information regarding queues; Should be done under the qede
2711 * lock to guarantee those don't change beneath our feet.
2712 */
2713 etlv->txqs_empty = true;
2714 etlv->rxqs_empty = true;
2715 etlv->num_txqs_full = 0;
2716 etlv->num_rxqs_full = 0;
2717
2718 __qede_lock(edev);
2719 for_each_queue(i) {
2720 fp = &edev->fp_array[i];
2721 if (fp->type & QEDE_FASTPATH_TX) {
2722 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp);
2723
2724 if (txq->sw_tx_cons != txq->sw_tx_prod)
2725 etlv->txqs_empty = false;
2726 if (qede_is_txq_full(edev, txq))
2727 etlv->num_txqs_full++;
2728 }
2729 if (fp->type & QEDE_FASTPATH_RX) {
2730 if (qede_has_rx_work(fp->rxq))
2731 etlv->rxqs_empty = false;
2732
2733 /* This one is a bit tricky; Firmware might stop
2734 * placing packets if ring is not yet full.
2735 * Give an approximation.
2736 */
2737 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) -
2738 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) >
2739 RX_RING_SIZE - 100)
2740 etlv->num_rxqs_full++;
2741 }
2742 }
2743 __qede_unlock(edev);
2744
2745 etlv->txqs_empty_set = true;
2746 etlv->rxqs_empty_set = true;
2747 etlv->num_txqs_full_set = true;
2748 etlv->num_rxqs_full_set = true;
2749}
2750
2751/**
2752 * qede_io_error_detected - called when PCI error is detected
2753 * @pdev: Pointer to PCI device
2754 * @state: The current pci connection state
2755 *
2756 * This function is called after a PCI bus error affecting
2757 * this device has been detected.
2758 */
2759static pci_ers_result_t
2760qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2761{
2762 struct net_device *dev = pci_get_drvdata(pdev);
2763 struct qede_dev *edev = netdev_priv(dev);
2764
2765 if (!edev)
2766 return PCI_ERS_RESULT_NONE;
2767
2768 DP_NOTICE(edev, "IO error detected [%d]\n", state);
2769
2770 __qede_lock(edev);
2771 if (edev->state == QEDE_STATE_RECOVERY) {
2772 DP_NOTICE(edev, "Device already in the recovery state\n");
2773 __qede_unlock(edev);
2774 return PCI_ERS_RESULT_NONE;
2775 }
2776
2777 /* PF handles the recovery of its VFs */
2778 if (IS_VF(edev)) {
2779 DP_VERBOSE(edev, QED_MSG_IOV,
2780 "VF recovery is handled by its PF\n");
2781 __qede_unlock(edev);
2782 return PCI_ERS_RESULT_RECOVERED;
2783 }
2784
2785 /* Close OS Tx */
2786 netif_tx_disable(edev->ndev);
2787 netif_carrier_off(edev->ndev);
2788
2789 set_bit(QEDE_SP_AER, &edev->sp_flags);
2790 schedule_delayed_work(&edev->sp_task, 0);
2791
2792 __qede_unlock(edev);
2793
2794 return PCI_ERS_RESULT_CAN_RECOVER;
2795}