Loading...
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <linux/apple-gmux.h>
26#include <linux/console.h>
27#include <linux/delay.h>
28#include <linux/module.h>
29#include <linux/pci.h>
30#include <linux/pm_runtime.h>
31#include <linux/vgaarb.h>
32#include <linux/vga_switcheroo.h>
33
34#include "drmP.h"
35#include "drm_crtc_helper.h"
36
37#include <core/gpuobj.h>
38#include <core/option.h>
39#include <core/pci.h>
40#include <core/tegra.h>
41
42#include <nvif/class.h>
43#include <nvif/cl0002.h>
44#include <nvif/cla06f.h>
45#include <nvif/if0004.h>
46
47#include "nouveau_drm.h"
48#include "nouveau_dma.h"
49#include "nouveau_ttm.h"
50#include "nouveau_gem.h"
51#include "nouveau_vga.h"
52#include "nouveau_hwmon.h"
53#include "nouveau_acpi.h"
54#include "nouveau_bios.h"
55#include "nouveau_ioctl.h"
56#include "nouveau_abi16.h"
57#include "nouveau_fbcon.h"
58#include "nouveau_fence.h"
59#include "nouveau_debugfs.h"
60#include "nouveau_usif.h"
61#include "nouveau_connector.h"
62#include "nouveau_platform.h"
63
64MODULE_PARM_DESC(config, "option string to pass to driver core");
65static char *nouveau_config;
66module_param_named(config, nouveau_config, charp, 0400);
67
68MODULE_PARM_DESC(debug, "debug string to pass to driver core");
69static char *nouveau_debug;
70module_param_named(debug, nouveau_debug, charp, 0400);
71
72MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
73static int nouveau_noaccel = 0;
74module_param_named(noaccel, nouveau_noaccel, int, 0400);
75
76MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
77 "0 = disabled, 1 = enabled, 2 = headless)");
78int nouveau_modeset = -1;
79module_param_named(modeset, nouveau_modeset, int, 0400);
80
81MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
82int nouveau_runtime_pm = -1;
83module_param_named(runpm, nouveau_runtime_pm, int, 0400);
84
85static struct drm_driver driver_stub;
86static struct drm_driver driver_pci;
87static struct drm_driver driver_platform;
88
89static u64
90nouveau_pci_name(struct pci_dev *pdev)
91{
92 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
93 name |= pdev->bus->number << 16;
94 name |= PCI_SLOT(pdev->devfn) << 8;
95 return name | PCI_FUNC(pdev->devfn);
96}
97
98static u64
99nouveau_platform_name(struct platform_device *platformdev)
100{
101 return platformdev->id;
102}
103
104static u64
105nouveau_name(struct drm_device *dev)
106{
107 if (dev->pdev)
108 return nouveau_pci_name(dev->pdev);
109 else
110 return nouveau_platform_name(dev->platformdev);
111}
112
113static int
114nouveau_cli_create(struct drm_device *dev, const char *sname,
115 int size, void **pcli)
116{
117 struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
118 int ret;
119 if (cli) {
120 snprintf(cli->name, sizeof(cli->name), "%s", sname);
121 cli->dev = dev;
122
123 ret = nvif_client_init(NULL, cli->name, nouveau_name(dev),
124 nouveau_config, nouveau_debug,
125 &cli->base);
126 if (ret == 0) {
127 mutex_init(&cli->mutex);
128 usif_client_init(cli);
129 }
130 return ret;
131 }
132 return -ENOMEM;
133}
134
135static void
136nouveau_cli_destroy(struct nouveau_cli *cli)
137{
138 nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
139 nvif_client_fini(&cli->base);
140 usif_client_fini(cli);
141 kfree(cli);
142}
143
144static void
145nouveau_accel_fini(struct nouveau_drm *drm)
146{
147 nouveau_channel_idle(drm->channel);
148 nvif_object_fini(&drm->ntfy);
149 nvkm_gpuobj_del(&drm->notify);
150 nvif_notify_fini(&drm->flip);
151 nvif_object_fini(&drm->nvsw);
152 nouveau_channel_del(&drm->channel);
153
154 nouveau_channel_idle(drm->cechan);
155 nvif_object_fini(&drm->ttm.copy);
156 nouveau_channel_del(&drm->cechan);
157
158 if (drm->fence)
159 nouveau_fence(drm)->dtor(drm);
160}
161
162static void
163nouveau_accel_init(struct nouveau_drm *drm)
164{
165 struct nvif_device *device = &drm->device;
166 struct nvif_sclass *sclass;
167 u32 arg0, arg1;
168 int ret, i, n;
169
170 if (nouveau_noaccel)
171 return;
172
173 /* initialise synchronisation routines */
174 /*XXX: this is crap, but the fence/channel stuff is a little
175 * backwards in some places. this will be fixed.
176 */
177 ret = n = nvif_object_sclass_get(&device->object, &sclass);
178 if (ret < 0)
179 return;
180
181 for (ret = -ENOSYS, i = 0; i < n; i++) {
182 switch (sclass[i].oclass) {
183 case NV03_CHANNEL_DMA:
184 ret = nv04_fence_create(drm);
185 break;
186 case NV10_CHANNEL_DMA:
187 ret = nv10_fence_create(drm);
188 break;
189 case NV17_CHANNEL_DMA:
190 case NV40_CHANNEL_DMA:
191 ret = nv17_fence_create(drm);
192 break;
193 case NV50_CHANNEL_GPFIFO:
194 ret = nv50_fence_create(drm);
195 break;
196 case G82_CHANNEL_GPFIFO:
197 ret = nv84_fence_create(drm);
198 break;
199 case FERMI_CHANNEL_GPFIFO:
200 case KEPLER_CHANNEL_GPFIFO_A:
201 case KEPLER_CHANNEL_GPFIFO_B:
202 case MAXWELL_CHANNEL_GPFIFO_A:
203 ret = nvc0_fence_create(drm);
204 break;
205 default:
206 break;
207 }
208 }
209
210 nvif_object_sclass_put(&sclass);
211 if (ret) {
212 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
213 nouveau_accel_fini(drm);
214 return;
215 }
216
217 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
218 ret = nouveau_channel_new(drm, &drm->device,
219 NVA06F_V0_ENGINE_CE0 |
220 NVA06F_V0_ENGINE_CE1,
221 0, &drm->cechan);
222 if (ret)
223 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
224
225 arg0 = NVA06F_V0_ENGINE_GR;
226 arg1 = 1;
227 } else
228 if (device->info.chipset >= 0xa3 &&
229 device->info.chipset != 0xaa &&
230 device->info.chipset != 0xac) {
231 ret = nouveau_channel_new(drm, &drm->device,
232 NvDmaFB, NvDmaTT, &drm->cechan);
233 if (ret)
234 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
235
236 arg0 = NvDmaFB;
237 arg1 = NvDmaTT;
238 } else {
239 arg0 = NvDmaFB;
240 arg1 = NvDmaTT;
241 }
242
243 ret = nouveau_channel_new(drm, &drm->device, arg0, arg1, &drm->channel);
244 if (ret) {
245 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
246 nouveau_accel_fini(drm);
247 return;
248 }
249
250 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
251 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
252 if (ret == 0) {
253 ret = RING_SPACE(drm->channel, 2);
254 if (ret == 0) {
255 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
256 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
257 OUT_RING (drm->channel, NVDRM_NVSW);
258 } else
259 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
260 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
261 OUT_RING (drm->channel, 0x001f0000);
262 }
263 }
264
265 ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
266 false, NV04_NVSW_NTFY_UEVENT,
267 NULL, 0, 0, &drm->flip);
268 if (ret == 0)
269 ret = nvif_notify_get(&drm->flip);
270 if (ret) {
271 nouveau_accel_fini(drm);
272 return;
273 }
274 }
275
276 if (ret) {
277 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
278 nouveau_accel_fini(drm);
279 return;
280 }
281
282 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
283 ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false,
284 NULL, &drm->notify);
285 if (ret) {
286 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
287 nouveau_accel_fini(drm);
288 return;
289 }
290
291 ret = nvif_object_init(&drm->channel->user, NvNotify0,
292 NV_DMA_IN_MEMORY,
293 &(struct nv_dma_v0) {
294 .target = NV_DMA_V0_TARGET_VRAM,
295 .access = NV_DMA_V0_ACCESS_RDWR,
296 .start = drm->notify->addr,
297 .limit = drm->notify->addr + 31
298 }, sizeof(struct nv_dma_v0),
299 &drm->ntfy);
300 if (ret) {
301 nouveau_accel_fini(drm);
302 return;
303 }
304 }
305
306
307 nouveau_bo_move_init(drm);
308}
309
310static int nouveau_drm_probe(struct pci_dev *pdev,
311 const struct pci_device_id *pent)
312{
313 struct nvkm_device *device;
314 struct apertures_struct *aper;
315 bool boot = false;
316 int ret;
317
318 /*
319 * apple-gmux is needed on dual GPU MacBook Pro
320 * to probe the panel if we're the inactive GPU.
321 */
322 if (IS_ENABLED(CONFIG_VGA_ARB) && IS_ENABLED(CONFIG_VGA_SWITCHEROO) &&
323 apple_gmux_present() && pdev != vga_default_device() &&
324 !vga_switcheroo_handler_flags())
325 return -EPROBE_DEFER;
326
327 /* remove conflicting drivers (vesafb, efifb etc) */
328 aper = alloc_apertures(3);
329 if (!aper)
330 return -ENOMEM;
331
332 aper->ranges[0].base = pci_resource_start(pdev, 1);
333 aper->ranges[0].size = pci_resource_len(pdev, 1);
334 aper->count = 1;
335
336 if (pci_resource_len(pdev, 2)) {
337 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
338 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
339 aper->count++;
340 }
341
342 if (pci_resource_len(pdev, 3)) {
343 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
344 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
345 aper->count++;
346 }
347
348#ifdef CONFIG_X86
349 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
350#endif
351 if (nouveau_modeset != 2)
352 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
353 kfree(aper);
354
355 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
356 true, true, ~0ULL, &device);
357 if (ret)
358 return ret;
359
360 pci_set_master(pdev);
361
362 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
363 if (ret) {
364 nvkm_device_del(&device);
365 return ret;
366 }
367
368 return 0;
369}
370
371#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
372
373static void
374nouveau_get_hdmi_dev(struct nouveau_drm *drm)
375{
376 struct pci_dev *pdev = drm->dev->pdev;
377
378 if (!pdev) {
379 NV_DEBUG(drm, "not a PCI device; no HDMI\n");
380 drm->hdmi_device = NULL;
381 return;
382 }
383
384 /* subfunction one is a hdmi audio device? */
385 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
386 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
387
388 if (!drm->hdmi_device) {
389 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
390 return;
391 }
392
393 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
394 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
395 pci_dev_put(drm->hdmi_device);
396 drm->hdmi_device = NULL;
397 return;
398 }
399}
400
401static int
402nouveau_drm_load(struct drm_device *dev, unsigned long flags)
403{
404 struct nouveau_drm *drm;
405 int ret;
406
407 ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm);
408 if (ret)
409 return ret;
410
411 dev->dev_private = drm;
412 drm->dev = dev;
413 nvxx_client(&drm->client.base)->debug =
414 nvkm_dbgopt(nouveau_debug, "DRM");
415
416 INIT_LIST_HEAD(&drm->clients);
417 spin_lock_init(&drm->tile.lock);
418
419 nouveau_get_hdmi_dev(drm);
420
421 ret = nvif_device_init(&drm->client.base.object, 0, NV_DEVICE,
422 &(struct nv_device_v0) {
423 .device = ~0,
424 }, sizeof(struct nv_device_v0),
425 &drm->device);
426 if (ret)
427 goto fail_device;
428
429 dev->irq_enabled = true;
430
431 /* workaround an odd issue on nvc1 by disabling the device's
432 * nosnoop capability. hopefully won't cause issues until a
433 * better fix is found - assuming there is one...
434 */
435 if (drm->device.info.chipset == 0xc1)
436 nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000);
437
438 nouveau_vga_init(drm);
439
440 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
441 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
442 0x1000, NULL, &drm->client.vm);
443 if (ret)
444 goto fail_device;
445
446 nvxx_client(&drm->client.base)->vm = drm->client.vm;
447 }
448
449 ret = nouveau_ttm_init(drm);
450 if (ret)
451 goto fail_ttm;
452
453 ret = nouveau_bios_init(dev);
454 if (ret)
455 goto fail_bios;
456
457 ret = nouveau_display_create(dev);
458 if (ret)
459 goto fail_dispctor;
460
461 if (dev->mode_config.num_crtc) {
462 ret = nouveau_display_init(dev);
463 if (ret)
464 goto fail_dispinit;
465 }
466
467 nouveau_debugfs_init(drm);
468 nouveau_hwmon_init(dev);
469 nouveau_accel_init(drm);
470 nouveau_fbcon_init(dev);
471
472 if (nouveau_runtime_pm != 0) {
473 pm_runtime_use_autosuspend(dev->dev);
474 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
475 pm_runtime_set_active(dev->dev);
476 pm_runtime_allow(dev->dev);
477 pm_runtime_mark_last_busy(dev->dev);
478 pm_runtime_put(dev->dev);
479 }
480 return 0;
481
482fail_dispinit:
483 nouveau_display_destroy(dev);
484fail_dispctor:
485 nouveau_bios_takedown(dev);
486fail_bios:
487 nouveau_ttm_fini(drm);
488fail_ttm:
489 nouveau_vga_fini(drm);
490fail_device:
491 nvif_device_fini(&drm->device);
492 nouveau_cli_destroy(&drm->client);
493 return ret;
494}
495
496static int
497nouveau_drm_unload(struct drm_device *dev)
498{
499 struct nouveau_drm *drm = nouveau_drm(dev);
500
501 pm_runtime_get_sync(dev->dev);
502 nouveau_fbcon_fini(dev);
503 nouveau_accel_fini(drm);
504 nouveau_hwmon_fini(dev);
505 nouveau_debugfs_fini(drm);
506
507 if (dev->mode_config.num_crtc)
508 nouveau_display_fini(dev);
509 nouveau_display_destroy(dev);
510
511 nouveau_bios_takedown(dev);
512
513 nouveau_ttm_fini(drm);
514 nouveau_vga_fini(drm);
515
516 nvif_device_fini(&drm->device);
517 if (drm->hdmi_device)
518 pci_dev_put(drm->hdmi_device);
519 nouveau_cli_destroy(&drm->client);
520 return 0;
521}
522
523void
524nouveau_drm_device_remove(struct drm_device *dev)
525{
526 struct nouveau_drm *drm = nouveau_drm(dev);
527 struct nvkm_client *client;
528 struct nvkm_device *device;
529
530 dev->irq_enabled = false;
531 client = nvxx_client(&drm->client.base);
532 device = nvkm_device_find(client->device);
533 drm_put_dev(dev);
534
535 nvkm_device_del(&device);
536}
537
538static void
539nouveau_drm_remove(struct pci_dev *pdev)
540{
541 struct drm_device *dev = pci_get_drvdata(pdev);
542
543 nouveau_drm_device_remove(dev);
544}
545
546static int
547nouveau_do_suspend(struct drm_device *dev, bool runtime)
548{
549 struct nouveau_drm *drm = nouveau_drm(dev);
550 struct nouveau_cli *cli;
551 int ret;
552
553 if (dev->mode_config.num_crtc) {
554 NV_INFO(drm, "suspending console...\n");
555 nouveau_fbcon_set_suspend(dev, 1);
556 NV_INFO(drm, "suspending display...\n");
557 ret = nouveau_display_suspend(dev, runtime);
558 if (ret)
559 return ret;
560 }
561
562 NV_INFO(drm, "evicting buffers...\n");
563 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
564
565 NV_INFO(drm, "waiting for kernel channels to go idle...\n");
566 if (drm->cechan) {
567 ret = nouveau_channel_idle(drm->cechan);
568 if (ret)
569 goto fail_display;
570 }
571
572 if (drm->channel) {
573 ret = nouveau_channel_idle(drm->channel);
574 if (ret)
575 goto fail_display;
576 }
577
578 NV_INFO(drm, "suspending client object trees...\n");
579 if (drm->fence && nouveau_fence(drm)->suspend) {
580 if (!nouveau_fence(drm)->suspend(drm)) {
581 ret = -ENOMEM;
582 goto fail_display;
583 }
584 }
585
586 list_for_each_entry(cli, &drm->clients, head) {
587 ret = nvif_client_suspend(&cli->base);
588 if (ret)
589 goto fail_client;
590 }
591
592 NV_INFO(drm, "suspending kernel object tree...\n");
593 ret = nvif_client_suspend(&drm->client.base);
594 if (ret)
595 goto fail_client;
596
597 return 0;
598
599fail_client:
600 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
601 nvif_client_resume(&cli->base);
602 }
603
604 if (drm->fence && nouveau_fence(drm)->resume)
605 nouveau_fence(drm)->resume(drm);
606
607fail_display:
608 if (dev->mode_config.num_crtc) {
609 NV_INFO(drm, "resuming display...\n");
610 nouveau_display_resume(dev, runtime);
611 }
612 return ret;
613}
614
615static int
616nouveau_do_resume(struct drm_device *dev, bool runtime)
617{
618 struct nouveau_drm *drm = nouveau_drm(dev);
619 struct nouveau_cli *cli;
620
621 NV_INFO(drm, "resuming kernel object tree...\n");
622 nvif_client_resume(&drm->client.base);
623
624 NV_INFO(drm, "resuming client object trees...\n");
625 if (drm->fence && nouveau_fence(drm)->resume)
626 nouveau_fence(drm)->resume(drm);
627
628 list_for_each_entry(cli, &drm->clients, head) {
629 nvif_client_resume(&cli->base);
630 }
631
632 nouveau_run_vbios_init(dev);
633
634 if (dev->mode_config.num_crtc) {
635 NV_INFO(drm, "resuming display...\n");
636 nouveau_display_resume(dev, runtime);
637 NV_INFO(drm, "resuming console...\n");
638 nouveau_fbcon_set_suspend(dev, 0);
639 }
640
641 return 0;
642}
643
644int
645nouveau_pmops_suspend(struct device *dev)
646{
647 struct pci_dev *pdev = to_pci_dev(dev);
648 struct drm_device *drm_dev = pci_get_drvdata(pdev);
649 int ret;
650
651 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
652 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
653 return 0;
654
655 ret = nouveau_do_suspend(drm_dev, false);
656 if (ret)
657 return ret;
658
659 pci_save_state(pdev);
660 pci_disable_device(pdev);
661 pci_set_power_state(pdev, PCI_D3hot);
662 udelay(200);
663 return 0;
664}
665
666int
667nouveau_pmops_resume(struct device *dev)
668{
669 struct pci_dev *pdev = to_pci_dev(dev);
670 struct drm_device *drm_dev = pci_get_drvdata(pdev);
671 int ret;
672
673 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
674 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
675 return 0;
676
677 pci_set_power_state(pdev, PCI_D0);
678 pci_restore_state(pdev);
679 ret = pci_enable_device(pdev);
680 if (ret)
681 return ret;
682 pci_set_master(pdev);
683
684 return nouveau_do_resume(drm_dev, false);
685}
686
687static int
688nouveau_pmops_freeze(struct device *dev)
689{
690 struct pci_dev *pdev = to_pci_dev(dev);
691 struct drm_device *drm_dev = pci_get_drvdata(pdev);
692 return nouveau_do_suspend(drm_dev, false);
693}
694
695static int
696nouveau_pmops_thaw(struct device *dev)
697{
698 struct pci_dev *pdev = to_pci_dev(dev);
699 struct drm_device *drm_dev = pci_get_drvdata(pdev);
700 return nouveau_do_resume(drm_dev, false);
701}
702
703static int
704nouveau_pmops_runtime_suspend(struct device *dev)
705{
706 struct pci_dev *pdev = to_pci_dev(dev);
707 struct drm_device *drm_dev = pci_get_drvdata(pdev);
708 int ret;
709
710 if (nouveau_runtime_pm == 0) {
711 pm_runtime_forbid(dev);
712 return -EBUSY;
713 }
714
715 /* are we optimus enabled? */
716 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
717 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
718 pm_runtime_forbid(dev);
719 return -EBUSY;
720 }
721
722 drm_kms_helper_poll_disable(drm_dev);
723 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
724 nouveau_switcheroo_optimus_dsm();
725 ret = nouveau_do_suspend(drm_dev, true);
726 pci_save_state(pdev);
727 pci_disable_device(pdev);
728 pci_ignore_hotplug(pdev);
729 pci_set_power_state(pdev, PCI_D3cold);
730 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
731 return ret;
732}
733
734static int
735nouveau_pmops_runtime_resume(struct device *dev)
736{
737 struct pci_dev *pdev = to_pci_dev(dev);
738 struct drm_device *drm_dev = pci_get_drvdata(pdev);
739 struct nvif_device *device = &nouveau_drm(drm_dev)->device;
740 int ret;
741
742 if (nouveau_runtime_pm == 0)
743 return -EINVAL;
744
745 pci_set_power_state(pdev, PCI_D0);
746 pci_restore_state(pdev);
747 ret = pci_enable_device(pdev);
748 if (ret)
749 return ret;
750 pci_set_master(pdev);
751
752 ret = nouveau_do_resume(drm_dev, true);
753 drm_kms_helper_poll_enable(drm_dev);
754 /* do magic */
755 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
756 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
757 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
758 return ret;
759}
760
761static int
762nouveau_pmops_runtime_idle(struct device *dev)
763{
764 struct pci_dev *pdev = to_pci_dev(dev);
765 struct drm_device *drm_dev = pci_get_drvdata(pdev);
766 struct nouveau_drm *drm = nouveau_drm(drm_dev);
767 struct drm_crtc *crtc;
768
769 if (nouveau_runtime_pm == 0) {
770 pm_runtime_forbid(dev);
771 return -EBUSY;
772 }
773
774 /* are we optimus enabled? */
775 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
776 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
777 pm_runtime_forbid(dev);
778 return -EBUSY;
779 }
780
781 /* if we have a hdmi audio device - make sure it has a driver loaded */
782 if (drm->hdmi_device) {
783 if (!drm->hdmi_device->driver) {
784 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
785 pm_runtime_mark_last_busy(dev);
786 return -EBUSY;
787 }
788 }
789
790 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
791 if (crtc->enabled) {
792 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
793 return -EBUSY;
794 }
795 }
796 pm_runtime_mark_last_busy(dev);
797 pm_runtime_autosuspend(dev);
798 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
799 return 1;
800}
801
802static int
803nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
804{
805 struct nouveau_drm *drm = nouveau_drm(dev);
806 struct nouveau_cli *cli;
807 char name[32], tmpname[TASK_COMM_LEN];
808 int ret;
809
810 /* need to bring up power immediately if opening device */
811 ret = pm_runtime_get_sync(dev->dev);
812 if (ret < 0 && ret != -EACCES)
813 return ret;
814
815 get_task_comm(tmpname, current);
816 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
817
818 ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli);
819
820 if (ret)
821 goto out_suspend;
822
823 cli->base.super = false;
824
825 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
826 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
827 0x1000, NULL, &cli->vm);
828 if (ret) {
829 nouveau_cli_destroy(cli);
830 goto out_suspend;
831 }
832
833 nvxx_client(&cli->base)->vm = cli->vm;
834 }
835
836 fpriv->driver_priv = cli;
837
838 mutex_lock(&drm->client.mutex);
839 list_add(&cli->head, &drm->clients);
840 mutex_unlock(&drm->client.mutex);
841
842out_suspend:
843 pm_runtime_mark_last_busy(dev->dev);
844 pm_runtime_put_autosuspend(dev->dev);
845
846 return ret;
847}
848
849static void
850nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
851{
852 struct nouveau_cli *cli = nouveau_cli(fpriv);
853 struct nouveau_drm *drm = nouveau_drm(dev);
854
855 pm_runtime_get_sync(dev->dev);
856
857 mutex_lock(&cli->mutex);
858 if (cli->abi16)
859 nouveau_abi16_fini(cli->abi16);
860 mutex_unlock(&cli->mutex);
861
862 mutex_lock(&drm->client.mutex);
863 list_del(&cli->head);
864 mutex_unlock(&drm->client.mutex);
865
866}
867
868static void
869nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
870{
871 struct nouveau_cli *cli = nouveau_cli(fpriv);
872 nouveau_cli_destroy(cli);
873 pm_runtime_mark_last_busy(dev->dev);
874 pm_runtime_put_autosuspend(dev->dev);
875}
876
877static const struct drm_ioctl_desc
878nouveau_ioctls[] = {
879 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
880 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
881 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
882 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
883 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
884 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
885 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
886 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
887 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
888 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
889 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
890 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
891};
892
893long
894nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
895{
896 struct drm_file *filp = file->private_data;
897 struct drm_device *dev = filp->minor->dev;
898 long ret;
899
900 ret = pm_runtime_get_sync(dev->dev);
901 if (ret < 0 && ret != -EACCES)
902 return ret;
903
904 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
905 case DRM_NOUVEAU_NVIF:
906 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
907 break;
908 default:
909 ret = drm_ioctl(file, cmd, arg);
910 break;
911 }
912
913 pm_runtime_mark_last_busy(dev->dev);
914 pm_runtime_put_autosuspend(dev->dev);
915 return ret;
916}
917
918static const struct file_operations
919nouveau_driver_fops = {
920 .owner = THIS_MODULE,
921 .open = drm_open,
922 .release = drm_release,
923 .unlocked_ioctl = nouveau_drm_ioctl,
924 .mmap = nouveau_ttm_mmap,
925 .poll = drm_poll,
926 .read = drm_read,
927#if defined(CONFIG_COMPAT)
928 .compat_ioctl = nouveau_compat_ioctl,
929#endif
930 .llseek = noop_llseek,
931};
932
933static struct drm_driver
934driver_stub = {
935 .driver_features =
936 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
937 DRIVER_KMS_LEGACY_CONTEXT,
938
939 .load = nouveau_drm_load,
940 .unload = nouveau_drm_unload,
941 .open = nouveau_drm_open,
942 .preclose = nouveau_drm_preclose,
943 .postclose = nouveau_drm_postclose,
944 .lastclose = nouveau_vga_lastclose,
945
946#if defined(CONFIG_DEBUG_FS)
947 .debugfs_init = nouveau_drm_debugfs_init,
948 .debugfs_cleanup = nouveau_drm_debugfs_cleanup,
949#endif
950
951 .get_vblank_counter = drm_vblank_no_hw_counter,
952 .enable_vblank = nouveau_display_vblank_enable,
953 .disable_vblank = nouveau_display_vblank_disable,
954 .get_scanout_position = nouveau_display_scanoutpos,
955 .get_vblank_timestamp = nouveau_display_vblstamp,
956
957 .ioctls = nouveau_ioctls,
958 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
959 .fops = &nouveau_driver_fops,
960
961 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
962 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
963 .gem_prime_export = drm_gem_prime_export,
964 .gem_prime_import = drm_gem_prime_import,
965 .gem_prime_pin = nouveau_gem_prime_pin,
966 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
967 .gem_prime_unpin = nouveau_gem_prime_unpin,
968 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
969 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
970 .gem_prime_vmap = nouveau_gem_prime_vmap,
971 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
972
973 .gem_free_object = nouveau_gem_object_del,
974 .gem_open_object = nouveau_gem_object_open,
975 .gem_close_object = nouveau_gem_object_close,
976
977 .dumb_create = nouveau_display_dumb_create,
978 .dumb_map_offset = nouveau_display_dumb_map_offset,
979 .dumb_destroy = drm_gem_dumb_destroy,
980
981 .name = DRIVER_NAME,
982 .desc = DRIVER_DESC,
983#ifdef GIT_REVISION
984 .date = GIT_REVISION,
985#else
986 .date = DRIVER_DATE,
987#endif
988 .major = DRIVER_MAJOR,
989 .minor = DRIVER_MINOR,
990 .patchlevel = DRIVER_PATCHLEVEL,
991};
992
993static struct pci_device_id
994nouveau_drm_pci_table[] = {
995 {
996 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
997 .class = PCI_BASE_CLASS_DISPLAY << 16,
998 .class_mask = 0xff << 16,
999 },
1000 {
1001 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1002 .class = PCI_BASE_CLASS_DISPLAY << 16,
1003 .class_mask = 0xff << 16,
1004 },
1005 {}
1006};
1007
1008static void nouveau_display_options(void)
1009{
1010 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1011
1012 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1013 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1014 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1015 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1016 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1017 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1018 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1019 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1020 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1021 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1022}
1023
1024static const struct dev_pm_ops nouveau_pm_ops = {
1025 .suspend = nouveau_pmops_suspend,
1026 .resume = nouveau_pmops_resume,
1027 .freeze = nouveau_pmops_freeze,
1028 .thaw = nouveau_pmops_thaw,
1029 .poweroff = nouveau_pmops_freeze,
1030 .restore = nouveau_pmops_resume,
1031 .runtime_suspend = nouveau_pmops_runtime_suspend,
1032 .runtime_resume = nouveau_pmops_runtime_resume,
1033 .runtime_idle = nouveau_pmops_runtime_idle,
1034};
1035
1036static struct pci_driver
1037nouveau_drm_pci_driver = {
1038 .name = "nouveau",
1039 .id_table = nouveau_drm_pci_table,
1040 .probe = nouveau_drm_probe,
1041 .remove = nouveau_drm_remove,
1042 .driver.pm = &nouveau_pm_ops,
1043};
1044
1045struct drm_device *
1046nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1047 struct platform_device *pdev,
1048 struct nvkm_device **pdevice)
1049{
1050 struct drm_device *drm;
1051 int err;
1052
1053 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1054 true, true, ~0ULL, pdevice);
1055 if (err)
1056 goto err_free;
1057
1058 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1059 if (!drm) {
1060 err = -ENOMEM;
1061 goto err_free;
1062 }
1063
1064 drm->platformdev = pdev;
1065 platform_set_drvdata(pdev, drm);
1066
1067 return drm;
1068
1069err_free:
1070 nvkm_device_del(pdevice);
1071
1072 return ERR_PTR(err);
1073}
1074
1075static int __init
1076nouveau_drm_init(void)
1077{
1078 driver_pci = driver_stub;
1079 driver_pci.set_busid = drm_pci_set_busid;
1080 driver_platform = driver_stub;
1081 driver_platform.set_busid = drm_platform_set_busid;
1082
1083 nouveau_display_options();
1084
1085 if (nouveau_modeset == -1) {
1086#ifdef CONFIG_VGA_CONSOLE
1087 if (vgacon_text_force())
1088 nouveau_modeset = 0;
1089#endif
1090 }
1091
1092 if (!nouveau_modeset)
1093 return 0;
1094
1095#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1096 platform_driver_register(&nouveau_platform_driver);
1097#endif
1098
1099 nouveau_register_dsm_handler();
1100 return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
1101}
1102
1103static void __exit
1104nouveau_drm_exit(void)
1105{
1106 if (!nouveau_modeset)
1107 return;
1108
1109 drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
1110 nouveau_unregister_dsm_handler();
1111
1112#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1113 platform_driver_unregister(&nouveau_platform_driver);
1114#endif
1115}
1116
1117module_init(nouveau_drm_init);
1118module_exit(nouveau_drm_exit);
1119
1120MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1121MODULE_AUTHOR(DRIVER_AUTHOR);
1122MODULE_DESCRIPTION(DRIVER_DESC);
1123MODULE_LICENSE("GPL and additional rights");
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <linux/console.h>
26#include <linux/delay.h>
27#include <linux/module.h>
28#include <linux/pci.h>
29#include <linux/pm_runtime.h>
30#include <linux/vga_switcheroo.h>
31#include <linux/mmu_notifier.h>
32
33#include <drm/drm_crtc_helper.h>
34#include <drm/drm_ioctl.h>
35#include <drm/drm_vblank.h>
36
37#include <core/gpuobj.h>
38#include <core/option.h>
39#include <core/pci.h>
40#include <core/tegra.h>
41
42#include <nvif/driver.h>
43#include <nvif/fifo.h>
44#include <nvif/push006c.h>
45#include <nvif/user.h>
46
47#include <nvif/class.h>
48#include <nvif/cl0002.h>
49#include <nvif/cla06f.h>
50
51#include "nouveau_drv.h"
52#include "nouveau_dma.h"
53#include "nouveau_ttm.h"
54#include "nouveau_gem.h"
55#include "nouveau_vga.h"
56#include "nouveau_led.h"
57#include "nouveau_hwmon.h"
58#include "nouveau_acpi.h"
59#include "nouveau_bios.h"
60#include "nouveau_ioctl.h"
61#include "nouveau_abi16.h"
62#include "nouveau_fbcon.h"
63#include "nouveau_fence.h"
64#include "nouveau_debugfs.h"
65#include "nouveau_usif.h"
66#include "nouveau_connector.h"
67#include "nouveau_platform.h"
68#include "nouveau_svm.h"
69#include "nouveau_dmem.h"
70
71MODULE_PARM_DESC(config, "option string to pass to driver core");
72static char *nouveau_config;
73module_param_named(config, nouveau_config, charp, 0400);
74
75MODULE_PARM_DESC(debug, "debug string to pass to driver core");
76static char *nouveau_debug;
77module_param_named(debug, nouveau_debug, charp, 0400);
78
79MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
80static int nouveau_noaccel = 0;
81module_param_named(noaccel, nouveau_noaccel, int, 0400);
82
83MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
84 "0 = disabled, 1 = enabled, 2 = headless)");
85int nouveau_modeset = -1;
86module_param_named(modeset, nouveau_modeset, int, 0400);
87
88MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
89static int nouveau_atomic = 0;
90module_param_named(atomic, nouveau_atomic, int, 0400);
91
92MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
93static int nouveau_runtime_pm = -1;
94module_param_named(runpm, nouveau_runtime_pm, int, 0400);
95
96static struct drm_driver driver_stub;
97static struct drm_driver driver_pci;
98static struct drm_driver driver_platform;
99
100static u64
101nouveau_pci_name(struct pci_dev *pdev)
102{
103 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
104 name |= pdev->bus->number << 16;
105 name |= PCI_SLOT(pdev->devfn) << 8;
106 return name | PCI_FUNC(pdev->devfn);
107}
108
109static u64
110nouveau_platform_name(struct platform_device *platformdev)
111{
112 return platformdev->id;
113}
114
115static u64
116nouveau_name(struct drm_device *dev)
117{
118 if (dev->pdev)
119 return nouveau_pci_name(dev->pdev);
120 else
121 return nouveau_platform_name(to_platform_device(dev->dev));
122}
123
124static inline bool
125nouveau_cli_work_ready(struct dma_fence *fence)
126{
127 if (!dma_fence_is_signaled(fence))
128 return false;
129 dma_fence_put(fence);
130 return true;
131}
132
133static void
134nouveau_cli_work(struct work_struct *w)
135{
136 struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
137 struct nouveau_cli_work *work, *wtmp;
138 mutex_lock(&cli->lock);
139 list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
140 if (!work->fence || nouveau_cli_work_ready(work->fence)) {
141 list_del(&work->head);
142 work->func(work);
143 }
144 }
145 mutex_unlock(&cli->lock);
146}
147
148static void
149nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
150{
151 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
152 schedule_work(&work->cli->work);
153}
154
155void
156nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
157 struct nouveau_cli_work *work)
158{
159 work->fence = dma_fence_get(fence);
160 work->cli = cli;
161 mutex_lock(&cli->lock);
162 list_add_tail(&work->head, &cli->worker);
163 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
164 nouveau_cli_work_fence(fence, &work->cb);
165 mutex_unlock(&cli->lock);
166}
167
168static void
169nouveau_cli_fini(struct nouveau_cli *cli)
170{
171 /* All our channels are dead now, which means all the fences they
172 * own are signalled, and all callback functions have been called.
173 *
174 * So, after flushing the workqueue, there should be nothing left.
175 */
176 flush_work(&cli->work);
177 WARN_ON(!list_empty(&cli->worker));
178
179 usif_client_fini(cli);
180 nouveau_vmm_fini(&cli->svm);
181 nouveau_vmm_fini(&cli->vmm);
182 nvif_mmu_dtor(&cli->mmu);
183 nvif_device_dtor(&cli->device);
184 mutex_lock(&cli->drm->master.lock);
185 nvif_client_dtor(&cli->base);
186 mutex_unlock(&cli->drm->master.lock);
187}
188
189static int
190nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
191 struct nouveau_cli *cli)
192{
193 static const struct nvif_mclass
194 mems[] = {
195 { NVIF_CLASS_MEM_GF100, -1 },
196 { NVIF_CLASS_MEM_NV50 , -1 },
197 { NVIF_CLASS_MEM_NV04 , -1 },
198 {}
199 };
200 static const struct nvif_mclass
201 mmus[] = {
202 { NVIF_CLASS_MMU_GF100, -1 },
203 { NVIF_CLASS_MMU_NV50 , -1 },
204 { NVIF_CLASS_MMU_NV04 , -1 },
205 {}
206 };
207 static const struct nvif_mclass
208 vmms[] = {
209 { NVIF_CLASS_VMM_GP100, -1 },
210 { NVIF_CLASS_VMM_GM200, -1 },
211 { NVIF_CLASS_VMM_GF100, -1 },
212 { NVIF_CLASS_VMM_NV50 , -1 },
213 { NVIF_CLASS_VMM_NV04 , -1 },
214 {}
215 };
216 u64 device = nouveau_name(drm->dev);
217 int ret;
218
219 snprintf(cli->name, sizeof(cli->name), "%s", sname);
220 cli->drm = drm;
221 mutex_init(&cli->mutex);
222 usif_client_init(cli);
223
224 INIT_WORK(&cli->work, nouveau_cli_work);
225 INIT_LIST_HEAD(&cli->worker);
226 mutex_init(&cli->lock);
227
228 if (cli == &drm->master) {
229 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
230 cli->name, device, &cli->base);
231 } else {
232 mutex_lock(&drm->master.lock);
233 ret = nvif_client_ctor(&drm->master.base, cli->name, device,
234 &cli->base);
235 mutex_unlock(&drm->master.lock);
236 }
237 if (ret) {
238 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
239 goto done;
240 }
241
242 ret = nvif_device_ctor(&cli->base.object, "drmDevice", 0, NV_DEVICE,
243 &(struct nv_device_v0) {
244 .device = ~0,
245 }, sizeof(struct nv_device_v0),
246 &cli->device);
247 if (ret) {
248 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
249 goto done;
250 }
251
252 ret = nvif_mclass(&cli->device.object, mmus);
253 if (ret < 0) {
254 NV_PRINTK(err, cli, "No supported MMU class\n");
255 goto done;
256 }
257
258 ret = nvif_mmu_ctor(&cli->device.object, "drmMmu", mmus[ret].oclass,
259 &cli->mmu);
260 if (ret) {
261 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
262 goto done;
263 }
264
265 ret = nvif_mclass(&cli->mmu.object, vmms);
266 if (ret < 0) {
267 NV_PRINTK(err, cli, "No supported VMM class\n");
268 goto done;
269 }
270
271 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
272 if (ret) {
273 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
274 goto done;
275 }
276
277 ret = nvif_mclass(&cli->mmu.object, mems);
278 if (ret < 0) {
279 NV_PRINTK(err, cli, "No supported MEM class\n");
280 goto done;
281 }
282
283 cli->mem = &mems[ret];
284 return 0;
285done:
286 if (ret)
287 nouveau_cli_fini(cli);
288 return ret;
289}
290
291static void
292nouveau_accel_ce_fini(struct nouveau_drm *drm)
293{
294 nouveau_channel_idle(drm->cechan);
295 nvif_object_dtor(&drm->ttm.copy);
296 nouveau_channel_del(&drm->cechan);
297}
298
299static void
300nouveau_accel_ce_init(struct nouveau_drm *drm)
301{
302 struct nvif_device *device = &drm->client.device;
303 int ret = 0;
304
305 /* Allocate channel that has access to a (preferably async) copy
306 * engine, to use for TTM buffer moves.
307 */
308 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
309 ret = nouveau_channel_new(drm, device,
310 nvif_fifo_runlist_ce(device), 0,
311 true, &drm->cechan);
312 } else
313 if (device->info.chipset >= 0xa3 &&
314 device->info.chipset != 0xaa &&
315 device->info.chipset != 0xac) {
316 /* Prior to Kepler, there's only a single runlist, so all
317 * engines can be accessed from any channel.
318 *
319 * We still want to use a separate channel though.
320 */
321 ret = nouveau_channel_new(drm, device, NvDmaFB, NvDmaTT, false,
322 &drm->cechan);
323 }
324
325 if (ret)
326 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
327}
328
329static void
330nouveau_accel_gr_fini(struct nouveau_drm *drm)
331{
332 nouveau_channel_idle(drm->channel);
333 nvif_object_dtor(&drm->ntfy);
334 nvkm_gpuobj_del(&drm->notify);
335 nouveau_channel_del(&drm->channel);
336}
337
338static void
339nouveau_accel_gr_init(struct nouveau_drm *drm)
340{
341 struct nvif_device *device = &drm->client.device;
342 u32 arg0, arg1;
343 int ret;
344
345 /* Allocate channel that has access to the graphics engine. */
346 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
347 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR);
348 arg1 = 1;
349 } else {
350 arg0 = NvDmaFB;
351 arg1 = NvDmaTT;
352 }
353
354 ret = nouveau_channel_new(drm, device, arg0, arg1, false,
355 &drm->channel);
356 if (ret) {
357 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
358 nouveau_accel_gr_fini(drm);
359 return;
360 }
361
362 /* A SW class is used on pre-NV50 HW to assist with handling the
363 * synchronisation of page flips, as well as to implement fences
364 * on TNT/TNT2 HW that lacks any kind of support in host.
365 */
366 if (!drm->channel->nvsw.client && device->info.family < NV_DEVICE_INFO_V0_TESLA) {
367 ret = nvif_object_ctor(&drm->channel->user, "drmNvsw",
368 NVDRM_NVSW, nouveau_abi16_swclass(drm),
369 NULL, 0, &drm->channel->nvsw);
370 if (ret == 0) {
371 struct nvif_push *push = drm->channel->chan.push;
372 ret = PUSH_WAIT(push, 2);
373 if (ret == 0)
374 PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle);
375 }
376
377 if (ret) {
378 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
379 nouveau_accel_gr_fini(drm);
380 return;
381 }
382 }
383
384 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason,
385 * even if notification is never requested, so, allocate a ctxdma on
386 * any GPU where it's possible we'll end up using M2MF for BO moves.
387 */
388 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
389 ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL,
390 &drm->notify);
391 if (ret) {
392 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
393 nouveau_accel_gr_fini(drm);
394 return;
395 }
396
397 ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy",
398 NvNotify0, NV_DMA_IN_MEMORY,
399 &(struct nv_dma_v0) {
400 .target = NV_DMA_V0_TARGET_VRAM,
401 .access = NV_DMA_V0_ACCESS_RDWR,
402 .start = drm->notify->addr,
403 .limit = drm->notify->addr + 31
404 }, sizeof(struct nv_dma_v0),
405 &drm->ntfy);
406 if (ret) {
407 nouveau_accel_gr_fini(drm);
408 return;
409 }
410 }
411}
412
413static void
414nouveau_accel_fini(struct nouveau_drm *drm)
415{
416 nouveau_accel_ce_fini(drm);
417 nouveau_accel_gr_fini(drm);
418 if (drm->fence)
419 nouveau_fence(drm)->dtor(drm);
420}
421
422static void
423nouveau_accel_init(struct nouveau_drm *drm)
424{
425 struct nvif_device *device = &drm->client.device;
426 struct nvif_sclass *sclass;
427 int ret, i, n;
428
429 if (nouveau_noaccel)
430 return;
431
432 /* Initialise global support for channels, and synchronisation. */
433 ret = nouveau_channels_init(drm);
434 if (ret)
435 return;
436
437 /*XXX: this is crap, but the fence/channel stuff is a little
438 * backwards in some places. this will be fixed.
439 */
440 ret = n = nvif_object_sclass_get(&device->object, &sclass);
441 if (ret < 0)
442 return;
443
444 for (ret = -ENOSYS, i = 0; i < n; i++) {
445 switch (sclass[i].oclass) {
446 case NV03_CHANNEL_DMA:
447 ret = nv04_fence_create(drm);
448 break;
449 case NV10_CHANNEL_DMA:
450 ret = nv10_fence_create(drm);
451 break;
452 case NV17_CHANNEL_DMA:
453 case NV40_CHANNEL_DMA:
454 ret = nv17_fence_create(drm);
455 break;
456 case NV50_CHANNEL_GPFIFO:
457 ret = nv50_fence_create(drm);
458 break;
459 case G82_CHANNEL_GPFIFO:
460 ret = nv84_fence_create(drm);
461 break;
462 case FERMI_CHANNEL_GPFIFO:
463 case KEPLER_CHANNEL_GPFIFO_A:
464 case KEPLER_CHANNEL_GPFIFO_B:
465 case MAXWELL_CHANNEL_GPFIFO_A:
466 case PASCAL_CHANNEL_GPFIFO_A:
467 case VOLTA_CHANNEL_GPFIFO_A:
468 case TURING_CHANNEL_GPFIFO_A:
469 ret = nvc0_fence_create(drm);
470 break;
471 default:
472 break;
473 }
474 }
475
476 nvif_object_sclass_put(&sclass);
477 if (ret) {
478 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
479 nouveau_accel_fini(drm);
480 return;
481 }
482
483 /* Volta requires access to a doorbell register for kickoff. */
484 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
485 ret = nvif_user_ctor(device, "drmUsermode");
486 if (ret)
487 return;
488 }
489
490 /* Allocate channels we need to support various functions. */
491 nouveau_accel_gr_init(drm);
492 nouveau_accel_ce_init(drm);
493
494 /* Initialise accelerated TTM buffer moves. */
495 nouveau_bo_move_init(drm);
496}
497
498static void __printf(2, 3)
499nouveau_drm_errorf(struct nvif_object *object, const char *fmt, ...)
500{
501 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
502 struct va_format vaf;
503 va_list va;
504
505 va_start(va, fmt);
506 vaf.fmt = fmt;
507 vaf.va = &va;
508 NV_ERROR(drm, "%pV", &vaf);
509 va_end(va);
510}
511
512static void __printf(2, 3)
513nouveau_drm_debugf(struct nvif_object *object, const char *fmt, ...)
514{
515 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
516 struct va_format vaf;
517 va_list va;
518
519 va_start(va, fmt);
520 vaf.fmt = fmt;
521 vaf.va = &va;
522 NV_DEBUG(drm, "%pV", &vaf);
523 va_end(va);
524}
525
526static const struct nvif_parent_func
527nouveau_parent = {
528 .debugf = nouveau_drm_debugf,
529 .errorf = nouveau_drm_errorf,
530};
531
532static int
533nouveau_drm_device_init(struct drm_device *dev)
534{
535 struct nouveau_drm *drm;
536 int ret;
537
538 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
539 return -ENOMEM;
540 dev->dev_private = drm;
541 drm->dev = dev;
542
543 nvif_parent_ctor(&nouveau_parent, &drm->parent);
544 drm->master.base.object.parent = &drm->parent;
545
546 ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
547 if (ret)
548 goto fail_alloc;
549
550 ret = nouveau_cli_init(drm, "DRM", &drm->client);
551 if (ret)
552 goto fail_master;
553
554 dev->irq_enabled = true;
555
556 nvxx_client(&drm->client.base)->debug =
557 nvkm_dbgopt(nouveau_debug, "DRM");
558
559 INIT_LIST_HEAD(&drm->clients);
560 spin_lock_init(&drm->tile.lock);
561
562 /* workaround an odd issue on nvc1 by disabling the device's
563 * nosnoop capability. hopefully won't cause issues until a
564 * better fix is found - assuming there is one...
565 */
566 if (drm->client.device.info.chipset == 0xc1)
567 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
568
569 nouveau_vga_init(drm);
570
571 ret = nouveau_ttm_init(drm);
572 if (ret)
573 goto fail_ttm;
574
575 ret = nouveau_bios_init(dev);
576 if (ret)
577 goto fail_bios;
578
579 nouveau_accel_init(drm);
580
581 ret = nouveau_display_create(dev);
582 if (ret)
583 goto fail_dispctor;
584
585 if (dev->mode_config.num_crtc) {
586 ret = nouveau_display_init(dev, false, false);
587 if (ret)
588 goto fail_dispinit;
589 }
590
591 nouveau_debugfs_init(drm);
592 nouveau_hwmon_init(dev);
593 nouveau_svm_init(drm);
594 nouveau_dmem_init(drm);
595 nouveau_fbcon_init(dev);
596 nouveau_led_init(dev);
597
598 if (nouveau_pmops_runtime()) {
599 pm_runtime_use_autosuspend(dev->dev);
600 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
601 pm_runtime_set_active(dev->dev);
602 pm_runtime_allow(dev->dev);
603 pm_runtime_mark_last_busy(dev->dev);
604 pm_runtime_put(dev->dev);
605 }
606
607 return 0;
608
609fail_dispinit:
610 nouveau_display_destroy(dev);
611fail_dispctor:
612 nouveau_accel_fini(drm);
613 nouveau_bios_takedown(dev);
614fail_bios:
615 nouveau_ttm_fini(drm);
616fail_ttm:
617 nouveau_vga_fini(drm);
618 nouveau_cli_fini(&drm->client);
619fail_master:
620 nouveau_cli_fini(&drm->master);
621fail_alloc:
622 nvif_parent_dtor(&drm->parent);
623 kfree(drm);
624 return ret;
625}
626
627static void
628nouveau_drm_device_fini(struct drm_device *dev)
629{
630 struct nouveau_drm *drm = nouveau_drm(dev);
631
632 if (nouveau_pmops_runtime()) {
633 pm_runtime_get_sync(dev->dev);
634 pm_runtime_forbid(dev->dev);
635 }
636
637 nouveau_led_fini(dev);
638 nouveau_fbcon_fini(dev);
639 nouveau_dmem_fini(drm);
640 nouveau_svm_fini(drm);
641 nouveau_hwmon_fini(dev);
642 nouveau_debugfs_fini(drm);
643
644 if (dev->mode_config.num_crtc)
645 nouveau_display_fini(dev, false, false);
646 nouveau_display_destroy(dev);
647
648 nouveau_accel_fini(drm);
649 nouveau_bios_takedown(dev);
650
651 nouveau_ttm_fini(drm);
652 nouveau_vga_fini(drm);
653
654 nouveau_cli_fini(&drm->client);
655 nouveau_cli_fini(&drm->master);
656 nvif_parent_dtor(&drm->parent);
657 kfree(drm);
658}
659
660/*
661 * On some Intel PCIe bridge controllers doing a
662 * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear.
663 * Skipping the intermediate D3hot step seems to make it work again. This is
664 * probably caused by not meeting the expectation the involved AML code has
665 * when the GPU is put into D3hot state before invoking it.
666 *
667 * This leads to various manifestations of this issue:
668 * - AML code execution to power on the GPU hits an infinite loop (as the
669 * code waits on device memory to change).
670 * - kernel crashes, as all PCI reads return -1, which most code isn't able
671 * to handle well enough.
672 *
673 * In all cases dmesg will contain at least one line like this:
674 * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3'
675 * followed by a lot of nouveau timeouts.
676 *
677 * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not
678 * documented PCI config space register 0x248 of the Intel PCIe bridge
679 * controller (0x1901) in order to change the state of the PCIe link between
680 * the PCIe port and the GPU. There are alternative code paths using other
681 * registers, which seem to work fine (executed pre Windows 8):
682 * - 0xbc bit 0x20 (publicly available documentation claims 'reserved')
683 * - 0xb0 bit 0x10 (link disable)
684 * Changing the conditions inside the firmware by poking into the relevant
685 * addresses does resolve the issue, but it seemed to be ACPI private memory
686 * and not any device accessible memory at all, so there is no portable way of
687 * changing the conditions.
688 * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared.
689 *
690 * The only systems where this behavior can be seen are hybrid graphics laptops
691 * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether
692 * this issue only occurs in combination with listed Intel PCIe bridge
693 * controllers and the mentioned GPUs or other devices as well.
694 *
695 * documentation on the PCIe bridge controller can be found in the
696 * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2"
697 * Section "12 PCI Express* Controller (x16) Registers"
698 */
699
700static void quirk_broken_nv_runpm(struct pci_dev *pdev)
701{
702 struct drm_device *dev = pci_get_drvdata(pdev);
703 struct nouveau_drm *drm = nouveau_drm(dev);
704 struct pci_dev *bridge = pci_upstream_bridge(pdev);
705
706 if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL)
707 return;
708
709 switch (bridge->device) {
710 case 0x1901:
711 drm->old_pm_cap = pdev->pm_cap;
712 pdev->pm_cap = 0;
713 NV_INFO(drm, "Disabling PCI power management to avoid bug\n");
714 break;
715 }
716}
717
718static int nouveau_drm_probe(struct pci_dev *pdev,
719 const struct pci_device_id *pent)
720{
721 struct nvkm_device *device;
722 struct drm_device *drm_dev;
723 int ret;
724
725 if (vga_switcheroo_client_probe_defer(pdev))
726 return -EPROBE_DEFER;
727
728 /* We need to check that the chipset is supported before booting
729 * fbdev off the hardware, as there's no way to put it back.
730 */
731 ret = nvkm_device_pci_new(pdev, nouveau_config, "error",
732 true, false, 0, &device);
733 if (ret)
734 return ret;
735
736 nvkm_device_del(&device);
737
738 /* Remove conflicting drivers (vesafb, efifb etc). */
739 ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, "nouveaufb");
740 if (ret)
741 return ret;
742
743 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
744 true, true, ~0ULL, &device);
745 if (ret)
746 return ret;
747
748 pci_set_master(pdev);
749
750 if (nouveau_atomic)
751 driver_pci.driver_features |= DRIVER_ATOMIC;
752
753 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev);
754 if (IS_ERR(drm_dev)) {
755 ret = PTR_ERR(drm_dev);
756 goto fail_nvkm;
757 }
758
759 ret = pci_enable_device(pdev);
760 if (ret)
761 goto fail_drm;
762
763 drm_dev->pdev = pdev;
764 pci_set_drvdata(pdev, drm_dev);
765
766 ret = nouveau_drm_device_init(drm_dev);
767 if (ret)
768 goto fail_pci;
769
770 ret = drm_dev_register(drm_dev, pent->driver_data);
771 if (ret)
772 goto fail_drm_dev_init;
773
774 quirk_broken_nv_runpm(pdev);
775 return 0;
776
777fail_drm_dev_init:
778 nouveau_drm_device_fini(drm_dev);
779fail_pci:
780 pci_disable_device(pdev);
781fail_drm:
782 drm_dev_put(drm_dev);
783fail_nvkm:
784 nvkm_device_del(&device);
785 return ret;
786}
787
788void
789nouveau_drm_device_remove(struct drm_device *dev)
790{
791 struct nouveau_drm *drm = nouveau_drm(dev);
792 struct nvkm_client *client;
793 struct nvkm_device *device;
794
795 drm_dev_unregister(dev);
796
797 dev->irq_enabled = false;
798 client = nvxx_client(&drm->client.base);
799 device = nvkm_device_find(client->device);
800
801 nouveau_drm_device_fini(dev);
802 drm_dev_put(dev);
803 nvkm_device_del(&device);
804}
805
806static void
807nouveau_drm_remove(struct pci_dev *pdev)
808{
809 struct drm_device *dev = pci_get_drvdata(pdev);
810 struct nouveau_drm *drm = nouveau_drm(dev);
811
812 /* revert our workaround */
813 if (drm->old_pm_cap)
814 pdev->pm_cap = drm->old_pm_cap;
815 nouveau_drm_device_remove(dev);
816 pci_disable_device(pdev);
817}
818
819static int
820nouveau_do_suspend(struct drm_device *dev, bool runtime)
821{
822 struct nouveau_drm *drm = nouveau_drm(dev);
823 int ret;
824
825 nouveau_svm_suspend(drm);
826 nouveau_dmem_suspend(drm);
827 nouveau_led_suspend(dev);
828
829 if (dev->mode_config.num_crtc) {
830 NV_DEBUG(drm, "suspending console...\n");
831 nouveau_fbcon_set_suspend(dev, 1);
832 NV_DEBUG(drm, "suspending display...\n");
833 ret = nouveau_display_suspend(dev, runtime);
834 if (ret)
835 return ret;
836 }
837
838 NV_DEBUG(drm, "evicting buffers...\n");
839 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
840
841 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
842 if (drm->cechan) {
843 ret = nouveau_channel_idle(drm->cechan);
844 if (ret)
845 goto fail_display;
846 }
847
848 if (drm->channel) {
849 ret = nouveau_channel_idle(drm->channel);
850 if (ret)
851 goto fail_display;
852 }
853
854 NV_DEBUG(drm, "suspending fence...\n");
855 if (drm->fence && nouveau_fence(drm)->suspend) {
856 if (!nouveau_fence(drm)->suspend(drm)) {
857 ret = -ENOMEM;
858 goto fail_display;
859 }
860 }
861
862 NV_DEBUG(drm, "suspending object tree...\n");
863 ret = nvif_client_suspend(&drm->master.base);
864 if (ret)
865 goto fail_client;
866
867 return 0;
868
869fail_client:
870 if (drm->fence && nouveau_fence(drm)->resume)
871 nouveau_fence(drm)->resume(drm);
872
873fail_display:
874 if (dev->mode_config.num_crtc) {
875 NV_DEBUG(drm, "resuming display...\n");
876 nouveau_display_resume(dev, runtime);
877 }
878 return ret;
879}
880
881static int
882nouveau_do_resume(struct drm_device *dev, bool runtime)
883{
884 int ret = 0;
885 struct nouveau_drm *drm = nouveau_drm(dev);
886
887 NV_DEBUG(drm, "resuming object tree...\n");
888 ret = nvif_client_resume(&drm->master.base);
889 if (ret) {
890 NV_ERROR(drm, "Client resume failed with error: %d\n", ret);
891 return ret;
892 }
893
894 NV_DEBUG(drm, "resuming fence...\n");
895 if (drm->fence && nouveau_fence(drm)->resume)
896 nouveau_fence(drm)->resume(drm);
897
898 nouveau_run_vbios_init(dev);
899
900 if (dev->mode_config.num_crtc) {
901 NV_DEBUG(drm, "resuming display...\n");
902 nouveau_display_resume(dev, runtime);
903 NV_DEBUG(drm, "resuming console...\n");
904 nouveau_fbcon_set_suspend(dev, 0);
905 }
906
907 nouveau_led_resume(dev);
908 nouveau_dmem_resume(drm);
909 nouveau_svm_resume(drm);
910 return 0;
911}
912
913int
914nouveau_pmops_suspend(struct device *dev)
915{
916 struct pci_dev *pdev = to_pci_dev(dev);
917 struct drm_device *drm_dev = pci_get_drvdata(pdev);
918 int ret;
919
920 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
921 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
922 return 0;
923
924 ret = nouveau_do_suspend(drm_dev, false);
925 if (ret)
926 return ret;
927
928 pci_save_state(pdev);
929 pci_disable_device(pdev);
930 pci_set_power_state(pdev, PCI_D3hot);
931 udelay(200);
932 return 0;
933}
934
935int
936nouveau_pmops_resume(struct device *dev)
937{
938 struct pci_dev *pdev = to_pci_dev(dev);
939 struct drm_device *drm_dev = pci_get_drvdata(pdev);
940 int ret;
941
942 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
943 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
944 return 0;
945
946 pci_set_power_state(pdev, PCI_D0);
947 pci_restore_state(pdev);
948 ret = pci_enable_device(pdev);
949 if (ret)
950 return ret;
951 pci_set_master(pdev);
952
953 ret = nouveau_do_resume(drm_dev, false);
954
955 /* Monitors may have been connected / disconnected during suspend */
956 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
957
958 return ret;
959}
960
961static int
962nouveau_pmops_freeze(struct device *dev)
963{
964 struct pci_dev *pdev = to_pci_dev(dev);
965 struct drm_device *drm_dev = pci_get_drvdata(pdev);
966 return nouveau_do_suspend(drm_dev, false);
967}
968
969static int
970nouveau_pmops_thaw(struct device *dev)
971{
972 struct pci_dev *pdev = to_pci_dev(dev);
973 struct drm_device *drm_dev = pci_get_drvdata(pdev);
974 return nouveau_do_resume(drm_dev, false);
975}
976
977bool
978nouveau_pmops_runtime(void)
979{
980 if (nouveau_runtime_pm == -1)
981 return nouveau_is_optimus() || nouveau_is_v1_dsm();
982 return nouveau_runtime_pm == 1;
983}
984
985static int
986nouveau_pmops_runtime_suspend(struct device *dev)
987{
988 struct pci_dev *pdev = to_pci_dev(dev);
989 struct drm_device *drm_dev = pci_get_drvdata(pdev);
990 int ret;
991
992 if (!nouveau_pmops_runtime()) {
993 pm_runtime_forbid(dev);
994 return -EBUSY;
995 }
996
997 nouveau_switcheroo_optimus_dsm();
998 ret = nouveau_do_suspend(drm_dev, true);
999 pci_save_state(pdev);
1000 pci_disable_device(pdev);
1001 pci_ignore_hotplug(pdev);
1002 pci_set_power_state(pdev, PCI_D3cold);
1003 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
1004 return ret;
1005}
1006
1007static int
1008nouveau_pmops_runtime_resume(struct device *dev)
1009{
1010 struct pci_dev *pdev = to_pci_dev(dev);
1011 struct drm_device *drm_dev = pci_get_drvdata(pdev);
1012 struct nouveau_drm *drm = nouveau_drm(drm_dev);
1013 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
1014 int ret;
1015
1016 if (!nouveau_pmops_runtime()) {
1017 pm_runtime_forbid(dev);
1018 return -EBUSY;
1019 }
1020
1021 pci_set_power_state(pdev, PCI_D0);
1022 pci_restore_state(pdev);
1023 ret = pci_enable_device(pdev);
1024 if (ret)
1025 return ret;
1026 pci_set_master(pdev);
1027
1028 ret = nouveau_do_resume(drm_dev, true);
1029 if (ret) {
1030 NV_ERROR(drm, "resume failed with: %d\n", ret);
1031 return ret;
1032 }
1033
1034 /* do magic */
1035 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
1036 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
1037
1038 /* Monitors may have been connected / disconnected during suspend */
1039 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
1040
1041 return ret;
1042}
1043
1044static int
1045nouveau_pmops_runtime_idle(struct device *dev)
1046{
1047 if (!nouveau_pmops_runtime()) {
1048 pm_runtime_forbid(dev);
1049 return -EBUSY;
1050 }
1051
1052 pm_runtime_mark_last_busy(dev);
1053 pm_runtime_autosuspend(dev);
1054 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
1055 return 1;
1056}
1057
1058static int
1059nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
1060{
1061 struct nouveau_drm *drm = nouveau_drm(dev);
1062 struct nouveau_cli *cli;
1063 char name[32], tmpname[TASK_COMM_LEN];
1064 int ret;
1065
1066 /* need to bring up power immediately if opening device */
1067 ret = pm_runtime_get_sync(dev->dev);
1068 if (ret < 0 && ret != -EACCES) {
1069 pm_runtime_put_autosuspend(dev->dev);
1070 return ret;
1071 }
1072
1073 get_task_comm(tmpname, current);
1074 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
1075
1076 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
1077 ret = -ENOMEM;
1078 goto done;
1079 }
1080
1081 ret = nouveau_cli_init(drm, name, cli);
1082 if (ret)
1083 goto done;
1084
1085 cli->base.super = false;
1086
1087 fpriv->driver_priv = cli;
1088
1089 mutex_lock(&drm->client.mutex);
1090 list_add(&cli->head, &drm->clients);
1091 mutex_unlock(&drm->client.mutex);
1092
1093done:
1094 if (ret && cli) {
1095 nouveau_cli_fini(cli);
1096 kfree(cli);
1097 }
1098
1099 pm_runtime_mark_last_busy(dev->dev);
1100 pm_runtime_put_autosuspend(dev->dev);
1101 return ret;
1102}
1103
1104static void
1105nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
1106{
1107 struct nouveau_cli *cli = nouveau_cli(fpriv);
1108 struct nouveau_drm *drm = nouveau_drm(dev);
1109
1110 pm_runtime_get_sync(dev->dev);
1111
1112 mutex_lock(&cli->mutex);
1113 if (cli->abi16)
1114 nouveau_abi16_fini(cli->abi16);
1115 mutex_unlock(&cli->mutex);
1116
1117 mutex_lock(&drm->client.mutex);
1118 list_del(&cli->head);
1119 mutex_unlock(&drm->client.mutex);
1120
1121 nouveau_cli_fini(cli);
1122 kfree(cli);
1123 pm_runtime_mark_last_busy(dev->dev);
1124 pm_runtime_put_autosuspend(dev->dev);
1125}
1126
1127static const struct drm_ioctl_desc
1128nouveau_ioctls[] = {
1129 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW),
1130 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1131 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW),
1132 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW),
1133 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW),
1134 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW),
1135 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW),
1136 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW),
1137 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW),
1138 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW),
1139 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW),
1140 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW),
1141 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW),
1142 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW),
1143};
1144
1145long
1146nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1147{
1148 struct drm_file *filp = file->private_data;
1149 struct drm_device *dev = filp->minor->dev;
1150 long ret;
1151
1152 ret = pm_runtime_get_sync(dev->dev);
1153 if (ret < 0 && ret != -EACCES) {
1154 pm_runtime_put_autosuspend(dev->dev);
1155 return ret;
1156 }
1157
1158 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1159 case DRM_NOUVEAU_NVIF:
1160 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1161 break;
1162 default:
1163 ret = drm_ioctl(file, cmd, arg);
1164 break;
1165 }
1166
1167 pm_runtime_mark_last_busy(dev->dev);
1168 pm_runtime_put_autosuspend(dev->dev);
1169 return ret;
1170}
1171
1172static const struct file_operations
1173nouveau_driver_fops = {
1174 .owner = THIS_MODULE,
1175 .open = drm_open,
1176 .release = drm_release,
1177 .unlocked_ioctl = nouveau_drm_ioctl,
1178 .mmap = nouveau_ttm_mmap,
1179 .poll = drm_poll,
1180 .read = drm_read,
1181#if defined(CONFIG_COMPAT)
1182 .compat_ioctl = nouveau_compat_ioctl,
1183#endif
1184 .llseek = noop_llseek,
1185};
1186
1187static struct drm_driver
1188driver_stub = {
1189 .driver_features =
1190 DRIVER_GEM | DRIVER_MODESET | DRIVER_RENDER
1191#if defined(CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT)
1192 | DRIVER_KMS_LEGACY_CONTEXT
1193#endif
1194 ,
1195
1196 .open = nouveau_drm_open,
1197 .postclose = nouveau_drm_postclose,
1198 .lastclose = nouveau_vga_lastclose,
1199
1200#if defined(CONFIG_DEBUG_FS)
1201 .debugfs_init = nouveau_drm_debugfs_init,
1202#endif
1203
1204 .ioctls = nouveau_ioctls,
1205 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
1206 .fops = &nouveau_driver_fops,
1207
1208 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1209 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1210 .gem_prime_pin = nouveau_gem_prime_pin,
1211 .gem_prime_unpin = nouveau_gem_prime_unpin,
1212 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
1213 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1214 .gem_prime_vmap = nouveau_gem_prime_vmap,
1215 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
1216
1217 .gem_free_object_unlocked = nouveau_gem_object_del,
1218 .gem_open_object = nouveau_gem_object_open,
1219 .gem_close_object = nouveau_gem_object_close,
1220
1221 .dumb_create = nouveau_display_dumb_create,
1222 .dumb_map_offset = nouveau_display_dumb_map_offset,
1223
1224 .name = DRIVER_NAME,
1225 .desc = DRIVER_DESC,
1226#ifdef GIT_REVISION
1227 .date = GIT_REVISION,
1228#else
1229 .date = DRIVER_DATE,
1230#endif
1231 .major = DRIVER_MAJOR,
1232 .minor = DRIVER_MINOR,
1233 .patchlevel = DRIVER_PATCHLEVEL,
1234};
1235
1236static struct pci_device_id
1237nouveau_drm_pci_table[] = {
1238 {
1239 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1240 .class = PCI_BASE_CLASS_DISPLAY << 16,
1241 .class_mask = 0xff << 16,
1242 },
1243 {
1244 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1245 .class = PCI_BASE_CLASS_DISPLAY << 16,
1246 .class_mask = 0xff << 16,
1247 },
1248 {}
1249};
1250
1251static void nouveau_display_options(void)
1252{
1253 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1254
1255 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1256 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1257 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1258 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1259 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1260 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1261 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1262 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1263 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1264 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1265 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
1266}
1267
1268static const struct dev_pm_ops nouveau_pm_ops = {
1269 .suspend = nouveau_pmops_suspend,
1270 .resume = nouveau_pmops_resume,
1271 .freeze = nouveau_pmops_freeze,
1272 .thaw = nouveau_pmops_thaw,
1273 .poweroff = nouveau_pmops_freeze,
1274 .restore = nouveau_pmops_resume,
1275 .runtime_suspend = nouveau_pmops_runtime_suspend,
1276 .runtime_resume = nouveau_pmops_runtime_resume,
1277 .runtime_idle = nouveau_pmops_runtime_idle,
1278};
1279
1280static struct pci_driver
1281nouveau_drm_pci_driver = {
1282 .name = "nouveau",
1283 .id_table = nouveau_drm_pci_table,
1284 .probe = nouveau_drm_probe,
1285 .remove = nouveau_drm_remove,
1286 .driver.pm = &nouveau_pm_ops,
1287};
1288
1289struct drm_device *
1290nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1291 struct platform_device *pdev,
1292 struct nvkm_device **pdevice)
1293{
1294 struct drm_device *drm;
1295 int err;
1296
1297 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1298 true, true, ~0ULL, pdevice);
1299 if (err)
1300 goto err_free;
1301
1302 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1303 if (IS_ERR(drm)) {
1304 err = PTR_ERR(drm);
1305 goto err_free;
1306 }
1307
1308 err = nouveau_drm_device_init(drm);
1309 if (err)
1310 goto err_put;
1311
1312 platform_set_drvdata(pdev, drm);
1313
1314 return drm;
1315
1316err_put:
1317 drm_dev_put(drm);
1318err_free:
1319 nvkm_device_del(pdevice);
1320
1321 return ERR_PTR(err);
1322}
1323
1324static int __init
1325nouveau_drm_init(void)
1326{
1327 driver_pci = driver_stub;
1328 driver_platform = driver_stub;
1329
1330 nouveau_display_options();
1331
1332 if (nouveau_modeset == -1) {
1333 if (vgacon_text_force())
1334 nouveau_modeset = 0;
1335 }
1336
1337 if (!nouveau_modeset)
1338 return 0;
1339
1340#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1341 platform_driver_register(&nouveau_platform_driver);
1342#endif
1343
1344 nouveau_register_dsm_handler();
1345 nouveau_backlight_ctor();
1346
1347#ifdef CONFIG_PCI
1348 return pci_register_driver(&nouveau_drm_pci_driver);
1349#else
1350 return 0;
1351#endif
1352}
1353
1354static void __exit
1355nouveau_drm_exit(void)
1356{
1357 if (!nouveau_modeset)
1358 return;
1359
1360#ifdef CONFIG_PCI
1361 pci_unregister_driver(&nouveau_drm_pci_driver);
1362#endif
1363 nouveau_backlight_dtor();
1364 nouveau_unregister_dsm_handler();
1365
1366#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1367 platform_driver_unregister(&nouveau_platform_driver);
1368#endif
1369 if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM))
1370 mmu_notifier_synchronize();
1371}
1372
1373module_init(nouveau_drm_init);
1374module_exit(nouveau_drm_exit);
1375
1376MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1377MODULE_AUTHOR(DRIVER_AUTHOR);
1378MODULE_DESCRIPTION(DRIVER_DESC);
1379MODULE_LICENSE("GPL and additional rights");