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v4.6
 1ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/msm
 2ccflags-$(CONFIG_DRM_MSM_DSI) += -Idrivers/gpu/drm/msm/dsi
 
 
 3
 4msm-y := \
 5	adreno/adreno_device.o \
 6	adreno/adreno_gpu.o \
 
 7	adreno/a3xx_gpu.o \
 8	adreno/a4xx_gpu.o \
 
 
 
 
 
 
 9	hdmi/hdmi.o \
10	hdmi/hdmi_audio.o \
11	hdmi/hdmi_bridge.o \
12	hdmi/hdmi_connector.o \
13	hdmi/hdmi_hdcp.o \
14	hdmi/hdmi_i2c.o \
15	hdmi/hdmi_phy.o \
16	hdmi/hdmi_phy_8960.o \
17	hdmi/hdmi_phy_8x60.o \
18	hdmi/hdmi_phy_8x74.o \
19	edp/edp.o \
20	edp/edp_aux.o \
21	edp/edp_bridge.o \
22	edp/edp_connector.o \
23	edp/edp_ctrl.o \
24	edp/edp_phy.o \
25	mdp/mdp_format.o \
26	mdp/mdp_kms.o \
27	mdp/mdp4/mdp4_crtc.o \
28	mdp/mdp4/mdp4_dtv_encoder.o \
29	mdp/mdp4/mdp4_lcdc_encoder.o \
30	mdp/mdp4/mdp4_lvds_connector.o \
31	mdp/mdp4/mdp4_irq.o \
32	mdp/mdp4/mdp4_kms.o \
33	mdp/mdp4/mdp4_plane.o \
34	mdp/mdp5/mdp5_cfg.o \
35	mdp/mdp5/mdp5_ctl.o \
36	mdp/mdp5/mdp5_crtc.o \
37	mdp/mdp5/mdp5_encoder.o \
38	mdp/mdp5/mdp5_irq.o \
39	mdp/mdp5/mdp5_kms.o \
40	mdp/mdp5/mdp5_plane.o \
41	mdp/mdp5/mdp5_smp.o \
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
42	msm_atomic.o \
 
 
43	msm_drv.o \
44	msm_fb.o \
 
45	msm_gem.o \
46	msm_gem_prime.o \
 
47	msm_gem_submit.o \
 
48	msm_gpu.o \
49	msm_iommu.o \
50	msm_perf.o \
51	msm_rd.o \
52	msm_ringbuffer.o
 
 
 
 
 
 
 
53
54msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
55msm-$(CONFIG_COMMON_CLK) += mdp/mdp4/mdp4_lvds_pll.o
56msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_pll_8960.o
57msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_phy_8996.o
58
 
 
59msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
60			mdp/mdp4/mdp4_dsi_encoder.o \
61			dsi/dsi_cfg.o \
62			dsi/dsi_host.o \
63			dsi/dsi_manager.o \
64			dsi/phy/dsi_phy.o \
65			mdp/mdp5/mdp5_cmd_encoder.o
66
67msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
68msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
69msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o
 
 
70
71ifeq ($(CONFIG_DRM_MSM_DSI_PLL),y)
72msm-y += dsi/pll/dsi_pll.o
73msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/pll/dsi_pll_28nm.o
74msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/pll/dsi_pll_28nm_8960.o
 
 
75endif
76
77obj-$(CONFIG_DRM_MSM)	+= msm.o
v5.9
  1# SPDX-License-Identifier: GPL-2.0
  2ccflags-y := -I $(srctree)/$(src)
  3ccflags-y += -I $(srctree)/$(src)/disp/dpu1
  4ccflags-$(CONFIG_DRM_MSM_DSI) += -I $(srctree)/$(src)/dsi
  5
  6msm-y := \
  7	adreno/adreno_device.o \
  8	adreno/adreno_gpu.o \
  9	adreno/a2xx_gpu.o \
 10	adreno/a3xx_gpu.o \
 11	adreno/a4xx_gpu.o \
 12	adreno/a5xx_gpu.o \
 13	adreno/a5xx_power.o \
 14	adreno/a5xx_preempt.o \
 15	adreno/a6xx_gpu.o \
 16	adreno/a6xx_gmu.o \
 17	adreno/a6xx_hfi.o \
 18	hdmi/hdmi.o \
 19	hdmi/hdmi_audio.o \
 20	hdmi/hdmi_bridge.o \
 21	hdmi/hdmi_connector.o \
 
 22	hdmi/hdmi_i2c.o \
 23	hdmi/hdmi_phy.o \
 24	hdmi/hdmi_phy_8960.o \
 25	hdmi/hdmi_phy_8x60.o \
 26	hdmi/hdmi_phy_8x74.o \
 27	edp/edp.o \
 28	edp/edp_aux.o \
 29	edp/edp_bridge.o \
 30	edp/edp_connector.o \
 31	edp/edp_ctrl.o \
 32	edp/edp_phy.o \
 33	disp/mdp_format.o \
 34	disp/mdp_kms.o \
 35	disp/mdp4/mdp4_crtc.o \
 36	disp/mdp4/mdp4_dtv_encoder.o \
 37	disp/mdp4/mdp4_lcdc_encoder.o \
 38	disp/mdp4/mdp4_lvds_connector.o \
 39	disp/mdp4/mdp4_irq.o \
 40	disp/mdp4/mdp4_kms.o \
 41	disp/mdp4/mdp4_plane.o \
 42	disp/mdp5/mdp5_cfg.o \
 43	disp/mdp5/mdp5_ctl.o \
 44	disp/mdp5/mdp5_crtc.o \
 45	disp/mdp5/mdp5_encoder.o \
 46	disp/mdp5/mdp5_irq.o \
 47	disp/mdp5/mdp5_mdss.o \
 48	disp/mdp5/mdp5_kms.o \
 49	disp/mdp5/mdp5_pipe.o \
 50	disp/mdp5/mdp5_mixer.o \
 51	disp/mdp5/mdp5_plane.o \
 52	disp/mdp5/mdp5_smp.o \
 53	disp/dpu1/dpu_core_irq.o \
 54	disp/dpu1/dpu_core_perf.o \
 55	disp/dpu1/dpu_crtc.o \
 56	disp/dpu1/dpu_encoder.o \
 57	disp/dpu1/dpu_encoder_phys_cmd.o \
 58	disp/dpu1/dpu_encoder_phys_vid.o \
 59	disp/dpu1/dpu_formats.o \
 60	disp/dpu1/dpu_hw_blk.o \
 61	disp/dpu1/dpu_hw_catalog.o \
 62	disp/dpu1/dpu_hw_ctl.o \
 63	disp/dpu1/dpu_hw_interrupts.o \
 64	disp/dpu1/dpu_hw_intf.o \
 65	disp/dpu1/dpu_hw_lm.o \
 66	disp/dpu1/dpu_hw_pingpong.o \
 67	disp/dpu1/dpu_hw_sspp.o \
 68	disp/dpu1/dpu_hw_dspp.o \
 69	disp/dpu1/dpu_hw_top.o \
 70	disp/dpu1/dpu_hw_util.o \
 71	disp/dpu1/dpu_hw_vbif.o \
 72	disp/dpu1/dpu_io_util.o \
 73	disp/dpu1/dpu_kms.o \
 74	disp/dpu1/dpu_mdss.o \
 75	disp/dpu1/dpu_plane.o \
 76	disp/dpu1/dpu_rm.o \
 77	disp/dpu1/dpu_vbif.o \
 78	msm_atomic.o \
 79	msm_atomic_tracepoints.o \
 80	msm_debugfs.o \
 81	msm_drv.o \
 82	msm_fb.o \
 83	msm_fence.o \
 84	msm_gem.o \
 85	msm_gem_prime.o \
 86	msm_gem_shrinker.o \
 87	msm_gem_submit.o \
 88	msm_gem_vma.o \
 89	msm_gpu.o \
 90	msm_iommu.o \
 91	msm_perf.o \
 92	msm_rd.o \
 93	msm_ringbuffer.o \
 94	msm_submitqueue.o \
 95	msm_gpu_tracepoints.o \
 96	msm_gpummu.o
 97
 98msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o
 99
100msm-$(CONFIG_DRM_MSM_GPU_STATE)	+= adreno/a6xx_gpu_state.o
101
102msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
103msm-$(CONFIG_COMMON_CLK) += disp/mdp4/mdp4_lvds_pll.o
104msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_pll_8960.o
105msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_phy_8996.o
106
107msm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o
108
109msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
110			disp/mdp4/mdp4_dsi_encoder.o \
111			dsi/dsi_cfg.o \
112			dsi/dsi_host.o \
113			dsi/dsi_manager.o \
114			dsi/phy/dsi_phy.o \
115			disp/mdp5/mdp5_cmd_encoder.o
116
117msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
118msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
119msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o
120msm-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o
121msm-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o
122
123ifeq ($(CONFIG_DRM_MSM_DSI_PLL),y)
124msm-y += dsi/pll/dsi_pll.o
125msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/pll/dsi_pll_28nm.o
126msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/pll/dsi_pll_28nm_8960.o
127msm-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/pll/dsi_pll_14nm.o
128msm-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/pll/dsi_pll_10nm.o
129endif
130
131obj-$(CONFIG_DRM_MSM)	+= msm.o