1/*
 2 * Copyright © 2016 Intel Corporation
 3 *
 4 * Permission is hereby granted, free of charge, to any person obtaining a
 5 * copy of this software and associated documentation files (the "Software"),
 6 * to deal in the Software without restriction, including without limitation
 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 8 * and/or sell copies of the Software, and to permit persons to whom the
 9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
25#ifndef __INTEL_GGTT_FENCING_H__
26#define __INTEL_GGTT_FENCING_H__
27
28#include <linux/list.h>
29#include <linux/types.h>
30
31#include "i915_active.h"
32
33struct drm_i915_gem_object;
34struct i915_ggtt;
35struct i915_vma;
36struct intel_gt;
37struct sg_table;
38
39#define I965_FENCE_PAGE 4096UL
40
41struct i915_fence_reg {
42	struct list_head link;
43	struct i915_ggtt *ggtt;
44	struct i915_vma *vma;
45	atomic_t pin_count;
46	struct i915_active active;
47	int id;
48	/**
49	 * Whether the tiling parameters for the currently
50	 * associated fence register have changed. Note that
51	 * for the purposes of tracking tiling changes we also
52	 * treat the unfenced register, the register slot that
53	 * the object occupies whilst it executes a fenced
54	 * command (such as BLT on gen2/3), as a "fence".
55	 */
56	bool dirty;
57	u32 start;
58	u32 size;
59	u32 tiling;
60	u32 stride;
61};
62
63struct i915_fence_reg *i915_reserve_fence(struct i915_ggtt *ggtt);
64void i915_unreserve_fence(struct i915_fence_reg *fence);
65
66void intel_ggtt_restore_fences(struct i915_ggtt *ggtt);
67
68void i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj,
69				       struct sg_table *pages);
70void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
71					 struct sg_table *pages);
72
73void intel_ggtt_init_fences(struct i915_ggtt *ggtt);
74void intel_ggtt_fini_fences(struct i915_ggtt *ggtt);
75
76void intel_gt_init_swizzling(struct intel_gt *gt);
77
78#endif