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1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
33#include <linux/kernel.h>
34#include <linux/moduleparam.h>
35#include <linux/pwm.h>
36
37#include "intel_connector.h"
38#include "intel_display_types.h"
39#include "intel_dp_aux_backlight.h"
40#include "intel_dsi_dcs_backlight.h"
41#include "intel_panel.h"
42
43#define CRC_PMIC_PWM_PERIOD_NS 21333
44
45void
46intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
47 struct drm_display_mode *adjusted_mode)
48{
49 drm_mode_copy(adjusted_mode, fixed_mode);
50
51 drm_mode_set_crtcinfo(adjusted_mode, 0);
52}
53
54static bool is_downclock_mode(const struct drm_display_mode *downclock_mode,
55 const struct drm_display_mode *fixed_mode)
56{
57 return drm_mode_match(downclock_mode, fixed_mode,
58 DRM_MODE_MATCH_TIMINGS |
59 DRM_MODE_MATCH_FLAGS |
60 DRM_MODE_MATCH_3D_FLAGS) &&
61 downclock_mode->clock < fixed_mode->clock;
62}
63
64struct drm_display_mode *
65intel_panel_edid_downclock_mode(struct intel_connector *connector,
66 const struct drm_display_mode *fixed_mode)
67{
68 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
69 const struct drm_display_mode *scan, *best_mode = NULL;
70 struct drm_display_mode *downclock_mode;
71 int best_clock = fixed_mode->clock;
72
73 list_for_each_entry(scan, &connector->base.probed_modes, head) {
74 /*
75 * If one mode has the same resolution with the fixed_panel
76 * mode while they have the different refresh rate, it means
77 * that the reduced downclock is found. In such
78 * case we can set the different FPx0/1 to dynamically select
79 * between low and high frequency.
80 */
81 if (is_downclock_mode(scan, fixed_mode) &&
82 scan->clock < best_clock) {
83 /*
84 * The downclock is already found. But we
85 * expect to find the lower downclock.
86 */
87 best_clock = scan->clock;
88 best_mode = scan;
89 }
90 }
91
92 if (!best_mode)
93 return NULL;
94
95 downclock_mode = drm_mode_duplicate(&dev_priv->drm, best_mode);
96 if (!downclock_mode)
97 return NULL;
98
99 drm_dbg_kms(&dev_priv->drm,
100 "[CONNECTOR:%d:%s] using downclock mode from EDID: ",
101 connector->base.base.id, connector->base.name);
102 drm_mode_debug_printmodeline(downclock_mode);
103
104 return downclock_mode;
105}
106
107struct drm_display_mode *
108intel_panel_edid_fixed_mode(struct intel_connector *connector)
109{
110 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
111 const struct drm_display_mode *scan;
112 struct drm_display_mode *fixed_mode;
113
114 if (list_empty(&connector->base.probed_modes))
115 return NULL;
116
117 /* prefer fixed mode from EDID if available */
118 list_for_each_entry(scan, &connector->base.probed_modes, head) {
119 if ((scan->type & DRM_MODE_TYPE_PREFERRED) == 0)
120 continue;
121
122 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan);
123 if (!fixed_mode)
124 return NULL;
125
126 drm_dbg_kms(&dev_priv->drm,
127 "[CONNECTOR:%d:%s] using preferred mode from EDID: ",
128 connector->base.base.id, connector->base.name);
129 drm_mode_debug_printmodeline(fixed_mode);
130
131 return fixed_mode;
132 }
133
134 scan = list_first_entry(&connector->base.probed_modes,
135 typeof(*scan), head);
136
137 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan);
138 if (!fixed_mode)
139 return NULL;
140
141 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
142
143 drm_dbg_kms(&dev_priv->drm,
144 "[CONNECTOR:%d:%s] using first mode from EDID: ",
145 connector->base.base.id, connector->base.name);
146 drm_mode_debug_printmodeline(fixed_mode);
147
148 return fixed_mode;
149}
150
151struct drm_display_mode *
152intel_panel_vbt_fixed_mode(struct intel_connector *connector)
153{
154 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
155 struct drm_display_info *info = &connector->base.display_info;
156 struct drm_display_mode *fixed_mode;
157
158 if (!dev_priv->vbt.lfp_lvds_vbt_mode)
159 return NULL;
160
161 fixed_mode = drm_mode_duplicate(&dev_priv->drm,
162 dev_priv->vbt.lfp_lvds_vbt_mode);
163 if (!fixed_mode)
164 return NULL;
165
166 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
167
168 drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s] using mode from VBT: ",
169 connector->base.base.id, connector->base.name);
170 drm_mode_debug_printmodeline(fixed_mode);
171
172 info->width_mm = fixed_mode->width_mm;
173 info->height_mm = fixed_mode->height_mm;
174
175 return fixed_mode;
176}
177
178/* adjusted_mode has been preset to be the panel's fixed mode */
179int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
180 const struct drm_connector_state *conn_state)
181{
182 const struct drm_display_mode *adjusted_mode =
183 &crtc_state->hw.adjusted_mode;
184 int x, y, width, height;
185
186 /* Native modes don't need fitting */
187 if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w &&
188 adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h &&
189 crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
190 return 0;
191
192 switch (conn_state->scaling_mode) {
193 case DRM_MODE_SCALE_CENTER:
194 width = crtc_state->pipe_src_w;
195 height = crtc_state->pipe_src_h;
196 x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
197 y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
198 break;
199
200 case DRM_MODE_SCALE_ASPECT:
201 /* Scale but preserve the aspect ratio */
202 {
203 u32 scaled_width = adjusted_mode->crtc_hdisplay
204 * crtc_state->pipe_src_h;
205 u32 scaled_height = crtc_state->pipe_src_w
206 * adjusted_mode->crtc_vdisplay;
207 if (scaled_width > scaled_height) { /* pillar */
208 width = scaled_height / crtc_state->pipe_src_h;
209 if (width & 1)
210 width++;
211 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
212 y = 0;
213 height = adjusted_mode->crtc_vdisplay;
214 } else if (scaled_width < scaled_height) { /* letter */
215 height = scaled_width / crtc_state->pipe_src_w;
216 if (height & 1)
217 height++;
218 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
219 x = 0;
220 width = adjusted_mode->crtc_hdisplay;
221 } else {
222 x = y = 0;
223 width = adjusted_mode->crtc_hdisplay;
224 height = adjusted_mode->crtc_vdisplay;
225 }
226 }
227 break;
228
229 case DRM_MODE_SCALE_NONE:
230 WARN_ON(adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w);
231 WARN_ON(adjusted_mode->crtc_vdisplay != crtc_state->pipe_src_h);
232 fallthrough;
233 case DRM_MODE_SCALE_FULLSCREEN:
234 x = y = 0;
235 width = adjusted_mode->crtc_hdisplay;
236 height = adjusted_mode->crtc_vdisplay;
237 break;
238
239 default:
240 MISSING_CASE(conn_state->scaling_mode);
241 return -EINVAL;
242 }
243
244 drm_rect_init(&crtc_state->pch_pfit.dst,
245 x, y, width, height);
246 crtc_state->pch_pfit.enabled = true;
247
248 return 0;
249}
250
251static void
252centre_horizontally(struct drm_display_mode *adjusted_mode,
253 int width)
254{
255 u32 border, sync_pos, blank_width, sync_width;
256
257 /* keep the hsync and hblank widths constant */
258 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
259 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
260 sync_pos = (blank_width - sync_width + 1) / 2;
261
262 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
263 border += border & 1; /* make the border even */
264
265 adjusted_mode->crtc_hdisplay = width;
266 adjusted_mode->crtc_hblank_start = width + border;
267 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
268
269 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
270 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
271}
272
273static void
274centre_vertically(struct drm_display_mode *adjusted_mode,
275 int height)
276{
277 u32 border, sync_pos, blank_width, sync_width;
278
279 /* keep the vsync and vblank widths constant */
280 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
281 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
282 sync_pos = (blank_width - sync_width + 1) / 2;
283
284 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
285
286 adjusted_mode->crtc_vdisplay = height;
287 adjusted_mode->crtc_vblank_start = height + border;
288 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
289
290 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
291 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
292}
293
294static u32 panel_fitter_scaling(u32 source, u32 target)
295{
296 /*
297 * Floating point operation is not supported. So the FACTOR
298 * is defined, which can avoid the floating point computation
299 * when calculating the panel ratio.
300 */
301#define ACCURACY 12
302#define FACTOR (1 << ACCURACY)
303 u32 ratio = source * FACTOR / target;
304 return (FACTOR * ratio + FACTOR/2) / FACTOR;
305}
306
307static void i965_scale_aspect(struct intel_crtc_state *crtc_state,
308 u32 *pfit_control)
309{
310 const struct drm_display_mode *adjusted_mode =
311 &crtc_state->hw.adjusted_mode;
312 u32 scaled_width = adjusted_mode->crtc_hdisplay *
313 crtc_state->pipe_src_h;
314 u32 scaled_height = crtc_state->pipe_src_w *
315 adjusted_mode->crtc_vdisplay;
316
317 /* 965+ is easy, it does everything in hw */
318 if (scaled_width > scaled_height)
319 *pfit_control |= PFIT_ENABLE |
320 PFIT_SCALING_PILLAR;
321 else if (scaled_width < scaled_height)
322 *pfit_control |= PFIT_ENABLE |
323 PFIT_SCALING_LETTER;
324 else if (adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w)
325 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
326}
327
328static void i9xx_scale_aspect(struct intel_crtc_state *crtc_state,
329 u32 *pfit_control, u32 *pfit_pgm_ratios,
330 u32 *border)
331{
332 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
333 u32 scaled_width = adjusted_mode->crtc_hdisplay *
334 crtc_state->pipe_src_h;
335 u32 scaled_height = crtc_state->pipe_src_w *
336 adjusted_mode->crtc_vdisplay;
337 u32 bits;
338
339 /*
340 * For earlier chips we have to calculate the scaling
341 * ratio by hand and program it into the
342 * PFIT_PGM_RATIO register
343 */
344 if (scaled_width > scaled_height) { /* pillar */
345 centre_horizontally(adjusted_mode,
346 scaled_height /
347 crtc_state->pipe_src_h);
348
349 *border = LVDS_BORDER_ENABLE;
350 if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay) {
351 bits = panel_fitter_scaling(crtc_state->pipe_src_h,
352 adjusted_mode->crtc_vdisplay);
353
354 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
355 bits << PFIT_VERT_SCALE_SHIFT);
356 *pfit_control |= (PFIT_ENABLE |
357 VERT_INTERP_BILINEAR |
358 HORIZ_INTERP_BILINEAR);
359 }
360 } else if (scaled_width < scaled_height) { /* letter */
361 centre_vertically(adjusted_mode,
362 scaled_width /
363 crtc_state->pipe_src_w);
364
365 *border = LVDS_BORDER_ENABLE;
366 if (crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) {
367 bits = panel_fitter_scaling(crtc_state->pipe_src_w,
368 adjusted_mode->crtc_hdisplay);
369
370 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
371 bits << PFIT_VERT_SCALE_SHIFT);
372 *pfit_control |= (PFIT_ENABLE |
373 VERT_INTERP_BILINEAR |
374 HORIZ_INTERP_BILINEAR);
375 }
376 } else {
377 /* Aspects match, Let hw scale both directions */
378 *pfit_control |= (PFIT_ENABLE |
379 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
380 VERT_INTERP_BILINEAR |
381 HORIZ_INTERP_BILINEAR);
382 }
383}
384
385int intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
386 const struct drm_connector_state *conn_state)
387{
388 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
389 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
390 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
391 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
392
393 /* Native modes don't need fitting */
394 if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w &&
395 adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h)
396 goto out;
397
398 switch (conn_state->scaling_mode) {
399 case DRM_MODE_SCALE_CENTER:
400 /*
401 * For centered modes, we have to calculate border widths &
402 * heights and modify the values programmed into the CRTC.
403 */
404 centre_horizontally(adjusted_mode, crtc_state->pipe_src_w);
405 centre_vertically(adjusted_mode, crtc_state->pipe_src_h);
406 border = LVDS_BORDER_ENABLE;
407 break;
408 case DRM_MODE_SCALE_ASPECT:
409 /* Scale but preserve the aspect ratio */
410 if (INTEL_GEN(dev_priv) >= 4)
411 i965_scale_aspect(crtc_state, &pfit_control);
412 else
413 i9xx_scale_aspect(crtc_state, &pfit_control,
414 &pfit_pgm_ratios, &border);
415 break;
416 case DRM_MODE_SCALE_FULLSCREEN:
417 /*
418 * Full scaling, even if it changes the aspect ratio.
419 * Fortunately this is all done for us in hw.
420 */
421 if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay ||
422 crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) {
423 pfit_control |= PFIT_ENABLE;
424 if (INTEL_GEN(dev_priv) >= 4)
425 pfit_control |= PFIT_SCALING_AUTO;
426 else
427 pfit_control |= (VERT_AUTO_SCALE |
428 VERT_INTERP_BILINEAR |
429 HORIZ_AUTO_SCALE |
430 HORIZ_INTERP_BILINEAR);
431 }
432 break;
433 default:
434 MISSING_CASE(conn_state->scaling_mode);
435 return -EINVAL;
436 }
437
438 /* 965+ wants fuzzy fitting */
439 /* FIXME: handle multiple panels by failing gracefully */
440 if (INTEL_GEN(dev_priv) >= 4)
441 pfit_control |= PFIT_PIPE(crtc->pipe) | PFIT_FILTER_FUZZY;
442
443out:
444 if ((pfit_control & PFIT_ENABLE) == 0) {
445 pfit_control = 0;
446 pfit_pgm_ratios = 0;
447 }
448
449 /* Make sure pre-965 set dither correctly for 18bpp panels. */
450 if (INTEL_GEN(dev_priv) < 4 && crtc_state->pipe_bpp == 18)
451 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
452
453 crtc_state->gmch_pfit.control = pfit_control;
454 crtc_state->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
455 crtc_state->gmch_pfit.lvds_border_bits = border;
456
457 return 0;
458}
459
460/**
461 * scale - scale values from one range to another
462 * @source_val: value in range [@source_min..@source_max]
463 * @source_min: minimum legal value for @source_val
464 * @source_max: maximum legal value for @source_val
465 * @target_min: corresponding target value for @source_min
466 * @target_max: corresponding target value for @source_max
467 *
468 * Return @source_val in range [@source_min..@source_max] scaled to range
469 * [@target_min..@target_max].
470 */
471static u32 scale(u32 source_val,
472 u32 source_min, u32 source_max,
473 u32 target_min, u32 target_max)
474{
475 u64 target_val;
476
477 WARN_ON(source_min > source_max);
478 WARN_ON(target_min > target_max);
479
480 /* defensive */
481 source_val = clamp(source_val, source_min, source_max);
482
483 /* avoid overflows */
484 target_val = mul_u32_u32(source_val - source_min,
485 target_max - target_min);
486 target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min);
487 target_val += target_min;
488
489 return target_val;
490}
491
492/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
493 * to [hw_min..hw_max]. */
494static u32 clamp_user_to_hw(struct intel_connector *connector,
495 u32 user_level, u32 user_max)
496{
497 struct intel_panel *panel = &connector->panel;
498 u32 hw_level;
499
500 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
501 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
502
503 return hw_level;
504}
505
506/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
507static u32 scale_hw_to_user(struct intel_connector *connector,
508 u32 hw_level, u32 user_max)
509{
510 struct intel_panel *panel = &connector->panel;
511
512 return scale(hw_level, panel->backlight.min, panel->backlight.max,
513 0, user_max);
514}
515
516static u32 intel_panel_compute_brightness(struct intel_connector *connector,
517 u32 val)
518{
519 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
520 struct intel_panel *panel = &connector->panel;
521
522 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
523
524 if (dev_priv->params.invert_brightness < 0)
525 return val;
526
527 if (dev_priv->params.invert_brightness > 0 ||
528 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
529 return panel->backlight.max - val + panel->backlight.min;
530 }
531
532 return val;
533}
534
535static u32 lpt_get_backlight(struct intel_connector *connector)
536{
537 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
538
539 return intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
540}
541
542static u32 pch_get_backlight(struct intel_connector *connector)
543{
544 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
545
546 return intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
547}
548
549static u32 i9xx_get_backlight(struct intel_connector *connector)
550{
551 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
552 struct intel_panel *panel = &connector->panel;
553 u32 val;
554
555 val = intel_de_read(dev_priv, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
556 if (INTEL_GEN(dev_priv) < 4)
557 val >>= 1;
558
559 if (panel->backlight.combination_mode) {
560 u8 lbpc;
561
562 pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc);
563 val *= lbpc;
564 }
565
566 return val;
567}
568
569static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
570{
571 if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B))
572 return 0;
573
574 return intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
575}
576
577static u32 vlv_get_backlight(struct intel_connector *connector)
578{
579 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
580 enum pipe pipe = intel_connector_get_pipe(connector);
581
582 return _vlv_get_backlight(dev_priv, pipe);
583}
584
585static u32 bxt_get_backlight(struct intel_connector *connector)
586{
587 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
588 struct intel_panel *panel = &connector->panel;
589
590 return intel_de_read(dev_priv,
591 BXT_BLC_PWM_DUTY(panel->backlight.controller));
592}
593
594static u32 pwm_get_backlight(struct intel_connector *connector)
595{
596 struct intel_panel *panel = &connector->panel;
597 int duty_ns;
598
599 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
600 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
601}
602
603static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
604{
605 struct intel_connector *connector = to_intel_connector(conn_state->connector);
606 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
607
608 u32 val = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
609 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, val | level);
610}
611
612static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level)
613{
614 struct intel_connector *connector = to_intel_connector(conn_state->connector);
615 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
616 u32 tmp;
617
618 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
619 intel_de_write(dev_priv, BLC_PWM_CPU_CTL, tmp | level);
620}
621
622static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level)
623{
624 struct intel_connector *connector = to_intel_connector(conn_state->connector);
625 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
626 struct intel_panel *panel = &connector->panel;
627 u32 tmp, mask;
628
629 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
630
631 if (panel->backlight.combination_mode) {
632 u8 lbpc;
633
634 lbpc = level * 0xfe / panel->backlight.max + 1;
635 level /= lbpc;
636 pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
637 }
638
639 if (IS_GEN(dev_priv, 4)) {
640 mask = BACKLIGHT_DUTY_CYCLE_MASK;
641 } else {
642 level <<= 1;
643 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
644 }
645
646 tmp = intel_de_read(dev_priv, BLC_PWM_CTL) & ~mask;
647 intel_de_write(dev_priv, BLC_PWM_CTL, tmp | level);
648}
649
650static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level)
651{
652 struct intel_connector *connector = to_intel_connector(conn_state->connector);
653 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
654 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
655 u32 tmp;
656
657 tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
658 intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), tmp | level);
659}
660
661static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
662{
663 struct intel_connector *connector = to_intel_connector(conn_state->connector);
664 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
665 struct intel_panel *panel = &connector->panel;
666
667 intel_de_write(dev_priv,
668 BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
669}
670
671static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
672{
673 struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel;
674 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
675
676 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
677}
678
679static void
680intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level)
681{
682 struct intel_connector *connector = to_intel_connector(conn_state->connector);
683 struct drm_i915_private *i915 = to_i915(connector->base.dev);
684 struct intel_panel *panel = &connector->panel;
685
686 drm_dbg_kms(&i915->drm, "set backlight PWM = %d\n", level);
687
688 level = intel_panel_compute_brightness(connector, level);
689 panel->backlight.set(conn_state, level);
690}
691
692/* set backlight brightness to level in range [0..max], assuming hw min is
693 * respected.
694 */
695void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
696 u32 user_level, u32 user_max)
697{
698 struct intel_connector *connector = to_intel_connector(conn_state->connector);
699 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
700 struct intel_panel *panel = &connector->panel;
701 u32 hw_level;
702
703 /*
704 * Lack of crtc may occur during driver init because
705 * connection_mutex isn't held across the entire backlight
706 * setup + modeset readout, and the BIOS can issue the
707 * requests at any time.
708 */
709 if (!panel->backlight.present || !conn_state->crtc)
710 return;
711
712 mutex_lock(&dev_priv->backlight_lock);
713
714 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
715
716 hw_level = clamp_user_to_hw(connector, user_level, user_max);
717 panel->backlight.level = hw_level;
718
719 if (panel->backlight.device)
720 panel->backlight.device->props.brightness =
721 scale_hw_to_user(connector,
722 panel->backlight.level,
723 panel->backlight.device->props.max_brightness);
724
725 if (panel->backlight.enabled)
726 intel_panel_actually_set_backlight(conn_state, hw_level);
727
728 mutex_unlock(&dev_priv->backlight_lock);
729}
730
731static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state)
732{
733 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
734 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
735 u32 tmp;
736
737 intel_panel_actually_set_backlight(old_conn_state, 0);
738
739 /*
740 * Although we don't support or enable CPU PWM with LPT/SPT based
741 * systems, it may have been enabled prior to loading the
742 * driver. Disable to avoid warnings on LCPLL disable.
743 *
744 * This needs rework if we need to add support for CPU PWM on PCH split
745 * platforms.
746 */
747 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
748 if (tmp & BLM_PWM_ENABLE) {
749 drm_dbg_kms(&dev_priv->drm,
750 "cpu backlight was enabled, disabling\n");
751 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2,
752 tmp & ~BLM_PWM_ENABLE);
753 }
754
755 tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
756 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
757}
758
759static void pch_disable_backlight(const struct drm_connector_state *old_conn_state)
760{
761 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
762 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
763 u32 tmp;
764
765 intel_panel_actually_set_backlight(old_conn_state, 0);
766
767 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
768 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
769
770 tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
771 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
772}
773
774static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state)
775{
776 intel_panel_actually_set_backlight(old_conn_state, 0);
777}
778
779static void i965_disable_backlight(const struct drm_connector_state *old_conn_state)
780{
781 struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev);
782 u32 tmp;
783
784 intel_panel_actually_set_backlight(old_conn_state, 0);
785
786 tmp = intel_de_read(dev_priv, BLC_PWM_CTL2);
787 intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
788}
789
790static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state)
791{
792 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
793 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
794 enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;
795 u32 tmp;
796
797 intel_panel_actually_set_backlight(old_conn_state, 0);
798
799 tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
800 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe),
801 tmp & ~BLM_PWM_ENABLE);
802}
803
804static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state)
805{
806 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
807 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
808 struct intel_panel *panel = &connector->panel;
809 u32 tmp, val;
810
811 intel_panel_actually_set_backlight(old_conn_state, 0);
812
813 tmp = intel_de_read(dev_priv,
814 BXT_BLC_PWM_CTL(panel->backlight.controller));
815 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
816 tmp & ~BXT_BLC_PWM_ENABLE);
817
818 if (panel->backlight.controller == 1) {
819 val = intel_de_read(dev_priv, UTIL_PIN_CTL);
820 val &= ~UTIL_PIN_ENABLE;
821 intel_de_write(dev_priv, UTIL_PIN_CTL, val);
822 }
823}
824
825static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state)
826{
827 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
828 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
829 struct intel_panel *panel = &connector->panel;
830 u32 tmp;
831
832 intel_panel_actually_set_backlight(old_conn_state, 0);
833
834 tmp = intel_de_read(dev_priv,
835 BXT_BLC_PWM_CTL(panel->backlight.controller));
836 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
837 tmp & ~BXT_BLC_PWM_ENABLE);
838}
839
840static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state)
841{
842 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
843 struct intel_panel *panel = &connector->panel;
844
845 /* Disable the backlight */
846 intel_panel_actually_set_backlight(old_conn_state, 0);
847 usleep_range(2000, 3000);
848 pwm_disable(panel->backlight.pwm);
849}
850
851void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state)
852{
853 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
854 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
855 struct intel_panel *panel = &connector->panel;
856
857 if (!panel->backlight.present)
858 return;
859
860 /*
861 * Do not disable backlight on the vga_switcheroo path. When switching
862 * away from i915, the other client may depend on i915 to handle the
863 * backlight. This will leave the backlight on unnecessarily when
864 * another client is not activated.
865 */
866 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
867 drm_dbg_kms(&dev_priv->drm,
868 "Skipping backlight disable on vga switch\n");
869 return;
870 }
871
872 mutex_lock(&dev_priv->backlight_lock);
873
874 if (panel->backlight.device)
875 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
876 panel->backlight.enabled = false;
877 panel->backlight.disable(old_conn_state);
878
879 mutex_unlock(&dev_priv->backlight_lock);
880}
881
882static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
883 const struct drm_connector_state *conn_state)
884{
885 struct intel_connector *connector = to_intel_connector(conn_state->connector);
886 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
887 struct intel_panel *panel = &connector->panel;
888 u32 pch_ctl1, pch_ctl2, schicken;
889
890 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
891 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
892 drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n");
893 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
894 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
895 }
896
897 if (HAS_PCH_LPT(dev_priv)) {
898 schicken = intel_de_read(dev_priv, SOUTH_CHICKEN2);
899 if (panel->backlight.alternate_pwm_increment)
900 schicken |= LPT_PWM_GRANULARITY;
901 else
902 schicken &= ~LPT_PWM_GRANULARITY;
903 intel_de_write(dev_priv, SOUTH_CHICKEN2, schicken);
904 } else {
905 schicken = intel_de_read(dev_priv, SOUTH_CHICKEN1);
906 if (panel->backlight.alternate_pwm_increment)
907 schicken |= SPT_PWM_GRANULARITY;
908 else
909 schicken &= ~SPT_PWM_GRANULARITY;
910 intel_de_write(dev_priv, SOUTH_CHICKEN1, schicken);
911 }
912
913 pch_ctl2 = panel->backlight.max << 16;
914 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2);
915
916 pch_ctl1 = 0;
917 if (panel->backlight.active_low_pwm)
918 pch_ctl1 |= BLM_PCH_POLARITY;
919
920 /* After LPT, override is the default. */
921 if (HAS_PCH_LPT(dev_priv))
922 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
923
924 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
925 intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1);
926 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1,
927 pch_ctl1 | BLM_PCH_PWM_ENABLE);
928
929 /* This won't stick until the above enable. */
930 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
931}
932
933static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
934 const struct drm_connector_state *conn_state)
935{
936 struct intel_connector *connector = to_intel_connector(conn_state->connector);
937 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
938 struct intel_panel *panel = &connector->panel;
939 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
940 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
941
942 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
943 if (cpu_ctl2 & BLM_PWM_ENABLE) {
944 drm_dbg_kms(&dev_priv->drm, "cpu backlight already enabled\n");
945 cpu_ctl2 &= ~BLM_PWM_ENABLE;
946 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2);
947 }
948
949 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
950 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
951 drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n");
952 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
953 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
954 }
955
956 if (cpu_transcoder == TRANSCODER_EDP)
957 cpu_ctl2 = BLM_TRANSCODER_EDP;
958 else
959 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
960 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2);
961 intel_de_posting_read(dev_priv, BLC_PWM_CPU_CTL2);
962 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
963
964 /* This won't stick until the above enable. */
965 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
966
967 pch_ctl2 = panel->backlight.max << 16;
968 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2);
969
970 pch_ctl1 = 0;
971 if (panel->backlight.active_low_pwm)
972 pch_ctl1 |= BLM_PCH_POLARITY;
973
974 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
975 intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1);
976 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1,
977 pch_ctl1 | BLM_PCH_PWM_ENABLE);
978}
979
980static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
981 const struct drm_connector_state *conn_state)
982{
983 struct intel_connector *connector = to_intel_connector(conn_state->connector);
984 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
985 struct intel_panel *panel = &connector->panel;
986 u32 ctl, freq;
987
988 ctl = intel_de_read(dev_priv, BLC_PWM_CTL);
989 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
990 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
991 intel_de_write(dev_priv, BLC_PWM_CTL, 0);
992 }
993
994 freq = panel->backlight.max;
995 if (panel->backlight.combination_mode)
996 freq /= 0xff;
997
998 ctl = freq << 17;
999 if (panel->backlight.combination_mode)
1000 ctl |= BLM_LEGACY_MODE;
1001 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
1002 ctl |= BLM_POLARITY_PNV;
1003
1004 intel_de_write(dev_priv, BLC_PWM_CTL, ctl);
1005 intel_de_posting_read(dev_priv, BLC_PWM_CTL);
1006
1007 /* XXX: combine this into above write? */
1008 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1009
1010 /*
1011 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
1012 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
1013 * that has backlight.
1014 */
1015 if (IS_GEN(dev_priv, 2))
1016 intel_de_write(dev_priv, BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
1017}
1018
1019static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
1020 const struct drm_connector_state *conn_state)
1021{
1022 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1023 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1024 struct intel_panel *panel = &connector->panel;
1025 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
1026 u32 ctl, ctl2, freq;
1027
1028 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2);
1029 if (ctl2 & BLM_PWM_ENABLE) {
1030 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1031 ctl2 &= ~BLM_PWM_ENABLE;
1032 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2);
1033 }
1034
1035 freq = panel->backlight.max;
1036 if (panel->backlight.combination_mode)
1037 freq /= 0xff;
1038
1039 ctl = freq << 16;
1040 intel_de_write(dev_priv, BLC_PWM_CTL, ctl);
1041
1042 ctl2 = BLM_PIPE(pipe);
1043 if (panel->backlight.combination_mode)
1044 ctl2 |= BLM_COMBINATION_MODE;
1045 if (panel->backlight.active_low_pwm)
1046 ctl2 |= BLM_POLARITY_I965;
1047 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2);
1048 intel_de_posting_read(dev_priv, BLC_PWM_CTL2);
1049 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
1050
1051 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1052}
1053
1054static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
1055 const struct drm_connector_state *conn_state)
1056{
1057 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1058 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1059 struct intel_panel *panel = &connector->panel;
1060 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1061 u32 ctl, ctl2;
1062
1063 ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
1064 if (ctl2 & BLM_PWM_ENABLE) {
1065 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1066 ctl2 &= ~BLM_PWM_ENABLE;
1067 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2);
1068 }
1069
1070 ctl = panel->backlight.max << 16;
1071 intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), ctl);
1072
1073 /* XXX: combine this into above write? */
1074 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1075
1076 ctl2 = 0;
1077 if (panel->backlight.active_low_pwm)
1078 ctl2 |= BLM_POLARITY_I965;
1079 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2);
1080 intel_de_posting_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
1081 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe),
1082 ctl2 | BLM_PWM_ENABLE);
1083}
1084
1085static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
1086 const struct drm_connector_state *conn_state)
1087{
1088 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1089 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1090 struct intel_panel *panel = &connector->panel;
1091 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1092 u32 pwm_ctl, val;
1093
1094 /* Controller 1 uses the utility pin. */
1095 if (panel->backlight.controller == 1) {
1096 val = intel_de_read(dev_priv, UTIL_PIN_CTL);
1097 if (val & UTIL_PIN_ENABLE) {
1098 drm_dbg_kms(&dev_priv->drm,
1099 "util pin already enabled\n");
1100 val &= ~UTIL_PIN_ENABLE;
1101 intel_de_write(dev_priv, UTIL_PIN_CTL, val);
1102 }
1103
1104 val = 0;
1105 if (panel->backlight.util_pin_active_low)
1106 val |= UTIL_PIN_POLARITY;
1107 intel_de_write(dev_priv, UTIL_PIN_CTL,
1108 val | UTIL_PIN_PIPE(pipe) | UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1109 }
1110
1111 pwm_ctl = intel_de_read(dev_priv,
1112 BXT_BLC_PWM_CTL(panel->backlight.controller));
1113 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1114 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1115 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1116 intel_de_write(dev_priv,
1117 BXT_BLC_PWM_CTL(panel->backlight.controller),
1118 pwm_ctl);
1119 }
1120
1121 intel_de_write(dev_priv,
1122 BXT_BLC_PWM_FREQ(panel->backlight.controller),
1123 panel->backlight.max);
1124
1125 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1126
1127 pwm_ctl = 0;
1128 if (panel->backlight.active_low_pwm)
1129 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1130
1131 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
1132 pwm_ctl);
1133 intel_de_posting_read(dev_priv,
1134 BXT_BLC_PWM_CTL(panel->backlight.controller));
1135 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
1136 pwm_ctl | BXT_BLC_PWM_ENABLE);
1137}
1138
1139static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
1140 const struct drm_connector_state *conn_state)
1141{
1142 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1143 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1144 struct intel_panel *panel = &connector->panel;
1145 u32 pwm_ctl;
1146
1147 pwm_ctl = intel_de_read(dev_priv,
1148 BXT_BLC_PWM_CTL(panel->backlight.controller));
1149 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1150 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1151 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1152 intel_de_write(dev_priv,
1153 BXT_BLC_PWM_CTL(panel->backlight.controller),
1154 pwm_ctl);
1155 }
1156
1157 intel_de_write(dev_priv,
1158 BXT_BLC_PWM_FREQ(panel->backlight.controller),
1159 panel->backlight.max);
1160
1161 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1162
1163 pwm_ctl = 0;
1164 if (panel->backlight.active_low_pwm)
1165 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1166
1167 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
1168 pwm_ctl);
1169 intel_de_posting_read(dev_priv,
1170 BXT_BLC_PWM_CTL(panel->backlight.controller));
1171 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
1172 pwm_ctl | BXT_BLC_PWM_ENABLE);
1173}
1174
1175static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
1176 const struct drm_connector_state *conn_state)
1177{
1178 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1179 struct intel_panel *panel = &connector->panel;
1180
1181 pwm_enable(panel->backlight.pwm);
1182 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1183}
1184
1185static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
1186 const struct drm_connector_state *conn_state)
1187{
1188 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1189 struct intel_panel *panel = &connector->panel;
1190
1191 WARN_ON(panel->backlight.max == 0);
1192
1193 if (panel->backlight.level <= panel->backlight.min) {
1194 panel->backlight.level = panel->backlight.max;
1195 if (panel->backlight.device)
1196 panel->backlight.device->props.brightness =
1197 scale_hw_to_user(connector,
1198 panel->backlight.level,
1199 panel->backlight.device->props.max_brightness);
1200 }
1201
1202 panel->backlight.enable(crtc_state, conn_state);
1203 panel->backlight.enabled = true;
1204 if (panel->backlight.device)
1205 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1206}
1207
1208void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
1209 const struct drm_connector_state *conn_state)
1210{
1211 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1212 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1213 struct intel_panel *panel = &connector->panel;
1214 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1215
1216 if (!panel->backlight.present)
1217 return;
1218
1219 drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(pipe));
1220
1221 mutex_lock(&dev_priv->backlight_lock);
1222
1223 __intel_panel_enable_backlight(crtc_state, conn_state);
1224
1225 mutex_unlock(&dev_priv->backlight_lock);
1226}
1227
1228#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1229static u32 intel_panel_get_backlight(struct intel_connector *connector)
1230{
1231 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1232 struct intel_panel *panel = &connector->panel;
1233 u32 val = 0;
1234
1235 mutex_lock(&dev_priv->backlight_lock);
1236
1237 if (panel->backlight.enabled) {
1238 val = panel->backlight.get(connector);
1239 val = intel_panel_compute_brightness(connector, val);
1240 }
1241
1242 mutex_unlock(&dev_priv->backlight_lock);
1243
1244 drm_dbg_kms(&dev_priv->drm, "get backlight PWM = %d\n", val);
1245 return val;
1246}
1247
1248/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
1249static u32 scale_user_to_hw(struct intel_connector *connector,
1250 u32 user_level, u32 user_max)
1251{
1252 struct intel_panel *panel = &connector->panel;
1253
1254 return scale(user_level, 0, user_max,
1255 panel->backlight.min, panel->backlight.max);
1256}
1257
1258/* set backlight brightness to level in range [0..max], scaling wrt hw min */
1259static void intel_panel_set_backlight(const struct drm_connector_state *conn_state,
1260 u32 user_level, u32 user_max)
1261{
1262 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1263 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1264 struct intel_panel *panel = &connector->panel;
1265 u32 hw_level;
1266
1267 if (!panel->backlight.present)
1268 return;
1269
1270 mutex_lock(&dev_priv->backlight_lock);
1271
1272 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
1273
1274 hw_level = scale_user_to_hw(connector, user_level, user_max);
1275 panel->backlight.level = hw_level;
1276
1277 if (panel->backlight.enabled)
1278 intel_panel_actually_set_backlight(conn_state, hw_level);
1279
1280 mutex_unlock(&dev_priv->backlight_lock);
1281}
1282
1283static int intel_backlight_device_update_status(struct backlight_device *bd)
1284{
1285 struct intel_connector *connector = bl_get_data(bd);
1286 struct intel_panel *panel = &connector->panel;
1287 struct drm_device *dev = connector->base.dev;
1288
1289 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1290 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1291 bd->props.brightness, bd->props.max_brightness);
1292 intel_panel_set_backlight(connector->base.state, bd->props.brightness,
1293 bd->props.max_brightness);
1294
1295 /*
1296 * Allow flipping bl_power as a sub-state of enabled. Sadly the
1297 * backlight class device does not make it easy to to differentiate
1298 * between callbacks for brightness and bl_power, so our backlight_power
1299 * callback needs to take this into account.
1300 */
1301 if (panel->backlight.enabled) {
1302 if (panel->backlight.power) {
1303 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1304 bd->props.brightness != 0;
1305 panel->backlight.power(connector, enable);
1306 }
1307 } else {
1308 bd->props.power = FB_BLANK_POWERDOWN;
1309 }
1310
1311 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1312 return 0;
1313}
1314
1315static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1316{
1317 struct intel_connector *connector = bl_get_data(bd);
1318 struct drm_device *dev = connector->base.dev;
1319 struct drm_i915_private *dev_priv = to_i915(dev);
1320 intel_wakeref_t wakeref;
1321 int ret = 0;
1322
1323 with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) {
1324 u32 hw_level;
1325
1326 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1327
1328 hw_level = intel_panel_get_backlight(connector);
1329 ret = scale_hw_to_user(connector,
1330 hw_level, bd->props.max_brightness);
1331
1332 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1333 }
1334
1335 return ret;
1336}
1337
1338static const struct backlight_ops intel_backlight_device_ops = {
1339 .update_status = intel_backlight_device_update_status,
1340 .get_brightness = intel_backlight_device_get_brightness,
1341};
1342
1343int intel_backlight_device_register(struct intel_connector *connector)
1344{
1345 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1346 struct intel_panel *panel = &connector->panel;
1347 struct backlight_properties props;
1348
1349 if (WARN_ON(panel->backlight.device))
1350 return -ENODEV;
1351
1352 if (!panel->backlight.present)
1353 return 0;
1354
1355 WARN_ON(panel->backlight.max == 0);
1356
1357 memset(&props, 0, sizeof(props));
1358 props.type = BACKLIGHT_RAW;
1359
1360 /*
1361 * Note: Everything should work even if the backlight device max
1362 * presented to the userspace is arbitrarily chosen.
1363 */
1364 props.max_brightness = panel->backlight.max;
1365 props.brightness = scale_hw_to_user(connector,
1366 panel->backlight.level,
1367 props.max_brightness);
1368
1369 if (panel->backlight.enabled)
1370 props.power = FB_BLANK_UNBLANK;
1371 else
1372 props.power = FB_BLANK_POWERDOWN;
1373
1374 /*
1375 * Note: using the same name independent of the connector prevents
1376 * registration of multiple backlight devices in the driver.
1377 */
1378 panel->backlight.device =
1379 backlight_device_register("intel_backlight",
1380 connector->base.kdev,
1381 connector,
1382 &intel_backlight_device_ops, &props);
1383
1384 if (IS_ERR(panel->backlight.device)) {
1385 drm_err(&i915->drm, "Failed to register backlight: %ld\n",
1386 PTR_ERR(panel->backlight.device));
1387 panel->backlight.device = NULL;
1388 return -ENODEV;
1389 }
1390
1391 drm_dbg_kms(&i915->drm,
1392 "Connector %s backlight sysfs interface registered\n",
1393 connector->base.name);
1394
1395 return 0;
1396}
1397
1398void intel_backlight_device_unregister(struct intel_connector *connector)
1399{
1400 struct intel_panel *panel = &connector->panel;
1401
1402 if (panel->backlight.device) {
1403 backlight_device_unregister(panel->backlight.device);
1404 panel->backlight.device = NULL;
1405 }
1406}
1407#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1408
1409/*
1410 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz.
1411 * PWM increment = 1
1412 */
1413static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1414{
1415 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1416
1417 return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq),
1418 pwm_freq_hz);
1419}
1420
1421/*
1422 * BXT: PWM clock frequency = 19.2 MHz.
1423 */
1424static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1425{
1426 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
1427}
1428
1429/*
1430 * SPT: This value represents the period of the PWM stream in clock periods
1431 * multiplied by 16 (default increment) or 128 (alternate increment selected in
1432 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1433 */
1434static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1435{
1436 struct intel_panel *panel = &connector->panel;
1437 u32 mul;
1438
1439 if (panel->backlight.alternate_pwm_increment)
1440 mul = 128;
1441 else
1442 mul = 16;
1443
1444 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
1445}
1446
1447/*
1448 * LPT: This value represents the period of the PWM stream in clock periods
1449 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1450 * LPT SOUTH_CHICKEN2 register bit 5).
1451 */
1452static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1453{
1454 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1455 struct intel_panel *panel = &connector->panel;
1456 u32 mul, clock;
1457
1458 if (panel->backlight.alternate_pwm_increment)
1459 mul = 16;
1460 else
1461 mul = 128;
1462
1463 if (HAS_PCH_LPT_H(dev_priv))
1464 clock = MHz(135); /* LPT:H */
1465 else
1466 clock = MHz(24); /* LPT:LP */
1467
1468 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1469}
1470
1471/*
1472 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1473 * display raw clocks multiplied by 128.
1474 */
1475static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1476{
1477 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1478
1479 return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq),
1480 pwm_freq_hz * 128);
1481}
1482
1483/*
1484 * Gen2: This field determines the number of time base events (display core
1485 * clock frequency/32) in total for a complete cycle of modulated backlight
1486 * control.
1487 *
1488 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1489 * divided by 32.
1490 */
1491static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1492{
1493 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1494 int clock;
1495
1496 if (IS_PINEVIEW(dev_priv))
1497 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq);
1498 else
1499 clock = KHz(dev_priv->cdclk.hw.cdclk);
1500
1501 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
1502}
1503
1504/*
1505 * Gen4: This value represents the period of the PWM stream in display core
1506 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
1507 *
1508 */
1509static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1510{
1511 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1512 int clock;
1513
1514 if (IS_G4X(dev_priv))
1515 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq);
1516 else
1517 clock = KHz(dev_priv->cdclk.hw.cdclk);
1518
1519 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
1520}
1521
1522/*
1523 * VLV: This value represents the period of the PWM stream in display core
1524 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1525 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1526 */
1527static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1528{
1529 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1530 int mul, clock;
1531
1532 if ((intel_de_read(dev_priv, CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1533 if (IS_CHERRYVIEW(dev_priv))
1534 clock = KHz(19200);
1535 else
1536 clock = MHz(25);
1537 mul = 16;
1538 } else {
1539 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq);
1540 mul = 128;
1541 }
1542
1543 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1544}
1545
1546static u32 get_backlight_max_vbt(struct intel_connector *connector)
1547{
1548 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1549 struct intel_panel *panel = &connector->panel;
1550 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1551 u32 pwm;
1552
1553 if (!panel->backlight.hz_to_pwm) {
1554 drm_dbg_kms(&dev_priv->drm,
1555 "backlight frequency conversion not supported\n");
1556 return 0;
1557 }
1558
1559 if (pwm_freq_hz) {
1560 drm_dbg_kms(&dev_priv->drm,
1561 "VBT defined backlight frequency %u Hz\n",
1562 pwm_freq_hz);
1563 } else {
1564 pwm_freq_hz = 200;
1565 drm_dbg_kms(&dev_priv->drm,
1566 "default backlight frequency %u Hz\n",
1567 pwm_freq_hz);
1568 }
1569
1570 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
1571 if (!pwm) {
1572 drm_dbg_kms(&dev_priv->drm,
1573 "backlight frequency conversion failed\n");
1574 return 0;
1575 }
1576
1577 return pwm;
1578}
1579
1580/*
1581 * Note: The setup hooks can't assume pipe is set!
1582 */
1583static u32 get_backlight_min_vbt(struct intel_connector *connector)
1584{
1585 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1586 struct intel_panel *panel = &connector->panel;
1587 int min;
1588
1589 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
1590
1591 /*
1592 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1593 * to problems. There are such machines out there. Either our
1594 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1595 * against this by letting the minimum be at most (arbitrarily chosen)
1596 * 25% of the max.
1597 */
1598 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1599 if (min != dev_priv->vbt.backlight.min_brightness) {
1600 drm_dbg_kms(&dev_priv->drm,
1601 "clamping VBT min backlight %d/255 to %d/255\n",
1602 dev_priv->vbt.backlight.min_brightness, min);
1603 }
1604
1605 /* vbt value is a coefficient in range [0..255] */
1606 return scale(min, 0, 255, 0, panel->backlight.max);
1607}
1608
1609static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1610{
1611 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1612 struct intel_panel *panel = &connector->panel;
1613 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1614 bool alt, cpu_mode;
1615
1616 if (HAS_PCH_LPT(dev_priv))
1617 alt = intel_de_read(dev_priv, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
1618 else
1619 alt = intel_de_read(dev_priv, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
1620 panel->backlight.alternate_pwm_increment = alt;
1621
1622 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
1623 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1624
1625 pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2);
1626 panel->backlight.max = pch_ctl2 >> 16;
1627
1628 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
1629
1630 if (!panel->backlight.max)
1631 panel->backlight.max = get_backlight_max_vbt(connector);
1632
1633 if (!panel->backlight.max)
1634 return -ENODEV;
1635
1636 panel->backlight.min = get_backlight_min_vbt(connector);
1637
1638 panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
1639
1640 cpu_mode = panel->backlight.enabled && HAS_PCH_LPT(dev_priv) &&
1641 !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) &&
1642 (cpu_ctl2 & BLM_PWM_ENABLE);
1643 if (cpu_mode)
1644 val = pch_get_backlight(connector);
1645 else
1646 val = lpt_get_backlight(connector);
1647 val = intel_panel_compute_brightness(connector, val);
1648 panel->backlight.level = clamp(val, panel->backlight.min,
1649 panel->backlight.max);
1650
1651 if (cpu_mode) {
1652 drm_dbg_kms(&dev_priv->drm,
1653 "CPU backlight register was enabled, switching to PCH override\n");
1654
1655 /* Write converted CPU PWM value to PCH override register */
1656 lpt_set_backlight(connector->base.state, panel->backlight.level);
1657 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1,
1658 pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE);
1659
1660 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2,
1661 cpu_ctl2 & ~BLM_PWM_ENABLE);
1662 }
1663
1664 return 0;
1665}
1666
1667static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1668{
1669 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1670 struct intel_panel *panel = &connector->panel;
1671 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1672
1673 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
1674 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1675
1676 pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2);
1677 panel->backlight.max = pch_ctl2 >> 16;
1678
1679 if (!panel->backlight.max)
1680 panel->backlight.max = get_backlight_max_vbt(connector);
1681
1682 if (!panel->backlight.max)
1683 return -ENODEV;
1684
1685 panel->backlight.min = get_backlight_min_vbt(connector);
1686
1687 val = pch_get_backlight(connector);
1688 val = intel_panel_compute_brightness(connector, val);
1689 panel->backlight.level = clamp(val, panel->backlight.min,
1690 panel->backlight.max);
1691
1692 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
1693 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1694 (pch_ctl1 & BLM_PCH_PWM_ENABLE);
1695
1696 return 0;
1697}
1698
1699static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1700{
1701 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1702 struct intel_panel *panel = &connector->panel;
1703 u32 ctl, val;
1704
1705 ctl = intel_de_read(dev_priv, BLC_PWM_CTL);
1706
1707 if (IS_GEN(dev_priv, 2) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
1708 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1709
1710 if (IS_PINEVIEW(dev_priv))
1711 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1712
1713 panel->backlight.max = ctl >> 17;
1714
1715 if (!panel->backlight.max) {
1716 panel->backlight.max = get_backlight_max_vbt(connector);
1717 panel->backlight.max >>= 1;
1718 }
1719
1720 if (!panel->backlight.max)
1721 return -ENODEV;
1722
1723 if (panel->backlight.combination_mode)
1724 panel->backlight.max *= 0xff;
1725
1726 panel->backlight.min = get_backlight_min_vbt(connector);
1727
1728 val = i9xx_get_backlight(connector);
1729 val = intel_panel_compute_brightness(connector, val);
1730 panel->backlight.level = clamp(val, panel->backlight.min,
1731 panel->backlight.max);
1732
1733 panel->backlight.enabled = val != 0;
1734
1735 return 0;
1736}
1737
1738static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1739{
1740 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1741 struct intel_panel *panel = &connector->panel;
1742 u32 ctl, ctl2, val;
1743
1744 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2);
1745 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1746 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1747
1748 ctl = intel_de_read(dev_priv, BLC_PWM_CTL);
1749 panel->backlight.max = ctl >> 16;
1750
1751 if (!panel->backlight.max)
1752 panel->backlight.max = get_backlight_max_vbt(connector);
1753
1754 if (!panel->backlight.max)
1755 return -ENODEV;
1756
1757 if (panel->backlight.combination_mode)
1758 panel->backlight.max *= 0xff;
1759
1760 panel->backlight.min = get_backlight_min_vbt(connector);
1761
1762 val = i9xx_get_backlight(connector);
1763 val = intel_panel_compute_brightness(connector, val);
1764 panel->backlight.level = clamp(val, panel->backlight.min,
1765 panel->backlight.max);
1766
1767 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1768
1769 return 0;
1770}
1771
1772static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1773{
1774 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1775 struct intel_panel *panel = &connector->panel;
1776 u32 ctl, ctl2, val;
1777
1778 if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B))
1779 return -ENODEV;
1780
1781 ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
1782 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1783
1784 ctl = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe));
1785 panel->backlight.max = ctl >> 16;
1786
1787 if (!panel->backlight.max)
1788 panel->backlight.max = get_backlight_max_vbt(connector);
1789
1790 if (!panel->backlight.max)
1791 return -ENODEV;
1792
1793 panel->backlight.min = get_backlight_min_vbt(connector);
1794
1795 val = _vlv_get_backlight(dev_priv, pipe);
1796 val = intel_panel_compute_brightness(connector, val);
1797 panel->backlight.level = clamp(val, panel->backlight.min,
1798 panel->backlight.max);
1799
1800 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1801
1802 return 0;
1803}
1804
1805static int
1806bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1807{
1808 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1809 struct intel_panel *panel = &connector->panel;
1810 u32 pwm_ctl, val;
1811
1812 panel->backlight.controller = dev_priv->vbt.backlight.controller;
1813
1814 pwm_ctl = intel_de_read(dev_priv,
1815 BXT_BLC_PWM_CTL(panel->backlight.controller));
1816
1817 /* Controller 1 uses the utility pin. */
1818 if (panel->backlight.controller == 1) {
1819 val = intel_de_read(dev_priv, UTIL_PIN_CTL);
1820 panel->backlight.util_pin_active_low =
1821 val & UTIL_PIN_POLARITY;
1822 }
1823
1824 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1825 panel->backlight.max =
1826 intel_de_read(dev_priv,
1827 BXT_BLC_PWM_FREQ(panel->backlight.controller));
1828
1829 if (!panel->backlight.max)
1830 panel->backlight.max = get_backlight_max_vbt(connector);
1831
1832 if (!panel->backlight.max)
1833 return -ENODEV;
1834
1835 panel->backlight.min = get_backlight_min_vbt(connector);
1836
1837 val = bxt_get_backlight(connector);
1838 val = intel_panel_compute_brightness(connector, val);
1839 panel->backlight.level = clamp(val, panel->backlight.min,
1840 panel->backlight.max);
1841
1842 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1843
1844 return 0;
1845}
1846
1847static int
1848cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
1849{
1850 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1851 struct intel_panel *panel = &connector->panel;
1852 u32 pwm_ctl, val;
1853
1854 /*
1855 * CNP has the BXT implementation of backlight, but with only one
1856 * controller. TODO: ICP has multiple controllers but we only use
1857 * controller 0 for now.
1858 */
1859 panel->backlight.controller = 0;
1860
1861 pwm_ctl = intel_de_read(dev_priv,
1862 BXT_BLC_PWM_CTL(panel->backlight.controller));
1863
1864 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1865 panel->backlight.max =
1866 intel_de_read(dev_priv,
1867 BXT_BLC_PWM_FREQ(panel->backlight.controller));
1868
1869 if (!panel->backlight.max)
1870 panel->backlight.max = get_backlight_max_vbt(connector);
1871
1872 if (!panel->backlight.max)
1873 return -ENODEV;
1874
1875 panel->backlight.min = get_backlight_min_vbt(connector);
1876
1877 val = bxt_get_backlight(connector);
1878 val = intel_panel_compute_brightness(connector, val);
1879 panel->backlight.level = clamp(val, panel->backlight.min,
1880 panel->backlight.max);
1881
1882 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1883
1884 return 0;
1885}
1886
1887static int pwm_setup_backlight(struct intel_connector *connector,
1888 enum pipe pipe)
1889{
1890 struct drm_device *dev = connector->base.dev;
1891 struct drm_i915_private *dev_priv = to_i915(dev);
1892 struct intel_panel *panel = &connector->panel;
1893 const char *desc;
1894 u32 level, ns;
1895 int retval;
1896
1897 /* Get the right PWM chip for DSI backlight according to VBT */
1898 if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) {
1899 panel->backlight.pwm = pwm_get(dev->dev, "pwm_pmic_backlight");
1900 desc = "PMIC";
1901 } else {
1902 panel->backlight.pwm = pwm_get(dev->dev, "pwm_soc_backlight");
1903 desc = "SoC";
1904 }
1905
1906 if (IS_ERR(panel->backlight.pwm)) {
1907 drm_err(&dev_priv->drm, "Failed to get the %s PWM chip\n",
1908 desc);
1909 panel->backlight.pwm = NULL;
1910 return -ENODEV;
1911 }
1912
1913 /*
1914 * FIXME: pwm_apply_args() should be removed when switching to
1915 * the atomic PWM API.
1916 */
1917 pwm_apply_args(panel->backlight.pwm);
1918
1919 panel->backlight.min = 0; /* 0% */
1920 panel->backlight.max = 100; /* 100% */
1921 level = intel_panel_compute_brightness(connector, 100);
1922 ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
1923
1924 retval = pwm_config(panel->backlight.pwm, ns, CRC_PMIC_PWM_PERIOD_NS);
1925 if (retval < 0) {
1926 drm_err(&dev_priv->drm, "Failed to configure the pwm chip\n");
1927 pwm_put(panel->backlight.pwm);
1928 panel->backlight.pwm = NULL;
1929 return retval;
1930 }
1931
1932 level = DIV_ROUND_UP_ULL(pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1933 CRC_PMIC_PWM_PERIOD_NS);
1934 panel->backlight.level =
1935 intel_panel_compute_brightness(connector, level);
1936 panel->backlight.enabled = panel->backlight.level != 0;
1937
1938 drm_info(&dev_priv->drm, "Using %s PWM for LCD backlight control\n",
1939 desc);
1940 return 0;
1941}
1942
1943void intel_panel_update_backlight(struct intel_atomic_state *state,
1944 struct intel_encoder *encoder,
1945 const struct intel_crtc_state *crtc_state,
1946 const struct drm_connector_state *conn_state)
1947{
1948 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1949 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1950 struct intel_panel *panel = &connector->panel;
1951
1952 if (!panel->backlight.present)
1953 return;
1954
1955 mutex_lock(&dev_priv->backlight_lock);
1956 if (!panel->backlight.enabled)
1957 __intel_panel_enable_backlight(crtc_state, conn_state);
1958
1959 mutex_unlock(&dev_priv->backlight_lock);
1960}
1961
1962int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
1963{
1964 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1965 struct intel_connector *intel_connector = to_intel_connector(connector);
1966 struct intel_panel *panel = &intel_connector->panel;
1967 int ret;
1968
1969 if (!dev_priv->vbt.backlight.present) {
1970 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1971 drm_dbg_kms(&dev_priv->drm,
1972 "no backlight present per VBT, but present per quirk\n");
1973 } else {
1974 drm_dbg_kms(&dev_priv->drm,
1975 "no backlight present per VBT\n");
1976 return 0;
1977 }
1978 }
1979
1980 /* ensure intel_panel has been initialized first */
1981 if (drm_WARN_ON(&dev_priv->drm, !panel->backlight.setup))
1982 return -ENODEV;
1983
1984 /* set level and max in panel struct */
1985 mutex_lock(&dev_priv->backlight_lock);
1986 ret = panel->backlight.setup(intel_connector, pipe);
1987 mutex_unlock(&dev_priv->backlight_lock);
1988
1989 if (ret) {
1990 drm_dbg_kms(&dev_priv->drm,
1991 "failed to setup backlight for connector %s\n",
1992 connector->name);
1993 return ret;
1994 }
1995
1996 panel->backlight.present = true;
1997
1998 drm_dbg_kms(&dev_priv->drm,
1999 "Connector %s backlight initialized, %s, brightness %u/%u\n",
2000 connector->name,
2001 enableddisabled(panel->backlight.enabled),
2002 panel->backlight.level, panel->backlight.max);
2003
2004 return 0;
2005}
2006
2007static void intel_panel_destroy_backlight(struct intel_panel *panel)
2008{
2009 /* dispose of the pwm */
2010 if (panel->backlight.pwm)
2011 pwm_put(panel->backlight.pwm);
2012
2013 panel->backlight.present = false;
2014}
2015
2016/* Set up chip specific backlight functions */
2017static void
2018intel_panel_init_backlight_funcs(struct intel_panel *panel)
2019{
2020 struct intel_connector *connector =
2021 container_of(panel, struct intel_connector, panel);
2022 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
2023
2024 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
2025 intel_dp_aux_init_backlight_funcs(connector) == 0)
2026 return;
2027
2028 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
2029 intel_dsi_dcs_init_backlight_funcs(connector) == 0)
2030 return;
2031
2032 if (IS_GEN9_LP(dev_priv)) {
2033 panel->backlight.setup = bxt_setup_backlight;
2034 panel->backlight.enable = bxt_enable_backlight;
2035 panel->backlight.disable = bxt_disable_backlight;
2036 panel->backlight.set = bxt_set_backlight;
2037 panel->backlight.get = bxt_get_backlight;
2038 panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
2039 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) {
2040 panel->backlight.setup = cnp_setup_backlight;
2041 panel->backlight.enable = cnp_enable_backlight;
2042 panel->backlight.disable = cnp_disable_backlight;
2043 panel->backlight.set = bxt_set_backlight;
2044 panel->backlight.get = bxt_get_backlight;
2045 panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
2046 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) {
2047 panel->backlight.setup = lpt_setup_backlight;
2048 panel->backlight.enable = lpt_enable_backlight;
2049 panel->backlight.disable = lpt_disable_backlight;
2050 panel->backlight.set = lpt_set_backlight;
2051 panel->backlight.get = lpt_get_backlight;
2052 if (HAS_PCH_LPT(dev_priv))
2053 panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
2054 else
2055 panel->backlight.hz_to_pwm = spt_hz_to_pwm;
2056 } else if (HAS_PCH_SPLIT(dev_priv)) {
2057 panel->backlight.setup = pch_setup_backlight;
2058 panel->backlight.enable = pch_enable_backlight;
2059 panel->backlight.disable = pch_disable_backlight;
2060 panel->backlight.set = pch_set_backlight;
2061 panel->backlight.get = pch_get_backlight;
2062 panel->backlight.hz_to_pwm = pch_hz_to_pwm;
2063 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
2064 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
2065 panel->backlight.setup = pwm_setup_backlight;
2066 panel->backlight.enable = pwm_enable_backlight;
2067 panel->backlight.disable = pwm_disable_backlight;
2068 panel->backlight.set = pwm_set_backlight;
2069 panel->backlight.get = pwm_get_backlight;
2070 } else {
2071 panel->backlight.setup = vlv_setup_backlight;
2072 panel->backlight.enable = vlv_enable_backlight;
2073 panel->backlight.disable = vlv_disable_backlight;
2074 panel->backlight.set = vlv_set_backlight;
2075 panel->backlight.get = vlv_get_backlight;
2076 panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
2077 }
2078 } else if (IS_GEN(dev_priv, 4)) {
2079 panel->backlight.setup = i965_setup_backlight;
2080 panel->backlight.enable = i965_enable_backlight;
2081 panel->backlight.disable = i965_disable_backlight;
2082 panel->backlight.set = i9xx_set_backlight;
2083 panel->backlight.get = i9xx_get_backlight;
2084 panel->backlight.hz_to_pwm = i965_hz_to_pwm;
2085 } else {
2086 panel->backlight.setup = i9xx_setup_backlight;
2087 panel->backlight.enable = i9xx_enable_backlight;
2088 panel->backlight.disable = i9xx_disable_backlight;
2089 panel->backlight.set = i9xx_set_backlight;
2090 panel->backlight.get = i9xx_get_backlight;
2091 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
2092 }
2093}
2094
2095int intel_panel_init(struct intel_panel *panel,
2096 struct drm_display_mode *fixed_mode,
2097 struct drm_display_mode *downclock_mode)
2098{
2099 intel_panel_init_backlight_funcs(panel);
2100
2101 panel->fixed_mode = fixed_mode;
2102 panel->downclock_mode = downclock_mode;
2103
2104 return 0;
2105}
2106
2107void intel_panel_fini(struct intel_panel *panel)
2108{
2109 struct intel_connector *intel_connector =
2110 container_of(panel, struct intel_connector, panel);
2111
2112 intel_panel_destroy_backlight(panel);
2113
2114 if (panel->fixed_mode)
2115 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
2116
2117 if (panel->downclock_mode)
2118 drm_mode_destroy(intel_connector->base.dev,
2119 panel->downclock_mode);
2120}