1/*
  2 * Copyright (C) 2012 Russell King
  3 *
  4 * This program is free software; you can redistribute it and/or modify
  5 * it under the terms of the GNU General Public License version 2 as
  6 * published by the Free Software Foundation.
  7 */
  8#ifndef ARMADA_CRTC_H
  9#define ARMADA_CRTC_H
 10
 
 
 11struct armada_gem_object;
 12
 13struct armada_regs {
 14	uint32_t offset;
 15	uint32_t mask;
 16	uint32_t val;
 17};
 18
 19#define armada_reg_queue_mod(_r, _i, _v, _m, _o)	\
 20	do {					\
 21		struct armada_regs *__reg = _r;	\
 22		__reg[_i].offset = _o;		\
 23		__reg[_i].mask = ~(_m);		\
 24		__reg[_i].val = _v;		\
 25		_i++;				\
 26	} while (0)
 27
 28#define armada_reg_queue_set(_r, _i, _v, _o)	\
 29	armada_reg_queue_mod(_r, _i, _v, ~0, _o)
 30
 31#define armada_reg_queue_end(_r, _i)		\
 32	armada_reg_queue_mod(_r, _i, 0, 0, ~0)
 33
 34struct armada_crtc;
 35struct armada_plane;
 36struct armada_variant;
 37
 38struct armada_plane_work {
 39	void			(*fn)(struct armada_crtc *,
 40				      struct armada_plane *,
 41				      struct armada_plane_work *);
 42};
 43
 44struct armada_plane {
 45	struct drm_plane	base;
 46	wait_queue_head_t	frame_wait;
 47	struct armada_plane_work *work;
 48};
 49#define drm_to_armada_plane(p) container_of(p, struct armada_plane, base)
 50
 51int armada_drm_plane_init(struct armada_plane *plane);
 52int armada_drm_plane_work_queue(struct armada_crtc *dcrtc,
 53	struct armada_plane *plane, struct armada_plane_work *work);
 54int armada_drm_plane_work_wait(struct armada_plane *plane, long timeout);
 55struct armada_plane_work *armada_drm_plane_work_cancel(
 56	struct armada_crtc *dcrtc, struct armada_plane *plane);
 57
 58struct armada_crtc {
 59	struct drm_crtc		crtc;
 60	const struct armada_variant *variant;
 
 61	unsigned		num;
 62	void __iomem		*base;
 63	struct clk		*clk;
 64	struct clk		*extclk[2];
 65	struct {
 66		uint32_t	spu_v_h_total;
 67		uint32_t	spu_v_porch;
 68		uint32_t	spu_adv_reg;
 69	} v[2];
 70	bool			interlaced;
 71	bool			cursor_update;
 72	uint8_t			csc_yuv_mode;
 73	uint8_t			csc_rgb_mode;
 74
 75	struct drm_plane	*plane;
 76
 77	struct armada_gem_object	*cursor_obj;
 78	int			cursor_x;
 79	int			cursor_y;
 80	uint32_t		cursor_hw_pos;
 81	uint32_t		cursor_hw_sz;
 82	uint32_t		cursor_w;
 83	uint32_t		cursor_h;
 84
 85	int			dpms;
 86	uint32_t		cfg_dumb_ctrl;
 87	uint32_t		dumb_ctrl;
 88	uint32_t		spu_iopad_ctrl;
 89
 90	spinlock_t		irq_lock;
 91	uint32_t		irq_ena;
 
 
 
 
 
 
 92};
 93#define drm_to_armada_crtc(c) container_of(c, struct armada_crtc, crtc)
 94
 95void armada_drm_crtc_gamma_set(struct drm_crtc *, u16, u16, u16, int);
 96void armada_drm_crtc_gamma_get(struct drm_crtc *, u16 *, u16 *, u16 *, int);
 97void armada_drm_crtc_disable_irq(struct armada_crtc *, u32);
 98void armada_drm_crtc_enable_irq(struct armada_crtc *, u32);
 99void armada_drm_crtc_update_regs(struct armada_crtc *, struct armada_regs *);
100
101void armada_drm_crtc_plane_disable(struct armada_crtc *dcrtc,
102	struct drm_plane *plane);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
103
104extern struct platform_driver armada_lcd_platform_driver;
105
106#endif

 1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 * Copyright (C) 2012 Russell King
 
 
 
 
 4 */
 5#ifndef ARMADA_CRTC_H
 6#define ARMADA_CRTC_H
 7
 8#include <drm/drm_crtc.h>
 9
10struct armada_gem_object;
11
12struct armada_regs {
13	uint32_t offset;
14	uint32_t mask;
15	uint32_t val;
16};
17
18#define armada_reg_queue_mod(_r, _i, _v, _m, _o)	\
19	do {					\
20		struct armada_regs *__reg = _r;	\
21		__reg[_i].offset = _o;		\
22		__reg[_i].mask = ~(_m);		\
23		__reg[_i].val = _v;		\
24		_i++;				\
25	} while (0)
26
27#define armada_reg_queue_set(_r, _i, _v, _o)	\
28	armada_reg_queue_mod(_r, _i, _v, ~0, _o)
29
30#define armada_reg_queue_end(_r, _i)		\
31	armada_reg_queue_mod(_r, _i, 0, 0, ~0)
32
33struct armada_crtc;
 
34struct armada_variant;
35
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
36struct armada_crtc {
37	struct drm_crtc		crtc;
38	const struct armada_variant *variant;
39	void			*variant_data;
40	unsigned		num;
41	void __iomem		*base;
42	struct clk		*clk;
 
43	struct {
44		uint32_t	spu_v_h_total;
45		uint32_t	spu_v_porch;
46		uint32_t	spu_adv_reg;
47	} v[2];
48	bool			interlaced;
49	bool			cursor_update;
 
 
 
 
50
51	struct armada_gem_object	*cursor_obj;
52	int			cursor_x;
53	int			cursor_y;
54	uint32_t		cursor_hw_pos;
55	uint32_t		cursor_hw_sz;
56	uint32_t		cursor_w;
57	uint32_t		cursor_h;
58
 
59	uint32_t		cfg_dumb_ctrl;
 
60	uint32_t		spu_iopad_ctrl;
61
62	spinlock_t		irq_lock;
63	uint32_t		irq_ena;
64
65	bool			update_pending;
66	struct drm_pending_vblank_event *event;
67	struct armada_regs	atomic_regs[32];
68	struct armada_regs	*regs;
69	unsigned int		regs_idx;
70};
71#define drm_to_armada_crtc(c) container_of(c, struct armada_crtc, crtc)
72
 
 
 
 
73void armada_drm_crtc_update_regs(struct armada_crtc *, struct armada_regs *);
74
75struct armada_clocking_params {
76	unsigned long permillage_min;
77	unsigned long permillage_max;
78	u32 settable;
79	u32 div_max;
80};
81
82struct armada_clk_result {
83	unsigned long desired_clk_hz;
84	struct clk *clk;
85	u32 div;
86};
87
88int armada_crtc_select_clock(struct armada_crtc *dcrtc,
89			     struct armada_clk_result *res,
90			     const struct armada_clocking_params *params,
91			     struct clk *clks[], size_t num_clks,
92			     unsigned long desired_khz);
93
94extern struct platform_driver armada_lcd_platform_driver;
95
96#endif