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1/*
2 * Power button driver for Medfield.
3 *
4 * Copyright (C) 2010 Intel Corp
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
18 */
19
20#include <linux/module.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/slab.h>
24#include <linux/platform_device.h>
25#include <linux/input.h>
26#include <linux/mfd/intel_msic.h>
27#include <linux/pm_wakeirq.h>
28
29#define DRIVER_NAME "msic_power_btn"
30
31#define MSIC_PB_LEVEL (1 << 3) /* 1 - release, 0 - press */
32
33/*
34 * MSIC document ti_datasheet defines the 1st bit reg 0x21 is used to mask
35 * power button interrupt
36 */
37#define MSIC_PWRBTNM (1 << 0)
38
39static irqreturn_t mfld_pb_isr(int irq, void *dev_id)
40{
41 struct input_dev *input = dev_id;
42 int ret;
43 u8 pbstat;
44
45 ret = intel_msic_reg_read(INTEL_MSIC_PBSTATUS, &pbstat);
46 dev_dbg(input->dev.parent, "PB_INT status= %d\n", pbstat);
47
48 if (ret < 0) {
49 dev_err(input->dev.parent, "Read error %d while reading"
50 " MSIC_PB_STATUS\n", ret);
51 } else {
52 input_event(input, EV_KEY, KEY_POWER,
53 !(pbstat & MSIC_PB_LEVEL));
54 input_sync(input);
55 }
56
57 return IRQ_HANDLED;
58}
59
60static int mfld_pb_probe(struct platform_device *pdev)
61{
62 struct input_dev *input;
63 int irq = platform_get_irq(pdev, 0);
64 int error;
65
66 if (irq < 0)
67 return -EINVAL;
68
69 input = input_allocate_device();
70 if (!input)
71 return -ENOMEM;
72
73 input->name = pdev->name;
74 input->phys = "power-button/input0";
75 input->id.bustype = BUS_HOST;
76 input->dev.parent = &pdev->dev;
77
78 input_set_capability(input, EV_KEY, KEY_POWER);
79
80 error = request_threaded_irq(irq, NULL, mfld_pb_isr, 0,
81 DRIVER_NAME, input);
82 if (error) {
83 dev_err(&pdev->dev, "Unable to request irq %d for mfld power"
84 "button\n", irq);
85 goto err_free_input;
86 }
87
88 device_init_wakeup(&pdev->dev, true);
89 dev_pm_set_wake_irq(&pdev->dev, irq);
90
91 error = input_register_device(input);
92 if (error) {
93 dev_err(&pdev->dev, "Unable to register input dev, error "
94 "%d\n", error);
95 goto err_free_irq;
96 }
97
98 platform_set_drvdata(pdev, input);
99
100 /*
101 * SCU firmware might send power button interrupts to IA core before
102 * kernel boots and doesn't get EOI from IA core. The first bit of
103 * MSIC reg 0x21 is kept masked, and SCU firmware doesn't send new
104 * power interrupt to Android kernel. Unmask the bit when probing
105 * power button in kernel.
106 * There is a very narrow race between irq handler and power button
107 * initialization. The race happens rarely. So we needn't worry
108 * about it.
109 */
110 error = intel_msic_reg_update(INTEL_MSIC_IRQLVL1MSK, 0, MSIC_PWRBTNM);
111 if (error) {
112 dev_err(&pdev->dev, "Unable to clear power button interrupt, "
113 "error: %d\n", error);
114 goto err_free_irq;
115 }
116
117 return 0;
118
119err_free_irq:
120 free_irq(irq, input);
121err_free_input:
122 input_free_device(input);
123 return error;
124}
125
126static int mfld_pb_remove(struct platform_device *pdev)
127{
128 struct input_dev *input = platform_get_drvdata(pdev);
129 int irq = platform_get_irq(pdev, 0);
130
131 dev_pm_clear_wake_irq(&pdev->dev);
132 device_init_wakeup(&pdev->dev, false);
133 free_irq(irq, input);
134 input_unregister_device(input);
135
136 return 0;
137}
138
139static struct platform_driver mfld_pb_driver = {
140 .driver = {
141 .name = DRIVER_NAME,
142 },
143 .probe = mfld_pb_probe,
144 .remove = mfld_pb_remove,
145};
146
147module_platform_driver(mfld_pb_driver);
148
149MODULE_AUTHOR("Hong Liu <hong.liu@intel.com>");
150MODULE_DESCRIPTION("Intel Medfield Power Button Driver");
151MODULE_LICENSE("GPL v2");
152MODULE_ALIAS("platform:" DRIVER_NAME);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Power button driver for Intel MID platforms.
4 *
5 * Copyright (C) 2010,2017 Intel Corp
6 *
7 * Author: Hong Liu <hong.liu@intel.com>
8 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
9 */
10
11#include <linux/input.h>
12#include <linux/interrupt.h>
13#include <linux/mfd/intel_msic.h>
14#include <linux/module.h>
15#include <linux/platform_device.h>
16#include <linux/pm_wakeirq.h>
17#include <linux/slab.h>
18
19#include <asm/cpu_device_id.h>
20#include <asm/intel-family.h>
21#include <asm/intel_scu_ipc.h>
22
23#define DRIVER_NAME "msic_power_btn"
24
25#define MSIC_PB_LEVEL (1 << 3) /* 1 - release, 0 - press */
26
27/*
28 * MSIC document ti_datasheet defines the 1st bit reg 0x21 is used to mask
29 * power button interrupt
30 */
31#define MSIC_PWRBTNM (1 << 0)
32
33/* Intel Tangier */
34#define BCOVE_PB_LEVEL (1 << 4) /* 1 - release, 0 - press */
35
36/* Basin Cove PMIC */
37#define BCOVE_PBIRQ 0x02
38#define BCOVE_IRQLVL1MSK 0x0c
39#define BCOVE_PBIRQMASK 0x0d
40#define BCOVE_PBSTATUS 0x27
41
42struct mid_pb_ddata {
43 struct device *dev;
44 int irq;
45 struct input_dev *input;
46 unsigned short mirqlvl1_addr;
47 unsigned short pbstat_addr;
48 u8 pbstat_mask;
49 struct intel_scu_ipc_dev *scu;
50 int (*setup)(struct mid_pb_ddata *ddata);
51};
52
53static int mid_pbstat(struct mid_pb_ddata *ddata, int *value)
54{
55 struct input_dev *input = ddata->input;
56 int ret;
57 u8 pbstat;
58
59 ret = intel_scu_ipc_dev_ioread8(ddata->scu, ddata->pbstat_addr,
60 &pbstat);
61 if (ret)
62 return ret;
63
64 dev_dbg(input->dev.parent, "PB_INT status= %d\n", pbstat);
65
66 *value = !(pbstat & ddata->pbstat_mask);
67 return 0;
68}
69
70static int mid_irq_ack(struct mid_pb_ddata *ddata)
71{
72 return intel_scu_ipc_dev_update(ddata->scu, ddata->mirqlvl1_addr, 0,
73 MSIC_PWRBTNM);
74}
75
76static int mrfld_setup(struct mid_pb_ddata *ddata)
77{
78 /* Unmask the PBIRQ and MPBIRQ on Tangier */
79 intel_scu_ipc_dev_update(ddata->scu, BCOVE_PBIRQ, 0, MSIC_PWRBTNM);
80 intel_scu_ipc_dev_update(ddata->scu, BCOVE_PBIRQMASK, 0, MSIC_PWRBTNM);
81
82 return 0;
83}
84
85static irqreturn_t mid_pb_isr(int irq, void *dev_id)
86{
87 struct mid_pb_ddata *ddata = dev_id;
88 struct input_dev *input = ddata->input;
89 int value = 0;
90 int ret;
91
92 ret = mid_pbstat(ddata, &value);
93 if (ret < 0) {
94 dev_err(input->dev.parent,
95 "Read error %d while reading MSIC_PB_STATUS\n", ret);
96 } else {
97 input_event(input, EV_KEY, KEY_POWER, value);
98 input_sync(input);
99 }
100
101 mid_irq_ack(ddata);
102 return IRQ_HANDLED;
103}
104
105static const struct mid_pb_ddata mfld_ddata = {
106 .mirqlvl1_addr = INTEL_MSIC_IRQLVL1MSK,
107 .pbstat_addr = INTEL_MSIC_PBSTATUS,
108 .pbstat_mask = MSIC_PB_LEVEL,
109};
110
111static const struct mid_pb_ddata mrfld_ddata = {
112 .mirqlvl1_addr = BCOVE_IRQLVL1MSK,
113 .pbstat_addr = BCOVE_PBSTATUS,
114 .pbstat_mask = BCOVE_PB_LEVEL,
115 .setup = mrfld_setup,
116};
117
118static const struct x86_cpu_id mid_pb_cpu_ids[] = {
119 X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, &mfld_ddata),
120 X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &mrfld_ddata),
121 {}
122};
123
124static int mid_pb_probe(struct platform_device *pdev)
125{
126 const struct x86_cpu_id *id;
127 struct mid_pb_ddata *ddata;
128 struct input_dev *input;
129 int irq = platform_get_irq(pdev, 0);
130 int error;
131
132 id = x86_match_cpu(mid_pb_cpu_ids);
133 if (!id)
134 return -ENODEV;
135
136 if (irq < 0) {
137 dev_err(&pdev->dev, "Failed to get IRQ: %d\n", irq);
138 return irq;
139 }
140
141 input = devm_input_allocate_device(&pdev->dev);
142 if (!input)
143 return -ENOMEM;
144
145 input->name = pdev->name;
146 input->phys = "power-button/input0";
147 input->id.bustype = BUS_HOST;
148 input->dev.parent = &pdev->dev;
149
150 input_set_capability(input, EV_KEY, KEY_POWER);
151
152 ddata = devm_kmemdup(&pdev->dev, (void *)id->driver_data,
153 sizeof(*ddata), GFP_KERNEL);
154 if (!ddata)
155 return -ENOMEM;
156
157 ddata->dev = &pdev->dev;
158 ddata->irq = irq;
159 ddata->input = input;
160
161 if (ddata->setup) {
162 error = ddata->setup(ddata);
163 if (error)
164 return error;
165 }
166
167 ddata->scu = devm_intel_scu_ipc_dev_get(&pdev->dev);
168 if (!ddata->scu)
169 return -EPROBE_DEFER;
170
171 error = devm_request_threaded_irq(&pdev->dev, irq, NULL, mid_pb_isr,
172 IRQF_ONESHOT, DRIVER_NAME, ddata);
173 if (error) {
174 dev_err(&pdev->dev,
175 "Unable to request irq %d for MID power button\n", irq);
176 return error;
177 }
178
179 error = input_register_device(input);
180 if (error) {
181 dev_err(&pdev->dev,
182 "Unable to register input dev, error %d\n", error);
183 return error;
184 }
185
186 platform_set_drvdata(pdev, ddata);
187
188 /*
189 * SCU firmware might send power button interrupts to IA core before
190 * kernel boots and doesn't get EOI from IA core. The first bit of
191 * MSIC reg 0x21 is kept masked, and SCU firmware doesn't send new
192 * power interrupt to Android kernel. Unmask the bit when probing
193 * power button in kernel.
194 * There is a very narrow race between irq handler and power button
195 * initialization. The race happens rarely. So we needn't worry
196 * about it.
197 */
198 error = mid_irq_ack(ddata);
199 if (error) {
200 dev_err(&pdev->dev,
201 "Unable to clear power button interrupt, error: %d\n",
202 error);
203 return error;
204 }
205
206 device_init_wakeup(&pdev->dev, true);
207 dev_pm_set_wake_irq(&pdev->dev, irq);
208
209 return 0;
210}
211
212static int mid_pb_remove(struct platform_device *pdev)
213{
214 dev_pm_clear_wake_irq(&pdev->dev);
215 device_init_wakeup(&pdev->dev, false);
216
217 return 0;
218}
219
220static struct platform_driver mid_pb_driver = {
221 .driver = {
222 .name = DRIVER_NAME,
223 },
224 .probe = mid_pb_probe,
225 .remove = mid_pb_remove,
226};
227
228module_platform_driver(mid_pb_driver);
229
230MODULE_AUTHOR("Hong Liu <hong.liu@intel.com>");
231MODULE_DESCRIPTION("Intel MID Power Button Driver");
232MODULE_LICENSE("GPL v2");
233MODULE_ALIAS("platform:" DRIVER_NAME);