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1// SPDX-License-Identifier: GPL-2.0
2//
3// Ingenic JZ47xx IPU driver
4//
5// Copyright (C) 2020, Paul Cercueil <paul@crapouillou.net>
6// Copyright (C) 2020, Daniel Silsby <dansilsby@gmail.com>
7
8#include "ingenic-drm.h"
9#include "ingenic-ipu.h"
10
11#include <linux/clk.h>
12#include <linux/component.h>
13#include <linux/gcd.h>
14#include <linux/interrupt.h>
15#include <linux/module.h>
16#include <linux/of.h>
17#include <linux/of_device.h>
18#include <linux/regmap.h>
19#include <linux/time.h>
20
21#include <drm/drm_atomic.h>
22#include <drm/drm_atomic_helper.h>
23#include <drm/drm_drv.h>
24#include <drm/drm_fb_cma_helper.h>
25#include <drm/drm_fourcc.h>
26#include <drm/drm_gem_framebuffer_helper.h>
27#include <drm/drm_plane.h>
28#include <drm/drm_plane_helper.h>
29#include <drm/drm_property.h>
30#include <drm/drm_vblank.h>
31
32struct ingenic_ipu;
33
34struct soc_info {
35 const u32 *formats;
36 size_t num_formats;
37 bool has_bicubic;
38
39 void (*set_coefs)(struct ingenic_ipu *ipu, unsigned int reg,
40 unsigned int sharpness, bool downscale,
41 unsigned int weight, unsigned int offset);
42};
43
44struct ingenic_ipu {
45 struct drm_plane plane;
46 struct drm_device *drm;
47 struct device *dev, *master;
48 struct regmap *map;
49 struct clk *clk;
50 const struct soc_info *soc_info;
51
52 unsigned int num_w, num_h, denom_w, denom_h;
53
54 dma_addr_t addr_y, addr_u, addr_v;
55
56 struct drm_property *sharpness_prop;
57 unsigned int sharpness;
58};
59
60/* Signed 15.16 fixed-point math (for bicubic scaling coefficients) */
61#define I2F(i) ((s32)(i) * 65536)
62#define F2I(f) ((f) / 65536)
63#define FMUL(fa, fb) ((s32)(((s64)(fa) * (s64)(fb)) / 65536))
64#define SHARPNESS_INCR (I2F(-1) / 8)
65
66static inline struct ingenic_ipu *plane_to_ingenic_ipu(struct drm_plane *plane)
67{
68 return container_of(plane, struct ingenic_ipu, plane);
69}
70
71/*
72 * Apply conventional cubic convolution kernel. Both parameters
73 * and return value are 15.16 signed fixed-point.
74 *
75 * @f_a: Sharpness factor, typically in range [-4.0, -0.25].
76 * A larger magnitude increases perceived sharpness, but going past
77 * -2.0 might cause ringing artifacts to outweigh any improvement.
78 * Nice values on a 320x240 LCD are between -0.75 and -2.0.
79 *
80 * @f_x: Absolute distance in pixels from 'pixel 0' sample position
81 * along horizontal (or vertical) source axis. Range is [0, +2.0].
82 *
83 * returns: Weight of this pixel within 4-pixel sample group. Range is
84 * [-2.0, +2.0]. For moderate (i.e. > -3.0) sharpness factors,
85 * range is within [-1.0, +1.0].
86 */
87static inline s32 cubic_conv(s32 f_a, s32 f_x)
88{
89 const s32 f_1 = I2F(1);
90 const s32 f_2 = I2F(2);
91 const s32 f_3 = I2F(3);
92 const s32 f_4 = I2F(4);
93 const s32 f_x2 = FMUL(f_x, f_x);
94 const s32 f_x3 = FMUL(f_x, f_x2);
95
96 if (f_x <= f_1)
97 return FMUL((f_a + f_2), f_x3) - FMUL((f_a + f_3), f_x2) + f_1;
98 else if (f_x <= f_2)
99 return FMUL(f_a, (f_x3 - 5 * f_x2 + 8 * f_x - f_4));
100 else
101 return 0;
102}
103
104/*
105 * On entry, "weight" is a coefficient suitable for bilinear mode,
106 * which is converted to a set of four suitable for bicubic mode.
107 *
108 * "weight 512" means all of pixel 0;
109 * "weight 256" means half of pixel 0 and half of pixel 1;
110 * "weight 0" means all of pixel 1;
111 *
112 * "offset" is increment to next source pixel sample location.
113 */
114static void jz4760_set_coefs(struct ingenic_ipu *ipu, unsigned int reg,
115 unsigned int sharpness, bool downscale,
116 unsigned int weight, unsigned int offset)
117{
118 u32 val;
119 s32 w0, w1, w2, w3; /* Pixel weights at X (or Y) offsets -1,0,1,2 */
120
121 weight = clamp_val(weight, 0, 512);
122
123 if (sharpness < 2) {
124 /*
125 * When sharpness setting is 0, emulate nearest-neighbor.
126 * When sharpness setting is 1, emulate bilinear.
127 */
128
129 if (sharpness == 0)
130 weight = weight >= 256 ? 512 : 0;
131 w0 = 0;
132 w1 = weight;
133 w2 = 512 - weight;
134 w3 = 0;
135 } else {
136 const s32 f_a = SHARPNESS_INCR * sharpness;
137 const s32 f_h = I2F(1) / 2; /* Round up 0.5 */
138
139 /*
140 * Note that always rounding towards +infinity here is intended.
141 * The resulting coefficients match a round-to-nearest-int
142 * double floating-point implementation.
143 */
144
145 weight = 512 - weight;
146 w0 = F2I(f_h + 512 * cubic_conv(f_a, I2F(512 + weight) / 512));
147 w1 = F2I(f_h + 512 * cubic_conv(f_a, I2F(0 + weight) / 512));
148 w2 = F2I(f_h + 512 * cubic_conv(f_a, I2F(512 - weight) / 512));
149 w3 = F2I(f_h + 512 * cubic_conv(f_a, I2F(1024 - weight) / 512));
150 w0 = clamp_val(w0, -1024, 1023);
151 w1 = clamp_val(w1, -1024, 1023);
152 w2 = clamp_val(w2, -1024, 1023);
153 w3 = clamp_val(w3, -1024, 1023);
154 }
155
156 val = ((w1 & JZ4760_IPU_RSZ_COEF_MASK) << JZ4760_IPU_RSZ_COEF31_LSB) |
157 ((w0 & JZ4760_IPU_RSZ_COEF_MASK) << JZ4760_IPU_RSZ_COEF20_LSB);
158 regmap_write(ipu->map, reg, val);
159
160 val = ((w3 & JZ4760_IPU_RSZ_COEF_MASK) << JZ4760_IPU_RSZ_COEF31_LSB) |
161 ((w2 & JZ4760_IPU_RSZ_COEF_MASK) << JZ4760_IPU_RSZ_COEF20_LSB) |
162 ((offset & JZ4760_IPU_RSZ_OFFSET_MASK) << JZ4760_IPU_RSZ_OFFSET_LSB);
163 regmap_write(ipu->map, reg, val);
164}
165
166static void jz4725b_set_coefs(struct ingenic_ipu *ipu, unsigned int reg,
167 unsigned int sharpness, bool downscale,
168 unsigned int weight, unsigned int offset)
169{
170 u32 val = JZ4725B_IPU_RSZ_LUT_OUT_EN;
171 unsigned int i;
172
173 weight = clamp_val(weight, 0, 512);
174
175 if (sharpness == 0)
176 weight = weight >= 256 ? 512 : 0;
177
178 val |= (weight & JZ4725B_IPU_RSZ_LUT_COEF_MASK) << JZ4725B_IPU_RSZ_LUT_COEF_LSB;
179 if (downscale || !!offset)
180 val |= JZ4725B_IPU_RSZ_LUT_IN_EN;
181
182 regmap_write(ipu->map, reg, val);
183
184 if (downscale) {
185 for (i = 1; i < offset; i++)
186 regmap_write(ipu->map, reg, JZ4725B_IPU_RSZ_LUT_IN_EN);
187 }
188}
189
190static void ingenic_ipu_set_downscale_coefs(struct ingenic_ipu *ipu,
191 unsigned int reg,
192 unsigned int num,
193 unsigned int denom)
194{
195 unsigned int i, offset, weight, weight_num = denom;
196
197 for (i = 0; i < num; i++) {
198 weight_num = num + (weight_num - num) % (num * 2);
199 weight = 512 - 512 * (weight_num - num) / (num * 2);
200 weight_num += denom * 2;
201 offset = (weight_num - num) / (num * 2);
202
203 ipu->soc_info->set_coefs(ipu, reg, ipu->sharpness,
204 true, weight, offset);
205 }
206}
207
208static void ingenic_ipu_set_integer_upscale_coefs(struct ingenic_ipu *ipu,
209 unsigned int reg,
210 unsigned int num)
211{
212 /*
213 * Force nearest-neighbor scaling and use simple math when upscaling
214 * by an integer ratio. It looks better, and fixes a few problem cases.
215 */
216 unsigned int i;
217
218 for (i = 0; i < num; i++)
219 ipu->soc_info->set_coefs(ipu, reg, 0, false, 512, i == num - 1);
220}
221
222static void ingenic_ipu_set_upscale_coefs(struct ingenic_ipu *ipu,
223 unsigned int reg,
224 unsigned int num,
225 unsigned int denom)
226{
227 unsigned int i, offset, weight, weight_num = 0;
228
229 for (i = 0; i < num; i++) {
230 weight = 512 - 512 * weight_num / num;
231 weight_num += denom;
232 offset = weight_num >= num;
233
234 if (offset)
235 weight_num -= num;
236
237 ipu->soc_info->set_coefs(ipu, reg, ipu->sharpness,
238 false, weight, offset);
239 }
240}
241
242static void ingenic_ipu_set_coefs(struct ingenic_ipu *ipu, unsigned int reg,
243 unsigned int num, unsigned int denom)
244{
245 /* Begin programming the LUT */
246 regmap_write(ipu->map, reg, -1);
247
248 if (denom > num)
249 ingenic_ipu_set_downscale_coefs(ipu, reg, num, denom);
250 else if (denom == 1)
251 ingenic_ipu_set_integer_upscale_coefs(ipu, reg, num);
252 else
253 ingenic_ipu_set_upscale_coefs(ipu, reg, num, denom);
254}
255
256static int reduce_fraction(unsigned int *num, unsigned int *denom)
257{
258 unsigned long d = gcd(*num, *denom);
259
260 /* The scaling table has only 31 entries */
261 if (*num > 31 * d)
262 return -EINVAL;
263
264 *num /= d;
265 *denom /= d;
266 return 0;
267}
268
269static inline bool osd_changed(struct drm_plane_state *state,
270 struct drm_plane_state *oldstate)
271{
272 return state->src_x != oldstate->src_x ||
273 state->src_y != oldstate->src_y ||
274 state->src_w != oldstate->src_w ||
275 state->src_h != oldstate->src_h ||
276 state->crtc_x != oldstate->crtc_x ||
277 state->crtc_y != oldstate->crtc_y ||
278 state->crtc_w != oldstate->crtc_w ||
279 state->crtc_h != oldstate->crtc_h;
280}
281
282static void ingenic_ipu_plane_atomic_update(struct drm_plane *plane,
283 struct drm_plane_state *oldstate)
284{
285 struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
286 struct drm_plane_state *state = plane->state;
287 const struct drm_format_info *finfo;
288 u32 ctrl, stride = 0, coef_index = 0, format = 0;
289 bool needs_modeset, upscaling_w, upscaling_h;
290
291 if (!state || !state->fb)
292 return;
293
294 finfo = drm_format_info(state->fb->format->format);
295
296 /* Reset all the registers if needed */
297 needs_modeset = drm_atomic_crtc_needs_modeset(state->crtc->state);
298 if (needs_modeset) {
299 regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_RST);
300
301 /* Enable the chip */
302 regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL,
303 JZ_IPU_CTRL_CHIP_EN | JZ_IPU_CTRL_LCDC_SEL);
304 }
305
306 /* New addresses will be committed in vblank handler... */
307 ipu->addr_y = drm_fb_cma_get_gem_addr(state->fb, state, 0);
308 if (finfo->num_planes > 1)
309 ipu->addr_u = drm_fb_cma_get_gem_addr(state->fb, state, 1);
310 if (finfo->num_planes > 2)
311 ipu->addr_v = drm_fb_cma_get_gem_addr(state->fb, state, 2);
312
313 if (!needs_modeset)
314 return;
315
316 /* Or right here if we're doing a full modeset. */
317 regmap_write(ipu->map, JZ_REG_IPU_Y_ADDR, ipu->addr_y);
318 regmap_write(ipu->map, JZ_REG_IPU_U_ADDR, ipu->addr_u);
319 regmap_write(ipu->map, JZ_REG_IPU_V_ADDR, ipu->addr_v);
320
321 if (finfo->num_planes == 1)
322 regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_SPKG_SEL);
323
324 ingenic_drm_plane_config(ipu->master, plane, DRM_FORMAT_XRGB8888);
325
326 /* Set the input height/width/strides */
327 if (finfo->num_planes > 2)
328 stride = ((state->src_w >> 16) * finfo->cpp[2] / finfo->hsub)
329 << JZ_IPU_UV_STRIDE_V_LSB;
330
331 if (finfo->num_planes > 1)
332 stride |= ((state->src_w >> 16) * finfo->cpp[1] / finfo->hsub)
333 << JZ_IPU_UV_STRIDE_U_LSB;
334
335 regmap_write(ipu->map, JZ_REG_IPU_UV_STRIDE, stride);
336
337 stride = ((state->src_w >> 16) * finfo->cpp[0]) << JZ_IPU_Y_STRIDE_Y_LSB;
338 regmap_write(ipu->map, JZ_REG_IPU_Y_STRIDE, stride);
339
340 regmap_write(ipu->map, JZ_REG_IPU_IN_GS,
341 (stride << JZ_IPU_IN_GS_W_LSB) |
342 ((state->src_h >> 16) << JZ_IPU_IN_GS_H_LSB));
343
344 switch (finfo->format) {
345 case DRM_FORMAT_XRGB1555:
346 format = JZ_IPU_D_FMT_IN_FMT_RGB555 |
347 JZ_IPU_D_FMT_RGB_OUT_OFT_RGB;
348 break;
349 case DRM_FORMAT_XBGR1555:
350 format = JZ_IPU_D_FMT_IN_FMT_RGB555 |
351 JZ_IPU_D_FMT_RGB_OUT_OFT_BGR;
352 break;
353 case DRM_FORMAT_RGB565:
354 format = JZ_IPU_D_FMT_IN_FMT_RGB565 |
355 JZ_IPU_D_FMT_RGB_OUT_OFT_RGB;
356 break;
357 case DRM_FORMAT_BGR565:
358 format = JZ_IPU_D_FMT_IN_FMT_RGB565 |
359 JZ_IPU_D_FMT_RGB_OUT_OFT_BGR;
360 break;
361 case DRM_FORMAT_XRGB8888:
362 case DRM_FORMAT_XYUV8888:
363 format = JZ_IPU_D_FMT_IN_FMT_RGB888 |
364 JZ_IPU_D_FMT_RGB_OUT_OFT_RGB;
365 break;
366 case DRM_FORMAT_XBGR8888:
367 format = JZ_IPU_D_FMT_IN_FMT_RGB888 |
368 JZ_IPU_D_FMT_RGB_OUT_OFT_BGR;
369 break;
370 case DRM_FORMAT_YUYV:
371 format = JZ_IPU_D_FMT_IN_FMT_YUV422 |
372 JZ_IPU_D_FMT_YUV_VY1UY0;
373 break;
374 case DRM_FORMAT_YVYU:
375 format = JZ_IPU_D_FMT_IN_FMT_YUV422 |
376 JZ_IPU_D_FMT_YUV_UY1VY0;
377 break;
378 case DRM_FORMAT_UYVY:
379 format = JZ_IPU_D_FMT_IN_FMT_YUV422 |
380 JZ_IPU_D_FMT_YUV_Y1VY0U;
381 break;
382 case DRM_FORMAT_VYUY:
383 format = JZ_IPU_D_FMT_IN_FMT_YUV422 |
384 JZ_IPU_D_FMT_YUV_Y1UY0V;
385 break;
386 case DRM_FORMAT_YUV411:
387 format = JZ_IPU_D_FMT_IN_FMT_YUV411;
388 break;
389 case DRM_FORMAT_YUV420:
390 format = JZ_IPU_D_FMT_IN_FMT_YUV420;
391 break;
392 case DRM_FORMAT_YUV422:
393 format = JZ_IPU_D_FMT_IN_FMT_YUV422;
394 break;
395 case DRM_FORMAT_YUV444:
396 format = JZ_IPU_D_FMT_IN_FMT_YUV444;
397 break;
398 default:
399 WARN_ONCE(1, "Unsupported format");
400 break;
401 }
402
403 /* Fix output to RGB888 */
404 format |= JZ_IPU_D_FMT_OUT_FMT_RGB888;
405
406 /* Set pixel format */
407 regmap_write(ipu->map, JZ_REG_IPU_D_FMT, format);
408
409 /* Set the output height/width/stride */
410 regmap_write(ipu->map, JZ_REG_IPU_OUT_GS,
411 ((state->crtc_w * 4) << JZ_IPU_OUT_GS_W_LSB)
412 | state->crtc_h << JZ_IPU_OUT_GS_H_LSB);
413 regmap_write(ipu->map, JZ_REG_IPU_OUT_STRIDE, state->crtc_w * 4);
414
415 if (finfo->is_yuv) {
416 regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_CSC_EN);
417
418 /*
419 * Offsets for Chroma/Luma.
420 * y = source Y - LUMA,
421 * u = source Cb - CHROMA,
422 * v = source Cr - CHROMA
423 */
424 regmap_write(ipu->map, JZ_REG_IPU_CSC_OFFSET,
425 128 << JZ_IPU_CSC_OFFSET_CHROMA_LSB |
426 0 << JZ_IPU_CSC_OFFSET_LUMA_LSB);
427
428 /*
429 * YUV422 to RGB conversion table.
430 * R = C0 / 0x400 * y + C1 / 0x400 * v
431 * G = C0 / 0x400 * y - C2 / 0x400 * u - C3 / 0x400 * v
432 * B = C0 / 0x400 * y + C4 / 0x400 * u
433 */
434 regmap_write(ipu->map, JZ_REG_IPU_CSC_C0_COEF, 0x4a8);
435 regmap_write(ipu->map, JZ_REG_IPU_CSC_C1_COEF, 0x662);
436 regmap_write(ipu->map, JZ_REG_IPU_CSC_C2_COEF, 0x191);
437 regmap_write(ipu->map, JZ_REG_IPU_CSC_C3_COEF, 0x341);
438 regmap_write(ipu->map, JZ_REG_IPU_CSC_C4_COEF, 0x811);
439 }
440
441 ctrl = 0;
442
443 /*
444 * Must set ZOOM_SEL before programming bicubic LUTs.
445 * If the IPU supports bicubic, we enable it unconditionally, since it
446 * can do anything bilinear can and more.
447 */
448 if (ipu->soc_info->has_bicubic)
449 ctrl |= JZ_IPU_CTRL_ZOOM_SEL;
450
451 upscaling_w = ipu->num_w > ipu->denom_w;
452 if (upscaling_w)
453 ctrl |= JZ_IPU_CTRL_HSCALE;
454
455 if (ipu->num_w != 1 || ipu->denom_w != 1) {
456 if (!ipu->soc_info->has_bicubic && !upscaling_w)
457 coef_index |= (ipu->denom_w - 1) << 16;
458 else
459 coef_index |= (ipu->num_w - 1) << 16;
460 ctrl |= JZ_IPU_CTRL_HRSZ_EN;
461 }
462
463 upscaling_h = ipu->num_h > ipu->denom_h;
464 if (upscaling_h)
465 ctrl |= JZ_IPU_CTRL_VSCALE;
466
467 if (ipu->num_h != 1 || ipu->denom_h != 1) {
468 if (!ipu->soc_info->has_bicubic && !upscaling_h)
469 coef_index |= ipu->denom_h - 1;
470 else
471 coef_index |= ipu->num_h - 1;
472 ctrl |= JZ_IPU_CTRL_VRSZ_EN;
473 }
474
475 regmap_update_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_ZOOM_SEL |
476 JZ_IPU_CTRL_HRSZ_EN | JZ_IPU_CTRL_VRSZ_EN |
477 JZ_IPU_CTRL_HSCALE | JZ_IPU_CTRL_VSCALE, ctrl);
478
479 /* Set the LUT index register */
480 regmap_write(ipu->map, JZ_REG_IPU_RSZ_COEF_INDEX, coef_index);
481
482 if (ipu->num_w != 1 || ipu->denom_w != 1)
483 ingenic_ipu_set_coefs(ipu, JZ_REG_IPU_HRSZ_COEF_LUT,
484 ipu->num_w, ipu->denom_w);
485
486 if (ipu->num_h != 1 || ipu->denom_h != 1)
487 ingenic_ipu_set_coefs(ipu, JZ_REG_IPU_VRSZ_COEF_LUT,
488 ipu->num_h, ipu->denom_h);
489
490 /* Clear STATUS register */
491 regmap_write(ipu->map, JZ_REG_IPU_STATUS, 0);
492
493 /* Start IPU */
494 regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL,
495 JZ_IPU_CTRL_RUN | JZ_IPU_CTRL_FM_IRQ_EN);
496
497 dev_dbg(ipu->dev, "Scaling %ux%u to %ux%u (%u:%u horiz, %u:%u vert)\n",
498 state->src_w >> 16, state->src_h >> 16,
499 state->crtc_w, state->crtc_h,
500 ipu->num_w, ipu->denom_w, ipu->num_h, ipu->denom_h);
501}
502
503static int ingenic_ipu_plane_atomic_check(struct drm_plane *plane,
504 struct drm_plane_state *state)
505{
506 unsigned int num_w, denom_w, num_h, denom_h, xres, yres;
507 struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
508 struct drm_crtc *crtc = state->crtc ?: plane->state->crtc;
509 struct drm_crtc_state *crtc_state;
510
511 if (!crtc)
512 return 0;
513
514 crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc);
515 if (WARN_ON(!crtc_state))
516 return -EINVAL;
517
518 /* Request a full modeset if we are enabling or disabling the IPU. */
519 if (!plane->state->crtc ^ !state->crtc)
520 crtc_state->mode_changed = true;
521
522 if (!state->crtc ||
523 !crtc_state->mode.hdisplay || !crtc_state->mode.vdisplay)
524 return 0;
525
526 /* Plane must be fully visible */
527 if (state->crtc_x < 0 || state->crtc_y < 0 ||
528 state->crtc_x + state->crtc_w > crtc_state->mode.hdisplay ||
529 state->crtc_y + state->crtc_h > crtc_state->mode.vdisplay)
530 return -EINVAL;
531
532 /* Minimum size is 4x4 */
533 if ((state->src_w >> 16) < 4 || (state->src_h >> 16) < 4)
534 return -EINVAL;
535
536 /* Input and output lines must have an even number of pixels. */
537 if (((state->src_w >> 16) & 1) || (state->crtc_w & 1))
538 return -EINVAL;
539
540 if (!osd_changed(state, plane->state))
541 return 0;
542
543 crtc_state->mode_changed = true;
544
545 xres = state->src_w >> 16;
546 yres = state->src_h >> 16;
547
548 /* Adjust the coefficients until we find a valid configuration */
549 for (denom_w = xres, num_w = state->crtc_w;
550 num_w <= crtc_state->mode.hdisplay; num_w++)
551 if (!reduce_fraction(&num_w, &denom_w))
552 break;
553 if (num_w > crtc_state->mode.hdisplay)
554 return -EINVAL;
555
556 for (denom_h = yres, num_h = state->crtc_h;
557 num_h <= crtc_state->mode.vdisplay; num_h++)
558 if (!reduce_fraction(&num_h, &denom_h))
559 break;
560 if (num_h > crtc_state->mode.vdisplay)
561 return -EINVAL;
562
563 ipu->num_w = num_w;
564 ipu->num_h = num_h;
565 ipu->denom_w = denom_w;
566 ipu->denom_h = denom_h;
567
568 return 0;
569}
570
571static void ingenic_ipu_plane_atomic_disable(struct drm_plane *plane,
572 struct drm_plane_state *old_state)
573{
574 struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
575
576 regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_STOP);
577 regmap_clear_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_CHIP_EN);
578
579 ingenic_drm_plane_disable(ipu->master, plane);
580}
581
582static const struct drm_plane_helper_funcs ingenic_ipu_plane_helper_funcs = {
583 .atomic_update = ingenic_ipu_plane_atomic_update,
584 .atomic_check = ingenic_ipu_plane_atomic_check,
585 .atomic_disable = ingenic_ipu_plane_atomic_disable,
586 .prepare_fb = drm_gem_fb_prepare_fb,
587};
588
589static int
590ingenic_ipu_plane_atomic_get_property(struct drm_plane *plane,
591 const struct drm_plane_state *state,
592 struct drm_property *property, u64 *val)
593{
594 struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
595
596 if (property != ipu->sharpness_prop)
597 return -EINVAL;
598
599 *val = ipu->sharpness;
600
601 return 0;
602}
603
604static int
605ingenic_ipu_plane_atomic_set_property(struct drm_plane *plane,
606 struct drm_plane_state *state,
607 struct drm_property *property, u64 val)
608{
609 struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
610 struct drm_crtc_state *crtc_state;
611
612 if (property != ipu->sharpness_prop)
613 return -EINVAL;
614
615 ipu->sharpness = val;
616
617 if (state->crtc) {
618 crtc_state = drm_atomic_get_existing_crtc_state(state->state, state->crtc);
619 if (WARN_ON(!crtc_state))
620 return -EINVAL;
621
622 crtc_state->mode_changed = true;
623 }
624
625 return 0;
626}
627
628static const struct drm_plane_funcs ingenic_ipu_plane_funcs = {
629 .update_plane = drm_atomic_helper_update_plane,
630 .disable_plane = drm_atomic_helper_disable_plane,
631 .reset = drm_atomic_helper_plane_reset,
632 .destroy = drm_plane_cleanup,
633
634 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
635 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
636
637 .atomic_get_property = ingenic_ipu_plane_atomic_get_property,
638 .atomic_set_property = ingenic_ipu_plane_atomic_set_property,
639};
640
641static irqreturn_t ingenic_ipu_irq_handler(int irq, void *arg)
642{
643 struct ingenic_ipu *ipu = arg;
644 struct drm_crtc *crtc = drm_crtc_from_index(ipu->drm, 0);
645 unsigned int dummy;
646
647 /* dummy read allows CPU to reconfigure IPU */
648 regmap_read(ipu->map, JZ_REG_IPU_STATUS, &dummy);
649
650 /* ACK interrupt */
651 regmap_write(ipu->map, JZ_REG_IPU_STATUS, 0);
652
653 /* Set previously cached addresses */
654 regmap_write(ipu->map, JZ_REG_IPU_Y_ADDR, ipu->addr_y);
655 regmap_write(ipu->map, JZ_REG_IPU_U_ADDR, ipu->addr_u);
656 regmap_write(ipu->map, JZ_REG_IPU_V_ADDR, ipu->addr_v);
657
658 /* Run IPU for the new frame */
659 regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_RUN);
660
661 drm_crtc_handle_vblank(crtc);
662
663 return IRQ_HANDLED;
664}
665
666static const struct regmap_config ingenic_ipu_regmap_config = {
667 .reg_bits = 32,
668 .val_bits = 32,
669 .reg_stride = 4,
670
671 .max_register = JZ_REG_IPU_OUT_PHY_T_ADDR,
672};
673
674static int ingenic_ipu_bind(struct device *dev, struct device *master, void *d)
675{
676 struct platform_device *pdev = to_platform_device(dev);
677 const struct soc_info *soc_info;
678 struct drm_device *drm = d;
679 struct drm_plane *plane;
680 struct ingenic_ipu *ipu;
681 void __iomem *base;
682 unsigned int sharpness_max;
683 int err, irq;
684
685 ipu = devm_kzalloc(dev, sizeof(*ipu), GFP_KERNEL);
686 if (!ipu)
687 return -ENOMEM;
688
689 soc_info = of_device_get_match_data(dev);
690 if (!soc_info) {
691 dev_err(dev, "Missing platform data\n");
692 return -EINVAL;
693 }
694
695 ipu->dev = dev;
696 ipu->drm = drm;
697 ipu->master = master;
698 ipu->soc_info = soc_info;
699
700 base = devm_platform_ioremap_resource(pdev, 0);
701 if (IS_ERR(base)) {
702 dev_err(dev, "Failed to get memory resource\n");
703 return PTR_ERR(base);
704 }
705
706 ipu->map = devm_regmap_init_mmio(dev, base, &ingenic_ipu_regmap_config);
707 if (IS_ERR(ipu->map)) {
708 dev_err(dev, "Failed to create regmap\n");
709 return PTR_ERR(ipu->map);
710 }
711
712 irq = platform_get_irq(pdev, 0);
713 if (irq < 0)
714 return irq;
715
716 ipu->clk = devm_clk_get(dev, "ipu");
717 if (IS_ERR(ipu->clk)) {
718 dev_err(dev, "Failed to get pixel clock\n");
719 return PTR_ERR(ipu->clk);
720 }
721
722 err = devm_request_irq(dev, irq, ingenic_ipu_irq_handler, 0,
723 dev_name(dev), ipu);
724 if (err) {
725 dev_err(dev, "Unable to request IRQ\n");
726 return err;
727 }
728
729 plane = &ipu->plane;
730 dev_set_drvdata(dev, plane);
731
732 drm_plane_helper_add(plane, &ingenic_ipu_plane_helper_funcs);
733
734 err = drm_universal_plane_init(drm, plane, 1, &ingenic_ipu_plane_funcs,
735 soc_info->formats, soc_info->num_formats,
736 NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
737 if (err) {
738 dev_err(dev, "Failed to init plane: %i\n", err);
739 return err;
740 }
741
742 /*
743 * Sharpness settings range is [0,32]
744 * 0 : nearest-neighbor
745 * 1 : bilinear
746 * 2 .. 32 : bicubic (translated to sharpness factor -0.25 .. -4.0)
747 */
748 sharpness_max = soc_info->has_bicubic ? 32 : 1;
749 ipu->sharpness_prop = drm_property_create_range(drm, 0, "sharpness",
750 0, sharpness_max);
751 if (!ipu->sharpness_prop) {
752 dev_err(dev, "Unable to create sharpness property\n");
753 return -ENOMEM;
754 }
755
756 /* Default sharpness factor: -0.125 * 8 = -1.0 */
757 ipu->sharpness = soc_info->has_bicubic ? 8 : 1;
758 drm_object_attach_property(&plane->base, ipu->sharpness_prop,
759 ipu->sharpness);
760
761 err = clk_prepare_enable(ipu->clk);
762 if (err) {
763 dev_err(dev, "Unable to enable clock\n");
764 return err;
765 }
766
767 return 0;
768}
769
770static void ingenic_ipu_unbind(struct device *dev,
771 struct device *master, void *d)
772{
773 struct ingenic_ipu *ipu = dev_get_drvdata(dev);
774
775 clk_disable_unprepare(ipu->clk);
776}
777
778static const struct component_ops ingenic_ipu_ops = {
779 .bind = ingenic_ipu_bind,
780 .unbind = ingenic_ipu_unbind,
781};
782
783static int ingenic_ipu_probe(struct platform_device *pdev)
784{
785 return component_add(&pdev->dev, &ingenic_ipu_ops);
786}
787
788static int ingenic_ipu_remove(struct platform_device *pdev)
789{
790 component_del(&pdev->dev, &ingenic_ipu_ops);
791 return 0;
792}
793
794static const u32 jz4725b_ipu_formats[] = {
795 DRM_FORMAT_YUYV,
796 DRM_FORMAT_YVYU,
797 DRM_FORMAT_UYVY,
798 DRM_FORMAT_VYUY,
799 DRM_FORMAT_YUV411,
800 DRM_FORMAT_YUV420,
801 DRM_FORMAT_YUV422,
802 DRM_FORMAT_YUV444,
803};
804
805static const struct soc_info jz4725b_soc_info = {
806 .formats = jz4725b_ipu_formats,
807 .num_formats = ARRAY_SIZE(jz4725b_ipu_formats),
808 .has_bicubic = false,
809 .set_coefs = jz4725b_set_coefs,
810};
811
812static const u32 jz4760_ipu_formats[] = {
813 DRM_FORMAT_XRGB1555,
814 DRM_FORMAT_XBGR1555,
815 DRM_FORMAT_RGB565,
816 DRM_FORMAT_BGR565,
817 DRM_FORMAT_XRGB8888,
818 DRM_FORMAT_XBGR8888,
819 DRM_FORMAT_YUYV,
820 DRM_FORMAT_YVYU,
821 DRM_FORMAT_UYVY,
822 DRM_FORMAT_VYUY,
823 DRM_FORMAT_YUV411,
824 DRM_FORMAT_YUV420,
825 DRM_FORMAT_YUV422,
826 DRM_FORMAT_YUV444,
827 DRM_FORMAT_XYUV8888,
828};
829
830static const struct soc_info jz4760_soc_info = {
831 .formats = jz4760_ipu_formats,
832 .num_formats = ARRAY_SIZE(jz4760_ipu_formats),
833 .has_bicubic = true,
834 .set_coefs = jz4760_set_coefs,
835};
836
837static const struct of_device_id ingenic_ipu_of_match[] = {
838 { .compatible = "ingenic,jz4725b-ipu", .data = &jz4725b_soc_info },
839 { .compatible = "ingenic,jz4760-ipu", .data = &jz4760_soc_info },
840 { /* sentinel */ },
841};
842MODULE_DEVICE_TABLE(of, ingenic_ipu_of_match);
843
844static struct platform_driver ingenic_ipu_driver = {
845 .driver = {
846 .name = "ingenic-ipu",
847 .of_match_table = ingenic_ipu_of_match,
848 },
849 .probe = ingenic_ipu_probe,
850 .remove = ingenic_ipu_remove,
851};
852
853struct platform_driver *ingenic_ipu_driver_ptr = &ingenic_ipu_driver;