1/*
 2 * Copyright (c) 2014 MundoReader S.L.
 3 * Author: Heiko Stuebner <heiko@sntech.de>
 4 *
 5 * This program is free software; you can redistribute it and/or modify
 6 * it under the terms of the GNU General Public License as published by
 7 * the Free Software Foundation; either version 2 of the License, or
 8 * (at your option) any later version.
 9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H
17#define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H
18
19#include <dt-bindings/clock/rk3188-cru-common.h>
20
21/* soft-reset indices */
22#define SRST_PTM_CORE2		0
23#define SRST_PTM_CORE3		1
24#define SRST_CORE2		5
25#define SRST_CORE3		6
26#define SRST_CORE2_DBG		10
27#define SRST_CORE3_DBG		11
28
29#define SRST_TIMER2		16
30#define SRST_TIMER4		23
31#define SRST_I2S0		24
32#define SRST_TIMER5		25
33#define SRST_TIMER3		29
34#define SRST_TIMER6		31
35
36#define SRST_PTM3		36
37#define SRST_PTM3_ATB		37
38
39#define SRST_GPS		67
40#define SRST_HSICPHY		75
41#define SRST_TIMER		78
42
43#define SRST_PTM2		92
44#define SRST_CORE2_WDT		94
45#define SRST_CORE3_WDT		95
46
47#define SRST_PTM2_ATB		111
48
49#define SRST_HSIC		117
50#define SRST_CTI2		118
51#define SRST_CTI2_APB		119
52#define SRST_GPU_BRIDGE		121
53#define SRST_CTI3		123
54#define SRST_CTI3_APB		124
55
56#endif

 1/* SPDX-License-Identifier: GPL-2.0-or-later */
 2/*
 3 * Copyright (c) 2014 MundoReader S.L.
 4 * Author: Heiko Stuebner <heiko@sntech.de>
 
 
 
 
 
 
 
 
 
 
 5 */
 6
 7#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H
 8#define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H
 9
10#include <dt-bindings/clock/rk3188-cru-common.h>
11
12/* soft-reset indices */
13#define SRST_PTM_CORE2		0
14#define SRST_PTM_CORE3		1
15#define SRST_CORE2		5
16#define SRST_CORE3		6
17#define SRST_CORE2_DBG		10
18#define SRST_CORE3_DBG		11
19
20#define SRST_TIMER2		16
21#define SRST_TIMER4		23
22#define SRST_I2S0		24
23#define SRST_TIMER5		25
24#define SRST_TIMER3		29
25#define SRST_TIMER6		31
26
27#define SRST_PTM3		36
28#define SRST_PTM3_ATB		37
29
30#define SRST_GPS		67
31#define SRST_HSICPHY		75
32#define SRST_TIMER		78
33
34#define SRST_PTM2		92
35#define SRST_CORE2_WDT		94
36#define SRST_CORE3_WDT		95
37
38#define SRST_PTM2_ATB		111
39
40#define SRST_HSIC		117
41#define SRST_CTI2		118
42#define SRST_CTI2_APB		119
43#define SRST_GPU_BRIDGE		121
44#define SRST_CTI3		123
45#define SRST_CTI3_APB		124
46
47#endif