1/*
   2 * Enhanced Host Controller Interface (EHCI) driver for USB.
   3 *
   4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5 *
   6 * Copyright (c) 2000-2004 by David Brownell
   7 *
   8 * This program is free software; you can redistribute it and/or modify it
   9 * under the terms of the GNU General Public License as published by the
  10 * Free Software Foundation; either version 2 of the License, or (at your
  11 * option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful, but
  14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15 * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16 * for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software Foundation,
  20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21 */
  22
  23#include <linux/module.h>
  24#include <linux/pci.h>
  25#include <linux/dmapool.h>
  26#include <linux/kernel.h>
  27#include <linux/delay.h>
  28#include <linux/ioport.h>
  29#include <linux/sched.h>
  30#include <linux/vmalloc.h>
  31#include <linux/errno.h>
  32#include <linux/init.h>
  33#include <linux/hrtimer.h>
  34#include <linux/list.h>
  35#include <linux/interrupt.h>
  36#include <linux/usb.h>
  37#include <linux/usb/hcd.h>
  38#include <linux/moduleparam.h>
  39#include <linux/dma-mapping.h>
  40#include <linux/debugfs.h>
  41#include <linux/slab.h>
  42
  43#include <asm/byteorder.h>
  44#include <asm/io.h>
  45#include <asm/irq.h>
  46#include <asm/unaligned.h>
  47
  48#if defined(CONFIG_PPC_PS3)
  49#include <asm/firmware.h>
  50#endif
  51
  52/*-------------------------------------------------------------------------*/
  53
  54/*
  55 * EHCI hc_driver implementation ... experimental, incomplete.
  56 * Based on the final 1.0 register interface specification.
  57 *
  58 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  59 * First was PCMCIA, like ISA; then CardBus, which is PCI.
  60 * Next comes "CardBay", using USB 2.0 signals.
  61 *
  62 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  63 * Special thanks to Intel and VIA for providing host controllers to
  64 * test this driver on, and Cypress (including In-System Design) for
  65 * providing early devices for those host controllers to talk to!
  66 */
  67
  68#define DRIVER_AUTHOR "David Brownell"
  69#define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  70
  71static const char	hcd_name [] = "ehci_hcd";
  72
  73
  74#undef EHCI_URB_TRACE
  75
  76/* magic numbers that can affect system performance */
  77#define	EHCI_TUNE_CERR		3	/* 0-3 qtd retries; 0 == don't stop */
  78#define	EHCI_TUNE_RL_HS		4	/* nak throttle; see 4.9 */
  79#define	EHCI_TUNE_RL_TT		0
  80#define	EHCI_TUNE_MULT_HS	1	/* 1-3 transactions/uframe; 4.10.3 */
  81#define	EHCI_TUNE_MULT_TT	1
  82/*
  83 * Some drivers think it's safe to schedule isochronous transfers more than
  84 * 256 ms into the future (partly as a result of an old bug in the scheduling
  85 * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  86 * length of 512 frames instead of 256.
  87 */
  88#define	EHCI_TUNE_FLS		1	/* (medium) 512-frame schedule */
  89
  90/* Initial IRQ latency:  faster than hw default */
  91static int log2_irq_thresh = 0;		// 0 to 6
  92module_param (log2_irq_thresh, int, S_IRUGO);
  93MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  94
  95/* initial park setting:  slower than hw default */
  96static unsigned park = 0;
  97module_param (park, uint, S_IRUGO);
  98MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
  99
 100/* for flakey hardware, ignore overcurrent indicators */
 101static bool ignore_oc;
 102module_param (ignore_oc, bool, S_IRUGO);
 103MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 104
 105#define	INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 106
 107/*-------------------------------------------------------------------------*/
 108
 109#include "ehci.h"
 110#include "pci-quirks.h"
 111
 112static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
 113		struct ehci_tt *tt);
 114
 115/*
 116 * The MosChip MCS9990 controller updates its microframe counter
 117 * a little before the frame counter, and occasionally we will read
 118 * the invalid intermediate value.  Avoid problems by checking the
 119 * microframe number (the low-order 3 bits); if they are 0 then
 120 * re-read the register to get the correct value.
 121 */
 122static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
 123{
 124	unsigned uf;
 125
 126	uf = ehci_readl(ehci, &ehci->regs->frame_index);
 127	if (unlikely((uf & 7) == 0))
 128		uf = ehci_readl(ehci, &ehci->regs->frame_index);
 129	return uf;
 130}
 131
 132static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
 133{
 134	if (ehci->frame_index_bug)
 135		return ehci_moschip_read_frame_index(ehci);
 136	return ehci_readl(ehci, &ehci->regs->frame_index);
 137}
 138
 139#include "ehci-dbg.c"
 140
 141/*-------------------------------------------------------------------------*/
 142
 143/*
 144 * ehci_handshake - spin reading hc until handshake completes or fails
 145 * @ptr: address of hc register to be read
 146 * @mask: bits to look at in result of read
 147 * @done: value of those bits when handshake succeeds
 148 * @usec: timeout in microseconds
 149 *
 150 * Returns negative errno, or zero on success
 151 *
 152 * Success happens when the "mask" bits have the specified value (hardware
 153 * handshake done).  There are two failure modes:  "usec" have passed (major
 154 * hardware flakeout), or the register reads as all-ones (hardware removed).
 155 *
 156 * That last failure should_only happen in cases like physical cardbus eject
 157 * before driver shutdown. But it also seems to be caused by bugs in cardbus
 158 * bridge shutdown:  shutting down the bridge before the devices using it.
 159 */
 160int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
 161		   u32 mask, u32 done, int usec)
 162{
 163	u32	result;
 164
 165	do {
 166		result = ehci_readl(ehci, ptr);
 167		if (result == ~(u32)0)		/* card removed */
 168			return -ENODEV;
 169		result &= mask;
 170		if (result == done)
 171			return 0;
 172		udelay (1);
 173		usec--;
 174	} while (usec > 0);
 175	return -ETIMEDOUT;
 176}
 177EXPORT_SYMBOL_GPL(ehci_handshake);
 178
 179/* check TDI/ARC silicon is in host mode */
 180static int tdi_in_host_mode (struct ehci_hcd *ehci)
 181{
 182	u32		tmp;
 183
 184	tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 185	return (tmp & 3) == USBMODE_CM_HC;
 186}
 187
 188/*
 189 * Force HC to halt state from unknown (EHCI spec section 2.3).
 190 * Must be called with interrupts enabled and the lock not held.
 191 */
 192static int ehci_halt (struct ehci_hcd *ehci)
 193{
 194	u32	temp;
 195
 196	spin_lock_irq(&ehci->lock);
 197
 198	/* disable any irqs left enabled by previous code */
 199	ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 200
 201	if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
 202		spin_unlock_irq(&ehci->lock);
 203		return 0;
 204	}
 205
 206	/*
 207	 * This routine gets called during probe before ehci->command
 208	 * has been initialized, so we can't rely on its value.
 209	 */
 210	ehci->command &= ~CMD_RUN;
 211	temp = ehci_readl(ehci, &ehci->regs->command);
 212	temp &= ~(CMD_RUN | CMD_IAAD);
 213	ehci_writel(ehci, temp, &ehci->regs->command);
 214
 215	spin_unlock_irq(&ehci->lock);
 216	synchronize_irq(ehci_to_hcd(ehci)->irq);
 217
 218	return ehci_handshake(ehci, &ehci->regs->status,
 219			  STS_HALT, STS_HALT, 16 * 125);
 220}
 221
 222/* put TDI/ARC silicon into EHCI mode */
 223static void tdi_reset (struct ehci_hcd *ehci)
 224{
 225	u32		tmp;
 226
 227	tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 228	tmp |= USBMODE_CM_HC;
 229	/* The default byte access to MMR space is LE after
 230	 * controller reset. Set the required endian mode
 231	 * for transfer buffers to match the host microprocessor
 232	 */
 233	if (ehci_big_endian_mmio(ehci))
 234		tmp |= USBMODE_BE;
 235	ehci_writel(ehci, tmp, &ehci->regs->usbmode);
 236}
 237
 238/*
 239 * Reset a non-running (STS_HALT == 1) controller.
 240 * Must be called with interrupts enabled and the lock not held.
 241 */
 242int ehci_reset(struct ehci_hcd *ehci)
 243{
 244	int	retval;
 245	u32	command = ehci_readl(ehci, &ehci->regs->command);
 246
 247	/* If the EHCI debug controller is active, special care must be
 248	 * taken before and after a host controller reset */
 249	if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
 250		ehci->debug = NULL;
 251
 252	command |= CMD_RESET;
 253	dbg_cmd (ehci, "reset", command);
 254	ehci_writel(ehci, command, &ehci->regs->command);
 255	ehci->rh_state = EHCI_RH_HALTED;
 256	ehci->next_statechange = jiffies;
 257	retval = ehci_handshake(ehci, &ehci->regs->command,
 258			    CMD_RESET, 0, 250 * 1000);
 259
 260	if (ehci->has_hostpc) {
 261		ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 262				&ehci->regs->usbmode_ex);
 263		ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
 264	}
 265	if (retval)
 266		return retval;
 267
 268	if (ehci_is_TDI(ehci))
 269		tdi_reset (ehci);
 270
 271	if (ehci->debug)
 272		dbgp_external_startup(ehci_to_hcd(ehci));
 273
 274	ehci->port_c_suspend = ehci->suspended_ports =
 275			ehci->resuming_ports = 0;
 276	return retval;
 277}
 278EXPORT_SYMBOL_GPL(ehci_reset);
 279
 280/*
 281 * Idle the controller (turn off the schedules).
 282 * Must be called with interrupts enabled and the lock not held.
 283 */
 284static void ehci_quiesce (struct ehci_hcd *ehci)
 285{
 286	u32	temp;
 287
 288	if (ehci->rh_state != EHCI_RH_RUNNING)
 289		return;
 290
 291	/* wait for any schedule enables/disables to take effect */
 292	temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
 293	ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp,
 294			16 * 125);
 295
 296	/* then disable anything that's still active */
 297	spin_lock_irq(&ehci->lock);
 298	ehci->command &= ~(CMD_ASE | CMD_PSE);
 299	ehci_writel(ehci, ehci->command, &ehci->regs->command);
 300	spin_unlock_irq(&ehci->lock);
 301
 302	/* hardware can take 16 microframes to turn off ... */
 303	ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0,
 304			16 * 125);
 305}
 306
 307/*-------------------------------------------------------------------------*/
 308
 309static void end_iaa_cycle(struct ehci_hcd *ehci);
 310static void end_unlink_async(struct ehci_hcd *ehci);
 311static void unlink_empty_async(struct ehci_hcd *ehci);
 312static void ehci_work(struct ehci_hcd *ehci);
 313static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 314static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 315static int ehci_port_power(struct ehci_hcd *ehci, int portnum, bool enable);
 316
 317#include "ehci-timer.c"
 318#include "ehci-hub.c"
 319#include "ehci-mem.c"
 320#include "ehci-q.c"
 321#include "ehci-sched.c"
 322#include "ehci-sysfs.c"
 323
 324/*-------------------------------------------------------------------------*/
 325
 326/* On some systems, leaving remote wakeup enabled prevents system shutdown.
 327 * The firmware seems to think that powering off is a wakeup event!
 328 * This routine turns off remote wakeup and everything else, on all ports.
 329 */
 330static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 331{
 332	int	port = HCS_N_PORTS(ehci->hcs_params);
 333
 334	while (port--) {
 335		ehci_writel(ehci, PORT_RWC_BITS,
 336				&ehci->regs->port_status[port]);
 337		spin_unlock_irq(&ehci->lock);
 338		ehci_port_power(ehci, port, false);
 339		spin_lock_irq(&ehci->lock);
 
 
 340	}
 341}
 342
 343/*
 344 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 345 * Must be called with interrupts enabled and the lock not held.
 346 */
 347static void ehci_silence_controller(struct ehci_hcd *ehci)
 348{
 349	ehci_halt(ehci);
 350
 351	spin_lock_irq(&ehci->lock);
 352	ehci->rh_state = EHCI_RH_HALTED;
 353	ehci_turn_off_all_ports(ehci);
 354
 355	/* make BIOS/etc use companion controller during reboot */
 356	ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 357
 358	/* unblock posted writes */
 359	ehci_readl(ehci, &ehci->regs->configured_flag);
 360	spin_unlock_irq(&ehci->lock);
 361}
 362
 363/* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 364 * This forcibly disables dma and IRQs, helping kexec and other cases
 365 * where the next system software may expect clean state.
 366 */
 367static void ehci_shutdown(struct usb_hcd *hcd)
 368{
 369	struct ehci_hcd	*ehci = hcd_to_ehci(hcd);
 370
 
 
 
 
 
 
 
 
 
 371	spin_lock_irq(&ehci->lock);
 372	ehci->shutdown = true;
 373	ehci->rh_state = EHCI_RH_STOPPING;
 374	ehci->enabled_hrtimer_events = 0;
 375	spin_unlock_irq(&ehci->lock);
 376
 377	ehci_silence_controller(ehci);
 378
 379	hrtimer_cancel(&ehci->hrtimer);
 380}
 381
 382/*-------------------------------------------------------------------------*/
 383
 384/*
 385 * ehci_work is called from some interrupts, timers, and so on.
 386 * it calls driver completion functions, after dropping ehci->lock.
 387 */
 388static void ehci_work (struct ehci_hcd *ehci)
 389{
 390	/* another CPU may drop ehci->lock during a schedule scan while
 391	 * it reports urb completions.  this flag guards against bogus
 392	 * attempts at re-entrant schedule scanning.
 393	 */
 394	if (ehci->scanning) {
 395		ehci->need_rescan = true;
 396		return;
 397	}
 398	ehci->scanning = true;
 399
 400 rescan:
 401	ehci->need_rescan = false;
 402	if (ehci->async_count)
 403		scan_async(ehci);
 404	if (ehci->intr_count > 0)
 405		scan_intr(ehci);
 406	if (ehci->isoc_count > 0)
 407		scan_isoc(ehci);
 408	if (ehci->need_rescan)
 409		goto rescan;
 410	ehci->scanning = false;
 411
 412	/* the IO watchdog guards against hardware or driver bugs that
 413	 * misplace IRQs, and should let us run completely without IRQs.
 414	 * such lossage has been observed on both VT6202 and VT8235.
 415	 */
 416	turn_on_io_watchdog(ehci);
 417}
 418
 419/*
 420 * Called when the ehci_hcd module is removed.
 421 */
 422static void ehci_stop (struct usb_hcd *hcd)
 423{
 424	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
 425
 426	ehci_dbg (ehci, "stop\n");
 427
 428	/* no more interrupts ... */
 429
 430	spin_lock_irq(&ehci->lock);
 431	ehci->enabled_hrtimer_events = 0;
 432	spin_unlock_irq(&ehci->lock);
 433
 434	ehci_quiesce(ehci);
 435	ehci_silence_controller(ehci);
 436	ehci_reset (ehci);
 437
 438	hrtimer_cancel(&ehci->hrtimer);
 439	remove_sysfs_files(ehci);
 440	remove_debug_files (ehci);
 441
 442	/* root hub is shut down separately (first, when possible) */
 443	spin_lock_irq (&ehci->lock);
 444	end_free_itds(ehci);
 445	spin_unlock_irq (&ehci->lock);
 446	ehci_mem_cleanup (ehci);
 447
 448	if (ehci->amd_pll_fix == 1)
 449		usb_amd_dev_put();
 450
 451	dbg_status (ehci, "ehci_stop completed",
 452		    ehci_readl(ehci, &ehci->regs->status));
 453}
 454
 455/* one-time init, only for memory state */
 456static int ehci_init(struct usb_hcd *hcd)
 457{
 458	struct ehci_hcd		*ehci = hcd_to_ehci(hcd);
 459	u32			temp;
 460	int			retval;
 461	u32			hcc_params;
 462	struct ehci_qh_hw	*hw;
 463
 464	spin_lock_init(&ehci->lock);
 465
 466	/*
 467	 * keep io watchdog by default, those good HCDs could turn off it later
 468	 */
 469	ehci->need_io_watchdog = 1;
 470
 471	hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 472	ehci->hrtimer.function = ehci_hrtimer_func;
 473	ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
 474
 475	hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 476
 477	/*
 478	 * by default set standard 80% (== 100 usec/uframe) max periodic
 479	 * bandwidth as required by USB 2.0
 480	 */
 481	ehci->uframe_periodic_max = 100;
 482
 483	/*
 484	 * hw default: 1K periodic list heads, one per frame.
 485	 * periodic_size can shrink by USBCMD update if hcc_params allows.
 486	 */
 487	ehci->periodic_size = DEFAULT_I_TDPS;
 488	INIT_LIST_HEAD(&ehci->async_unlink);
 489	INIT_LIST_HEAD(&ehci->async_idle);
 490	INIT_LIST_HEAD(&ehci->intr_unlink_wait);
 491	INIT_LIST_HEAD(&ehci->intr_unlink);
 492	INIT_LIST_HEAD(&ehci->intr_qh_list);
 493	INIT_LIST_HEAD(&ehci->cached_itd_list);
 494	INIT_LIST_HEAD(&ehci->cached_sitd_list);
 495	INIT_LIST_HEAD(&ehci->tt_list);
 496
 497	if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 498		/* periodic schedule size can be smaller than default */
 499		switch (EHCI_TUNE_FLS) {
 500		case 0: ehci->periodic_size = 1024; break;
 501		case 1: ehci->periodic_size = 512; break;
 502		case 2: ehci->periodic_size = 256; break;
 503		default:	BUG();
 504		}
 505	}
 506	if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 507		return retval;
 508
 509	/* controllers may cache some of the periodic schedule ... */
 510	if (HCC_ISOC_CACHE(hcc_params))		// full frame cache
 511		ehci->i_thresh = 0;
 512	else					// N microframes cached
 513		ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 514
 515	/*
 516	 * dedicate a qh for the async ring head, since we couldn't unlink
 517	 * a 'real' qh without stopping the async schedule [4.8].  use it
 518	 * as the 'reclamation list head' too.
 519	 * its dummy is used in hw_alt_next of many tds, to prevent the qh
 520	 * from automatically advancing to the next td after short reads.
 521	 */
 522	ehci->async->qh_next.qh = NULL;
 523	hw = ehci->async->hw;
 524	hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 525	hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 526#if defined(CONFIG_PPC_PS3)
 527	hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
 528#endif
 529	hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 530	hw->hw_qtd_next = EHCI_LIST_END(ehci);
 531	ehci->async->qh_state = QH_STATE_LINKED;
 532	hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 533
 534	/* clear interrupt enables, set irq latency */
 535	if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 536		log2_irq_thresh = 0;
 537	temp = 1 << (16 + log2_irq_thresh);
 538	if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 539		ehci->has_ppcd = 1;
 540		ehci_dbg(ehci, "enable per-port change event\n");
 541		temp |= CMD_PPCEE;
 542	}
 543	if (HCC_CANPARK(hcc_params)) {
 544		/* HW default park == 3, on hardware that supports it (like
 545		 * NVidia and ALI silicon), maximizes throughput on the async
 546		 * schedule by avoiding QH fetches between transfers.
 547		 *
 548		 * With fast usb storage devices and NForce2, "park" seems to
 549		 * make problems:  throughput reduction (!), data errors...
 550		 */
 551		if (park) {
 552			park = min(park, (unsigned) 3);
 553			temp |= CMD_PARK;
 554			temp |= park << 8;
 555		}
 556		ehci_dbg(ehci, "park %d\n", park);
 557	}
 558	if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 559		/* periodic schedule size can be smaller than default */
 560		temp &= ~(3 << 2);
 561		temp |= (EHCI_TUNE_FLS << 2);
 562	}
 563	ehci->command = temp;
 564
 565	/* Accept arbitrarily long scatter-gather lists */
 566	if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 567		hcd->self.sg_tablesize = ~0;
 568
 569	/* Prepare for unlinking active QHs */
 570	ehci->old_current = ~0;
 571	return 0;
 572}
 573
 574/* start HC running; it's halted, ehci_init() has been run (once) */
 575static int ehci_run (struct usb_hcd *hcd)
 576{
 577	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
 578	u32			temp;
 579	u32			hcc_params;
 580
 581	hcd->uses_new_polling = 1;
 582
 583	/* EHCI spec section 4.1 */
 584
 585	ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 586	ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 587
 588	/*
 589	 * hcc_params controls whether ehci->regs->segment must (!!!)
 590	 * be used; it constrains QH/ITD/SITD and QTD locations.
 591	 * pci_pool consistent memory always uses segment zero.
 592	 * streaming mappings for I/O buffers, like pci_map_single(),
 593	 * can return segments above 4GB, if the device allows.
 594	 *
 595	 * NOTE:  the dma mask is visible through dev->dma_mask, so
 596	 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 597	 * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 598	 * host side drivers though.
 599	 */
 600	hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 601	if (HCC_64BIT_ADDR(hcc_params)) {
 602		ehci_writel(ehci, 0, &ehci->regs->segment);
 603#if 0
 604// this is deeply broken on almost all architectures
 605		if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 606			ehci_info(ehci, "enabled 64bit DMA\n");
 607#endif
 608	}
 609
 610
 611	// Philips, Intel, and maybe others need CMD_RUN before the
 612	// root hub will detect new devices (why?); NEC doesn't
 613	ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 614	ehci->command |= CMD_RUN;
 615	ehci_writel(ehci, ehci->command, &ehci->regs->command);
 616	dbg_cmd (ehci, "init", ehci->command);
 617
 618	/*
 619	 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 620	 * are explicitly handed to companion controller(s), so no TT is
 621	 * involved with the root hub.  (Except where one is integrated,
 622	 * and there's no companion controller unless maybe for USB OTG.)
 623	 *
 624	 * Turning on the CF flag will transfer ownership of all ports
 625	 * from the companions to the EHCI controller.  If any of the
 626	 * companions are in the middle of a port reset at the time, it
 627	 * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 628	 * guarantees that no resets are in progress.  After we set CF,
 629	 * a short delay lets the hardware catch up; new resets shouldn't
 630	 * be started before the port switching actions could complete.
 631	 */
 632	down_write(&ehci_cf_port_reset_rwsem);
 633	ehci->rh_state = EHCI_RH_RUNNING;
 634	ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 635	ehci_readl(ehci, &ehci->regs->command);	/* unblock posted writes */
 636	msleep(5);
 637	up_write(&ehci_cf_port_reset_rwsem);
 638	ehci->last_periodic_enable = ktime_get_real();
 639
 640	temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 641	ehci_info (ehci,
 642		"USB %x.%x started, EHCI %x.%02x%s\n",
 643		((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 644		temp >> 8, temp & 0xff,
 645		ignore_oc ? ", overcurrent ignored" : "");
 646
 647	ehci_writel(ehci, INTR_MASK,
 648		    &ehci->regs->intr_enable); /* Turn On Interrupts */
 649
 650	/* GRR this is run-once init(), being done every time the HC starts.
 651	 * So long as they're part of class devices, we can't do it init()
 652	 * since the class device isn't created that early.
 653	 */
 654	create_debug_files(ehci);
 655	create_sysfs_files(ehci);
 656
 657	return 0;
 658}
 659
 660int ehci_setup(struct usb_hcd *hcd)
 661{
 662	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 663	int retval;
 664
 665	ehci->regs = (void __iomem *)ehci->caps +
 666	    HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 667	dbg_hcs_params(ehci, "reset");
 668	dbg_hcc_params(ehci, "reset");
 669
 670	/* cache this readonly data; minimize chip reads */
 671	ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 672
 673	ehci->sbrn = HCD_USB2;
 674
 675	/* data structure init */
 676	retval = ehci_init(hcd);
 677	if (retval)
 678		return retval;
 679
 680	retval = ehci_halt(ehci);
 681	if (retval) {
 682		ehci_mem_cleanup(ehci);
 683		return retval;
 684	}
 685
 686	ehci_reset(ehci);
 687
 688	return 0;
 689}
 690EXPORT_SYMBOL_GPL(ehci_setup);
 691
 692/*-------------------------------------------------------------------------*/
 693
 694static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 695{
 696	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
 697	u32			status, masked_status, pcd_status = 0, cmd;
 698	int			bh;
 699	unsigned long		flags;
 700
 701	/*
 702	 * For threadirqs option we use spin_lock_irqsave() variant to prevent
 703	 * deadlock with ehci hrtimer callback, because hrtimer callbacks run
 704	 * in interrupt context even when threadirqs is specified. We can go
 705	 * back to spin_lock() variant when hrtimer callbacks become threaded.
 706	 */
 707	spin_lock_irqsave(&ehci->lock, flags);
 708
 709	status = ehci_readl(ehci, &ehci->regs->status);
 710
 711	/* e.g. cardbus physical eject */
 712	if (status == ~(u32) 0) {
 713		ehci_dbg (ehci, "device removed\n");
 714		goto dead;
 715	}
 716
 717	/*
 718	 * We don't use STS_FLR, but some controllers don't like it to
 719	 * remain on, so mask it out along with the other status bits.
 720	 */
 721	masked_status = status & (INTR_MASK | STS_FLR);
 722
 723	/* Shared IRQ? */
 724	if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
 725		spin_unlock_irqrestore(&ehci->lock, flags);
 726		return IRQ_NONE;
 727	}
 728
 729	/* clear (just) interrupts */
 730	ehci_writel(ehci, masked_status, &ehci->regs->status);
 731	cmd = ehci_readl(ehci, &ehci->regs->command);
 732	bh = 0;
 733
 734	/* normal [4.15.1.2] or error [4.15.1.1] completion */
 735	if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 736		if (likely ((status & STS_ERR) == 0))
 737			COUNT (ehci->stats.normal);
 738		else
 739			COUNT (ehci->stats.error);
 740		bh = 1;
 741	}
 742
 743	/* complete the unlinking of some qh [4.15.2.3] */
 744	if (status & STS_IAA) {
 745
 746		/* Turn off the IAA watchdog */
 747		ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
 748
 749		/*
 750		 * Mild optimization: Allow another IAAD to reset the
 751		 * hrtimer, if one occurs before the next expiration.
 752		 * In theory we could always cancel the hrtimer, but
 753		 * tests show that about half the time it will be reset
 754		 * for some other event anyway.
 755		 */
 756		if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
 757			++ehci->next_hrtimer_event;
 758
 759		/* guard against (alleged) silicon errata */
 760		if (cmd & CMD_IAAD)
 761			ehci_dbg(ehci, "IAA with IAAD still set?\n");
 762		if (ehci->iaa_in_progress)
 763			COUNT(ehci->stats.iaa);
 764		end_iaa_cycle(ehci);
 765	}
 766
 767	/* remote wakeup [4.3.1] */
 768	if (status & STS_PCD) {
 769		unsigned	i = HCS_N_PORTS (ehci->hcs_params);
 770		u32		ppcd = ~0;
 771
 772		/* kick root hub later */
 773		pcd_status = status;
 774
 775		/* resume root hub? */
 776		if (ehci->rh_state == EHCI_RH_SUSPENDED)
 777			usb_hcd_resume_root_hub(hcd);
 778
 779		/* get per-port change detect bits */
 780		if (ehci->has_ppcd)
 781			ppcd = status >> 16;
 782
 783		while (i--) {
 784			int pstatus;
 785
 786			/* leverage per-port change bits feature */
 787			if (!(ppcd & (1 << i)))
 788				continue;
 789			pstatus = ehci_readl(ehci,
 790					 &ehci->regs->port_status[i]);
 791
 792			if (pstatus & PORT_OWNER)
 793				continue;
 794			if (!(test_bit(i, &ehci->suspended_ports) &&
 795					((pstatus & PORT_RESUME) ||
 796						!(pstatus & PORT_SUSPEND)) &&
 797					(pstatus & PORT_PE) &&
 798					ehci->reset_done[i] == 0))
 799				continue;
 800
 801			/* start USB_RESUME_TIMEOUT msec resume signaling from
 802			 * this port, and make hub_wq collect
 803			 * PORT_STAT_C_SUSPEND to stop that signaling.
 804			 */
 805			ehci->reset_done[i] = jiffies +
 806				msecs_to_jiffies(USB_RESUME_TIMEOUT);
 807			set_bit(i, &ehci->resuming_ports);
 808			ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 809			usb_hcd_start_port_resume(&hcd->self, i);
 810			mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 811		}
 812	}
 813
 814	/* PCI errors [4.15.2.4] */
 815	if (unlikely ((status & STS_FATAL) != 0)) {
 816		ehci_err(ehci, "fatal error\n");
 817		dbg_cmd(ehci, "fatal", cmd);
 818		dbg_status(ehci, "fatal", status);
 819dead:
 820		usb_hc_died(hcd);
 821
 822		/* Don't let the controller do anything more */
 823		ehci->shutdown = true;
 824		ehci->rh_state = EHCI_RH_STOPPING;
 825		ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
 826		ehci_writel(ehci, ehci->command, &ehci->regs->command);
 827		ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 828		ehci_handle_controller_death(ehci);
 829
 830		/* Handle completions when the controller stops */
 831		bh = 0;
 832	}
 833
 834	if (bh)
 835		ehci_work (ehci);
 836	spin_unlock_irqrestore(&ehci->lock, flags);
 837	if (pcd_status)
 838		usb_hcd_poll_rh_status(hcd);
 839	return IRQ_HANDLED;
 840}
 841
 842/*-------------------------------------------------------------------------*/
 843
 844/*
 845 * non-error returns are a promise to giveback() the urb later
 846 * we drop ownership so next owner (or urb unlink) can get it
 847 *
 848 * urb + dev is in hcd.self.controller.urb_list
 849 * we're queueing TDs onto software and hardware lists
 850 *
 851 * hcd-specific init for hcpriv hasn't been done yet
 852 *
 853 * NOTE:  control, bulk, and interrupt share the same code to append TDs
 854 * to a (possibly active) QH, and the same QH scanning code.
 855 */
 856static int ehci_urb_enqueue (
 857	struct usb_hcd	*hcd,
 858	struct urb	*urb,
 859	gfp_t		mem_flags
 860) {
 861	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
 862	struct list_head	qtd_list;
 863
 864	INIT_LIST_HEAD (&qtd_list);
 865
 866	switch (usb_pipetype (urb->pipe)) {
 867	case PIPE_CONTROL:
 868		/* qh_completions() code doesn't handle all the fault cases
 869		 * in multi-TD control transfers.  Even 1KB is rare anyway.
 870		 */
 871		if (urb->transfer_buffer_length > (16 * 1024))
 872			return -EMSGSIZE;
 873		/* FALLTHROUGH */
 874	/* case PIPE_BULK: */
 875	default:
 876		if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 877			return -ENOMEM;
 878		return submit_async(ehci, urb, &qtd_list, mem_flags);
 879
 880	case PIPE_INTERRUPT:
 881		if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 882			return -ENOMEM;
 883		return intr_submit(ehci, urb, &qtd_list, mem_flags);
 884
 885	case PIPE_ISOCHRONOUS:
 886		if (urb->dev->speed == USB_SPEED_HIGH)
 887			return itd_submit (ehci, urb, mem_flags);
 888		else
 889			return sitd_submit (ehci, urb, mem_flags);
 890	}
 891}
 892
 893/* remove from hardware lists
 894 * completions normally happen asynchronously
 895 */
 896
 897static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 898{
 899	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
 900	struct ehci_qh		*qh;
 901	unsigned long		flags;
 902	int			rc;
 903
 904	spin_lock_irqsave (&ehci->lock, flags);
 905	rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 906	if (rc)
 907		goto done;
 908
 909	if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
 910		/*
 911		 * We don't expedite dequeue for isochronous URBs.
 912		 * Just wait until they complete normally or their
 913		 * time slot expires.
 914		 */
 915	} else {
 916		qh = (struct ehci_qh *) urb->hcpriv;
 917		qh->unlink_reason |= QH_UNLINK_REQUESTED;
 918		switch (qh->qh_state) {
 919		case QH_STATE_LINKED:
 920			if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
 921				start_unlink_intr(ehci, qh);
 922			else
 923				start_unlink_async(ehci, qh);
 924			break;
 925		case QH_STATE_COMPLETING:
 926			qh->dequeue_during_giveback = 1;
 927			break;
 928		case QH_STATE_UNLINK:
 929		case QH_STATE_UNLINK_WAIT:
 930			/* already started */
 931			break;
 932		case QH_STATE_IDLE:
 933			/* QH might be waiting for a Clear-TT-Buffer */
 934			qh_completions(ehci, qh);
 935			break;
 936		}
 937	}
 938done:
 939	spin_unlock_irqrestore (&ehci->lock, flags);
 940	return rc;
 941}
 942
 943/*-------------------------------------------------------------------------*/
 944
 945// bulk qh holds the data toggle
 946
 947static void
 948ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 949{
 950	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
 951	unsigned long		flags;
 952	struct ehci_qh		*qh;
 953
 954	/* ASSERT:  any requests/urbs are being unlinked */
 955	/* ASSERT:  nobody can be submitting urbs for this any more */
 956
 957rescan:
 958	spin_lock_irqsave (&ehci->lock, flags);
 959	qh = ep->hcpriv;
 960	if (!qh)
 961		goto done;
 962
 963	/* endpoints can be iso streams.  for now, we don't
 964	 * accelerate iso completions ... so spin a while.
 965	 */
 966	if (qh->hw == NULL) {
 967		struct ehci_iso_stream	*stream = ep->hcpriv;
 968
 969		if (!list_empty(&stream->td_list))
 970			goto idle_timeout;
 971
 972		/* BUG_ON(!list_empty(&stream->free_list)); */
 973		reserve_release_iso_bandwidth(ehci, stream, -1);
 974		kfree(stream);
 975		goto done;
 976	}
 977
 978	qh->unlink_reason |= QH_UNLINK_REQUESTED;
 979	switch (qh->qh_state) {
 980	case QH_STATE_LINKED:
 981		if (list_empty(&qh->qtd_list))
 982			qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
 983		else
 984			WARN_ON(1);
 985		if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT)
 986			start_unlink_async(ehci, qh);
 987		else
 988			start_unlink_intr(ehci, qh);
 989		/* FALL THROUGH */
 990	case QH_STATE_COMPLETING:	/* already in unlinking */
 991	case QH_STATE_UNLINK:		/* wait for hw to finish? */
 992	case QH_STATE_UNLINK_WAIT:
 993idle_timeout:
 994		spin_unlock_irqrestore (&ehci->lock, flags);
 995		schedule_timeout_uninterruptible(1);
 996		goto rescan;
 997	case QH_STATE_IDLE:		/* fully unlinked */
 998		if (qh->clearing_tt)
 999			goto idle_timeout;
1000		if (list_empty (&qh->qtd_list)) {
1001			if (qh->ps.bw_uperiod)
1002				reserve_release_intr_bandwidth(ehci, qh, -1);
1003			qh_destroy(ehci, qh);
1004			break;
1005		}
1006		/* else FALL THROUGH */
1007	default:
1008		/* caller was supposed to have unlinked any requests;
1009		 * that's not our job.  just leak this memory.
1010		 */
1011		ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1012			qh, ep->desc.bEndpointAddress, qh->qh_state,
1013			list_empty (&qh->qtd_list) ? "" : "(has tds)");
1014		break;
1015	}
1016 done:
1017	ep->hcpriv = NULL;
1018	spin_unlock_irqrestore (&ehci->lock, flags);
1019}
1020
1021static void
1022ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1023{
1024	struct ehci_hcd		*ehci = hcd_to_ehci(hcd);
1025	struct ehci_qh		*qh;
1026	int			eptype = usb_endpoint_type(&ep->desc);
1027	int			epnum = usb_endpoint_num(&ep->desc);
1028	int			is_out = usb_endpoint_dir_out(&ep->desc);
1029	unsigned long		flags;
1030
1031	if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1032		return;
1033
1034	spin_lock_irqsave(&ehci->lock, flags);
1035	qh = ep->hcpriv;
1036
1037	/* For Bulk and Interrupt endpoints we maintain the toggle state
1038	 * in the hardware; the toggle bits in udev aren't used at all.
1039	 * When an endpoint is reset by usb_clear_halt() we must reset
1040	 * the toggle bit in the QH.
1041	 */
1042	if (qh) {
1043		if (!list_empty(&qh->qtd_list)) {
1044			WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1045		} else {
1046			/* The toggle value in the QH can't be updated
1047			 * while the QH is active.  Unlink it now;
1048			 * re-linking will call qh_refresh().
1049			 */
1050			usb_settoggle(qh->ps.udev, epnum, is_out, 0);
1051			qh->unlink_reason |= QH_UNLINK_REQUESTED;
1052			if (eptype == USB_ENDPOINT_XFER_BULK)
1053				start_unlink_async(ehci, qh);
1054			else
1055				start_unlink_intr(ehci, qh);
1056		}
1057	}
1058	spin_unlock_irqrestore(&ehci->lock, flags);
1059}
1060
1061static int ehci_get_frame (struct usb_hcd *hcd)
1062{
1063	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
1064	return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1065}
1066
1067/*-------------------------------------------------------------------------*/
1068
1069/* Device addition and removal */
1070
1071static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev)
1072{
1073	struct ehci_hcd		*ehci = hcd_to_ehci(hcd);
1074
1075	spin_lock_irq(&ehci->lock);
1076	drop_tt(udev);
1077	spin_unlock_irq(&ehci->lock);
1078}
1079
1080/*-------------------------------------------------------------------------*/
1081
1082#ifdef	CONFIG_PM
1083
1084/* suspend/resume, section 4.3 */
1085
1086/* These routines handle the generic parts of controller suspend/resume */
1087
1088int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1089{
1090	struct ehci_hcd		*ehci = hcd_to_ehci(hcd);
1091
1092	if (time_before(jiffies, ehci->next_statechange))
1093		msleep(10);
1094
1095	/*
1096	 * Root hub was already suspended.  Disable IRQ emission and
1097	 * mark HW unaccessible.  The PM and USB cores make sure that
1098	 * the root hub is either suspended or stopped.
1099	 */
1100	ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1101
1102	spin_lock_irq(&ehci->lock);
1103	ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1104	(void) ehci_readl(ehci, &ehci->regs->intr_enable);
1105
1106	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1107	spin_unlock_irq(&ehci->lock);
1108
1109	synchronize_irq(hcd->irq);
1110
1111	/* Check for race with a wakeup request */
1112	if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1113		ehci_resume(hcd, false);
1114		return -EBUSY;
1115	}
1116
1117	return 0;
1118}
1119EXPORT_SYMBOL_GPL(ehci_suspend);
1120
1121/* Returns 0 if power was preserved, 1 if power was lost */
1122int ehci_resume(struct usb_hcd *hcd, bool force_reset)
1123{
1124	struct ehci_hcd		*ehci = hcd_to_ehci(hcd);
1125
1126	if (time_before(jiffies, ehci->next_statechange))
1127		msleep(100);
1128
1129	/* Mark hardware accessible again as we are back to full power by now */
1130	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1131
1132	if (ehci->shutdown)
1133		return 0;		/* Controller is dead */
1134
1135	/*
1136	 * If CF is still set and reset isn't forced
1137	 * then we maintained suspend power.
1138	 * Just undo the effect of ehci_suspend().
1139	 */
1140	if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1141			!force_reset) {
1142		int	mask = INTR_MASK;
1143
1144		ehci_prepare_ports_for_controller_resume(ehci);
1145
1146		spin_lock_irq(&ehci->lock);
1147		if (ehci->shutdown)
1148			goto skip;
1149
1150		if (!hcd->self.root_hub->do_remote_wakeup)
1151			mask &= ~STS_PCD;
1152		ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1153		ehci_readl(ehci, &ehci->regs->intr_enable);
1154 skip:
1155		spin_unlock_irq(&ehci->lock);
1156		return 0;
1157	}
1158
1159	/*
1160	 * Else reset, to cope with power loss or resume from hibernation
1161	 * having let the firmware kick in during reboot.
1162	 */
1163	usb_root_hub_lost_power(hcd->self.root_hub);
1164	(void) ehci_halt(ehci);
1165	(void) ehci_reset(ehci);
1166
1167	spin_lock_irq(&ehci->lock);
1168	if (ehci->shutdown)
1169		goto skip;
1170
1171	ehci_writel(ehci, ehci->command, &ehci->regs->command);
1172	ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1173	ehci_readl(ehci, &ehci->regs->command);	/* unblock posted writes */
1174
1175	ehci->rh_state = EHCI_RH_SUSPENDED;
1176	spin_unlock_irq(&ehci->lock);
1177
1178	return 1;
1179}
1180EXPORT_SYMBOL_GPL(ehci_resume);
1181
1182#endif
1183
1184/*-------------------------------------------------------------------------*/
1185
1186/*
1187 * Generic structure: This gets copied for platform drivers so that
1188 * individual entries can be overridden as needed.
1189 */
1190
1191static const struct hc_driver ehci_hc_driver = {
1192	.description =		hcd_name,
1193	.product_desc =		"EHCI Host Controller",
1194	.hcd_priv_size =	sizeof(struct ehci_hcd),
1195
1196	/*
1197	 * generic hardware linkage
1198	 */
1199	.irq =			ehci_irq,
1200	.flags =		HCD_MEMORY | HCD_USB2 | HCD_BH,
1201
1202	/*
1203	 * basic lifecycle operations
1204	 */
1205	.reset =		ehci_setup,
1206	.start =		ehci_run,
1207	.stop =			ehci_stop,
1208	.shutdown =		ehci_shutdown,
1209
1210	/*
1211	 * managing i/o requests and associated device resources
1212	 */
1213	.urb_enqueue =		ehci_urb_enqueue,
1214	.urb_dequeue =		ehci_urb_dequeue,
1215	.endpoint_disable =	ehci_endpoint_disable,
1216	.endpoint_reset =	ehci_endpoint_reset,
1217	.clear_tt_buffer_complete =	ehci_clear_tt_buffer_complete,
1218
1219	/*
1220	 * scheduling support
1221	 */
1222	.get_frame_number =	ehci_get_frame,
1223
1224	/*
1225	 * root hub support
1226	 */
1227	.hub_status_data =	ehci_hub_status_data,
1228	.hub_control =		ehci_hub_control,
1229	.bus_suspend =		ehci_bus_suspend,
1230	.bus_resume =		ehci_bus_resume,
1231	.relinquish_port =	ehci_relinquish_port,
1232	.port_handed_over =	ehci_port_handed_over,
 
1233
1234	/*
1235	 * device support
1236	 */
1237	.free_dev =		ehci_remove_device,
1238};
1239
1240void ehci_init_driver(struct hc_driver *drv,
1241		const struct ehci_driver_overrides *over)
1242{
1243	/* Copy the generic table to drv and then apply the overrides */
1244	*drv = ehci_hc_driver;
1245
1246	if (over) {
1247		drv->hcd_priv_size += over->extra_priv_size;
1248		if (over->reset)
1249			drv->reset = over->reset;
1250		if (over->port_power)
1251			drv->port_power = over->port_power;
1252	}
1253}
1254EXPORT_SYMBOL_GPL(ehci_init_driver);
1255
1256/*-------------------------------------------------------------------------*/
1257
1258MODULE_DESCRIPTION(DRIVER_DESC);
1259MODULE_AUTHOR (DRIVER_AUTHOR);
1260MODULE_LICENSE ("GPL");
1261
1262#ifdef CONFIG_USB_EHCI_SH
1263#include "ehci-sh.c"
1264#define PLATFORM_DRIVER		ehci_hcd_sh_driver
1265#endif
1266
1267#ifdef CONFIG_PPC_PS3
1268#include "ehci-ps3.c"
1269#define	PS3_SYSTEM_BUS_DRIVER	ps3_ehci_driver
1270#endif
1271
1272#ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1273#include "ehci-ppc-of.c"
1274#define OF_PLATFORM_DRIVER	ehci_hcd_ppc_of_driver
1275#endif
1276
1277#ifdef CONFIG_XPS_USB_HCD_XILINX
1278#include "ehci-xilinx-of.c"
1279#define XILINX_OF_PLATFORM_DRIVER	ehci_hcd_xilinx_of_driver
1280#endif
1281
1282#ifdef CONFIG_TILE_USB
1283#include "ehci-tilegx.c"
1284#define	PLATFORM_DRIVER		ehci_hcd_tilegx_driver
1285#endif
1286
1287#ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1288#include "ehci-pmcmsp.c"
1289#define	PLATFORM_DRIVER		ehci_hcd_msp_driver
1290#endif
1291
1292#ifdef CONFIG_SPARC_LEON
1293#include "ehci-grlib.c"
1294#define PLATFORM_DRIVER		ehci_grlib_driver
1295#endif
1296
1297#ifdef CONFIG_USB_EHCI_MV
1298#include "ehci-mv.c"
1299#define        PLATFORM_DRIVER         ehci_mv_driver
1300#endif
1301
1302#ifdef CONFIG_MIPS_SEAD3
1303#include "ehci-sead3.c"
1304#define	PLATFORM_DRIVER		ehci_hcd_sead3_driver
1305#endif
1306
1307static int __init ehci_hcd_init(void)
1308{
1309	int retval = 0;
1310
1311	if (usb_disabled())
1312		return -ENODEV;
1313
1314	printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1315	set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1316	if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1317			test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1318		printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1319				" before uhci_hcd and ohci_hcd, not after\n");
1320
1321	pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1322		 hcd_name,
1323		 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1324		 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1325
1326#ifdef CONFIG_DYNAMIC_DEBUG
1327	ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1328	if (!ehci_debug_root) {
1329		retval = -ENOENT;
1330		goto err_debug;
1331	}
1332#endif
1333
1334#ifdef PLATFORM_DRIVER
1335	retval = platform_driver_register(&PLATFORM_DRIVER);
1336	if (retval < 0)
1337		goto clean0;
1338#endif
1339
1340#ifdef PS3_SYSTEM_BUS_DRIVER
1341	retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1342	if (retval < 0)
1343		goto clean2;
1344#endif
1345
1346#ifdef OF_PLATFORM_DRIVER
1347	retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1348	if (retval < 0)
1349		goto clean3;
1350#endif
1351
1352#ifdef XILINX_OF_PLATFORM_DRIVER
1353	retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1354	if (retval < 0)
1355		goto clean4;
1356#endif
1357	return retval;
1358
1359#ifdef XILINX_OF_PLATFORM_DRIVER
1360	/* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1361clean4:
1362#endif
1363#ifdef OF_PLATFORM_DRIVER
1364	platform_driver_unregister(&OF_PLATFORM_DRIVER);
1365clean3:
1366#endif
1367#ifdef PS3_SYSTEM_BUS_DRIVER
1368	ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1369clean2:
1370#endif
1371#ifdef PLATFORM_DRIVER
1372	platform_driver_unregister(&PLATFORM_DRIVER);
1373clean0:
1374#endif
1375#ifdef CONFIG_DYNAMIC_DEBUG
1376	debugfs_remove(ehci_debug_root);
1377	ehci_debug_root = NULL;
1378err_debug:
1379#endif
1380	clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1381	return retval;
1382}
1383module_init(ehci_hcd_init);
1384
1385static void __exit ehci_hcd_cleanup(void)
1386{
1387#ifdef XILINX_OF_PLATFORM_DRIVER
1388	platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1389#endif
1390#ifdef OF_PLATFORM_DRIVER
1391	platform_driver_unregister(&OF_PLATFORM_DRIVER);
1392#endif
1393#ifdef PLATFORM_DRIVER
1394	platform_driver_unregister(&PLATFORM_DRIVER);
1395#endif
1396#ifdef PS3_SYSTEM_BUS_DRIVER
1397	ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1398#endif
1399#ifdef CONFIG_DYNAMIC_DEBUG
1400	debugfs_remove(ehci_debug_root);
1401#endif
1402	clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1403}
1404module_exit(ehci_hcd_cleanup);