1config USB_DWC3
  2	tristate "DesignWare USB3 DRD Core Support"
  3	depends on (USB || USB_GADGET) && HAS_DMA
  4	select USB_XHCI_PLATFORM if USB_SUPPORT && USB_XHCI_HCD
  5	help
  6	  Say Y or M here if your system has a Dual Role SuperSpeed
  7	  USB controller based on the DesignWare USB3 IP Core.
  8
  9	  If you choose to build this driver is a dynamically linked
 10	  module, the module will be called dwc3.ko.
 11
 12if USB_DWC3
 13
 14config USB_DWC3_ULPI
 15	bool "Register ULPI PHY Interface"
 16	depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
 17	help
 18	  Select this if you have ULPI type PHY attached to your DWC3
 19	  controller.
 20
 21choice
 22	bool "DWC3 Mode Selection"
 23	default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
 24	default USB_DWC3_HOST if (USB && !USB_GADGET)
 25	default USB_DWC3_GADGET if (!USB && USB_GADGET)
 26
 27config USB_DWC3_HOST
 28	bool "Host only mode"
 29	depends on USB=y || USB=USB_DWC3
 30	help
 31	  Select this when you want to use DWC3 in host mode only,
 32	  thereby the gadget feature will be regressed.
 33
 34config USB_DWC3_GADGET
 35	bool "Gadget only mode"
 36	depends on USB_GADGET=y || USB_GADGET=USB_DWC3
 37	help
 38	  Select this when you want to use DWC3 in gadget mode only,
 39	  thereby the host feature will be regressed.
 40
 41config USB_DWC3_DUAL_ROLE
 42	bool "Dual Role mode"
 43	depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
 
 44	help
 45	  This is the default mode of working of DWC3 controller where
 46	  both host and gadget features are enabled.
 47
 48endchoice
 49
 50comment "Platform Glue Driver Support"
 51
 52config USB_DWC3_OMAP
 53	tristate "Texas Instruments OMAP5 and similar Platforms"
 54	depends on EXTCON && (ARCH_OMAP2PLUS || COMPILE_TEST)
 
 55	depends on OF
 56	default USB_DWC3
 57	help
 58	  Some platforms from Texas Instruments like OMAP5, DRA7xxx and
 59	  AM437x use this IP for USB2/3 functionality.
 60
 61	  Say 'Y' or 'M' here if you have one such device
 62
 63config USB_DWC3_EXYNOS
 64	tristate "Samsung Exynos Platform"
 65	depends on ARCH_EXYNOS && OF || COMPILE_TEST
 66	default USB_DWC3
 67	help
 68	  Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
 69	  say 'Y' or 'M' if you have one such device.
 70
 71config USB_DWC3_PCI
 72	tristate "PCIe-based Platforms"
 73	depends on PCI
 74	default USB_DWC3
 75	help
 76	  If you're using the DesignWare Core IP with a PCIe, please say
 77	  'Y' or 'M' here.
 78
 79	  One such PCIe-based platform is Synopsys' PCIe HAPS model of
 80	  this IP.
 
 
 
 
 
 81
 82config USB_DWC3_KEYSTONE
 83	tristate "Texas Instruments Keystone2 Platforms"
 84	depends on ARCH_KEYSTONE || COMPILE_TEST
 85	default USB_DWC3
 86	help
 87	  Support of USB2/3 functionality in TI Keystone2 platforms.
 88	  Say 'Y' or 'M' here if you have one such device
 89
 
 
 
 
 
 
 
 
 
 
 
 90config USB_DWC3_OF_SIMPLE
 91       tristate "Generic OF Simple Glue Layer"
 92       depends on OF && COMMON_CLK
 93       default USB_DWC3
 94       help
 95         Support USB2/3 functionality in simple SoC integrations.
 96	 Currently supports Xilinx and Qualcomm DWC USB3 IP.
 97	 Say 'Y' or 'M' if you have one such device.
 98
 99config USB_DWC3_ST
100	tristate "STMicroelectronics Platforms"
101	depends on ARCH_STI && OF
102	default USB_DWC3
103	help
104	  STMicroelectronics SoCs with one DesignWare Core USB3 IP
105	  inside (i.e. STiH407).
 
 
 
 
 
 
 
 
 
 
 
 
 
106	  Say 'Y' or 'M' if you have one such device.
107
108endif

  1# SPDX-License-Identifier: GPL-2.0
  2
  3config USB_DWC3
  4	tristate "DesignWare USB3 DRD Core Support"
  5	depends on (USB || USB_GADGET) && HAS_DMA
  6	select USB_XHCI_PLATFORM if USB_XHCI_HCD
  7	help
  8	  Say Y or M here if your system has a Dual Role SuperSpeed
  9	  USB controller based on the DesignWare USB3 IP Core.
 10
 11	  If you choose to build this driver is a dynamically linked
 12	  module, the module will be called dwc3.ko.
 13
 14if USB_DWC3
 15
 16config USB_DWC3_ULPI
 17	bool "Register ULPI PHY Interface"
 18	depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
 19	help
 20	  Select this if you have ULPI type PHY attached to your DWC3
 21	  controller.
 22
 23choice
 24	bool "DWC3 Mode Selection"
 25	default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
 26	default USB_DWC3_HOST if (USB && !USB_GADGET)
 27	default USB_DWC3_GADGET if (!USB && USB_GADGET)
 28
 29config USB_DWC3_HOST
 30	bool "Host only mode"
 31	depends on USB=y || USB=USB_DWC3
 32	help
 33	  Select this when you want to use DWC3 in host mode only,
 34	  thereby the gadget feature will be regressed.
 35
 36config USB_DWC3_GADGET
 37	bool "Gadget only mode"
 38	depends on USB_GADGET=y || USB_GADGET=USB_DWC3
 39	help
 40	  Select this when you want to use DWC3 in gadget mode only,
 41	  thereby the host feature will be regressed.
 42
 43config USB_DWC3_DUAL_ROLE
 44	bool "Dual Role mode"
 45	depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
 46	depends on (EXTCON=y || EXTCON=USB_DWC3)
 47	help
 48	  This is the default mode of working of DWC3 controller where
 49	  both host and gadget features are enabled.
 50
 51endchoice
 52
 53comment "Platform Glue Driver Support"
 54
 55config USB_DWC3_OMAP
 56	tristate "Texas Instruments OMAP5 and similar Platforms"
 57	depends on ARCH_OMAP2PLUS || COMPILE_TEST
 58	depends on EXTCON || !EXTCON
 59	depends on OF
 60	default USB_DWC3
 61	help
 62	  Some platforms from Texas Instruments like OMAP5, DRA7xxx and
 63	  AM437x use this IP for USB2/3 functionality.
 64
 65	  Say 'Y' or 'M' here if you have one such device
 66
 67config USB_DWC3_EXYNOS
 68	tristate "Samsung Exynos Platform"
 69	depends on (ARCH_EXYNOS || COMPILE_TEST) && OF
 70	default USB_DWC3
 71	help
 72	  Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
 73	  say 'Y' or 'M' if you have one such device.
 74
 75config USB_DWC3_PCI
 76	tristate "PCIe-based Platforms"
 77	depends on USB_PCI && ACPI
 78	default USB_DWC3
 79	help
 80	  If you're using the DesignWare Core IP with a PCIe (but not HAPS
 81	  platform), please say 'Y' or 'M' here.
 82
 83config USB_DWC3_HAPS
 84	tristate "Synopsys PCIe-based HAPS Platforms"
 85	depends on USB_PCI
 86	default USB_DWC3
 87	help
 88	  If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
 89	  platform, please say 'Y' or 'M' here.
 90
 91config USB_DWC3_KEYSTONE
 92	tristate "Texas Instruments Keystone2/AM654 Platforms"
 93	depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
 94	default USB_DWC3
 95	help
 96	  Support of USB2/3 functionality in TI Keystone2 and AM654 platforms.
 97	  Say 'Y' or 'M' here if you have one such device
 98
 99config USB_DWC3_MESON_G12A
100       tristate "Amlogic Meson G12A Platforms"
101       depends on OF && COMMON_CLK
102       depends on ARCH_MESON || COMPILE_TEST
103       default USB_DWC3
104       select USB_ROLE_SWITCH
105	select REGMAP_MMIO
106       help
107         Support USB2/3 functionality in Amlogic G12A platforms.
108	 Say 'Y' or 'M' if you have one such device.
109
110config USB_DWC3_OF_SIMPLE
111       tristate "Generic OF Simple Glue Layer"
112       depends on OF && COMMON_CLK
113       default USB_DWC3
114       help
115         Support USB2/3 functionality in simple SoC integrations.
116	 Currently supports Xilinx and Qualcomm DWC USB3 IP.
117	 Say 'Y' or 'M' if you have one such device.
118
119config USB_DWC3_ST
120	tristate "STMicroelectronics Platforms"
121	depends on (ARCH_STI || COMPILE_TEST) && OF
122	default USB_DWC3
123	help
124	  STMicroelectronics SoCs with one DesignWare Core USB3 IP
125	  inside (i.e. STiH407).
126	  Say 'Y' or 'M' if you have one such device.
127
128config USB_DWC3_QCOM
129	tristate "Qualcomm Platform"
130	depends on ARCH_QCOM || COMPILE_TEST
131	depends on EXTCON || !EXTCON
132	depends on (OF || ACPI)
133	default USB_DWC3
134	help
135	  Some Qualcomm SoCs use DesignWare Core IP for USB2/3
136	  functionality.
137	  This driver also handles Qscratch wrapper which is needed
138	  for peripheral mode support.
139	  Say 'Y' or 'M' if you have one such device.
140
141endif