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1/*
2 * Copyright(c) 2011-2015 Intel Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24#include "intel_drv.h"
25#include "i915_vgpu.h"
26
27/**
28 * DOC: Intel GVT-g guest support
29 *
30 * Intel GVT-g is a graphics virtualization technology which shares the
31 * GPU among multiple virtual machines on a time-sharing basis. Each
32 * virtual machine is presented a virtual GPU (vGPU), which has equivalent
33 * features as the underlying physical GPU (pGPU), so i915 driver can run
34 * seamlessly in a virtual machine. This file provides vGPU specific
35 * optimizations when running in a virtual machine, to reduce the complexity
36 * of vGPU emulation and to improve the overall performance.
37 *
38 * A primary function introduced here is so-called "address space ballooning"
39 * technique. Intel GVT-g partitions global graphics memory among multiple VMs,
40 * so each VM can directly access a portion of the memory without hypervisor's
41 * intervention, e.g. filling textures or queuing commands. However with the
42 * partitioning an unmodified i915 driver would assume a smaller graphics
43 * memory starting from address ZERO, then requires vGPU emulation module to
44 * translate the graphics address between 'guest view' and 'host view', for
45 * all registers and command opcodes which contain a graphics memory address.
46 * To reduce the complexity, Intel GVT-g introduces "address space ballooning",
47 * by telling the exact partitioning knowledge to each guest i915 driver, which
48 * then reserves and prevents non-allocated portions from allocation. Thus vGPU
49 * emulation module only needs to scan and validate graphics addresses without
50 * complexity of address translation.
51 *
52 */
53
54/**
55 * i915_check_vgpu - detect virtual GPU
56 * @dev: drm device *
57 *
58 * This function is called at the initialization stage, to detect whether
59 * running on a vGPU.
60 */
61void i915_check_vgpu(struct drm_device *dev)
62{
63 struct drm_i915_private *dev_priv = to_i915(dev);
64 uint64_t magic;
65 uint32_t version;
66
67 BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
68
69 if (!IS_HASWELL(dev))
70 return;
71
72 magic = __raw_i915_read64(dev_priv, vgtif_reg(magic));
73 if (magic != VGT_MAGIC)
74 return;
75
76 version = INTEL_VGT_IF_VERSION_ENCODE(
77 __raw_i915_read16(dev_priv, vgtif_reg(version_major)),
78 __raw_i915_read16(dev_priv, vgtif_reg(version_minor)));
79 if (version != INTEL_VGT_IF_VERSION) {
80 DRM_INFO("VGT interface version mismatch!\n");
81 return;
82 }
83
84 dev_priv->vgpu.active = true;
85 DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
86}
87
88struct _balloon_info_ {
89 /*
90 * There are up to 2 regions per mappable/unmappable graphic
91 * memory that might be ballooned. Here, index 0/1 is for mappable
92 * graphic memory, 2/3 for unmappable graphic memory.
93 */
94 struct drm_mm_node space[4];
95};
96
97static struct _balloon_info_ bl_info;
98
99/**
100 * intel_vgt_deballoon - deballoon reserved graphics address trunks
101 *
102 * This function is called to deallocate the ballooned-out graphic memory, when
103 * driver is unloaded or when ballooning fails.
104 */
105void intel_vgt_deballoon(void)
106{
107 int i;
108
109 DRM_DEBUG("VGT deballoon.\n");
110
111 for (i = 0; i < 4; i++) {
112 if (bl_info.space[i].allocated)
113 drm_mm_remove_node(&bl_info.space[i]);
114 }
115
116 memset(&bl_info, 0, sizeof(bl_info));
117}
118
119static int vgt_balloon_space(struct drm_mm *mm,
120 struct drm_mm_node *node,
121 unsigned long start, unsigned long end)
122{
123 unsigned long size = end - start;
124
125 if (start == end)
126 return -EINVAL;
127
128 DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n",
129 start, end, size / 1024);
130
131 node->start = start;
132 node->size = size;
133
134 return drm_mm_reserve_node(mm, node);
135}
136
137/**
138 * intel_vgt_balloon - balloon out reserved graphics address trunks
139 * @dev: drm device
140 *
141 * This function is called at the initialization stage, to balloon out the
142 * graphic address space allocated to other vGPUs, by marking these spaces as
143 * reserved. The ballooning related knowledge(starting address and size of
144 * the mappable/unmappable graphic memory) is described in the vgt_if structure
145 * in a reserved mmio range.
146 *
147 * To give an example, the drawing below depicts one typical scenario after
148 * ballooning. Here the vGPU1 has 2 pieces of graphic address spaces ballooned
149 * out each for the mappable and the non-mappable part. From the vGPU1 point of
150 * view, the total size is the same as the physical one, with the start address
151 * of its graphic space being zero. Yet there are some portions ballooned out(
152 * the shadow part, which are marked as reserved by drm allocator). From the
153 * host point of view, the graphic address space is partitioned by multiple
154 * vGPUs in different VMs.
155 *
156 * vGPU1 view Host view
157 * 0 ------> +-----------+ +-----------+
158 * ^ |///////////| | vGPU3 |
159 * | |///////////| +-----------+
160 * | |///////////| | vGPU2 |
161 * | +-----------+ +-----------+
162 * mappable GM | available | ==> | vGPU1 |
163 * | +-----------+ +-----------+
164 * | |///////////| | |
165 * v |///////////| | Host |
166 * +=======+===========+ +===========+
167 * ^ |///////////| | vGPU3 |
168 * | |///////////| +-----------+
169 * | |///////////| | vGPU2 |
170 * | +-----------+ +-----------+
171 * unmappable GM | available | ==> | vGPU1 |
172 * | +-----------+ +-----------+
173 * | |///////////| | |
174 * | |///////////| | Host |
175 * v |///////////| | |
176 * total GM size ------> +-----------+ +-----------+
177 *
178 * Returns:
179 * zero on success, non-zero if configuration invalid or ballooning failed
180 */
181int intel_vgt_balloon(struct drm_device *dev)
182{
183 struct drm_i915_private *dev_priv = to_i915(dev);
184 struct i915_address_space *ggtt_vm = &dev_priv->gtt.base;
185 unsigned long ggtt_vm_end = ggtt_vm->start + ggtt_vm->total;
186
187 unsigned long mappable_base, mappable_size, mappable_end;
188 unsigned long unmappable_base, unmappable_size, unmappable_end;
189 int ret;
190
191 mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base));
192 mappable_size = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.size));
193 unmappable_base = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base));
194 unmappable_size = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.size));
195
196 mappable_end = mappable_base + mappable_size;
197 unmappable_end = unmappable_base + unmappable_size;
198
199 DRM_INFO("VGT ballooning configuration:\n");
200 DRM_INFO("Mappable graphic memory: base 0x%lx size %ldKiB\n",
201 mappable_base, mappable_size / 1024);
202 DRM_INFO("Unmappable graphic memory: base 0x%lx size %ldKiB\n",
203 unmappable_base, unmappable_size / 1024);
204
205 if (mappable_base < ggtt_vm->start ||
206 mappable_end > dev_priv->gtt.mappable_end ||
207 unmappable_base < dev_priv->gtt.mappable_end ||
208 unmappable_end > ggtt_vm_end) {
209 DRM_ERROR("Invalid ballooning configuration!\n");
210 return -EINVAL;
211 }
212
213 /* Unmappable graphic memory ballooning */
214 if (unmappable_base > dev_priv->gtt.mappable_end) {
215 ret = vgt_balloon_space(&ggtt_vm->mm,
216 &bl_info.space[2],
217 dev_priv->gtt.mappable_end,
218 unmappable_base);
219
220 if (ret)
221 goto err;
222 }
223
224 /*
225 * No need to partition out the last physical page,
226 * because it is reserved to the guard page.
227 */
228 if (unmappable_end < ggtt_vm_end - PAGE_SIZE) {
229 ret = vgt_balloon_space(&ggtt_vm->mm,
230 &bl_info.space[3],
231 unmappable_end,
232 ggtt_vm_end - PAGE_SIZE);
233 if (ret)
234 goto err;
235 }
236
237 /* Mappable graphic memory ballooning */
238 if (mappable_base > ggtt_vm->start) {
239 ret = vgt_balloon_space(&ggtt_vm->mm,
240 &bl_info.space[0],
241 ggtt_vm->start, mappable_base);
242
243 if (ret)
244 goto err;
245 }
246
247 if (mappable_end < dev_priv->gtt.mappable_end) {
248 ret = vgt_balloon_space(&ggtt_vm->mm,
249 &bl_info.space[1],
250 mappable_end,
251 dev_priv->gtt.mappable_end);
252
253 if (ret)
254 goto err;
255 }
256
257 DRM_INFO("VGT balloon successfully\n");
258 return 0;
259
260err:
261 DRM_ERROR("VGT balloon fail\n");
262 intel_vgt_deballoon();
263 return ret;
264}
1/*
2 * Copyright(c) 2011-2015 Intel Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24#include "i915_vgpu.h"
25
26/**
27 * DOC: Intel GVT-g guest support
28 *
29 * Intel GVT-g is a graphics virtualization technology which shares the
30 * GPU among multiple virtual machines on a time-sharing basis. Each
31 * virtual machine is presented a virtual GPU (vGPU), which has equivalent
32 * features as the underlying physical GPU (pGPU), so i915 driver can run
33 * seamlessly in a virtual machine. This file provides vGPU specific
34 * optimizations when running in a virtual machine, to reduce the complexity
35 * of vGPU emulation and to improve the overall performance.
36 *
37 * A primary function introduced here is so-called "address space ballooning"
38 * technique. Intel GVT-g partitions global graphics memory among multiple VMs,
39 * so each VM can directly access a portion of the memory without hypervisor's
40 * intervention, e.g. filling textures or queuing commands. However with the
41 * partitioning an unmodified i915 driver would assume a smaller graphics
42 * memory starting from address ZERO, then requires vGPU emulation module to
43 * translate the graphics address between 'guest view' and 'host view', for
44 * all registers and command opcodes which contain a graphics memory address.
45 * To reduce the complexity, Intel GVT-g introduces "address space ballooning",
46 * by telling the exact partitioning knowledge to each guest i915 driver, which
47 * then reserves and prevents non-allocated portions from allocation. Thus vGPU
48 * emulation module only needs to scan and validate graphics addresses without
49 * complexity of address translation.
50 *
51 */
52
53/**
54 * i915_detect_vgpu - detect virtual GPU
55 * @dev_priv: i915 device private
56 *
57 * This function is called at the initialization stage, to detect whether
58 * running on a vGPU.
59 */
60void i915_detect_vgpu(struct drm_i915_private *dev_priv)
61{
62 struct pci_dev *pdev = dev_priv->drm.pdev;
63 u64 magic;
64 u16 version_major;
65 void __iomem *shared_area;
66
67 BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
68
69 /*
70 * This is called before we setup the main MMIO BAR mappings used via
71 * the uncore structure, so we need to access the BAR directly. Since
72 * we do not support VGT on older gens, return early so we don't have
73 * to consider differently numbered or sized MMIO bars
74 */
75 if (INTEL_GEN(dev_priv) < 6)
76 return;
77
78 shared_area = pci_iomap_range(pdev, 0, VGT_PVINFO_PAGE, VGT_PVINFO_SIZE);
79 if (!shared_area) {
80 DRM_ERROR("failed to map MMIO bar to check for VGT\n");
81 return;
82 }
83
84 magic = readq(shared_area + vgtif_offset(magic));
85 if (magic != VGT_MAGIC)
86 goto out;
87
88 version_major = readw(shared_area + vgtif_offset(version_major));
89 if (version_major < VGT_VERSION_MAJOR) {
90 DRM_INFO("VGT interface version mismatch!\n");
91 goto out;
92 }
93
94 dev_priv->vgpu.caps = readl(shared_area + vgtif_offset(vgt_caps));
95
96 dev_priv->vgpu.active = true;
97 mutex_init(&dev_priv->vgpu.lock);
98 DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
99
100out:
101 pci_iounmap(pdev, shared_area);
102}
103
104bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv)
105{
106 return dev_priv->vgpu.caps & VGT_CAPS_FULL_PPGTT;
107}
108
109struct _balloon_info_ {
110 /*
111 * There are up to 2 regions per mappable/unmappable graphic
112 * memory that might be ballooned. Here, index 0/1 is for mappable
113 * graphic memory, 2/3 for unmappable graphic memory.
114 */
115 struct drm_mm_node space[4];
116};
117
118static struct _balloon_info_ bl_info;
119
120static void vgt_deballoon_space(struct i915_ggtt *ggtt,
121 struct drm_mm_node *node)
122{
123 if (!drm_mm_node_allocated(node))
124 return;
125
126 DRM_DEBUG_DRIVER("deballoon space: range [0x%llx - 0x%llx] %llu KiB.\n",
127 node->start,
128 node->start + node->size,
129 node->size / 1024);
130
131 ggtt->vm.reserved -= node->size;
132 drm_mm_remove_node(node);
133}
134
135/**
136 * intel_vgt_deballoon - deballoon reserved graphics address trunks
137 * @ggtt: the global GGTT from which we reserved earlier
138 *
139 * This function is called to deallocate the ballooned-out graphic memory, when
140 * driver is unloaded or when ballooning fails.
141 */
142void intel_vgt_deballoon(struct i915_ggtt *ggtt)
143{
144 int i;
145
146 if (!intel_vgpu_active(ggtt->vm.i915))
147 return;
148
149 DRM_DEBUG("VGT deballoon.\n");
150
151 for (i = 0; i < 4; i++)
152 vgt_deballoon_space(ggtt, &bl_info.space[i]);
153}
154
155static int vgt_balloon_space(struct i915_ggtt *ggtt,
156 struct drm_mm_node *node,
157 unsigned long start, unsigned long end)
158{
159 unsigned long size = end - start;
160 int ret;
161
162 if (start >= end)
163 return -EINVAL;
164
165 DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n",
166 start, end, size / 1024);
167 ret = i915_gem_gtt_reserve(&ggtt->vm, node,
168 size, start, I915_COLOR_UNEVICTABLE,
169 0);
170 if (!ret)
171 ggtt->vm.reserved += size;
172
173 return ret;
174}
175
176/**
177 * intel_vgt_balloon - balloon out reserved graphics address trunks
178 * @ggtt: the global GGTT from which to reserve
179 *
180 * This function is called at the initialization stage, to balloon out the
181 * graphic address space allocated to other vGPUs, by marking these spaces as
182 * reserved. The ballooning related knowledge(starting address and size of
183 * the mappable/unmappable graphic memory) is described in the vgt_if structure
184 * in a reserved mmio range.
185 *
186 * To give an example, the drawing below depicts one typical scenario after
187 * ballooning. Here the vGPU1 has 2 pieces of graphic address spaces ballooned
188 * out each for the mappable and the non-mappable part. From the vGPU1 point of
189 * view, the total size is the same as the physical one, with the start address
190 * of its graphic space being zero. Yet there are some portions ballooned out(
191 * the shadow part, which are marked as reserved by drm allocator). From the
192 * host point of view, the graphic address space is partitioned by multiple
193 * vGPUs in different VMs. ::
194 *
195 * vGPU1 view Host view
196 * 0 ------> +-----------+ +-----------+
197 * ^ |###########| | vGPU3 |
198 * | |###########| +-----------+
199 * | |###########| | vGPU2 |
200 * | +-----------+ +-----------+
201 * mappable GM | available | ==> | vGPU1 |
202 * | +-----------+ +-----------+
203 * | |###########| | |
204 * v |###########| | Host |
205 * +=======+===========+ +===========+
206 * ^ |###########| | vGPU3 |
207 * | |###########| +-----------+
208 * | |###########| | vGPU2 |
209 * | +-----------+ +-----------+
210 * unmappable GM | available | ==> | vGPU1 |
211 * | +-----------+ +-----------+
212 * | |###########| | |
213 * | |###########| | Host |
214 * v |###########| | |
215 * total GM size ------> +-----------+ +-----------+
216 *
217 * Returns:
218 * zero on success, non-zero if configuration invalid or ballooning failed
219 */
220int intel_vgt_balloon(struct i915_ggtt *ggtt)
221{
222 struct intel_uncore *uncore = &ggtt->vm.i915->uncore;
223 unsigned long ggtt_end = ggtt->vm.total;
224
225 unsigned long mappable_base, mappable_size, mappable_end;
226 unsigned long unmappable_base, unmappable_size, unmappable_end;
227 int ret;
228
229 if (!intel_vgpu_active(ggtt->vm.i915))
230 return 0;
231
232 mappable_base =
233 intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.base));
234 mappable_size =
235 intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.size));
236 unmappable_base =
237 intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.base));
238 unmappable_size =
239 intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.size));
240
241 mappable_end = mappable_base + mappable_size;
242 unmappable_end = unmappable_base + unmappable_size;
243
244 DRM_INFO("VGT ballooning configuration:\n");
245 DRM_INFO("Mappable graphic memory: base 0x%lx size %ldKiB\n",
246 mappable_base, mappable_size / 1024);
247 DRM_INFO("Unmappable graphic memory: base 0x%lx size %ldKiB\n",
248 unmappable_base, unmappable_size / 1024);
249
250 if (mappable_end > ggtt->mappable_end ||
251 unmappable_base < ggtt->mappable_end ||
252 unmappable_end > ggtt_end) {
253 DRM_ERROR("Invalid ballooning configuration!\n");
254 return -EINVAL;
255 }
256
257 /* Unmappable graphic memory ballooning */
258 if (unmappable_base > ggtt->mappable_end) {
259 ret = vgt_balloon_space(ggtt, &bl_info.space[2],
260 ggtt->mappable_end, unmappable_base);
261
262 if (ret)
263 goto err;
264 }
265
266 if (unmappable_end < ggtt_end) {
267 ret = vgt_balloon_space(ggtt, &bl_info.space[3],
268 unmappable_end, ggtt_end);
269 if (ret)
270 goto err_upon_mappable;
271 }
272
273 /* Mappable graphic memory ballooning */
274 if (mappable_base) {
275 ret = vgt_balloon_space(ggtt, &bl_info.space[0],
276 0, mappable_base);
277
278 if (ret)
279 goto err_upon_unmappable;
280 }
281
282 if (mappable_end < ggtt->mappable_end) {
283 ret = vgt_balloon_space(ggtt, &bl_info.space[1],
284 mappable_end, ggtt->mappable_end);
285
286 if (ret)
287 goto err_below_mappable;
288 }
289
290 DRM_INFO("VGT balloon successfully\n");
291 return 0;
292
293err_below_mappable:
294 vgt_deballoon_space(ggtt, &bl_info.space[0]);
295err_upon_unmappable:
296 vgt_deballoon_space(ggtt, &bl_info.space[3]);
297err_upon_mappable:
298 vgt_deballoon_space(ggtt, &bl_info.space[2]);
299err:
300 DRM_ERROR("VGT balloon fail\n");
301 return ret;
302}