1/*
 2 * SPDX-License-Identifier: MIT
 3 *
 4 * Copyright © 2008-2018 Intel Corporation
 5 */
 6
 7#ifndef I915_RESET_H
 8#define I915_RESET_H
 9
10#include <linux/compiler.h>
11#include <linux/types.h>
12#include <linux/srcu.h>
13
14#include "intel_engine_types.h"
15#include "intel_reset_types.h"
16
17struct drm_i915_private;
18struct i915_request;
19struct intel_engine_cs;
20struct intel_gt;
21struct intel_guc;
22
23void intel_gt_init_reset(struct intel_gt *gt);
24void intel_gt_fini_reset(struct intel_gt *gt);
25
26__printf(4, 5)
27void intel_gt_handle_error(struct intel_gt *gt,
28			   intel_engine_mask_t engine_mask,
29			   unsigned long flags,
30			   const char *fmt, ...);
31#define I915_ERROR_CAPTURE BIT(0)
32
33void intel_gt_reset(struct intel_gt *gt,
34		    intel_engine_mask_t stalled_mask,
35		    const char *reason);
36int intel_engine_reset(struct intel_engine_cs *engine,
37		       const char *reason);
38
39void __i915_request_reset(struct i915_request *rq, bool guilty);
40
41int __must_check intel_gt_reset_trylock(struct intel_gt *gt, int *srcu);
42void intel_gt_reset_unlock(struct intel_gt *gt, int tag);
43
44void intel_gt_set_wedged(struct intel_gt *gt);
45bool intel_gt_unset_wedged(struct intel_gt *gt);
46int intel_gt_terminally_wedged(struct intel_gt *gt);
47
48int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask);
49
50int intel_reset_guc(struct intel_gt *gt);
51
52struct intel_wedge_me {
53	struct delayed_work work;
54	struct intel_gt *gt;
55	const char *name;
56};
57
58void __intel_init_wedge(struct intel_wedge_me *w,
59			struct intel_gt *gt,
60			long timeout,
61			const char *name);
62void __intel_fini_wedge(struct intel_wedge_me *w);
63
64#define intel_wedge_on_timeout(W, GT, TIMEOUT)				\
65	for (__intel_init_wedge((W), (GT), (TIMEOUT), __func__);	\
66	     (W)->gt;							\
67	     __intel_fini_wedge((W)))
68
69static inline bool __intel_reset_failed(const struct intel_reset *reset)
70{
71	return unlikely(test_bit(I915_WEDGED, &reset->flags));
72}
73
74bool intel_has_gpu_reset(struct drm_i915_private *i915);
75bool intel_has_reset_engine(struct drm_i915_private *i915);
76
77#endif /* I915_RESET_H */