1/* SPDX-License-Identifier: MIT */
 2/*
 3 * Copyright © 2019 Intel Corporation
 4 */
 5
 6#ifndef __INTEL_GMBUS_H__
 7#define __INTEL_GMBUS_H__
 8
 9#include <linux/types.h>
10
11struct drm_i915_private;
12struct i2c_adapter;
13
14#define GMBUS_PIN_DISABLED	0
15#define GMBUS_PIN_SSC		1
16#define GMBUS_PIN_VGADDC	2
17#define GMBUS_PIN_PANEL		3
18#define GMBUS_PIN_DPD_CHV	3 /* HDMID_CHV */
19#define GMBUS_PIN_DPC		4 /* HDMIC */
20#define GMBUS_PIN_DPB		5 /* SDVO, HDMIB */
21#define GMBUS_PIN_DPD		6 /* HDMID */
22#define GMBUS_PIN_RESERVED	7 /* 7 reserved */
23#define GMBUS_PIN_1_BXT		1 /* BXT+ (atom) and CNP+ (big core) */
24#define GMBUS_PIN_2_BXT		2
25#define GMBUS_PIN_3_BXT		3
26#define GMBUS_PIN_4_CNP		4
27#define GMBUS_PIN_9_TC1_ICP	9
28#define GMBUS_PIN_10_TC2_ICP	10
29#define GMBUS_PIN_11_TC3_ICP	11
30#define GMBUS_PIN_12_TC4_ICP	12
31#define GMBUS_PIN_13_TC5_TGP	13
32#define GMBUS_PIN_14_TC6_TGP	14
33
34#define GMBUS_NUM_PINS	15 /* including 0 */
35
36int intel_gmbus_setup(struct drm_i915_private *dev_priv);
37void intel_gmbus_teardown(struct drm_i915_private *dev_priv);
38bool intel_gmbus_is_valid_pin(struct drm_i915_private *dev_priv,
39			      unsigned int pin);
40int intel_gmbus_output_aksv(struct i2c_adapter *adapter);
41
42struct i2c_adapter *
43intel_gmbus_get_adapter(struct drm_i915_private *dev_priv, unsigned int pin);
44void intel_gmbus_set_speed(struct i2c_adapter *adapter, int speed);
45void intel_gmbus_force_bit(struct i2c_adapter *adapter, bool force_bit);
46bool intel_gmbus_is_forced_bit(struct i2c_adapter *adapter);
47void intel_gmbus_reset(struct drm_i915_private *dev_priv);
48
49#endif /* __INTEL_GMBUS_H__ */