1/* SPDX-License-Identifier: MIT */
  2/*
  3 * Copyright © 2019 Intel Corporation
  4 */
  5
  6#ifndef __INTEL_DP_H__
  7#define __INTEL_DP_H__
  8
  9#include <linux/types.h>
 10
 11#include <drm/i915_drm.h>
 12
 13#include "i915_reg.h"
 14
 15enum pipe;
 16struct drm_connector_state;
 17struct drm_encoder;
 18struct drm_i915_private;
 19struct drm_modeset_acquire_ctx;
 20struct intel_connector;
 21struct intel_crtc_state;
 22struct intel_digital_port;
 23struct intel_dp;
 24struct intel_encoder;
 25
 26struct link_config_limits {
 27	int min_clock, max_clock;
 28	int min_lane_count, max_lane_count;
 29	int min_bpp, max_bpp;
 30};
 31
 32void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
 33				       struct intel_crtc_state *pipe_config,
 34				       struct link_config_limits *limits);
 35bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
 36				  const struct drm_connector_state *conn_state);
 37int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state);
 38bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
 39			   i915_reg_t dp_reg, enum port port,
 40			   enum pipe *pipe);
 41bool intel_dp_init(struct drm_i915_private *dev_priv, i915_reg_t output_reg,
 42		   enum port port);
 43bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
 44			     struct intel_connector *intel_connector);
 45void intel_dp_set_link_params(struct intel_dp *intel_dp,
 46			      int link_rate, u8 lane_count,
 47			      bool link_mst);
 48int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
 49					    int link_rate, u8 lane_count);
 50int intel_dp_retrain_link(struct intel_encoder *encoder,
 51			  struct drm_modeset_acquire_ctx *ctx);
 52void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
 53void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
 54					   const struct intel_crtc_state *crtc_state,
 55					   bool enable);
 56void intel_dp_encoder_reset(struct drm_encoder *encoder);
 57void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
 58void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
 59int intel_dp_compute_config(struct intel_encoder *encoder,
 60			    struct intel_crtc_state *pipe_config,
 61			    struct drm_connector_state *conn_state);
 62bool intel_dp_is_edp(struct intel_dp *intel_dp);
 63bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
 64enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port,
 65				  bool long_hpd);
 66void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
 67			    const struct drm_connector_state *conn_state);
 68void intel_edp_backlight_off(const struct drm_connector_state *conn_state);
 69void intel_edp_panel_vdd_on(struct intel_dp *intel_dp);
 70void intel_edp_panel_on(struct intel_dp *intel_dp);
 71void intel_edp_panel_off(struct intel_dp *intel_dp);
 72void intel_dp_mst_suspend(struct drm_i915_private *dev_priv);
 73void intel_dp_mst_resume(struct drm_i915_private *dev_priv);
 74int intel_dp_max_link_rate(struct intel_dp *intel_dp);
 75int intel_dp_max_lane_count(struct intel_dp *intel_dp);
 76int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
 77void intel_power_sequencer_reset(struct drm_i915_private *dev_priv);
 78u32 intel_dp_pack_aux(const u8 *src, int src_bytes);
 79
 80void intel_edp_drrs_enable(struct intel_dp *intel_dp,
 81			   const struct intel_crtc_state *crtc_state);
 82void intel_edp_drrs_disable(struct intel_dp *intel_dp,
 83			    const struct intel_crtc_state *crtc_state);
 84void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv,
 85			       unsigned int frontbuffer_bits);
 86void intel_edp_drrs_flush(struct drm_i915_private *dev_priv,
 87			  unsigned int frontbuffer_bits);
 88
 89void
 90intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
 91				       u8 dp_train_pat);
 92void
 93intel_dp_set_signal_levels(struct intel_dp *intel_dp);
 94void intel_dp_set_idle_link_train(struct intel_dp *intel_dp);
 95u8
 96intel_dp_voltage_max(struct intel_dp *intel_dp);
 97u8
 98intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, u8 voltage_swing);
 99void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
100			   u8 *link_bw, u8 *rate_select);
101bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp);
102bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp);
103bool
104intel_dp_get_link_status(struct intel_dp *intel_dp, u8 *link_status);
105
106bool intel_dp_read_dpcd(struct intel_dp *intel_dp);
107bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
108int intel_dp_link_required(int pixel_clock, int bpp);
109int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
110bool intel_digital_port_connected(struct intel_encoder *encoder);
111
112static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
113{
114	return ~((1 << lane_count) - 1) & 0xf;
115}
116
117u32 intel_dp_mode_to_fec_clock(u32 mode_clock);
118
119#endif /* __INTEL_DP_H__ */