1/* SPDX-License-Identifier: GPL-2.0+ */
  2/* Copyright 2018 IBM Corporation */
  3
  4#include <drm/drm_device.h>
  5#include <drm/drm_simple_kms_helper.h>
  6
  7struct aspeed_gfx {
  8	void __iomem			*base;
  9	struct clk			*clk;
 10	struct reset_control		*rst;
 11	struct regmap			*scu;
 12
 13	struct drm_simple_display_pipe	pipe;
 14	struct drm_connector		connector;
 15	struct drm_fbdev_cma		*fbdev;
 16};
 17
 18int aspeed_gfx_create_pipe(struct drm_device *drm);
 19int aspeed_gfx_create_output(struct drm_device *drm);
 20
 21#define CRT_CTRL1		0x60 /* CRT Control I */
 22#define CRT_CTRL2		0x64 /* CRT Control II */
 23#define CRT_STATUS		0x68 /* CRT Status */
 24#define CRT_MISC		0x6c /* CRT Misc Setting */
 25#define CRT_HORIZ0		0x70 /* CRT Horizontal Total & Display Enable End */
 26#define CRT_HORIZ1		0x74 /* CRT Horizontal Retrace Start & End */
 27#define CRT_VERT0		0x78 /* CRT Vertical Total & Display Enable End */
 28#define CRT_VERT1		0x7C /* CRT Vertical Retrace Start & End */
 29#define CRT_ADDR		0x80 /* CRT Display Starting Address */
 30#define CRT_OFFSET		0x84 /* CRT Display Offset & Terminal Count */
 31#define CRT_THROD		0x88 /* CRT Threshold */
 32#define CRT_XSCALE		0x8C /* CRT Scaling-Up Factor */
 33#define CRT_CURSOR0		0x90 /* CRT Hardware Cursor X & Y Offset */
 34#define CRT_CURSOR1		0x94 /* CRT Hardware Cursor X & Y Position */
 35#define CRT_CURSOR2		0x98 /* CRT Hardware Cursor Pattern Address */
 36#define CRT_9C			0x9C
 37#define CRT_OSD_H		0xA0 /* CRT OSD Horizontal Start/End */
 38#define CRT_OSD_V		0xA4 /* CRT OSD Vertical Start/End */
 39#define CRT_OSD_ADDR		0xA8 /* CRT OSD Pattern Address */
 40#define CRT_OSD_DISP		0xAC /* CRT OSD Offset */
 41#define CRT_OSD_THRESH		0xB0 /* CRT OSD Threshold & Alpha */
 42#define CRT_B4			0xB4
 43#define CRT_STS_V		0xB8 /* CRT Status V */
 44#define CRT_SCRATCH		0xBC /* Scratchpad */
 45#define CRT_BB0_ADDR		0xD0 /* CRT Display BB0 Starting Address */
 46#define CRT_BB1_ADDR		0xD4 /* CRT Display BB1 Starting Address */
 47#define CRT_BB_COUNT		0xD8 /* CRT Display BB Terminal Count */
 48#define OSD_COLOR1		0xE0 /* OSD Color Palette Index 1 & 0 */
 49#define OSD_COLOR2		0xE4 /* OSD Color Palette Index 3 & 2 */
 50#define OSD_COLOR3		0xE8 /* OSD Color Palette Index 5 & 4 */
 51#define OSD_COLOR4		0xEC /* OSD Color Palette Index 7 & 6 */
 52#define OSD_COLOR5		0xF0 /* OSD Color Palette Index 9 & 8 */
 53#define OSD_COLOR6		0xF4 /* OSD Color Palette Index 11 & 10 */
 54#define OSD_COLOR7		0xF8 /* OSD Color Palette Index 13 & 12 */
 55#define OSD_COLOR8		0xFC /* OSD Color Palette Index 15 & 14 */
 56
 57/* CTRL1 */
 58#define CRT_CTRL_EN			BIT(0)
 59#define CRT_CTRL_HW_CURSOR_EN		BIT(1)
 60#define CRT_CTRL_OSD_EN			BIT(2)
 61#define CRT_CTRL_INTERLACED		BIT(3)
 62#define CRT_CTRL_COLOR_RGB565		(0 << 7)
 63#define CRT_CTRL_COLOR_YUV444		(1 << 7)
 64#define CRT_CTRL_COLOR_XRGB8888		(2 << 7)
 65#define CRT_CTRL_COLOR_RGB888		(3 << 7)
 66#define CRT_CTRL_COLOR_YUV444_2RGB	(5 << 7)
 67#define CRT_CTRL_COLOR_YUV422		(7 << 7)
 68#define CRT_CTRL_COLOR_MASK		GENMASK(9, 7)
 69#define CRT_CTRL_HSYNC_NEGATIVE		BIT(16)
 70#define CRT_CTRL_VSYNC_NEGATIVE		BIT(17)
 71#define CRT_CTRL_VERTICAL_INTR_EN	BIT(30)
 72#define CRT_CTRL_VERTICAL_INTR_STS	BIT(31)
 73
 74/* CTRL2 */
 75#define CRT_CTRL_DAC_EN			BIT(0)
 76#define CRT_CTRL_VBLANK_LINE(x)		(((x) << 20) & CRT_CTRL_VBLANK_LINE_MASK)
 77#define CRT_CTRL_VBLANK_LINE_MASK	GENMASK(20, 31)
 78
 79/* CRT_HORIZ0 */
 80#define CRT_H_TOTAL(x)			(x)
 81#define CRT_H_DE(x)			((x) << 16)
 82
 83/* CRT_HORIZ1 */
 84#define CRT_H_RS_START(x)		(x)
 85#define CRT_H_RS_END(x)			((x) << 16)
 86
 87/* CRT_VIRT0 */
 88#define CRT_V_TOTAL(x)			(x)
 89#define CRT_V_DE(x)			((x) << 16)
 90
 91/* CRT_VIRT1 */
 92#define CRT_V_RS_START(x)		(x)
 93#define CRT_V_RS_END(x)			((x) << 16)
 94
 95/* CRT_OFFSET */
 96#define CRT_DISP_OFFSET(x)		(x)
 97#define CRT_TERM_COUNT(x)		((x) << 16)
 98
 99/* CRT_THROD */
100#define CRT_THROD_LOW(x)		(x)
101#define CRT_THROD_HIGH(x)		((x) << 8)
102
103/* Default Threshold Seting */
104#define G5_CRT_THROD_VAL	(CRT_THROD_LOW(0x24) | CRT_THROD_HIGH(0x3C))