1/*
 2 * This header provides constants for AT91 pmc status.
 3 *
 4 * The constants defined in this header are being used in dts.
 5 *
 6 * Licensed under GPLv2 or later.
 7 */
 8
 9#ifndef _DT_BINDINGS_CLK_AT91_H
10#define _DT_BINDINGS_CLK_AT91_H
11
 
 
 
 
 
 
 
 
 
 
 
 
 
 
12#define AT91_PMC_MOSCS		0		/* MOSCS Flag */
13#define AT91_PMC_LOCKA		1		/* PLLA Lock */
14#define AT91_PMC_LOCKB		2		/* PLLB Lock */
15#define AT91_PMC_MCKRDY		3		/* Master Clock */
16#define AT91_PMC_LOCKU		6		/* UPLL Lock */
17#define AT91_PMC_PCKRDY(id)	(8 + (id))	/* Programmable Clock */
18#define AT91_PMC_MOSCSELS	16		/* Main Oscillator Selection */
19#define AT91_PMC_MOSCRCS	17		/* Main On-Chip RC */
20#define AT91_PMC_CFDEV		18		/* Clock Failure Detector Event */
21#define AT91_PMC_GCKRDY		24		/* Generated Clocks */
 
22
23#endif

 1/* SPDX-License-Identifier: GPL-2.0-or-later */
 2/*
 3 * This header provides constants for AT91 pmc status.
 4 *
 5 * The constants defined in this header are being used in dts.
 
 
 6 */
 7
 8#ifndef _DT_BINDINGS_CLK_AT91_H
 9#define _DT_BINDINGS_CLK_AT91_H
10
11#define PMC_TYPE_CORE		0
12#define PMC_TYPE_SYSTEM		1
13#define PMC_TYPE_PERIPHERAL	2
14#define PMC_TYPE_GCK		3
15
16#define PMC_SLOW		0
17#define PMC_MCK			1
18#define PMC_UTMI		2
19#define PMC_MAIN		3
20#define PMC_MCK2		4
21#define PMC_I2S0_MUX		5
22#define PMC_I2S1_MUX		6
23
24#ifndef AT91_PMC_MOSCS
25#define AT91_PMC_MOSCS		0		/* MOSCS Flag */
26#define AT91_PMC_LOCKA		1		/* PLLA Lock */
27#define AT91_PMC_LOCKB		2		/* PLLB Lock */
28#define AT91_PMC_MCKRDY		3		/* Master Clock */
29#define AT91_PMC_LOCKU		6		/* UPLL Lock */
30#define AT91_PMC_PCKRDY(id)	(8 + (id))	/* Programmable Clock */
31#define AT91_PMC_MOSCSELS	16		/* Main Oscillator Selection */
32#define AT91_PMC_MOSCRCS	17		/* Main On-Chip RC */
33#define AT91_PMC_CFDEV		18		/* Clock Failure Detector Event */
34#define AT91_PMC_GCKRDY		24		/* Generated Clocks */
35#endif
36
37#endif