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1/**
2 * dwc3-of-simple.c - OF glue layer for simple integrations
3 *
4 * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * Author: Felipe Balbi <balbi@ti.com>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 of
10 * the License as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * This is a combination of the old dwc3-qcom.c by Ivan T. Ivanov
18 * <iivanov@mm-sol.com> and the original patch adding support for Xilinx' SoC
19 * by Subbaraya Sundeep Bhatta <subbaraya.sundeep.bhatta@xilinx.com>
20 */
21
22#include <linux/module.h>
23#include <linux/kernel.h>
24#include <linux/slab.h>
25#include <linux/platform_device.h>
26#include <linux/dma-mapping.h>
27#include <linux/clk.h>
28#include <linux/clk-provider.h>
29#include <linux/of.h>
30#include <linux/of_platform.h>
31#include <linux/pm_runtime.h>
32
33struct dwc3_of_simple {
34 struct device *dev;
35 struct clk **clks;
36 int num_clocks;
37};
38
39static int dwc3_of_simple_probe(struct platform_device *pdev)
40{
41 struct dwc3_of_simple *simple;
42 struct device *dev = &pdev->dev;
43 struct device_node *np = dev->of_node;
44
45 unsigned int count;
46 int ret;
47 int i;
48
49 simple = devm_kzalloc(dev, sizeof(*simple), GFP_KERNEL);
50 if (!simple)
51 return -ENOMEM;
52
53 count = of_clk_get_parent_count(np);
54 if (!count)
55 return -ENOENT;
56
57 simple->num_clocks = count;
58
59 simple->clks = devm_kcalloc(dev, simple->num_clocks,
60 sizeof(struct clk *), GFP_KERNEL);
61 if (!simple->clks)
62 return -ENOMEM;
63
64 simple->dev = dev;
65
66 for (i = 0; i < simple->num_clocks; i++) {
67 struct clk *clk;
68
69 clk = of_clk_get(np, i);
70 if (IS_ERR(clk)) {
71 while (--i >= 0)
72 clk_put(simple->clks[i]);
73 return PTR_ERR(clk);
74 }
75
76 ret = clk_prepare_enable(clk);
77 if (ret < 0) {
78 while (--i >= 0) {
79 clk_disable_unprepare(simple->clks[i]);
80 clk_put(simple->clks[i]);
81 }
82 clk_put(clk);
83
84 return ret;
85 }
86
87 simple->clks[i] = clk;
88 }
89
90 ret = of_platform_populate(np, NULL, NULL, dev);
91 if (ret) {
92 for (i = 0; i < simple->num_clocks; i++) {
93 clk_disable_unprepare(simple->clks[i]);
94 clk_put(simple->clks[i]);
95 }
96
97 return ret;
98 }
99
100 pm_runtime_set_active(dev);
101 pm_runtime_enable(dev);
102 pm_runtime_get_sync(dev);
103
104 return 0;
105}
106
107static int dwc3_of_simple_remove(struct platform_device *pdev)
108{
109 struct dwc3_of_simple *simple = platform_get_drvdata(pdev);
110 struct device *dev = &pdev->dev;
111 int i;
112
113 for (i = 0; i < simple->num_clocks; i++) {
114 clk_unprepare(simple->clks[i]);
115 clk_put(simple->clks[i]);
116 }
117
118 of_platform_depopulate(dev);
119
120 pm_runtime_put_sync(dev);
121 pm_runtime_disable(dev);
122
123 return 0;
124}
125
126#ifdef CONFIG_PM
127static int dwc3_of_simple_runtime_suspend(struct device *dev)
128{
129 struct dwc3_of_simple *simple = dev_get_drvdata(dev);
130 int i;
131
132 for (i = 0; i < simple->num_clocks; i++)
133 clk_disable(simple->clks[i]);
134
135 return 0;
136}
137
138static int dwc3_of_simple_runtime_resume(struct device *dev)
139{
140 struct dwc3_of_simple *simple = dev_get_drvdata(dev);
141 int ret;
142 int i;
143
144 for (i = 0; i < simple->num_clocks; i++) {
145 ret = clk_enable(simple->clks[i]);
146 if (ret < 0) {
147 while (--i >= 0)
148 clk_disable(simple->clks[i]);
149 return ret;
150 }
151 }
152
153 return 0;
154}
155#endif
156
157static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = {
158 SET_RUNTIME_PM_OPS(dwc3_of_simple_runtime_suspend,
159 dwc3_of_simple_runtime_resume, NULL)
160};
161
162static const struct of_device_id of_dwc3_simple_match[] = {
163 { .compatible = "qcom,dwc3" },
164 { .compatible = "xlnx,zynqmp-dwc3" },
165 { /* Sentinel */ }
166};
167MODULE_DEVICE_TABLE(of, of_dwc3_simple_match);
168
169static struct platform_driver dwc3_of_simple_driver = {
170 .probe = dwc3_of_simple_probe,
171 .remove = dwc3_of_simple_remove,
172 .driver = {
173 .name = "dwc3-of-simple",
174 .of_match_table = of_dwc3_simple_match,
175 },
176};
177
178module_platform_driver(dwc3_of_simple_driver);
179MODULE_LICENSE("GPL v2");
180MODULE_DESCRIPTION("DesignWare USB3 OF Simple Glue Layer");
181MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
1// SPDX-License-Identifier: GPL-2.0
2/**
3 * dwc3-of-simple.c - OF glue layer for simple integrations
4 *
5 * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
6 *
7 * Author: Felipe Balbi <balbi@ti.com>
8 *
9 * This is a combination of the old dwc3-qcom.c by Ivan T. Ivanov
10 * <iivanov@mm-sol.com> and the original patch adding support for Xilinx' SoC
11 * by Subbaraya Sundeep Bhatta <subbaraya.sundeep.bhatta@xilinx.com>
12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/platform_device.h>
18#include <linux/dma-mapping.h>
19#include <linux/clk.h>
20#include <linux/of.h>
21#include <linux/of_platform.h>
22#include <linux/pm_runtime.h>
23#include <linux/reset.h>
24
25struct dwc3_of_simple {
26 struct device *dev;
27 struct clk_bulk_data *clks;
28 int num_clocks;
29 struct reset_control *resets;
30 bool pulse_resets;
31 bool need_reset;
32};
33
34static int dwc3_of_simple_probe(struct platform_device *pdev)
35{
36 struct dwc3_of_simple *simple;
37 struct device *dev = &pdev->dev;
38 struct device_node *np = dev->of_node;
39
40 int ret;
41 bool shared_resets = false;
42
43 simple = devm_kzalloc(dev, sizeof(*simple), GFP_KERNEL);
44 if (!simple)
45 return -ENOMEM;
46
47 platform_set_drvdata(pdev, simple);
48 simple->dev = dev;
49
50 /*
51 * Some controllers need to toggle the usb3-otg reset before trying to
52 * initialize the PHY, otherwise the PHY times out.
53 */
54 if (of_device_is_compatible(np, "rockchip,rk3399-dwc3"))
55 simple->need_reset = true;
56
57 if (of_device_is_compatible(np, "amlogic,meson-axg-dwc3") ||
58 of_device_is_compatible(np, "amlogic,meson-gxl-dwc3")) {
59 shared_resets = true;
60 simple->pulse_resets = true;
61 }
62
63 simple->resets = of_reset_control_array_get(np, shared_resets, true,
64 true);
65 if (IS_ERR(simple->resets)) {
66 ret = PTR_ERR(simple->resets);
67 dev_err(dev, "failed to get device resets, err=%d\n", ret);
68 return ret;
69 }
70
71 if (simple->pulse_resets) {
72 ret = reset_control_reset(simple->resets);
73 if (ret)
74 goto err_resetc_put;
75 } else {
76 ret = reset_control_deassert(simple->resets);
77 if (ret)
78 goto err_resetc_put;
79 }
80
81 ret = clk_bulk_get_all(simple->dev, &simple->clks);
82 if (ret < 0)
83 goto err_resetc_assert;
84
85 simple->num_clocks = ret;
86 ret = clk_bulk_prepare_enable(simple->num_clocks, simple->clks);
87 if (ret)
88 goto err_resetc_assert;
89
90 ret = of_platform_populate(np, NULL, NULL, dev);
91 if (ret)
92 goto err_clk_put;
93
94 pm_runtime_set_active(dev);
95 pm_runtime_enable(dev);
96 pm_runtime_get_sync(dev);
97
98 return 0;
99
100err_clk_put:
101 clk_bulk_disable_unprepare(simple->num_clocks, simple->clks);
102 clk_bulk_put_all(simple->num_clocks, simple->clks);
103
104err_resetc_assert:
105 if (!simple->pulse_resets)
106 reset_control_assert(simple->resets);
107
108err_resetc_put:
109 reset_control_put(simple->resets);
110 return ret;
111}
112
113static int dwc3_of_simple_remove(struct platform_device *pdev)
114{
115 struct dwc3_of_simple *simple = platform_get_drvdata(pdev);
116 struct device *dev = &pdev->dev;
117
118 of_platform_depopulate(dev);
119
120 clk_bulk_disable_unprepare(simple->num_clocks, simple->clks);
121 clk_bulk_put_all(simple->num_clocks, simple->clks);
122 simple->num_clocks = 0;
123
124 if (!simple->pulse_resets)
125 reset_control_assert(simple->resets);
126
127 reset_control_put(simple->resets);
128
129 pm_runtime_disable(dev);
130 pm_runtime_put_noidle(dev);
131 pm_runtime_set_suspended(dev);
132
133 return 0;
134}
135
136static int __maybe_unused dwc3_of_simple_runtime_suspend(struct device *dev)
137{
138 struct dwc3_of_simple *simple = dev_get_drvdata(dev);
139
140 clk_bulk_disable(simple->num_clocks, simple->clks);
141
142 return 0;
143}
144
145static int __maybe_unused dwc3_of_simple_runtime_resume(struct device *dev)
146{
147 struct dwc3_of_simple *simple = dev_get_drvdata(dev);
148
149 return clk_bulk_enable(simple->num_clocks, simple->clks);
150}
151
152static int __maybe_unused dwc3_of_simple_suspend(struct device *dev)
153{
154 struct dwc3_of_simple *simple = dev_get_drvdata(dev);
155
156 if (simple->need_reset)
157 reset_control_assert(simple->resets);
158
159 return 0;
160}
161
162static int __maybe_unused dwc3_of_simple_resume(struct device *dev)
163{
164 struct dwc3_of_simple *simple = dev_get_drvdata(dev);
165
166 if (simple->need_reset)
167 reset_control_deassert(simple->resets);
168
169 return 0;
170}
171
172static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = {
173 SET_SYSTEM_SLEEP_PM_OPS(dwc3_of_simple_suspend, dwc3_of_simple_resume)
174 SET_RUNTIME_PM_OPS(dwc3_of_simple_runtime_suspend,
175 dwc3_of_simple_runtime_resume, NULL)
176};
177
178static const struct of_device_id of_dwc3_simple_match[] = {
179 { .compatible = "rockchip,rk3399-dwc3" },
180 { .compatible = "xlnx,zynqmp-dwc3" },
181 { .compatible = "cavium,octeon-7130-usb-uctl" },
182 { .compatible = "sprd,sc9860-dwc3" },
183 { .compatible = "amlogic,meson-axg-dwc3" },
184 { .compatible = "amlogic,meson-gxl-dwc3" },
185 { .compatible = "allwinner,sun50i-h6-dwc3" },
186 { /* Sentinel */ }
187};
188MODULE_DEVICE_TABLE(of, of_dwc3_simple_match);
189
190static struct platform_driver dwc3_of_simple_driver = {
191 .probe = dwc3_of_simple_probe,
192 .remove = dwc3_of_simple_remove,
193 .driver = {
194 .name = "dwc3-of-simple",
195 .of_match_table = of_dwc3_simple_match,
196 .pm = &dwc3_of_simple_dev_pm_ops,
197 },
198};
199
200module_platform_driver(dwc3_of_simple_driver);
201MODULE_LICENSE("GPL v2");
202MODULE_DESCRIPTION("DesignWare USB3 OF Simple Glue Layer");
203MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");