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1/*
2 * rtc-tps80031.c -- TI TPS80031/TPS80032 RTC driver
3 *
4 * RTC driver for TI TPS80031/TPS80032 Fully Integrated
5 * Power Management with Power Path and Battery Charger
6 *
7 * Copyright (c) 2012, NVIDIA Corporation.
8 *
9 * Author: Laxman Dewangan <ldewangan@nvidia.com>
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation version 2.
14 *
15 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
16 * whether express or implied; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
23 * 02111-1307, USA
24 */
25
26#include <linux/bcd.h>
27#include <linux/device.h>
28#include <linux/err.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/mfd/tps80031.h>
33#include <linux/platform_device.h>
34#include <linux/pm.h>
35#include <linux/rtc.h>
36#include <linux/slab.h>
37
38#define ENABLE_ALARM_INT 0x08
39#define ALARM_INT_STATUS 0x40
40
41/**
42 * Setting bit to 1 in STOP_RTC will run the RTC and
43 * setting this bit to 0 will freeze RTC.
44 */
45#define STOP_RTC 0x1
46
47/* Power on reset Values of RTC registers */
48#define TPS80031_RTC_POR_YEAR 0
49#define TPS80031_RTC_POR_MONTH 1
50#define TPS80031_RTC_POR_DAY 1
51
52/* Numbers of registers for time and alarms */
53#define TPS80031_RTC_TIME_NUM_REGS 7
54#define TPS80031_RTC_ALARM_NUM_REGS 6
55
56/**
57 * PMU RTC have only 2 nibbles to store year information, so using an
58 * offset of 100 to set the base year as 2000 for our driver.
59 */
60#define RTC_YEAR_OFFSET 100
61
62struct tps80031_rtc {
63 struct rtc_device *rtc;
64 int irq;
65};
66
67static int tps80031_rtc_read_time(struct device *dev, struct rtc_time *tm)
68{
69 u8 buff[TPS80031_RTC_TIME_NUM_REGS];
70 int ret;
71
72 ret = tps80031_reads(dev->parent, TPS80031_SLAVE_ID1,
73 TPS80031_SECONDS_REG, TPS80031_RTC_TIME_NUM_REGS, buff);
74 if (ret < 0) {
75 dev_err(dev, "reading RTC_SECONDS_REG failed, err = %d\n", ret);
76 return ret;
77 }
78
79 tm->tm_sec = bcd2bin(buff[0]);
80 tm->tm_min = bcd2bin(buff[1]);
81 tm->tm_hour = bcd2bin(buff[2]);
82 tm->tm_mday = bcd2bin(buff[3]);
83 tm->tm_mon = bcd2bin(buff[4]) - 1;
84 tm->tm_year = bcd2bin(buff[5]) + RTC_YEAR_OFFSET;
85 tm->tm_wday = bcd2bin(buff[6]);
86 return 0;
87}
88
89static int tps80031_rtc_set_time(struct device *dev, struct rtc_time *tm)
90{
91 u8 buff[7];
92 int ret;
93
94 buff[0] = bin2bcd(tm->tm_sec);
95 buff[1] = bin2bcd(tm->tm_min);
96 buff[2] = bin2bcd(tm->tm_hour);
97 buff[3] = bin2bcd(tm->tm_mday);
98 buff[4] = bin2bcd(tm->tm_mon + 1);
99 buff[5] = bin2bcd(tm->tm_year % RTC_YEAR_OFFSET);
100 buff[6] = bin2bcd(tm->tm_wday);
101
102 /* Stop RTC while updating the RTC time registers */
103 ret = tps80031_clr_bits(dev->parent, TPS80031_SLAVE_ID1,
104 TPS80031_RTC_CTRL_REG, STOP_RTC);
105 if (ret < 0) {
106 dev_err(dev->parent, "Stop RTC failed, err = %d\n", ret);
107 return ret;
108 }
109
110 ret = tps80031_writes(dev->parent, TPS80031_SLAVE_ID1,
111 TPS80031_SECONDS_REG,
112 TPS80031_RTC_TIME_NUM_REGS, buff);
113 if (ret < 0) {
114 dev_err(dev, "writing RTC_SECONDS_REG failed, err %d\n", ret);
115 return ret;
116 }
117
118 ret = tps80031_set_bits(dev->parent, TPS80031_SLAVE_ID1,
119 TPS80031_RTC_CTRL_REG, STOP_RTC);
120 if (ret < 0)
121 dev_err(dev->parent, "Start RTC failed, err = %d\n", ret);
122 return ret;
123}
124
125static int tps80031_rtc_alarm_irq_enable(struct device *dev,
126 unsigned int enable)
127{
128 int ret;
129
130 if (enable)
131 ret = tps80031_set_bits(dev->parent, TPS80031_SLAVE_ID1,
132 TPS80031_RTC_INTERRUPTS_REG, ENABLE_ALARM_INT);
133 else
134 ret = tps80031_clr_bits(dev->parent, TPS80031_SLAVE_ID1,
135 TPS80031_RTC_INTERRUPTS_REG, ENABLE_ALARM_INT);
136 if (ret < 0) {
137 dev_err(dev, "Update on RTC_INT failed, err = %d\n", ret);
138 return ret;
139 }
140 return 0;
141}
142
143static int tps80031_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
144{
145 u8 buff[TPS80031_RTC_ALARM_NUM_REGS];
146 int ret;
147
148 buff[0] = bin2bcd(alrm->time.tm_sec);
149 buff[1] = bin2bcd(alrm->time.tm_min);
150 buff[2] = bin2bcd(alrm->time.tm_hour);
151 buff[3] = bin2bcd(alrm->time.tm_mday);
152 buff[4] = bin2bcd(alrm->time.tm_mon + 1);
153 buff[5] = bin2bcd(alrm->time.tm_year % RTC_YEAR_OFFSET);
154 ret = tps80031_writes(dev->parent, TPS80031_SLAVE_ID1,
155 TPS80031_ALARM_SECONDS_REG,
156 TPS80031_RTC_ALARM_NUM_REGS, buff);
157 if (ret < 0) {
158 dev_err(dev, "Writing RTC_ALARM failed, err %d\n", ret);
159 return ret;
160 }
161 return tps80031_rtc_alarm_irq_enable(dev, alrm->enabled);
162}
163
164static int tps80031_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
165{
166 u8 buff[6];
167 int ret;
168
169 ret = tps80031_reads(dev->parent, TPS80031_SLAVE_ID1,
170 TPS80031_ALARM_SECONDS_REG,
171 TPS80031_RTC_ALARM_NUM_REGS, buff);
172 if (ret < 0) {
173 dev_err(dev->parent,
174 "reading RTC_ALARM failed, err = %d\n", ret);
175 return ret;
176 }
177
178 alrm->time.tm_sec = bcd2bin(buff[0]);
179 alrm->time.tm_min = bcd2bin(buff[1]);
180 alrm->time.tm_hour = bcd2bin(buff[2]);
181 alrm->time.tm_mday = bcd2bin(buff[3]);
182 alrm->time.tm_mon = bcd2bin(buff[4]) - 1;
183 alrm->time.tm_year = bcd2bin(buff[5]) + RTC_YEAR_OFFSET;
184 return 0;
185}
186
187static int clear_alarm_int_status(struct device *dev, struct tps80031_rtc *rtc)
188{
189 int ret;
190 u8 buf;
191
192 /**
193 * As per datasheet, A dummy read of this RTC_STATUS_REG register
194 * is necessary before each I2C read in order to update the status
195 * register value.
196 */
197 ret = tps80031_read(dev->parent, TPS80031_SLAVE_ID1,
198 TPS80031_RTC_STATUS_REG, &buf);
199 if (ret < 0) {
200 dev_err(dev, "reading RTC_STATUS failed. err = %d\n", ret);
201 return ret;
202 }
203
204 /* clear Alarm status bits.*/
205 ret = tps80031_set_bits(dev->parent, TPS80031_SLAVE_ID1,
206 TPS80031_RTC_STATUS_REG, ALARM_INT_STATUS);
207 if (ret < 0) {
208 dev_err(dev, "clear Alarm INT failed, err = %d\n", ret);
209 return ret;
210 }
211 return 0;
212}
213
214static irqreturn_t tps80031_rtc_irq(int irq, void *data)
215{
216 struct device *dev = data;
217 struct tps80031_rtc *rtc = dev_get_drvdata(dev);
218 int ret;
219
220 ret = clear_alarm_int_status(dev, rtc);
221 if (ret < 0)
222 return ret;
223
224 rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
225 return IRQ_HANDLED;
226}
227
228static const struct rtc_class_ops tps80031_rtc_ops = {
229 .read_time = tps80031_rtc_read_time,
230 .set_time = tps80031_rtc_set_time,
231 .set_alarm = tps80031_rtc_set_alarm,
232 .read_alarm = tps80031_rtc_read_alarm,
233 .alarm_irq_enable = tps80031_rtc_alarm_irq_enable,
234};
235
236static int tps80031_rtc_probe(struct platform_device *pdev)
237{
238 struct tps80031_rtc *rtc;
239 struct rtc_time tm;
240 int ret;
241
242 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
243 if (!rtc)
244 return -ENOMEM;
245
246 rtc->irq = platform_get_irq(pdev, 0);
247 platform_set_drvdata(pdev, rtc);
248
249 /* Start RTC */
250 ret = tps80031_set_bits(pdev->dev.parent, TPS80031_SLAVE_ID1,
251 TPS80031_RTC_CTRL_REG, STOP_RTC);
252 if (ret < 0) {
253 dev_err(&pdev->dev, "failed to start RTC. err = %d\n", ret);
254 return ret;
255 }
256
257 /* If RTC have POR values, set time 01:01:2000 */
258 tps80031_rtc_read_time(&pdev->dev, &tm);
259 if ((tm.tm_year == RTC_YEAR_OFFSET + TPS80031_RTC_POR_YEAR) &&
260 (tm.tm_mon == (TPS80031_RTC_POR_MONTH - 1)) &&
261 (tm.tm_mday == TPS80031_RTC_POR_DAY)) {
262 tm.tm_year = 2000;
263 tm.tm_mday = 1;
264 tm.tm_mon = 1;
265 ret = tps80031_rtc_set_time(&pdev->dev, &tm);
266 if (ret < 0) {
267 dev_err(&pdev->dev,
268 "RTC set time failed, err = %d\n", ret);
269 return ret;
270 }
271 }
272
273 /* Clear alarm intretupt status if it is there */
274 ret = clear_alarm_int_status(&pdev->dev, rtc);
275 if (ret < 0) {
276 dev_err(&pdev->dev, "Clear alarm int failed, err = %d\n", ret);
277 return ret;
278 }
279
280 rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
281 &tps80031_rtc_ops, THIS_MODULE);
282 if (IS_ERR(rtc->rtc)) {
283 ret = PTR_ERR(rtc->rtc);
284 dev_err(&pdev->dev, "RTC registration failed, err %d\n", ret);
285 return ret;
286 }
287
288 ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
289 tps80031_rtc_irq,
290 IRQF_ONESHOT,
291 dev_name(&pdev->dev), rtc);
292 if (ret < 0) {
293 dev_err(&pdev->dev, "request IRQ:%d failed, err = %d\n",
294 rtc->irq, ret);
295 return ret;
296 }
297 device_set_wakeup_capable(&pdev->dev, 1);
298 return 0;
299}
300
301#ifdef CONFIG_PM_SLEEP
302static int tps80031_rtc_suspend(struct device *dev)
303{
304 struct tps80031_rtc *rtc = dev_get_drvdata(dev);
305
306 if (device_may_wakeup(dev))
307 enable_irq_wake(rtc->irq);
308 return 0;
309}
310
311static int tps80031_rtc_resume(struct device *dev)
312{
313 struct tps80031_rtc *rtc = dev_get_drvdata(dev);
314
315 if (device_may_wakeup(dev))
316 disable_irq_wake(rtc->irq);
317 return 0;
318};
319#endif
320
321static SIMPLE_DEV_PM_OPS(tps80031_pm_ops, tps80031_rtc_suspend,
322 tps80031_rtc_resume);
323
324static struct platform_driver tps80031_rtc_driver = {
325 .driver = {
326 .name = "tps80031-rtc",
327 .pm = &tps80031_pm_ops,
328 },
329 .probe = tps80031_rtc_probe,
330};
331
332module_platform_driver(tps80031_rtc_driver);
333
334MODULE_ALIAS("platform:tps80031-rtc");
335MODULE_DESCRIPTION("TI TPS80031/TPS80032 RTC driver");
336MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
337MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * rtc-tps80031.c -- TI TPS80031/TPS80032 RTC driver
4 *
5 * RTC driver for TI TPS80031/TPS80032 Fully Integrated
6 * Power Management with Power Path and Battery Charger
7 *
8 * Copyright (c) 2012, NVIDIA Corporation.
9 *
10 * Author: Laxman Dewangan <ldewangan@nvidia.com>
11 */
12
13#include <linux/bcd.h>
14#include <linux/device.h>
15#include <linux/err.h>
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/mfd/tps80031.h>
20#include <linux/platform_device.h>
21#include <linux/pm.h>
22#include <linux/rtc.h>
23#include <linux/slab.h>
24
25#define ENABLE_ALARM_INT 0x08
26#define ALARM_INT_STATUS 0x40
27
28/**
29 * Setting bit to 1 in STOP_RTC will run the RTC and
30 * setting this bit to 0 will freeze RTC.
31 */
32#define STOP_RTC 0x1
33
34/* Power on reset Values of RTC registers */
35#define TPS80031_RTC_POR_YEAR 0
36#define TPS80031_RTC_POR_MONTH 1
37#define TPS80031_RTC_POR_DAY 1
38
39/* Numbers of registers for time and alarms */
40#define TPS80031_RTC_TIME_NUM_REGS 7
41#define TPS80031_RTC_ALARM_NUM_REGS 6
42
43/**
44 * PMU RTC have only 2 nibbles to store year information, so using an
45 * offset of 100 to set the base year as 2000 for our driver.
46 */
47#define RTC_YEAR_OFFSET 100
48
49struct tps80031_rtc {
50 struct rtc_device *rtc;
51 int irq;
52};
53
54static int tps80031_rtc_read_time(struct device *dev, struct rtc_time *tm)
55{
56 u8 buff[TPS80031_RTC_TIME_NUM_REGS];
57 int ret;
58
59 ret = tps80031_reads(dev->parent, TPS80031_SLAVE_ID1,
60 TPS80031_SECONDS_REG, TPS80031_RTC_TIME_NUM_REGS, buff);
61 if (ret < 0) {
62 dev_err(dev, "reading RTC_SECONDS_REG failed, err = %d\n", ret);
63 return ret;
64 }
65
66 tm->tm_sec = bcd2bin(buff[0]);
67 tm->tm_min = bcd2bin(buff[1]);
68 tm->tm_hour = bcd2bin(buff[2]);
69 tm->tm_mday = bcd2bin(buff[3]);
70 tm->tm_mon = bcd2bin(buff[4]) - 1;
71 tm->tm_year = bcd2bin(buff[5]) + RTC_YEAR_OFFSET;
72 tm->tm_wday = bcd2bin(buff[6]);
73 return 0;
74}
75
76static int tps80031_rtc_set_time(struct device *dev, struct rtc_time *tm)
77{
78 u8 buff[7];
79 int ret;
80
81 buff[0] = bin2bcd(tm->tm_sec);
82 buff[1] = bin2bcd(tm->tm_min);
83 buff[2] = bin2bcd(tm->tm_hour);
84 buff[3] = bin2bcd(tm->tm_mday);
85 buff[4] = bin2bcd(tm->tm_mon + 1);
86 buff[5] = bin2bcd(tm->tm_year % RTC_YEAR_OFFSET);
87 buff[6] = bin2bcd(tm->tm_wday);
88
89 /* Stop RTC while updating the RTC time registers */
90 ret = tps80031_clr_bits(dev->parent, TPS80031_SLAVE_ID1,
91 TPS80031_RTC_CTRL_REG, STOP_RTC);
92 if (ret < 0) {
93 dev_err(dev->parent, "Stop RTC failed, err = %d\n", ret);
94 return ret;
95 }
96
97 ret = tps80031_writes(dev->parent, TPS80031_SLAVE_ID1,
98 TPS80031_SECONDS_REG,
99 TPS80031_RTC_TIME_NUM_REGS, buff);
100 if (ret < 0) {
101 dev_err(dev, "writing RTC_SECONDS_REG failed, err %d\n", ret);
102 return ret;
103 }
104
105 ret = tps80031_set_bits(dev->parent, TPS80031_SLAVE_ID1,
106 TPS80031_RTC_CTRL_REG, STOP_RTC);
107 if (ret < 0)
108 dev_err(dev->parent, "Start RTC failed, err = %d\n", ret);
109 return ret;
110}
111
112static int tps80031_rtc_alarm_irq_enable(struct device *dev,
113 unsigned int enable)
114{
115 int ret;
116
117 if (enable)
118 ret = tps80031_set_bits(dev->parent, TPS80031_SLAVE_ID1,
119 TPS80031_RTC_INTERRUPTS_REG, ENABLE_ALARM_INT);
120 else
121 ret = tps80031_clr_bits(dev->parent, TPS80031_SLAVE_ID1,
122 TPS80031_RTC_INTERRUPTS_REG, ENABLE_ALARM_INT);
123 if (ret < 0) {
124 dev_err(dev, "Update on RTC_INT failed, err = %d\n", ret);
125 return ret;
126 }
127 return 0;
128}
129
130static int tps80031_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
131{
132 u8 buff[TPS80031_RTC_ALARM_NUM_REGS];
133 int ret;
134
135 buff[0] = bin2bcd(alrm->time.tm_sec);
136 buff[1] = bin2bcd(alrm->time.tm_min);
137 buff[2] = bin2bcd(alrm->time.tm_hour);
138 buff[3] = bin2bcd(alrm->time.tm_mday);
139 buff[4] = bin2bcd(alrm->time.tm_mon + 1);
140 buff[5] = bin2bcd(alrm->time.tm_year % RTC_YEAR_OFFSET);
141 ret = tps80031_writes(dev->parent, TPS80031_SLAVE_ID1,
142 TPS80031_ALARM_SECONDS_REG,
143 TPS80031_RTC_ALARM_NUM_REGS, buff);
144 if (ret < 0) {
145 dev_err(dev, "Writing RTC_ALARM failed, err %d\n", ret);
146 return ret;
147 }
148 return tps80031_rtc_alarm_irq_enable(dev, alrm->enabled);
149}
150
151static int tps80031_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
152{
153 u8 buff[6];
154 int ret;
155
156 ret = tps80031_reads(dev->parent, TPS80031_SLAVE_ID1,
157 TPS80031_ALARM_SECONDS_REG,
158 TPS80031_RTC_ALARM_NUM_REGS, buff);
159 if (ret < 0) {
160 dev_err(dev->parent,
161 "reading RTC_ALARM failed, err = %d\n", ret);
162 return ret;
163 }
164
165 alrm->time.tm_sec = bcd2bin(buff[0]);
166 alrm->time.tm_min = bcd2bin(buff[1]);
167 alrm->time.tm_hour = bcd2bin(buff[2]);
168 alrm->time.tm_mday = bcd2bin(buff[3]);
169 alrm->time.tm_mon = bcd2bin(buff[4]) - 1;
170 alrm->time.tm_year = bcd2bin(buff[5]) + RTC_YEAR_OFFSET;
171 return 0;
172}
173
174static int clear_alarm_int_status(struct device *dev, struct tps80031_rtc *rtc)
175{
176 int ret;
177 u8 buf;
178
179 /**
180 * As per datasheet, A dummy read of this RTC_STATUS_REG register
181 * is necessary before each I2C read in order to update the status
182 * register value.
183 */
184 ret = tps80031_read(dev->parent, TPS80031_SLAVE_ID1,
185 TPS80031_RTC_STATUS_REG, &buf);
186 if (ret < 0) {
187 dev_err(dev, "reading RTC_STATUS failed. err = %d\n", ret);
188 return ret;
189 }
190
191 /* clear Alarm status bits.*/
192 ret = tps80031_set_bits(dev->parent, TPS80031_SLAVE_ID1,
193 TPS80031_RTC_STATUS_REG, ALARM_INT_STATUS);
194 if (ret < 0) {
195 dev_err(dev, "clear Alarm INT failed, err = %d\n", ret);
196 return ret;
197 }
198 return 0;
199}
200
201static irqreturn_t tps80031_rtc_irq(int irq, void *data)
202{
203 struct device *dev = data;
204 struct tps80031_rtc *rtc = dev_get_drvdata(dev);
205 int ret;
206
207 ret = clear_alarm_int_status(dev, rtc);
208 if (ret < 0)
209 return ret;
210
211 rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
212 return IRQ_HANDLED;
213}
214
215static const struct rtc_class_ops tps80031_rtc_ops = {
216 .read_time = tps80031_rtc_read_time,
217 .set_time = tps80031_rtc_set_time,
218 .set_alarm = tps80031_rtc_set_alarm,
219 .read_alarm = tps80031_rtc_read_alarm,
220 .alarm_irq_enable = tps80031_rtc_alarm_irq_enable,
221};
222
223static int tps80031_rtc_probe(struct platform_device *pdev)
224{
225 struct tps80031_rtc *rtc;
226 struct rtc_time tm;
227 int ret;
228
229 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
230 if (!rtc)
231 return -ENOMEM;
232
233 rtc->irq = platform_get_irq(pdev, 0);
234 platform_set_drvdata(pdev, rtc);
235
236 /* Start RTC */
237 ret = tps80031_set_bits(pdev->dev.parent, TPS80031_SLAVE_ID1,
238 TPS80031_RTC_CTRL_REG, STOP_RTC);
239 if (ret < 0) {
240 dev_err(&pdev->dev, "failed to start RTC. err = %d\n", ret);
241 return ret;
242 }
243
244 /* If RTC have POR values, set time 01:01:2000 */
245 tps80031_rtc_read_time(&pdev->dev, &tm);
246 if ((tm.tm_year == RTC_YEAR_OFFSET + TPS80031_RTC_POR_YEAR) &&
247 (tm.tm_mon == (TPS80031_RTC_POR_MONTH - 1)) &&
248 (tm.tm_mday == TPS80031_RTC_POR_DAY)) {
249 tm.tm_year = 2000;
250 tm.tm_mday = 1;
251 tm.tm_mon = 1;
252 ret = tps80031_rtc_set_time(&pdev->dev, &tm);
253 if (ret < 0) {
254 dev_err(&pdev->dev,
255 "RTC set time failed, err = %d\n", ret);
256 return ret;
257 }
258 }
259
260 /* Clear alarm intretupt status if it is there */
261 ret = clear_alarm_int_status(&pdev->dev, rtc);
262 if (ret < 0) {
263 dev_err(&pdev->dev, "Clear alarm int failed, err = %d\n", ret);
264 return ret;
265 }
266
267 rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
268 &tps80031_rtc_ops, THIS_MODULE);
269 if (IS_ERR(rtc->rtc)) {
270 ret = PTR_ERR(rtc->rtc);
271 dev_err(&pdev->dev, "RTC registration failed, err %d\n", ret);
272 return ret;
273 }
274
275 ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
276 tps80031_rtc_irq,
277 IRQF_ONESHOT,
278 dev_name(&pdev->dev), rtc);
279 if (ret < 0) {
280 dev_err(&pdev->dev, "request IRQ:%d failed, err = %d\n",
281 rtc->irq, ret);
282 return ret;
283 }
284 device_set_wakeup_capable(&pdev->dev, 1);
285 return 0;
286}
287
288#ifdef CONFIG_PM_SLEEP
289static int tps80031_rtc_suspend(struct device *dev)
290{
291 struct tps80031_rtc *rtc = dev_get_drvdata(dev);
292
293 if (device_may_wakeup(dev))
294 enable_irq_wake(rtc->irq);
295 return 0;
296}
297
298static int tps80031_rtc_resume(struct device *dev)
299{
300 struct tps80031_rtc *rtc = dev_get_drvdata(dev);
301
302 if (device_may_wakeup(dev))
303 disable_irq_wake(rtc->irq);
304 return 0;
305};
306#endif
307
308static SIMPLE_DEV_PM_OPS(tps80031_pm_ops, tps80031_rtc_suspend,
309 tps80031_rtc_resume);
310
311static struct platform_driver tps80031_rtc_driver = {
312 .driver = {
313 .name = "tps80031-rtc",
314 .pm = &tps80031_pm_ops,
315 },
316 .probe = tps80031_rtc_probe,
317};
318
319module_platform_driver(tps80031_rtc_driver);
320
321MODULE_ALIAS("platform:tps80031-rtc");
322MODULE_DESCRIPTION("TI TPS80031/TPS80032 RTC driver");
323MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
324MODULE_LICENSE("GPL v2");