1 /*
   2  * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
   3  * All rights reserved.  www.lanmedia.com
   4  * Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
   5  *
   6  * This code is written by:
   7  * Andrew Stanley-Jones (asj@cban.com)
   8  * Rob Braun (bbraun@vix.com),
   9  * Michael Graff (explorer@vix.com) and
  10  * Matt Thomas (matt@3am-software.com).
  11  *
  12  * With Help By:
  13  * David Boggs
  14  * Ron Crane
  15  * Alan Cox
  16  *
  17  * This software may be used and distributed according to the terms
  18  * of the GNU General Public License version 2, incorporated herein by reference.
  19  *
  20  * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards.
  21  *
  22  * To control link specific options lmcctl is required.
  23  * It can be obtained from ftp.lanmedia.com.
  24  *
  25  * Linux driver notes:
  26  * Linux uses the device struct lmc_private to pass private information
  27  * around.
  28  *
  29  * The initialization portion of this driver (the lmc_reset() and the
  30  * lmc_dec_reset() functions, as well as the led controls and the
  31  * lmc_initcsrs() functions.
  32  *
  33  * The watchdog function runs every second and checks to see if
  34  * we still have link, and that the timing source is what we expected
  35  * it to be.  If link is lost, the interface is marked down, and
  36  * we no longer can transmit.
  37  *
  38  */
  39
  40#include <linux/kernel.h>
  41#include <linux/module.h>
  42#include <linux/string.h>
  43#include <linux/timer.h>
  44#include <linux/ptrace.h>
  45#include <linux/errno.h>
  46#include <linux/ioport.h>
  47#include <linux/slab.h>
  48#include <linux/interrupt.h>
  49#include <linux/pci.h>
  50#include <linux/delay.h>
  51#include <linux/hdlc.h>
  52#include <linux/in.h>
  53#include <linux/if_arp.h>
  54#include <linux/netdevice.h>
  55#include <linux/etherdevice.h>
  56#include <linux/skbuff.h>
  57#include <linux/inet.h>
  58#include <linux/bitops.h>
  59#include <asm/processor.h>             /* Processor type for cache alignment. */
  60#include <asm/io.h>
  61#include <asm/dma.h>
  62#include <asm/uaccess.h>
  63//#include <asm/spinlock.h>
  64
  65#define DRIVER_MAJOR_VERSION     1
  66#define DRIVER_MINOR_VERSION    34
  67#define DRIVER_SUB_VERSION       0
  68
  69#define DRIVER_VERSION  ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION)
  70
  71#include "lmc.h"
  72#include "lmc_var.h"
  73#include "lmc_ioctl.h"
  74#include "lmc_debug.h"
  75#include "lmc_proto.h"
  76
  77static int LMC_PKT_BUF_SZ = 1542;
  78
  79static const struct pci_device_id lmc_pci_tbl[] = {
  80	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  81	  PCI_VENDOR_ID_LMC, PCI_ANY_ID },
  82	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  83	  PCI_ANY_ID, PCI_VENDOR_ID_LMC },
  84	{ 0 }
  85};
  86
  87MODULE_DEVICE_TABLE(pci, lmc_pci_tbl);
  88MODULE_LICENSE("GPL v2");
  89
  90
  91static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
  92					struct net_device *dev);
  93static int lmc_rx (struct net_device *dev);
  94static int lmc_open(struct net_device *dev);
  95static int lmc_close(struct net_device *dev);
  96static struct net_device_stats *lmc_get_stats(struct net_device *dev);
  97static irqreturn_t lmc_interrupt(int irq, void *dev_instance);
  98static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size);
  99static void lmc_softreset(lmc_softc_t * const);
 100static void lmc_running_reset(struct net_device *dev);
 101static int lmc_ifdown(struct net_device * const);
 102static void lmc_watchdog(unsigned long data);
 103static void lmc_reset(lmc_softc_t * const sc);
 104static void lmc_dec_reset(lmc_softc_t * const sc);
 105static void lmc_driver_timeout(struct net_device *dev);
 106
 107/*
 108 * linux reserves 16 device specific IOCTLs.  We call them
 109 * LMCIOC* to control various bits of our world.
 110 */
 111int lmc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
 112{
 113    lmc_softc_t *sc = dev_to_sc(dev);
 114    lmc_ctl_t ctl;
 115    int ret = -EOPNOTSUPP;
 116    u16 regVal;
 117    unsigned long flags;
 118
 119    lmc_trace(dev, "lmc_ioctl in");
 120
 121    /*
 122     * Most functions mess with the structure
 123     * Disable interrupts while we do the polling
 124     */
 125
 126    switch (cmd) {
 127        /*
 128         * Return current driver state.  Since we keep this up
 129         * To date internally, just copy this out to the user.
 130         */
 131    case LMCIOCGINFO: /*fold01*/
 132	if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof(lmc_ctl_t)))
 133		ret = -EFAULT;
 134	else
 135		ret = 0;
 136        break;
 137
 138    case LMCIOCSINFO: /*fold01*/
 139        if (!capable(CAP_NET_ADMIN)) {
 140            ret = -EPERM;
 141            break;
 142        }
 143
 144        if(dev->flags & IFF_UP){
 145            ret = -EBUSY;
 146            break;
 147        }
 148
 149	if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
 150		ret = -EFAULT;
 151		break;
 152	}
 153
 154	spin_lock_irqsave(&sc->lmc_lock, flags);
 155        sc->lmc_media->set_status (sc, &ctl);
 156
 157        if(ctl.crc_length != sc->ictl.crc_length) {
 158            sc->lmc_media->set_crc_length(sc, ctl.crc_length);
 159	    if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16)
 160		sc->TxDescriptControlInit |=  LMC_TDES_ADD_CRC_DISABLE;
 161	    else
 162		sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
 163        }
 164	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 165
 166        ret = 0;
 167        break;
 168
 169    case LMCIOCIFTYPE: /*fold01*/
 170        {
 171	    u16 old_type = sc->if_type;
 172	    u16	new_type;
 173
 174	    if (!capable(CAP_NET_ADMIN)) {
 175		ret = -EPERM;
 176		break;
 177	    }
 178
 179	    if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u16))) {
 180		ret = -EFAULT;
 181		break;
 182	    }
 183
 184            
 185	    if (new_type == old_type)
 186	    {
 187		ret = 0 ;
 188		break;				/* no change */
 189            }
 190            
 191	    spin_lock_irqsave(&sc->lmc_lock, flags);
 192            lmc_proto_close(sc);
 193
 194            sc->if_type = new_type;
 195            lmc_proto_attach(sc);
 196	    ret = lmc_proto_open(sc);
 197	    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 198	    break;
 199	}
 200
 201    case LMCIOCGETXINFO: /*fold01*/
 202	spin_lock_irqsave(&sc->lmc_lock, flags);
 203        sc->lmc_xinfo.Magic0 = 0xBEEFCAFE;
 204
 205        sc->lmc_xinfo.PciCardType = sc->lmc_cardtype;
 206        sc->lmc_xinfo.PciSlotNumber = 0;
 207        sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION;
 208        sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION;
 209        sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION;
 210        sc->lmc_xinfo.XilinxRevisionNumber =
 211            lmc_mii_readreg (sc, 0, 3) & 0xf;
 212        sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ;
 213        sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc);
 214        sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16);
 215	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 216
 217        sc->lmc_xinfo.Magic1 = 0xDEADBEEF;
 218
 219        if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo,
 220			 sizeof(struct lmc_xinfo)))
 221		ret = -EFAULT;
 222	else
 223		ret = 0;
 224
 225        break;
 226
 227    case LMCIOCGETLMCSTATS:
 228	    spin_lock_irqsave(&sc->lmc_lock, flags);
 229	    if (sc->lmc_cardtype == LMC_CARDTYPE_T1) {
 230		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_LSB);
 231		    sc->extra_stats.framingBitErrorCount +=
 232			    lmc_mii_readreg(sc, 0, 18) & 0xff;
 233		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_MSB);
 234		    sc->extra_stats.framingBitErrorCount +=
 235			    (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
 236		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_LSB);
 237		    sc->extra_stats.lineCodeViolationCount +=
 238			    lmc_mii_readreg(sc, 0, 18) & 0xff;
 239		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_MSB);
 240		    sc->extra_stats.lineCodeViolationCount +=
 241			    (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
 242		    lmc_mii_writereg(sc, 0, 17, T1FRAMER_AERR);
 243		    regVal = lmc_mii_readreg(sc, 0, 18) & 0xff;
 244
 245		    sc->extra_stats.lossOfFrameCount +=
 246			    (regVal & T1FRAMER_LOF_MASK) >> 4;
 247		    sc->extra_stats.changeOfFrameAlignmentCount +=
 248			    (regVal & T1FRAMER_COFA_MASK) >> 2;
 249		    sc->extra_stats.severelyErroredFrameCount +=
 250			    regVal & T1FRAMER_SEF_MASK;
 251	    }
 252	    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 253	    if (copy_to_user(ifr->ifr_data, &sc->lmc_device->stats,
 254			     sizeof(sc->lmc_device->stats)) ||
 255		copy_to_user(ifr->ifr_data + sizeof(sc->lmc_device->stats),
 256			     &sc->extra_stats, sizeof(sc->extra_stats)))
 257		    ret = -EFAULT;
 258	    else
 259		    ret = 0;
 260	    break;
 261
 262    case LMCIOCCLEARLMCSTATS:
 263	    if (!capable(CAP_NET_ADMIN)) {
 264		    ret = -EPERM;
 265		    break;
 266	    }
 267
 268	    spin_lock_irqsave(&sc->lmc_lock, flags);
 269	    memset(&sc->lmc_device->stats, 0, sizeof(sc->lmc_device->stats));
 270	    memset(&sc->extra_stats, 0, sizeof(sc->extra_stats));
 271	    sc->extra_stats.check = STATCHECK;
 272	    sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
 273		    sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
 274	    sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
 275	    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 276	    ret = 0;
 277	    break;
 278
 279    case LMCIOCSETCIRCUIT: /*fold01*/
 280        if (!capable(CAP_NET_ADMIN)){
 281            ret = -EPERM;
 282            break;
 283        }
 284
 285        if(dev->flags & IFF_UP){
 286            ret = -EBUSY;
 287            break;
 288        }
 289
 290	if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
 291		ret = -EFAULT;
 292		break;
 293	}
 294	spin_lock_irqsave(&sc->lmc_lock, flags);
 295        sc->lmc_media->set_circuit_type(sc, ctl.circuit_type);
 296        sc->ictl.circuit_type = ctl.circuit_type;
 297	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 298        ret = 0;
 299
 300        break;
 301
 302    case LMCIOCRESET: /*fold01*/
 303        if (!capable(CAP_NET_ADMIN)){
 304            ret = -EPERM;
 305            break;
 306        }
 307
 308	spin_lock_irqsave(&sc->lmc_lock, flags);
 309        /* Reset driver and bring back to current state */
 310        printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
 311        lmc_running_reset (dev);
 312        printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
 313
 314        LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
 315	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 316
 317        ret = 0;
 318        break;
 319
 320#ifdef DEBUG
 321    case LMCIOCDUMPEVENTLOG:
 322	if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof(u32))) {
 323		ret = -EFAULT;
 324		break;
 325	}
 326	if (copy_to_user(ifr->ifr_data + sizeof(u32), lmcEventLogBuf,
 327			 sizeof(lmcEventLogBuf)))
 328		ret = -EFAULT;
 329	else
 330		ret = 0;
 331
 332        break;
 333#endif /* end ifdef _DBG_EVENTLOG */
 334    case LMCIOCT1CONTROL: /*fold01*/
 335        if (sc->lmc_cardtype != LMC_CARDTYPE_T1){
 336            ret = -EOPNOTSUPP;
 337            break;
 338        }
 339        break;
 340    case LMCIOCXILINX: /*fold01*/
 341        {
 342            struct lmc_xilinx_control xc; /*fold02*/
 343
 344            if (!capable(CAP_NET_ADMIN)){
 345                ret = -EPERM;
 346                break;
 347            }
 348
 349            /*
 350             * Stop the xwitter whlie we restart the hardware
 351             */
 352            netif_stop_queue(dev);
 353
 354	    if (copy_from_user(&xc, ifr->ifr_data, sizeof(struct lmc_xilinx_control))) {
 355		ret = -EFAULT;
 356		break;
 357	    }
 358            switch(xc.command){
 359            case lmc_xilinx_reset: /*fold02*/
 360                {
 361                    u16 mii;
 362		    spin_lock_irqsave(&sc->lmc_lock, flags);
 363                    mii = lmc_mii_readreg (sc, 0, 16);
 364
 365                    /*
 366                     * Make all of them 0 and make input
 367                     */
 368                    lmc_gpio_mkinput(sc, 0xff);
 369
 370                    /*
 371                     * make the reset output
 372                     */
 373                    lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
 374
 375                    /*
 376                     * RESET low to force configuration.  This also forces
 377                     * the transmitter clock to be internal, but we expect to reset
 378                     * that later anyway.
 379                     */
 380
 381                    sc->lmc_gpio &= ~LMC_GEP_RESET;
 382                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 383
 384
 385                    /*
 386                     * hold for more than 10 microseconds
 387                     */
 388                    udelay(50);
 389
 390                    sc->lmc_gpio |= LMC_GEP_RESET;
 391                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 392
 393
 394                    /*
 395                     * stop driving Xilinx-related signals
 396                     */
 397                    lmc_gpio_mkinput(sc, 0xff);
 398
 399                    /* Reset the frammer hardware */
 400                    sc->lmc_media->set_link_status (sc, 1);
 401                    sc->lmc_media->set_status (sc, NULL);
 402//                    lmc_softreset(sc);
 403
 404                    {
 405                        int i;
 406                        for(i = 0; i < 5; i++){
 407                            lmc_led_on(sc, LMC_DS3_LED0);
 408                            mdelay(100);
 409                            lmc_led_off(sc, LMC_DS3_LED0);
 410                            lmc_led_on(sc, LMC_DS3_LED1);
 411                            mdelay(100);
 412                            lmc_led_off(sc, LMC_DS3_LED1);
 413                            lmc_led_on(sc, LMC_DS3_LED3);
 414                            mdelay(100);
 415                            lmc_led_off(sc, LMC_DS3_LED3);
 416                            lmc_led_on(sc, LMC_DS3_LED2);
 417                            mdelay(100);
 418                            lmc_led_off(sc, LMC_DS3_LED2);
 419                        }
 420                    }
 421		    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 422                    
 423                    
 424
 425                    ret = 0x0;
 426
 427                }
 428
 429                break;
 430            case lmc_xilinx_load_prom: /*fold02*/
 431                {
 432                    u16 mii;
 433                    int timeout = 500000;
 434		    spin_lock_irqsave(&sc->lmc_lock, flags);
 435                    mii = lmc_mii_readreg (sc, 0, 16);
 436
 437                    /*
 438                     * Make all of them 0 and make input
 439                     */
 440                    lmc_gpio_mkinput(sc, 0xff);
 441
 442                    /*
 443                     * make the reset output
 444                     */
 445                    lmc_gpio_mkoutput(sc,  LMC_GEP_DP | LMC_GEP_RESET);
 446
 447                    /*
 448                     * RESET low to force configuration.  This also forces
 449                     * the transmitter clock to be internal, but we expect to reset
 450                     * that later anyway.
 451                     */
 452
 453                    sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP);
 454                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 455
 456
 457                    /*
 458                     * hold for more than 10 microseconds
 459                     */
 460                    udelay(50);
 461
 462                    sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET;
 463                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 464
 465                    /*
 466                     * busy wait for the chip to reset
 467                     */
 468                    while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
 469                           (timeout-- > 0))
 470                        cpu_relax();
 471
 472
 473                    /*
 474                     * stop driving Xilinx-related signals
 475                     */
 476                    lmc_gpio_mkinput(sc, 0xff);
 477		    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 478
 479                    ret = 0x0;
 480                    
 481
 482                    break;
 483
 484                }
 485
 486            case lmc_xilinx_load: /*fold02*/
 487                {
 488                    char *data;
 489                    int pos;
 490                    int timeout = 500000;
 491
 492                    if (!xc.data) {
 493                            ret = -EINVAL;
 494                            break;
 495                    }
 496
 497                    data = kmalloc(xc.len, GFP_KERNEL);
 498                    if (!data) {
 499                            ret = -ENOMEM;
 500                            break;
 501                    }
 502                    
 503                    if(copy_from_user(data, xc.data, xc.len))
 504                    {
 505                    	kfree(data);
 506                    	ret = -ENOMEM;
 507                    	break;
 508                    }
 509
 510                    printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data);
 511
 512		    spin_lock_irqsave(&sc->lmc_lock, flags);
 513                    lmc_gpio_mkinput(sc, 0xff);
 514
 515                    /*
 516                     * Clear the Xilinx and start prgramming from the DEC
 517                     */
 518
 519                    /*
 520                     * Set ouput as:
 521                     * Reset: 0 (active)
 522                     * DP:    0 (active)
 523                     * Mode:  1
 524                     *
 525                     */
 526                    sc->lmc_gpio = 0x00;
 527                    sc->lmc_gpio &= ~LMC_GEP_DP;
 528                    sc->lmc_gpio &= ~LMC_GEP_RESET;
 529                    sc->lmc_gpio |=  LMC_GEP_MODE;
 530                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 531
 532                    lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET);
 533
 534                    /*
 535                     * Wait at least 10 us 20 to be safe
 536                     */
 537                    udelay(50);
 538
 539                    /*
 540                     * Clear reset and activate programming lines
 541                     * Reset: Input
 542                     * DP:    Input
 543                     * Clock: Output
 544                     * Data:  Output
 545                     * Mode:  Output
 546                     */
 547                    lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
 548
 549                    /*
 550                     * Set LOAD, DATA, Clock to 1
 551                     */
 552                    sc->lmc_gpio = 0x00;
 553                    sc->lmc_gpio |= LMC_GEP_MODE;
 554                    sc->lmc_gpio |= LMC_GEP_DATA;
 555                    sc->lmc_gpio |= LMC_GEP_CLK;
 556                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 557                    
 558                    lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE );
 559
 560                    /*
 561                     * busy wait for the chip to reset
 562                     */
 563                    while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
 564                           (timeout-- > 0))
 565                        cpu_relax();
 566
 567                    printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout);
 568
 569                    for(pos = 0; pos < xc.len; pos++){
 570                        switch(data[pos]){
 571                        case 0:
 572                            sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */
 573                            break;
 574                        case 1:
 575                            sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */
 576                            break;
 577                        default:
 578                            printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]);
 579                            sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */
 580                        }
 581                        sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */
 582                        sc->lmc_gpio |= LMC_GEP_MODE;
 583                        LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 584                        udelay(1);
 585                        
 586                        sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */
 587                        sc->lmc_gpio |= LMC_GEP_MODE;
 588                        LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 589                        udelay(1);
 590                    }
 591                    if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){
 592                        printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name);
 593                    }
 594                    else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){
 595                        printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name);
 596                    }
 597                    else {
 598                        printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos);
 599                    }
 600
 601                    lmc_gpio_mkinput(sc, 0xff);
 602                    
 603                    sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
 604                    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
 605
 606                    sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
 607                    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
 608		    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 609
 610                    kfree(data);
 611                    
 612                    ret = 0;
 613                    
 614                    break;
 615                }
 616            default: /*fold02*/
 617                ret = -EBADE;
 618                break;
 619            }
 620
 621            netif_wake_queue(dev);
 622            sc->lmc_txfull = 0;
 623
 624        }
 625        break;
 626    default: /*fold01*/
 627        /* If we don't know what to do, give the protocol a shot. */
 628        ret = lmc_proto_ioctl (sc, ifr, cmd);
 629        break;
 630    }
 631
 632    lmc_trace(dev, "lmc_ioctl out");
 633
 634    return ret;
 635}
 636
 637
 638/* the watchdog process that cruises around */
 639static void lmc_watchdog (unsigned long data) /*fold00*/
 640{
 641    struct net_device *dev = (struct net_device *)data;
 642    lmc_softc_t *sc = dev_to_sc(dev);
 643    int link_status;
 644    u32 ticks;
 645    unsigned long flags;
 646
 647    lmc_trace(dev, "lmc_watchdog in");
 648
 649    spin_lock_irqsave(&sc->lmc_lock, flags);
 650
 651    if(sc->check != 0xBEAFCAFE){
 652        printk("LMC: Corrupt net_device struct, breaking out\n");
 653	spin_unlock_irqrestore(&sc->lmc_lock, flags);
 654        return;
 655    }
 656
 657
 658    /* Make sure the tx jabber and rx watchdog are off,
 659     * and the transmit and receive processes are running.
 660     */
 661
 662    LMC_CSR_WRITE (sc, csr_15, 0x00000011);
 663    sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
 664    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
 665
 666    if (sc->lmc_ok == 0)
 667        goto kick_timer;
 668
 669    LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
 670
 671    /* --- begin time out check -----------------------------------
 672     * check for a transmit interrupt timeout
 673     * Has the packet xmt vs xmt serviced threshold been exceeded */
 674    if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
 675	sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
 676	sc->tx_TimeoutInd == 0)
 677    {
 678
 679        /* wait for the watchdog to come around again */
 680        sc->tx_TimeoutInd = 1;
 681    }
 682    else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
 683	     sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
 684	     sc->tx_TimeoutInd)
 685    {
 686
 687        LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
 688
 689        sc->tx_TimeoutDisplay = 1;
 690	sc->extra_stats.tx_TimeoutCnt++;
 691
 692        /* DEC chip is stuck, hit it with a RESET!!!! */
 693        lmc_running_reset (dev);
 694
 695
 696        /* look at receive & transmit process state to make sure they are running */
 697        LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
 698
 699        /* look at: DSR - 02  for Reg 16
 700         *                  CTS - 08
 701         *                  DCD - 10
 702         *                  RI  - 20
 703         * for Reg 17
 704         */
 705        LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17));
 706
 707        /* reset the transmit timeout detection flag */
 708        sc->tx_TimeoutInd = 0;
 709        sc->lastlmc_taint_tx = sc->lmc_taint_tx;
 710	sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
 711    } else {
 712        sc->tx_TimeoutInd = 0;
 713        sc->lastlmc_taint_tx = sc->lmc_taint_tx;
 714	sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
 715    }
 716
 717    /* --- end time out check ----------------------------------- */
 718
 719
 720    link_status = sc->lmc_media->get_link_status (sc);
 721
 722    /*
 723     * hardware level link lost, but the interface is marked as up.
 724     * Mark it as down.
 725     */
 726    if ((link_status == 0) && (sc->last_link_status != 0)) {
 727        printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name);
 728        sc->last_link_status = 0;
 729        /* lmc_reset (sc); Why reset??? The link can go down ok */
 730
 731        /* Inform the world that link has been lost */
 732	netif_carrier_off(dev);
 733    }
 734
 735    /*
 736     * hardware link is up, but the interface is marked as down.
 737     * Bring it back up again.
 738     */
 739     if (link_status != 0 && sc->last_link_status == 0) {
 740         printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name);
 741         sc->last_link_status = 1;
 742         /* lmc_reset (sc); Again why reset??? */
 743
 744	 netif_carrier_on(dev);
 745     }
 746
 747    /* Call media specific watchdog functions */
 748    sc->lmc_media->watchdog(sc);
 749
 750    /*
 751     * Poke the transmitter to make sure it
 752     * never stops, even if we run out of mem
 753     */
 754    LMC_CSR_WRITE(sc, csr_rxpoll, 0);
 755
 756    /*
 757     * Check for code that failed
 758     * and try and fix it as appropriate
 759     */
 760    if(sc->failed_ring == 1){
 761        /*
 762         * Failed to setup the recv/xmit rin
 763         * Try again
 764         */
 765        sc->failed_ring = 0;
 766        lmc_softreset(sc);
 767    }
 768    if(sc->failed_recv_alloc == 1){
 769        /*
 770         * We failed to alloc mem in the
 771         * interrupt handler, go through the rings
 772         * and rebuild them
 773         */
 774        sc->failed_recv_alloc = 0;
 775        lmc_softreset(sc);
 776    }
 777
 778
 779    /*
 780     * remember the timer value
 781     */
 782kick_timer:
 783
 784    ticks = LMC_CSR_READ (sc, csr_gp_timer);
 785    LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL);
 786    sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
 787
 788    /*
 789     * restart this timer.
 790     */
 791    sc->timer.expires = jiffies + (HZ);
 792    add_timer (&sc->timer);
 793
 794    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 795
 796    lmc_trace(dev, "lmc_watchdog out");
 797
 798}
 799
 800static int lmc_attach(struct net_device *dev, unsigned short encoding,
 801		      unsigned short parity)
 802{
 803	if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
 804		return 0;
 805	return -EINVAL;
 806}
 807
 808static const struct net_device_ops lmc_ops = {
 809	.ndo_open       = lmc_open,
 810	.ndo_stop       = lmc_close,
 811	.ndo_change_mtu = hdlc_change_mtu,
 812	.ndo_start_xmit = hdlc_start_xmit,
 813	.ndo_do_ioctl   = lmc_ioctl,
 814	.ndo_tx_timeout = lmc_driver_timeout,
 815	.ndo_get_stats  = lmc_get_stats,
 816};
 817
 818static int lmc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 819{
 820	lmc_softc_t *sc;
 821	struct net_device *dev;
 822	u16 subdevice;
 823	u16 AdapModelNum;
 824	int err;
 825	static int cards_found;
 826
 827	/* lmc_trace(dev, "lmc_init_one in"); */
 828
 829	err = pcim_enable_device(pdev);
 830	if (err) {
 831		printk(KERN_ERR "lmc: pci enable failed: %d\n", err);
 832		return err;
 833	}
 834
 835	err = pci_request_regions(pdev, "lmc");
 836	if (err) {
 837		printk(KERN_ERR "lmc: pci_request_region failed\n");
 838		return err;
 839	}
 840
 841	/*
 842	 * Allocate our own device structure
 843	 */
 844	sc = devm_kzalloc(&pdev->dev, sizeof(lmc_softc_t), GFP_KERNEL);
 845	if (!sc)
 846		return -ENOMEM;
 847
 848	dev = alloc_hdlcdev(sc);
 849	if (!dev) {
 850		printk(KERN_ERR "lmc:alloc_netdev for device failed\n");
 851		return -ENOMEM;
 852	}
 853
 854
 855	dev->type = ARPHRD_HDLC;
 856	dev_to_hdlc(dev)->xmit = lmc_start_xmit;
 857	dev_to_hdlc(dev)->attach = lmc_attach;
 858	dev->netdev_ops = &lmc_ops;
 859	dev->watchdog_timeo = HZ; /* 1 second */
 860	dev->tx_queue_len = 100;
 861	sc->lmc_device = dev;
 862	sc->name = dev->name;
 863	sc->if_type = LMC_PPP;
 864	sc->check = 0xBEAFCAFE;
 865	dev->base_addr = pci_resource_start(pdev, 0);
 866	dev->irq = pdev->irq;
 867	pci_set_drvdata(pdev, dev);
 868	SET_NETDEV_DEV(dev, &pdev->dev);
 869
 870	/*
 871	 * This will get the protocol layer ready and do any 1 time init's
 872	 * Must have a valid sc and dev structure
 873	 */
 874	lmc_proto_attach(sc);
 875
 876	/* Init the spin lock so can call it latter */
 877
 878	spin_lock_init(&sc->lmc_lock);
 879	pci_set_master(pdev);
 880
 881	printk(KERN_INFO "%s: detected at %lx, irq %d\n", dev->name,
 882	       dev->base_addr, dev->irq);
 883
 884	err = register_hdlc_device(dev);
 885	if (err) {
 886		printk(KERN_ERR "%s: register_netdev failed.\n", dev->name);
 887		free_netdev(dev);
 888		return err;
 889	}
 890
 891    sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
 892    sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
 893
 894    /*
 895     *
 896     * Check either the subvendor or the subdevice, some systems reverse
 897     * the setting in the bois, seems to be version and arch dependent?
 898     * Fix the error, exchange the two values 
 899     */
 900    if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC)
 901	    subdevice = pdev->subsystem_vendor;
 902
 903    switch (subdevice) {
 904    case PCI_DEVICE_ID_LMC_HSSI:
 905	printk(KERN_INFO "%s: LMC HSSI\n", dev->name);
 906        sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
 907        sc->lmc_media = &lmc_hssi_media;
 908        break;
 909    case PCI_DEVICE_ID_LMC_DS3:
 910	printk(KERN_INFO "%s: LMC DS3\n", dev->name);
 911        sc->lmc_cardtype = LMC_CARDTYPE_DS3;
 912        sc->lmc_media = &lmc_ds3_media;
 913        break;
 914    case PCI_DEVICE_ID_LMC_SSI:
 915	printk(KERN_INFO "%s: LMC SSI\n", dev->name);
 916        sc->lmc_cardtype = LMC_CARDTYPE_SSI;
 917        sc->lmc_media = &lmc_ssi_media;
 918        break;
 919    case PCI_DEVICE_ID_LMC_T1:
 920	printk(KERN_INFO "%s: LMC T1\n", dev->name);
 921        sc->lmc_cardtype = LMC_CARDTYPE_T1;
 922        sc->lmc_media = &lmc_t1_media;
 923        break;
 924    default:
 925	printk(KERN_WARNING "%s: LMC UNKNOWN CARD!\n", dev->name);
 
 
 926        break;
 927    }
 928
 929    lmc_initcsrs (sc, dev->base_addr, 8);
 930
 931    lmc_gpio_mkinput (sc, 0xff);
 932    sc->lmc_gpio = 0;		/* drive no signals yet */
 933
 934    sc->lmc_media->defaults (sc);
 935
 936    sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
 937
 938    /* verify that the PCI Sub System ID matches the Adapter Model number
 939     * from the MII register
 940     */
 941    AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
 942
 943    if ((AdapModelNum != LMC_ADAP_T1 || /* detect LMC1200 */
 944	 subdevice != PCI_DEVICE_ID_LMC_T1) &&
 945	(AdapModelNum != LMC_ADAP_SSI || /* detect LMC1000 */
 946	 subdevice != PCI_DEVICE_ID_LMC_SSI) &&
 947	(AdapModelNum != LMC_ADAP_DS3 || /* detect LMC5245 */
 948	 subdevice != PCI_DEVICE_ID_LMC_DS3) &&
 949	(AdapModelNum != LMC_ADAP_HSSI || /* detect LMC5200 */
 950	 subdevice != PCI_DEVICE_ID_LMC_HSSI))
 951	    printk(KERN_WARNING "%s: Model number (%d) miscompare for PCI"
 952		   " Subsystem ID = 0x%04x\n",
 953		   dev->name, AdapModelNum, subdevice);
 954
 955    /*
 956     * reset clock
 957     */
 958    LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
 959
 960    sc->board_idx = cards_found++;
 961    sc->extra_stats.check = STATCHECK;
 962    sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
 963	    sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
 964    sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
 965
 966    sc->lmc_ok = 0;
 967    sc->last_link_status = 0;
 968
 969    lmc_trace(dev, "lmc_init_one out");
 970    return 0;
 971}
 972
 973/*
 974 * Called from pci when removing module.
 975 */
 976static void lmc_remove_one(struct pci_dev *pdev)
 977{
 978	struct net_device *dev = pci_get_drvdata(pdev);
 979
 980	if (dev) {
 981		printk(KERN_DEBUG "%s: removing...\n", dev->name);
 982		unregister_hdlc_device(dev);
 983		free_netdev(dev);
 984	}
 985}
 986
 987/* After this is called, packets can be sent.
 988 * Does not initialize the addresses
 989 */
 990static int lmc_open(struct net_device *dev)
 991{
 992    lmc_softc_t *sc = dev_to_sc(dev);
 993    int err;
 994
 995    lmc_trace(dev, "lmc_open in");
 996
 997    lmc_led_on(sc, LMC_DS3_LED0);
 998
 999    lmc_dec_reset(sc);
1000    lmc_reset(sc);
1001
1002    LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ(sc, csr_status), 0);
1003    LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg(sc, 0, 16),
1004		  lmc_mii_readreg(sc, 0, 17));
1005
1006    if (sc->lmc_ok){
1007        lmc_trace(dev, "lmc_open lmc_ok out");
1008        return 0;
1009    }
1010
1011    lmc_softreset (sc);
1012
1013    /* Since we have to use PCI bus, this should work on x86,alpha,ppc */
1014    if (request_irq (dev->irq, lmc_interrupt, IRQF_SHARED, dev->name, dev)){
1015        printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq);
1016        lmc_trace(dev, "lmc_open irq failed out");
1017        return -EAGAIN;
1018    }
1019    sc->got_irq = 1;
1020
1021    /* Assert Terminal Active */
1022    sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
1023    sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
1024
1025    /*
1026     * reset to last state.
1027     */
1028    sc->lmc_media->set_status (sc, NULL);
1029
1030    /* setup default bits to be used in tulip_desc_t transmit descriptor
1031     * -baz */
1032    sc->TxDescriptControlInit = (
1033                                 LMC_TDES_INTERRUPT_ON_COMPLETION
1034                                 | LMC_TDES_FIRST_SEGMENT
1035                                 | LMC_TDES_LAST_SEGMENT
1036                                 | LMC_TDES_SECOND_ADDR_CHAINED
1037                                 | LMC_TDES_DISABLE_PADDING
1038                                );
1039
1040    if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) {
1041        /* disable 32 bit CRC generated by ASIC */
1042        sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
1043    }
1044    sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length);
1045    /* Acknoledge the Terminal Active and light LEDs */
1046
1047    /* dev->flags |= IFF_UP; */
1048
1049    if ((err = lmc_proto_open(sc)) != 0)
1050	    return err;
1051
1052    netif_start_queue(dev);
1053    sc->extra_stats.tx_tbusy0++;
1054
1055    /*
1056     * select what interrupts we want to get
1057     */
1058    sc->lmc_intrmask = 0;
1059    /* Should be using the default interrupt mask defined in the .h file. */
1060    sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
1061                         | TULIP_STS_RXINTR
1062                         | TULIP_STS_TXINTR
1063                         | TULIP_STS_ABNRMLINTR
1064                         | TULIP_STS_SYSERROR
1065                         | TULIP_STS_TXSTOPPED
1066                         | TULIP_STS_TXUNDERFLOW
1067                         | TULIP_STS_RXSTOPPED
1068		         | TULIP_STS_RXNOBUF
1069                        );
1070    LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1071
1072    sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
1073    sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
1074    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1075
1076    sc->lmc_ok = 1; /* Run watchdog */
1077
1078    /*
1079     * Set the if up now - pfb
1080     */
1081
1082    sc->last_link_status = 1;
1083
1084    /*
1085     * Setup a timer for the watchdog on probe, and start it running.
1086     * Since lmc_ok == 0, it will be a NOP for now.
1087     */
1088    init_timer (&sc->timer);
1089    sc->timer.expires = jiffies + HZ;
1090    sc->timer.data = (unsigned long) dev;
1091    sc->timer.function = lmc_watchdog;
1092    add_timer (&sc->timer);
1093
1094    lmc_trace(dev, "lmc_open out");
1095
1096    return 0;
1097}
1098
1099/* Total reset to compensate for the AdTran DSU doing bad things
1100 *  under heavy load
1101 */
1102
1103static void lmc_running_reset (struct net_device *dev) /*fold00*/
1104{
1105    lmc_softc_t *sc = dev_to_sc(dev);
1106
1107    lmc_trace(dev, "lmc_running_reset in");
1108
1109    /* stop interrupts */
1110    /* Clear the interrupt mask */
1111    LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1112
1113    lmc_dec_reset (sc);
1114    lmc_reset (sc);
1115    lmc_softreset (sc);
1116    /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */
1117    sc->lmc_media->set_link_status (sc, 1);
1118    sc->lmc_media->set_status (sc, NULL);
1119
1120    netif_wake_queue(dev);
1121
1122    sc->lmc_txfull = 0;
1123    sc->extra_stats.tx_tbusy0++;
1124
1125    sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
1126    LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1127
1128    sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN);
1129    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1130
1131    lmc_trace(dev, "lmc_runnin_reset_out");
1132}
1133
1134
1135/* This is what is called when you ifconfig down a device.
1136 * This disables the timer for the watchdog and keepalives,
1137 * and disables the irq for dev.
1138 */
1139static int lmc_close(struct net_device *dev)
1140{
1141    /* not calling release_region() as we should */
1142    lmc_softc_t *sc = dev_to_sc(dev);
1143
1144    lmc_trace(dev, "lmc_close in");
1145
1146    sc->lmc_ok = 0;
1147    sc->lmc_media->set_link_status (sc, 0);
1148    del_timer (&sc->timer);
1149    lmc_proto_close(sc);
1150    lmc_ifdown (dev);
1151
1152    lmc_trace(dev, "lmc_close out");
1153
1154    return 0;
1155}
1156
1157/* Ends the transfer of packets */
1158/* When the interface goes down, this is called */
1159static int lmc_ifdown (struct net_device *dev) /*fold00*/
1160{
1161    lmc_softc_t *sc = dev_to_sc(dev);
1162    u32 csr6;
1163    int i;
1164
1165    lmc_trace(dev, "lmc_ifdown in");
1166
1167    /* Don't let anything else go on right now */
1168    //    dev->start = 0;
1169    netif_stop_queue(dev);
1170    sc->extra_stats.tx_tbusy1++;
1171
1172    /* stop interrupts */
1173    /* Clear the interrupt mask */
1174    LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1175
1176    /* Stop Tx and Rx on the chip */
1177    csr6 = LMC_CSR_READ (sc, csr_command);
1178    csr6 &= ~LMC_DEC_ST;		/* Turn off the Transmission bit */
1179    csr6 &= ~LMC_DEC_SR;		/* Turn off the Receive bit */
1180    LMC_CSR_WRITE (sc, csr_command, csr6);
1181
1182    sc->lmc_device->stats.rx_missed_errors +=
1183	    LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1184
1185    /* release the interrupt */
1186    if(sc->got_irq == 1){
1187        free_irq (dev->irq, dev);
1188        sc->got_irq = 0;
1189    }
1190
1191    /* free skbuffs in the Rx queue */
1192    for (i = 0; i < LMC_RXDESCS; i++)
1193    {
1194        struct sk_buff *skb = sc->lmc_rxq[i];
1195        sc->lmc_rxq[i] = NULL;
1196        sc->lmc_rxring[i].status = 0;
1197        sc->lmc_rxring[i].length = 0;
1198        sc->lmc_rxring[i].buffer1 = 0xDEADBEEF;
1199        if (skb != NULL)
1200            dev_kfree_skb(skb);
1201        sc->lmc_rxq[i] = NULL;
1202    }
1203
1204    for (i = 0; i < LMC_TXDESCS; i++)
1205    {
1206        if (sc->lmc_txq[i] != NULL)
1207            dev_kfree_skb(sc->lmc_txq[i]);
1208        sc->lmc_txq[i] = NULL;
1209    }
1210
1211    lmc_led_off (sc, LMC_MII16_LED_ALL);
1212
1213    netif_wake_queue(dev);
1214    sc->extra_stats.tx_tbusy0++;
1215
1216    lmc_trace(dev, "lmc_ifdown out");
1217
1218    return 0;
1219}
1220
1221/* Interrupt handling routine.  This will take an incoming packet, or clean
1222 * up after a trasmit.
1223 */
1224static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
1225{
1226    struct net_device *dev = (struct net_device *) dev_instance;
1227    lmc_softc_t *sc = dev_to_sc(dev);
1228    u32 csr;
1229    int i;
1230    s32 stat;
1231    unsigned int badtx;
1232    u32 firstcsr;
1233    int max_work = LMC_RXDESCS;
1234    int handled = 0;
1235
1236    lmc_trace(dev, "lmc_interrupt in");
1237
1238    spin_lock(&sc->lmc_lock);
1239
1240    /*
1241     * Read the csr to find what interrupts we have (if any)
1242     */
1243    csr = LMC_CSR_READ (sc, csr_status);
1244
1245    /*
1246     * Make sure this is our interrupt
1247     */
1248    if ( ! (csr & sc->lmc_intrmask)) {
1249        goto lmc_int_fail_out;
1250    }
1251
1252    firstcsr = csr;
1253
1254    /* always go through this loop at least once */
1255    while (csr & sc->lmc_intrmask) {
1256	handled = 1;
1257
1258        /*
1259         * Clear interrupt bits, we handle all case below
1260         */
1261        LMC_CSR_WRITE (sc, csr_status, csr);
1262
1263        /*
1264         * One of
1265         *  - Transmit process timed out CSR5<1>
1266         *  - Transmit jabber timeout    CSR5<3>
1267         *  - Transmit underflow         CSR5<5>
1268         *  - Transmit Receiver buffer unavailable CSR5<7>
1269         *  - Receive process stopped    CSR5<8>
1270         *  - Receive watchdog timeout   CSR5<9>
1271         *  - Early transmit interrupt   CSR5<10>
1272         *
1273         * Is this really right? Should we do a running reset for jabber?
1274         * (being a WAN card and all)
1275         */
1276        if (csr & TULIP_STS_ABNRMLINTR){
1277            lmc_running_reset (dev);
1278            break;
1279        }
1280        
1281        if (csr & TULIP_STS_RXINTR){
1282            lmc_trace(dev, "rx interrupt");
1283            lmc_rx (dev);
1284            
1285        }
1286        if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) {
1287
1288	    int		n_compl = 0 ;
1289            /* reset the transmit timeout detection flag -baz */
1290	    sc->extra_stats.tx_NoCompleteCnt = 0;
1291
1292            badtx = sc->lmc_taint_tx;
1293            i = badtx % LMC_TXDESCS;
1294
1295            while ((badtx < sc->lmc_next_tx)) {
1296                stat = sc->lmc_txring[i].status;
1297
1298                LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat,
1299						 sc->lmc_txring[i].length);
1300                /*
1301                 * If bit 31 is 1 the tulip owns it break out of the loop
1302                 */
1303                if (stat & 0x80000000)
1304                    break;
1305
1306		n_compl++ ;		/* i.e., have an empty slot in ring */
1307                /*
1308                 * If we have no skbuff or have cleared it
1309                 * Already continue to the next buffer
1310                 */
1311                if (sc->lmc_txq[i] == NULL)
1312                    continue;
1313
1314		/*
1315		 * Check the total error summary to look for any errors
1316		 */
1317		if (stat & 0x8000) {
1318			sc->lmc_device->stats.tx_errors++;
1319			if (stat & 0x4104)
1320				sc->lmc_device->stats.tx_aborted_errors++;
1321			if (stat & 0x0C00)
1322				sc->lmc_device->stats.tx_carrier_errors++;
1323			if (stat & 0x0200)
1324				sc->lmc_device->stats.tx_window_errors++;
1325			if (stat & 0x0002)
1326				sc->lmc_device->stats.tx_fifo_errors++;
1327		} else {
1328			sc->lmc_device->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
1329
1330			sc->lmc_device->stats.tx_packets++;
1331                }
1332
1333                //                dev_kfree_skb(sc->lmc_txq[i]);
1334                dev_kfree_skb_irq(sc->lmc_txq[i]);
1335                sc->lmc_txq[i] = NULL;
1336
1337                badtx++;
1338                i = badtx % LMC_TXDESCS;
1339            }
1340
1341            if (sc->lmc_next_tx - badtx > LMC_TXDESCS)
1342            {
1343                printk ("%s: out of sync pointer\n", dev->name);
1344                badtx += LMC_TXDESCS;
1345            }
1346            LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0);
1347            sc->lmc_txfull = 0;
1348            netif_wake_queue(dev);
1349	    sc->extra_stats.tx_tbusy0++;
1350
1351
1352#ifdef DEBUG
1353	    sc->extra_stats.dirtyTx = badtx;
1354	    sc->extra_stats.lmc_next_tx = sc->lmc_next_tx;
1355	    sc->extra_stats.lmc_txfull = sc->lmc_txfull;
1356#endif
1357            sc->lmc_taint_tx = badtx;
1358
1359            /*
1360             * Why was there a break here???
1361             */
1362        }			/* end handle transmit interrupt */
1363
1364        if (csr & TULIP_STS_SYSERROR) {
1365            u32 error;
1366            printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr);
1367            error = csr>>23 & 0x7;
1368            switch(error){
1369            case 0x000:
1370                printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name);
1371                break;
1372            case 0x001:
1373                printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name);
1374                break;
1375            case 0x010:
1376                printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name);
1377                break;
1378            default:
1379                printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name);
1380            }
1381            lmc_dec_reset (sc);
1382            lmc_reset (sc);
1383            LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1384            LMC_EVENT_LOG(LMC_EVENT_RESET2,
1385                          lmc_mii_readreg (sc, 0, 16),
1386                          lmc_mii_readreg (sc, 0, 17));
1387
1388        }
1389
1390        
1391        if(max_work-- <= 0)
1392            break;
1393        
1394        /*
1395         * Get current csr status to make sure
1396         * we've cleared all interrupts
1397         */
1398        csr = LMC_CSR_READ (sc, csr_status);
1399    }				/* end interrupt loop */
1400    LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr);
1401
1402lmc_int_fail_out:
1403
1404    spin_unlock(&sc->lmc_lock);
1405
1406    lmc_trace(dev, "lmc_interrupt out");
1407    return IRQ_RETVAL(handled);
1408}
1409
1410static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
1411					struct net_device *dev)
1412{
1413    lmc_softc_t *sc = dev_to_sc(dev);
1414    u32 flag;
1415    int entry;
1416    unsigned long flags;
1417
1418    lmc_trace(dev, "lmc_start_xmit in");
1419
1420    spin_lock_irqsave(&sc->lmc_lock, flags);
1421
1422    /* normal path, tbusy known to be zero */
1423
1424    entry = sc->lmc_next_tx % LMC_TXDESCS;
1425
1426    sc->lmc_txq[entry] = skb;
1427    sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data);
1428
1429    LMC_CONSOLE_LOG("xmit", skb->data, skb->len);
1430
1431#ifndef GCOM
1432    /* If the queue is less than half full, don't interrupt */
1433    if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2)
1434    {
1435        /* Do not interrupt on completion of this packet */
1436        flag = 0x60000000;
1437        netif_wake_queue(dev);
1438    }
1439    else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2)
1440    {
1441        /* This generates an interrupt on completion of this packet */
1442        flag = 0xe0000000;
1443        netif_wake_queue(dev);
1444    }
1445    else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1)
1446    {
1447        /* Do not interrupt on completion of this packet */
1448        flag = 0x60000000;
1449        netif_wake_queue(dev);
1450    }
1451    else
1452    {
1453        /* This generates an interrupt on completion of this packet */
1454        flag = 0xe0000000;
1455        sc->lmc_txfull = 1;
1456        netif_stop_queue(dev);
1457    }
1458#else
1459    flag = LMC_TDES_INTERRUPT_ON_COMPLETION;
1460
1461    if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
1462    {				/* ring full, go busy */
1463        sc->lmc_txfull = 1;
1464	netif_stop_queue(dev);
1465	sc->extra_stats.tx_tbusy1++;
1466        LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0);
1467    }
1468#endif
1469
1470
1471    if (entry == LMC_TXDESCS - 1)	/* last descriptor in ring */
1472	flag |= LMC_TDES_END_OF_RING;	/* flag as such for Tulip */
1473
1474    /* don't pad small packets either */
1475    flag = sc->lmc_txring[entry].length = (skb->len) | flag |
1476						sc->TxDescriptControlInit;
1477
1478    /* set the transmit timeout flag to be checked in
1479     * the watchdog timer handler. -baz
1480     */
1481
1482    sc->extra_stats.tx_NoCompleteCnt++;
1483    sc->lmc_next_tx++;
1484
1485    /* give ownership to the chip */
1486    LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry);
1487    sc->lmc_txring[entry].status = 0x80000000;
1488
1489    /* send now! */
1490    LMC_CSR_WRITE (sc, csr_txpoll, 0);
1491
1492    spin_unlock_irqrestore(&sc->lmc_lock, flags);
1493
1494    lmc_trace(dev, "lmc_start_xmit_out");
1495    return NETDEV_TX_OK;
1496}
1497
1498
1499static int lmc_rx(struct net_device *dev)
1500{
1501    lmc_softc_t *sc = dev_to_sc(dev);
1502    int i;
1503    int rx_work_limit = LMC_RXDESCS;
1504    unsigned int next_rx;
1505    int rxIntLoopCnt;		/* debug -baz */
1506    int localLengthErrCnt = 0;
1507    long stat;
1508    struct sk_buff *skb, *nsb;
1509    u16 len;
1510
1511    lmc_trace(dev, "lmc_rx in");
1512
1513    lmc_led_on(sc, LMC_DS3_LED3);
1514
1515    rxIntLoopCnt = 0;		/* debug -baz */
1516
1517    i = sc->lmc_next_rx % LMC_RXDESCS;
1518    next_rx = sc->lmc_next_rx;
1519
1520    while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4)
1521    {
1522        rxIntLoopCnt++;		/* debug -baz */
1523        len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER);
1524        if ((stat & 0x0300) != 0x0300) {  /* Check first segment and last segment */
1525		if ((stat & 0x0000ffff) != 0x7fff) {
1526			/* Oversized frame */
1527			sc->lmc_device->stats.rx_length_errors++;
1528			goto skip_packet;
1529		}
1530	}
1531
1532	if (stat & 0x00000008) { /* Catch a dribbling bit error */
1533		sc->lmc_device->stats.rx_errors++;
1534		sc->lmc_device->stats.rx_frame_errors++;
1535		goto skip_packet;
1536	}
1537
1538
1539	if (stat & 0x00000004) { /* Catch a CRC error by the Xilinx */
1540		sc->lmc_device->stats.rx_errors++;
1541		sc->lmc_device->stats.rx_crc_errors++;
1542		goto skip_packet;
1543	}
1544
1545	if (len > LMC_PKT_BUF_SZ) {
1546		sc->lmc_device->stats.rx_length_errors++;
1547		localLengthErrCnt++;
1548		goto skip_packet;
1549	}
1550
1551	if (len < sc->lmc_crcSize + 2) {
1552		sc->lmc_device->stats.rx_length_errors++;
1553		sc->extra_stats.rx_SmallPktCnt++;
1554		localLengthErrCnt++;
1555		goto skip_packet;
1556	}
1557
1558        if(stat & 0x00004000){
1559            printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name);
1560        }
1561
1562        len -= sc->lmc_crcSize;
1563
1564        skb = sc->lmc_rxq[i];
1565
1566        /*
1567         * We ran out of memory at some point
1568         * just allocate an skb buff and continue.
1569         */
1570        
1571        if (!skb) {
1572            nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1573            if (nsb) {
1574                sc->lmc_rxq[i] = nsb;
1575                nsb->dev = dev;
1576                sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1577            }
1578            sc->failed_recv_alloc = 1;
1579            goto skip_packet;
1580        }
1581        
1582	sc->lmc_device->stats.rx_packets++;
1583	sc->lmc_device->stats.rx_bytes += len;
1584
1585        LMC_CONSOLE_LOG("recv", skb->data, len);
1586
1587        /*
1588         * I'm not sure of the sanity of this
1589         * Packets could be arriving at a constant
1590         * 44.210mbits/sec and we're going to copy
1591         * them into a new buffer??
1592         */
1593        
1594        if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */
1595            /*
1596             * If it's a large packet don't copy it just hand it up
1597             */
1598        give_it_anyways:
1599
1600            sc->lmc_rxq[i] = NULL;
1601            sc->lmc_rxring[i].buffer1 = 0x0;
1602
1603            skb_put (skb, len);
1604            skb->protocol = lmc_proto_type(sc, skb);
1605            skb_reset_mac_header(skb);
1606            /* skb_reset_network_header(skb); */
1607            skb->dev = dev;
1608            lmc_proto_netif(sc, skb);
1609
1610            /*
1611             * This skb will be destroyed by the upper layers, make a new one
1612             */
1613            nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1614            if (nsb) {
1615                sc->lmc_rxq[i] = nsb;
1616                nsb->dev = dev;
1617                sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1618                /* Transferred to 21140 below */
1619            }
1620            else {
1621                /*
1622                 * We've run out of memory, stop trying to allocate
1623                 * memory and exit the interrupt handler
1624                 *
1625                 * The chip may run out of receivers and stop
1626                 * in which care we'll try to allocate the buffer
1627                 * again.  (once a second)
1628                 */
1629		sc->extra_stats.rx_BuffAllocErr++;
1630                LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1631                sc->failed_recv_alloc = 1;
1632                goto skip_out_of_mem;
1633            }
1634        }
1635        else {
1636            nsb = dev_alloc_skb(len);
1637            if(!nsb) {
1638                goto give_it_anyways;
1639            }
1640            skb_copy_from_linear_data(skb, skb_put(nsb, len), len);
1641            
1642            nsb->protocol = lmc_proto_type(sc, nsb);
1643            skb_reset_mac_header(nsb);
1644            /* skb_reset_network_header(nsb); */
1645            nsb->dev = dev;
1646            lmc_proto_netif(sc, nsb);
1647        }
1648
1649    skip_packet:
1650        LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1651        sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4;
1652
1653        sc->lmc_next_rx++;
1654        i = sc->lmc_next_rx % LMC_RXDESCS;
1655        rx_work_limit--;
1656        if (rx_work_limit < 0)
1657            break;
1658    }
1659
1660    /* detect condition for LMC1000 where DSU cable attaches and fills
1661     * descriptors with bogus packets
1662     *
1663    if (localLengthErrCnt > LMC_RXDESCS - 3) {
1664	sc->extra_stats.rx_BadPktSurgeCnt++;
1665	LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE, localLengthErrCnt,
1666		      sc->extra_stats.rx_BadPktSurgeCnt);
1667    } */
1668
1669    /* save max count of receive descriptors serviced */
1670    if (rxIntLoopCnt > sc->extra_stats.rxIntLoopCnt)
1671	    sc->extra_stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
1672
1673#ifdef DEBUG
1674    if (rxIntLoopCnt == 0)
1675    {
1676        for (i = 0; i < LMC_RXDESCS; i++)
1677        {
1678            if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT)
1679                != DESC_OWNED_BY_DC21X4)
1680            {
1681                rxIntLoopCnt++;
1682            }
1683        }
1684        LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0);
1685    }
1686#endif
1687
1688
1689    lmc_led_off(sc, LMC_DS3_LED3);
1690
1691skip_out_of_mem:
1692
1693    lmc_trace(dev, "lmc_rx out");
1694
1695    return 0;
1696}
1697
1698static struct net_device_stats *lmc_get_stats(struct net_device *dev)
1699{
1700    lmc_softc_t *sc = dev_to_sc(dev);
1701    unsigned long flags;
1702
1703    lmc_trace(dev, "lmc_get_stats in");
1704
1705    spin_lock_irqsave(&sc->lmc_lock, flags);
1706
1707    sc->lmc_device->stats.rx_missed_errors += LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1708
1709    spin_unlock_irqrestore(&sc->lmc_lock, flags);
1710
1711    lmc_trace(dev, "lmc_get_stats out");
1712
1713    return &sc->lmc_device->stats;
1714}
1715
1716static struct pci_driver lmc_driver = {
1717	.name		= "lmc",
1718	.id_table	= lmc_pci_tbl,
1719	.probe		= lmc_init_one,
1720	.remove		= lmc_remove_one,
1721};
1722
1723module_pci_driver(lmc_driver);
1724
1725unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/
1726{
1727    int i;
1728    int command = (0xf6 << 10) | (devaddr << 5) | regno;
1729    int retval = 0;
1730
1731    lmc_trace(sc->lmc_device, "lmc_mii_readreg in");
1732
1733    LMC_MII_SYNC (sc);
1734
1735    lmc_trace(sc->lmc_device, "lmc_mii_readreg: done sync");
1736
1737    for (i = 15; i >= 0; i--)
1738    {
1739        int dataval = (command & (1 << i)) ? 0x20000 : 0;
1740
1741        LMC_CSR_WRITE (sc, csr_9, dataval);
1742        lmc_delay ();
1743        /* __SLOW_DOWN_IO; */
1744        LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000);
1745        lmc_delay ();
1746        /* __SLOW_DOWN_IO; */
1747    }
1748
1749    lmc_trace(sc->lmc_device, "lmc_mii_readreg: done1");
1750
1751    for (i = 19; i > 0; i--)
1752    {
1753        LMC_CSR_WRITE (sc, csr_9, 0x40000);
1754        lmc_delay ();
1755        /* __SLOW_DOWN_IO; */
1756        retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0);
1757        LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000);
1758        lmc_delay ();
1759        /* __SLOW_DOWN_IO; */
1760    }
1761
1762    lmc_trace(sc->lmc_device, "lmc_mii_readreg out");
1763
1764    return (retval >> 1) & 0xffff;
1765}
1766
1767void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/
1768{
1769    int i = 32;
1770    int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data;
1771
1772    lmc_trace(sc->lmc_device, "lmc_mii_writereg in");
1773
1774    LMC_MII_SYNC (sc);
1775
1776    i = 31;
1777    while (i >= 0)
1778    {
1779        int datav;
1780
1781        if (command & (1 << i))
1782            datav = 0x20000;
1783        else
1784            datav = 0x00000;
1785
1786        LMC_CSR_WRITE (sc, csr_9, datav);
1787        lmc_delay ();
1788        /* __SLOW_DOWN_IO; */
1789        LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000));
1790        lmc_delay ();
1791        /* __SLOW_DOWN_IO; */
1792        i--;
1793    }
1794
1795    i = 2;
1796    while (i > 0)
1797    {
1798        LMC_CSR_WRITE (sc, csr_9, 0x40000);
1799        lmc_delay ();
1800        /* __SLOW_DOWN_IO; */
1801        LMC_CSR_WRITE (sc, csr_9, 0x50000);
1802        lmc_delay ();
1803        /* __SLOW_DOWN_IO; */
1804        i--;
1805    }
1806
1807    lmc_trace(sc->lmc_device, "lmc_mii_writereg out");
1808}
1809
1810static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
1811{
1812    int i;
1813
1814    lmc_trace(sc->lmc_device, "lmc_softreset in");
1815
1816    /* Initialize the receive rings and buffers. */
1817    sc->lmc_txfull = 0;
1818    sc->lmc_next_rx = 0;
1819    sc->lmc_next_tx = 0;
1820    sc->lmc_taint_rx = 0;
1821    sc->lmc_taint_tx = 0;
1822
1823    /*
1824     * Setup each one of the receiver buffers
1825     * allocate an skbuff for each one, setup the descriptor table
1826     * and point each buffer at the next one
1827     */
1828
1829    for (i = 0; i < LMC_RXDESCS; i++)
1830    {
1831        struct sk_buff *skb;
1832
1833        if (sc->lmc_rxq[i] == NULL)
1834        {
1835            skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1836            if(skb == NULL){
1837                printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name);
1838                sc->failed_ring = 1;
1839                break;
1840            }
1841            else{
1842                sc->lmc_rxq[i] = skb;
1843            }
1844        }
1845        else
1846        {
1847            skb = sc->lmc_rxq[i];
1848        }
1849
1850        skb->dev = sc->lmc_device;
1851
1852        /* owned by 21140 */
1853        sc->lmc_rxring[i].status = 0x80000000;
1854
1855        /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */
1856        sc->lmc_rxring[i].length = skb_tailroom(skb);
1857
1858        /* use to be tail which is dumb since you're thinking why write
1859         * to the end of the packj,et but since there's nothing there tail == data
1860         */
1861        sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data);
1862
1863        /* This is fair since the structure is static and we have the next address */
1864        sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]);
1865
1866    }
1867
1868    /*
1869     * Sets end of ring
1870     */
1871    if (i != 0) {
1872        sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */
1873        sc->lmc_rxring[i - 1].buffer2 = virt_to_bus(&sc->lmc_rxring[0]); /* Point back to the start */
1874    }
1875    LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */
1876
1877    /* Initialize the transmit rings and buffers */
1878    for (i = 0; i < LMC_TXDESCS; i++)
1879    {
1880        if (sc->lmc_txq[i] != NULL){		/* have buffer */
1881            dev_kfree_skb(sc->lmc_txq[i]);	/* free it */
1882	    sc->lmc_device->stats.tx_dropped++;	/* We just dropped a packet */
1883        }
1884        sc->lmc_txq[i] = NULL;
1885        sc->lmc_txring[i].status = 0x00000000;
1886        sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]);
1887    }
1888    sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]);
1889    LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring));
1890
1891    lmc_trace(sc->lmc_device, "lmc_softreset out");
1892}
1893
1894void lmc_gpio_mkinput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1895{
1896    lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in");
1897    sc->lmc_gpio_io &= ~bits;
1898    LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1899    lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out");
1900}
1901
1902void lmc_gpio_mkoutput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1903{
1904    lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in");
1905    sc->lmc_gpio_io |= bits;
1906    LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1907    lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out");
1908}
1909
1910void lmc_led_on(lmc_softc_t * const sc, u32 led) /*fold00*/
1911{
1912    lmc_trace(sc->lmc_device, "lmc_led_on in");
1913    if((~sc->lmc_miireg16) & led){ /* Already on! */
1914        lmc_trace(sc->lmc_device, "lmc_led_on aon out");
1915        return;
1916    }
1917    
1918    sc->lmc_miireg16 &= ~led;
1919    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1920    lmc_trace(sc->lmc_device, "lmc_led_on out");
1921}
1922
1923void lmc_led_off(lmc_softc_t * const sc, u32 led) /*fold00*/
1924{
1925    lmc_trace(sc->lmc_device, "lmc_led_off in");
1926    if(sc->lmc_miireg16 & led){ /* Already set don't do anything */
1927        lmc_trace(sc->lmc_device, "lmc_led_off aoff out");
1928        return;
1929    }
1930    
1931    sc->lmc_miireg16 |= led;
1932    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1933    lmc_trace(sc->lmc_device, "lmc_led_off out");
1934}
1935
1936static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
1937{
1938    lmc_trace(sc->lmc_device, "lmc_reset in");
1939    sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
1940    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1941
1942    sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
1943    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1944
1945    /*
1946     * make some of the GPIO pins be outputs
1947     */
1948    lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
1949
1950    /*
1951     * RESET low to force state reset.  This also forces
1952     * the transmitter clock to be internal, but we expect to reset
1953     * that later anyway.
1954     */
1955    sc->lmc_gpio &= ~(LMC_GEP_RESET);
1956    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
1957
1958    /*
1959     * hold for more than 10 microseconds
1960     */
1961    udelay(50);
1962
1963    /*
1964     * stop driving Xilinx-related signals
1965     */
1966    lmc_gpio_mkinput(sc, LMC_GEP_RESET);
1967
1968    /*
1969     * Call media specific init routine
1970     */
1971    sc->lmc_media->init(sc);
1972
1973    sc->extra_stats.resetCount++;
1974    lmc_trace(sc->lmc_device, "lmc_reset out");
1975}
1976
1977static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
1978{
1979    u32 val;
1980    lmc_trace(sc->lmc_device, "lmc_dec_reset in");
1981
1982    /*
1983     * disable all interrupts
1984     */
1985    sc->lmc_intrmask = 0;
1986    LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
1987
1988    /*
1989     * Reset the chip with a software reset command.
1990     * Wait 10 microseconds (actually 50 PCI cycles but at
1991     * 33MHz that comes to two microseconds but wait a
1992     * bit longer anyways)
1993     */
1994    LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
1995    udelay(25);
1996#ifdef __sparc__
1997    sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode);
1998    sc->lmc_busmode = 0x00100000;
1999    sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET;
2000    LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode);
2001#endif
2002    sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
2003
2004    /*
2005     * We want:
2006     *   no ethernet address in frames we write
2007     *   disable padding (txdesc, padding disable)
2008     *   ignore runt frames (rdes0 bit 15)
2009     *   no receiver watchdog or transmitter jabber timer
2010     *       (csr15 bit 0,14 == 1)
2011     *   if using 16-bit CRC, turn off CRC (trans desc, crc disable)
2012     */
2013
2014    sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
2015                         | TULIP_CMD_FULLDUPLEX
2016                         | TULIP_CMD_PASSBADPKT
2017                         | TULIP_CMD_NOHEARTBEAT
2018                         | TULIP_CMD_PORTSELECT
2019                         | TULIP_CMD_RECEIVEALL
2020                         | TULIP_CMD_MUSTBEONE
2021                       );
2022    sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
2023                          | TULIP_CMD_THRESHOLDCTL
2024                          | TULIP_CMD_STOREFWD
2025                          | TULIP_CMD_TXTHRSHLDCTL
2026                        );
2027
2028    LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
2029
2030    /*
2031     * disable receiver watchdog and transmit jabber
2032     */
2033    val = LMC_CSR_READ(sc, csr_sia_general);
2034    val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE);
2035    LMC_CSR_WRITE(sc, csr_sia_general, val);
2036
2037    lmc_trace(sc->lmc_device, "lmc_dec_reset out");
2038}
2039
2040static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/
2041                         size_t csr_size)
2042{
2043    lmc_trace(sc->lmc_device, "lmc_initcsrs in");
2044    sc->lmc_csrs.csr_busmode	        = csr_base +  0 * csr_size;
2045    sc->lmc_csrs.csr_txpoll		= csr_base +  1 * csr_size;
2046    sc->lmc_csrs.csr_rxpoll		= csr_base +  2 * csr_size;
2047    sc->lmc_csrs.csr_rxlist		= csr_base +  3 * csr_size;
2048    sc->lmc_csrs.csr_txlist		= csr_base +  4 * csr_size;
2049    sc->lmc_csrs.csr_status		= csr_base +  5 * csr_size;
2050    sc->lmc_csrs.csr_command	        = csr_base +  6 * csr_size;
2051    sc->lmc_csrs.csr_intr		= csr_base +  7 * csr_size;
2052    sc->lmc_csrs.csr_missed_frames	= csr_base +  8 * csr_size;
2053    sc->lmc_csrs.csr_9		        = csr_base +  9 * csr_size;
2054    sc->lmc_csrs.csr_10		        = csr_base + 10 * csr_size;
2055    sc->lmc_csrs.csr_11		        = csr_base + 11 * csr_size;
2056    sc->lmc_csrs.csr_12		        = csr_base + 12 * csr_size;
2057    sc->lmc_csrs.csr_13		        = csr_base + 13 * csr_size;
2058    sc->lmc_csrs.csr_14		        = csr_base + 14 * csr_size;
2059    sc->lmc_csrs.csr_15		        = csr_base + 15 * csr_size;
2060    lmc_trace(sc->lmc_device, "lmc_initcsrs out");
2061}
2062
2063static void lmc_driver_timeout(struct net_device *dev)
2064{
2065    lmc_softc_t *sc = dev_to_sc(dev);
2066    u32 csr6;
2067    unsigned long flags;
2068
2069    lmc_trace(dev, "lmc_driver_timeout in");
2070
2071    spin_lock_irqsave(&sc->lmc_lock, flags);
2072
2073    printk("%s: Xmitter busy|\n", dev->name);
2074
2075    sc->extra_stats.tx_tbusy_calls++;
2076    if (jiffies - dev_trans_start(dev) < TX_TIMEOUT)
2077	    goto bug_out;
2078
2079    /*
2080     * Chip seems to have locked up
2081     * Reset it
2082     * This whips out all our decriptor
2083     * table and starts from scartch
2084     */
2085
2086    LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO,
2087                  LMC_CSR_READ (sc, csr_status),
2088		  sc->extra_stats.tx_ProcTimeout);
2089
2090    lmc_running_reset (dev);
2091
2092    LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
2093    LMC_EVENT_LOG(LMC_EVENT_RESET2,
2094                  lmc_mii_readreg (sc, 0, 16),
2095                  lmc_mii_readreg (sc, 0, 17));
2096
2097    /* restart the tx processes */
2098    csr6 = LMC_CSR_READ (sc, csr_command);
2099    LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002);
2100    LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002);
2101
2102    /* immediate transmit */
2103    LMC_CSR_WRITE (sc, csr_txpoll, 0);
2104
2105    sc->lmc_device->stats.tx_errors++;
2106    sc->extra_stats.tx_ProcTimeout++; /* -baz */
2107
2108    dev->trans_start = jiffies; /* prevent tx timeout */
2109
2110bug_out:
2111
2112    spin_unlock_irqrestore(&sc->lmc_lock, flags);
2113
2114    lmc_trace(dev, "lmc_driver_timeout out");
2115
2116
2117}