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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright(C) 2015 Linaro Limited. All rights reserved.
4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
5 */
6
7#include <linux/pid_namespace.h>
8#include <linux/pm_runtime.h>
9#include <linux/sysfs.h>
10#include "coresight-etm4x.h"
11#include "coresight-priv.h"
12
13static int etm4_set_mode_exclude(struct etmv4_drvdata *drvdata, bool exclude)
14{
15 u8 idx;
16 struct etmv4_config *config = &drvdata->config;
17
18 idx = config->addr_idx;
19
20 /*
21 * TRCACATRn.TYPE bit[1:0]: type of comparison
22 * the trace unit performs
23 */
24 if (BMVAL(config->addr_acc[idx], 0, 1) == ETM_INSTR_ADDR) {
25 if (idx % 2 != 0)
26 return -EINVAL;
27
28 /*
29 * We are performing instruction address comparison. Set the
30 * relevant bit of ViewInst Include/Exclude Control register
31 * for corresponding address comparator pair.
32 */
33 if (config->addr_type[idx] != ETM_ADDR_TYPE_RANGE ||
34 config->addr_type[idx + 1] != ETM_ADDR_TYPE_RANGE)
35 return -EINVAL;
36
37 if (exclude == true) {
38 /*
39 * Set exclude bit and unset the include bit
40 * corresponding to comparator pair
41 */
42 config->viiectlr |= BIT(idx / 2 + 16);
43 config->viiectlr &= ~BIT(idx / 2);
44 } else {
45 /*
46 * Set include bit and unset exclude bit
47 * corresponding to comparator pair
48 */
49 config->viiectlr |= BIT(idx / 2);
50 config->viiectlr &= ~BIT(idx / 2 + 16);
51 }
52 }
53 return 0;
54}
55
56static ssize_t nr_pe_cmp_show(struct device *dev,
57 struct device_attribute *attr,
58 char *buf)
59{
60 unsigned long val;
61 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
62
63 val = drvdata->nr_pe_cmp;
64 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
65}
66static DEVICE_ATTR_RO(nr_pe_cmp);
67
68static ssize_t nr_addr_cmp_show(struct device *dev,
69 struct device_attribute *attr,
70 char *buf)
71{
72 unsigned long val;
73 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
74
75 val = drvdata->nr_addr_cmp;
76 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
77}
78static DEVICE_ATTR_RO(nr_addr_cmp);
79
80static ssize_t nr_cntr_show(struct device *dev,
81 struct device_attribute *attr,
82 char *buf)
83{
84 unsigned long val;
85 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
86
87 val = drvdata->nr_cntr;
88 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
89}
90static DEVICE_ATTR_RO(nr_cntr);
91
92static ssize_t nr_ext_inp_show(struct device *dev,
93 struct device_attribute *attr,
94 char *buf)
95{
96 unsigned long val;
97 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
98
99 val = drvdata->nr_ext_inp;
100 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
101}
102static DEVICE_ATTR_RO(nr_ext_inp);
103
104static ssize_t numcidc_show(struct device *dev,
105 struct device_attribute *attr,
106 char *buf)
107{
108 unsigned long val;
109 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
110
111 val = drvdata->numcidc;
112 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
113}
114static DEVICE_ATTR_RO(numcidc);
115
116static ssize_t numvmidc_show(struct device *dev,
117 struct device_attribute *attr,
118 char *buf)
119{
120 unsigned long val;
121 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
122
123 val = drvdata->numvmidc;
124 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
125}
126static DEVICE_ATTR_RO(numvmidc);
127
128static ssize_t nrseqstate_show(struct device *dev,
129 struct device_attribute *attr,
130 char *buf)
131{
132 unsigned long val;
133 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
134
135 val = drvdata->nrseqstate;
136 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
137}
138static DEVICE_ATTR_RO(nrseqstate);
139
140static ssize_t nr_resource_show(struct device *dev,
141 struct device_attribute *attr,
142 char *buf)
143{
144 unsigned long val;
145 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
146
147 val = drvdata->nr_resource;
148 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
149}
150static DEVICE_ATTR_RO(nr_resource);
151
152static ssize_t nr_ss_cmp_show(struct device *dev,
153 struct device_attribute *attr,
154 char *buf)
155{
156 unsigned long val;
157 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
158
159 val = drvdata->nr_ss_cmp;
160 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
161}
162static DEVICE_ATTR_RO(nr_ss_cmp);
163
164static ssize_t reset_store(struct device *dev,
165 struct device_attribute *attr,
166 const char *buf, size_t size)
167{
168 int i;
169 unsigned long val;
170 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
171 struct etmv4_config *config = &drvdata->config;
172
173 if (kstrtoul(buf, 16, &val))
174 return -EINVAL;
175
176 spin_lock(&drvdata->spinlock);
177 if (val)
178 config->mode = 0x0;
179
180 /* Disable data tracing: do not trace load and store data transfers */
181 config->mode &= ~(ETM_MODE_LOAD | ETM_MODE_STORE);
182 config->cfg &= ~(BIT(1) | BIT(2));
183
184 /* Disable data value and data address tracing */
185 config->mode &= ~(ETM_MODE_DATA_TRACE_ADDR |
186 ETM_MODE_DATA_TRACE_VAL);
187 config->cfg &= ~(BIT(16) | BIT(17));
188
189 /* Disable all events tracing */
190 config->eventctrl0 = 0x0;
191 config->eventctrl1 = 0x0;
192
193 /* Disable timestamp event */
194 config->ts_ctrl = 0x0;
195
196 /* Disable stalling */
197 config->stall_ctrl = 0x0;
198
199 /* Reset trace synchronization period to 2^8 = 256 bytes*/
200 if (drvdata->syncpr == false)
201 config->syncfreq = 0x8;
202
203 /*
204 * Enable ViewInst to trace everything with start-stop logic in
205 * started state. ARM recommends start-stop logic is set before
206 * each trace run.
207 */
208 config->vinst_ctrl = BIT(0);
209 if (drvdata->nr_addr_cmp > 0) {
210 config->mode |= ETM_MODE_VIEWINST_STARTSTOP;
211 /* SSSTATUS, bit[9] */
212 config->vinst_ctrl |= BIT(9);
213 }
214
215 /* No address range filtering for ViewInst */
216 config->viiectlr = 0x0;
217
218 /* No start-stop filtering for ViewInst */
219 config->vissctlr = 0x0;
220 config->vipcssctlr = 0x0;
221
222 /* Disable seq events */
223 for (i = 0; i < drvdata->nrseqstate-1; i++)
224 config->seq_ctrl[i] = 0x0;
225 config->seq_rst = 0x0;
226 config->seq_state = 0x0;
227
228 /* Disable external input events */
229 config->ext_inp = 0x0;
230
231 config->cntr_idx = 0x0;
232 for (i = 0; i < drvdata->nr_cntr; i++) {
233 config->cntrldvr[i] = 0x0;
234 config->cntr_ctrl[i] = 0x0;
235 config->cntr_val[i] = 0x0;
236 }
237
238 config->res_idx = 0x0;
239 for (i = 2; i < 2 * drvdata->nr_resource; i++)
240 config->res_ctrl[i] = 0x0;
241
242 config->ss_idx = 0x0;
243 for (i = 0; i < drvdata->nr_ss_cmp; i++) {
244 config->ss_ctrl[i] = 0x0;
245 config->ss_pe_cmp[i] = 0x0;
246 }
247
248 config->addr_idx = 0x0;
249 for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) {
250 config->addr_val[i] = 0x0;
251 config->addr_acc[i] = 0x0;
252 config->addr_type[i] = ETM_ADDR_TYPE_NONE;
253 }
254
255 config->ctxid_idx = 0x0;
256 for (i = 0; i < drvdata->numcidc; i++)
257 config->ctxid_pid[i] = 0x0;
258
259 config->ctxid_mask0 = 0x0;
260 config->ctxid_mask1 = 0x0;
261
262 config->vmid_idx = 0x0;
263 for (i = 0; i < drvdata->numvmidc; i++)
264 config->vmid_val[i] = 0x0;
265 config->vmid_mask0 = 0x0;
266 config->vmid_mask1 = 0x0;
267
268 drvdata->trcid = drvdata->cpu + 1;
269
270 spin_unlock(&drvdata->spinlock);
271
272 return size;
273}
274static DEVICE_ATTR_WO(reset);
275
276static ssize_t mode_show(struct device *dev,
277 struct device_attribute *attr,
278 char *buf)
279{
280 unsigned long val;
281 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
282 struct etmv4_config *config = &drvdata->config;
283
284 val = config->mode;
285 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
286}
287
288static ssize_t mode_store(struct device *dev,
289 struct device_attribute *attr,
290 const char *buf, size_t size)
291{
292 unsigned long val, mode;
293 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
294 struct etmv4_config *config = &drvdata->config;
295
296 if (kstrtoul(buf, 16, &val))
297 return -EINVAL;
298
299 spin_lock(&drvdata->spinlock);
300 config->mode = val & ETMv4_MODE_ALL;
301
302 if (drvdata->instrp0 == true) {
303 /* start by clearing instruction P0 field */
304 config->cfg &= ~(BIT(1) | BIT(2));
305 if (config->mode & ETM_MODE_LOAD)
306 /* 0b01 Trace load instructions as P0 instructions */
307 config->cfg |= BIT(1);
308 if (config->mode & ETM_MODE_STORE)
309 /* 0b10 Trace store instructions as P0 instructions */
310 config->cfg |= BIT(2);
311 if (config->mode & ETM_MODE_LOAD_STORE)
312 /*
313 * 0b11 Trace load and store instructions
314 * as P0 instructions
315 */
316 config->cfg |= BIT(1) | BIT(2);
317 }
318
319 /* bit[3], Branch broadcast mode */
320 if ((config->mode & ETM_MODE_BB) && (drvdata->trcbb == true))
321 config->cfg |= BIT(3);
322 else
323 config->cfg &= ~BIT(3);
324
325 /* bit[4], Cycle counting instruction trace bit */
326 if ((config->mode & ETMv4_MODE_CYCACC) &&
327 (drvdata->trccci == true))
328 config->cfg |= BIT(4);
329 else
330 config->cfg &= ~BIT(4);
331
332 /* bit[6], Context ID tracing bit */
333 if ((config->mode & ETMv4_MODE_CTXID) && (drvdata->ctxid_size))
334 config->cfg |= BIT(6);
335 else
336 config->cfg &= ~BIT(6);
337
338 if ((config->mode & ETM_MODE_VMID) && (drvdata->vmid_size))
339 config->cfg |= BIT(7);
340 else
341 config->cfg &= ~BIT(7);
342
343 /* bits[10:8], Conditional instruction tracing bit */
344 mode = ETM_MODE_COND(config->mode);
345 if (drvdata->trccond == true) {
346 config->cfg &= ~(BIT(8) | BIT(9) | BIT(10));
347 config->cfg |= mode << 8;
348 }
349
350 /* bit[11], Global timestamp tracing bit */
351 if ((config->mode & ETMv4_MODE_TIMESTAMP) && (drvdata->ts_size))
352 config->cfg |= BIT(11);
353 else
354 config->cfg &= ~BIT(11);
355
356 /* bit[12], Return stack enable bit */
357 if ((config->mode & ETM_MODE_RETURNSTACK) &&
358 (drvdata->retstack == true))
359 config->cfg |= BIT(12);
360 else
361 config->cfg &= ~BIT(12);
362
363 /* bits[14:13], Q element enable field */
364 mode = ETM_MODE_QELEM(config->mode);
365 /* start by clearing QE bits */
366 config->cfg &= ~(BIT(13) | BIT(14));
367 /* if supported, Q elements with instruction counts are enabled */
368 if ((mode & BIT(0)) && (drvdata->q_support & BIT(0)))
369 config->cfg |= BIT(13);
370 /*
371 * if supported, Q elements with and without instruction
372 * counts are enabled
373 */
374 if ((mode & BIT(1)) && (drvdata->q_support & BIT(1)))
375 config->cfg |= BIT(14);
376
377 /* bit[11], AMBA Trace Bus (ATB) trigger enable bit */
378 if ((config->mode & ETM_MODE_ATB_TRIGGER) &&
379 (drvdata->atbtrig == true))
380 config->eventctrl1 |= BIT(11);
381 else
382 config->eventctrl1 &= ~BIT(11);
383
384 /* bit[12], Low-power state behavior override bit */
385 if ((config->mode & ETM_MODE_LPOVERRIDE) &&
386 (drvdata->lpoverride == true))
387 config->eventctrl1 |= BIT(12);
388 else
389 config->eventctrl1 &= ~BIT(12);
390
391 /* bit[8], Instruction stall bit */
392 if ((config->mode & ETM_MODE_ISTALL_EN) && (drvdata->stallctl == true))
393 config->stall_ctrl |= BIT(8);
394 else
395 config->stall_ctrl &= ~BIT(8);
396
397 /* bit[10], Prioritize instruction trace bit */
398 if (config->mode & ETM_MODE_INSTPRIO)
399 config->stall_ctrl |= BIT(10);
400 else
401 config->stall_ctrl &= ~BIT(10);
402
403 /* bit[13], Trace overflow prevention bit */
404 if ((config->mode & ETM_MODE_NOOVERFLOW) &&
405 (drvdata->nooverflow == true))
406 config->stall_ctrl |= BIT(13);
407 else
408 config->stall_ctrl &= ~BIT(13);
409
410 /* bit[9] Start/stop logic control bit */
411 if (config->mode & ETM_MODE_VIEWINST_STARTSTOP)
412 config->vinst_ctrl |= BIT(9);
413 else
414 config->vinst_ctrl &= ~BIT(9);
415
416 /* bit[10], Whether a trace unit must trace a Reset exception */
417 if (config->mode & ETM_MODE_TRACE_RESET)
418 config->vinst_ctrl |= BIT(10);
419 else
420 config->vinst_ctrl &= ~BIT(10);
421
422 /* bit[11], Whether a trace unit must trace a system error exception */
423 if ((config->mode & ETM_MODE_TRACE_ERR) &&
424 (drvdata->trc_error == true))
425 config->vinst_ctrl |= BIT(11);
426 else
427 config->vinst_ctrl &= ~BIT(11);
428
429 if (config->mode & (ETM_MODE_EXCL_KERN | ETM_MODE_EXCL_USER))
430 etm4_config_trace_mode(config);
431
432 spin_unlock(&drvdata->spinlock);
433
434 return size;
435}
436static DEVICE_ATTR_RW(mode);
437
438static ssize_t pe_show(struct device *dev,
439 struct device_attribute *attr,
440 char *buf)
441{
442 unsigned long val;
443 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
444 struct etmv4_config *config = &drvdata->config;
445
446 val = config->pe_sel;
447 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
448}
449
450static ssize_t pe_store(struct device *dev,
451 struct device_attribute *attr,
452 const char *buf, size_t size)
453{
454 unsigned long val;
455 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
456 struct etmv4_config *config = &drvdata->config;
457
458 if (kstrtoul(buf, 16, &val))
459 return -EINVAL;
460
461 spin_lock(&drvdata->spinlock);
462 if (val > drvdata->nr_pe) {
463 spin_unlock(&drvdata->spinlock);
464 return -EINVAL;
465 }
466
467 config->pe_sel = val;
468 spin_unlock(&drvdata->spinlock);
469 return size;
470}
471static DEVICE_ATTR_RW(pe);
472
473static ssize_t event_show(struct device *dev,
474 struct device_attribute *attr,
475 char *buf)
476{
477 unsigned long val;
478 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
479 struct etmv4_config *config = &drvdata->config;
480
481 val = config->eventctrl0;
482 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
483}
484
485static ssize_t event_store(struct device *dev,
486 struct device_attribute *attr,
487 const char *buf, size_t size)
488{
489 unsigned long val;
490 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
491 struct etmv4_config *config = &drvdata->config;
492
493 if (kstrtoul(buf, 16, &val))
494 return -EINVAL;
495
496 spin_lock(&drvdata->spinlock);
497 switch (drvdata->nr_event) {
498 case 0x0:
499 /* EVENT0, bits[7:0] */
500 config->eventctrl0 = val & 0xFF;
501 break;
502 case 0x1:
503 /* EVENT1, bits[15:8] */
504 config->eventctrl0 = val & 0xFFFF;
505 break;
506 case 0x2:
507 /* EVENT2, bits[23:16] */
508 config->eventctrl0 = val & 0xFFFFFF;
509 break;
510 case 0x3:
511 /* EVENT3, bits[31:24] */
512 config->eventctrl0 = val;
513 break;
514 default:
515 break;
516 }
517 spin_unlock(&drvdata->spinlock);
518 return size;
519}
520static DEVICE_ATTR_RW(event);
521
522static ssize_t event_instren_show(struct device *dev,
523 struct device_attribute *attr,
524 char *buf)
525{
526 unsigned long val;
527 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
528 struct etmv4_config *config = &drvdata->config;
529
530 val = BMVAL(config->eventctrl1, 0, 3);
531 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
532}
533
534static ssize_t event_instren_store(struct device *dev,
535 struct device_attribute *attr,
536 const char *buf, size_t size)
537{
538 unsigned long val;
539 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
540 struct etmv4_config *config = &drvdata->config;
541
542 if (kstrtoul(buf, 16, &val))
543 return -EINVAL;
544
545 spin_lock(&drvdata->spinlock);
546 /* start by clearing all instruction event enable bits */
547 config->eventctrl1 &= ~(BIT(0) | BIT(1) | BIT(2) | BIT(3));
548 switch (drvdata->nr_event) {
549 case 0x0:
550 /* generate Event element for event 1 */
551 config->eventctrl1 |= val & BIT(1);
552 break;
553 case 0x1:
554 /* generate Event element for event 1 and 2 */
555 config->eventctrl1 |= val & (BIT(0) | BIT(1));
556 break;
557 case 0x2:
558 /* generate Event element for event 1, 2 and 3 */
559 config->eventctrl1 |= val & (BIT(0) | BIT(1) | BIT(2));
560 break;
561 case 0x3:
562 /* generate Event element for all 4 events */
563 config->eventctrl1 |= val & 0xF;
564 break;
565 default:
566 break;
567 }
568 spin_unlock(&drvdata->spinlock);
569 return size;
570}
571static DEVICE_ATTR_RW(event_instren);
572
573static ssize_t event_ts_show(struct device *dev,
574 struct device_attribute *attr,
575 char *buf)
576{
577 unsigned long val;
578 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
579 struct etmv4_config *config = &drvdata->config;
580
581 val = config->ts_ctrl;
582 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
583}
584
585static ssize_t event_ts_store(struct device *dev,
586 struct device_attribute *attr,
587 const char *buf, size_t size)
588{
589 unsigned long val;
590 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
591 struct etmv4_config *config = &drvdata->config;
592
593 if (kstrtoul(buf, 16, &val))
594 return -EINVAL;
595 if (!drvdata->ts_size)
596 return -EINVAL;
597
598 config->ts_ctrl = val & ETMv4_EVENT_MASK;
599 return size;
600}
601static DEVICE_ATTR_RW(event_ts);
602
603static ssize_t syncfreq_show(struct device *dev,
604 struct device_attribute *attr,
605 char *buf)
606{
607 unsigned long val;
608 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
609 struct etmv4_config *config = &drvdata->config;
610
611 val = config->syncfreq;
612 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
613}
614
615static ssize_t syncfreq_store(struct device *dev,
616 struct device_attribute *attr,
617 const char *buf, size_t size)
618{
619 unsigned long val;
620 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
621 struct etmv4_config *config = &drvdata->config;
622
623 if (kstrtoul(buf, 16, &val))
624 return -EINVAL;
625 if (drvdata->syncpr == true)
626 return -EINVAL;
627
628 config->syncfreq = val & ETMv4_SYNC_MASK;
629 return size;
630}
631static DEVICE_ATTR_RW(syncfreq);
632
633static ssize_t cyc_threshold_show(struct device *dev,
634 struct device_attribute *attr,
635 char *buf)
636{
637 unsigned long val;
638 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
639 struct etmv4_config *config = &drvdata->config;
640
641 val = config->ccctlr;
642 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
643}
644
645static ssize_t cyc_threshold_store(struct device *dev,
646 struct device_attribute *attr,
647 const char *buf, size_t size)
648{
649 unsigned long val;
650 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
651 struct etmv4_config *config = &drvdata->config;
652
653 if (kstrtoul(buf, 16, &val))
654 return -EINVAL;
655
656 /* mask off max threshold before checking min value */
657 val &= ETM_CYC_THRESHOLD_MASK;
658 if (val < drvdata->ccitmin)
659 return -EINVAL;
660
661 config->ccctlr = val;
662 return size;
663}
664static DEVICE_ATTR_RW(cyc_threshold);
665
666static ssize_t bb_ctrl_show(struct device *dev,
667 struct device_attribute *attr,
668 char *buf)
669{
670 unsigned long val;
671 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
672 struct etmv4_config *config = &drvdata->config;
673
674 val = config->bb_ctrl;
675 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
676}
677
678static ssize_t bb_ctrl_store(struct device *dev,
679 struct device_attribute *attr,
680 const char *buf, size_t size)
681{
682 unsigned long val;
683 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
684 struct etmv4_config *config = &drvdata->config;
685
686 if (kstrtoul(buf, 16, &val))
687 return -EINVAL;
688 if (drvdata->trcbb == false)
689 return -EINVAL;
690 if (!drvdata->nr_addr_cmp)
691 return -EINVAL;
692
693 /*
694 * Bit[8] controls include(1) / exclude(0), bits[0-7] select
695 * individual range comparators. If include then at least 1
696 * range must be selected.
697 */
698 if ((val & BIT(8)) && (BMVAL(val, 0, 7) == 0))
699 return -EINVAL;
700
701 config->bb_ctrl = val & GENMASK(8, 0);
702 return size;
703}
704static DEVICE_ATTR_RW(bb_ctrl);
705
706static ssize_t event_vinst_show(struct device *dev,
707 struct device_attribute *attr,
708 char *buf)
709{
710 unsigned long val;
711 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
712 struct etmv4_config *config = &drvdata->config;
713
714 val = config->vinst_ctrl & ETMv4_EVENT_MASK;
715 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
716}
717
718static ssize_t event_vinst_store(struct device *dev,
719 struct device_attribute *attr,
720 const char *buf, size_t size)
721{
722 unsigned long val;
723 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
724 struct etmv4_config *config = &drvdata->config;
725
726 if (kstrtoul(buf, 16, &val))
727 return -EINVAL;
728
729 spin_lock(&drvdata->spinlock);
730 val &= ETMv4_EVENT_MASK;
731 config->vinst_ctrl &= ~ETMv4_EVENT_MASK;
732 config->vinst_ctrl |= val;
733 spin_unlock(&drvdata->spinlock);
734 return size;
735}
736static DEVICE_ATTR_RW(event_vinst);
737
738static ssize_t s_exlevel_vinst_show(struct device *dev,
739 struct device_attribute *attr,
740 char *buf)
741{
742 unsigned long val;
743 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
744 struct etmv4_config *config = &drvdata->config;
745
746 val = (config->vinst_ctrl & TRCVICTLR_EXLEVEL_S_MASK) >> TRCVICTLR_EXLEVEL_S_SHIFT;
747 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
748}
749
750static ssize_t s_exlevel_vinst_store(struct device *dev,
751 struct device_attribute *attr,
752 const char *buf, size_t size)
753{
754 unsigned long val;
755 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
756 struct etmv4_config *config = &drvdata->config;
757
758 if (kstrtoul(buf, 16, &val))
759 return -EINVAL;
760
761 spin_lock(&drvdata->spinlock);
762 /* clear all EXLEVEL_S bits */
763 config->vinst_ctrl &= ~(TRCVICTLR_EXLEVEL_S_MASK);
764 /* enable instruction tracing for corresponding exception level */
765 val &= drvdata->s_ex_level;
766 config->vinst_ctrl |= (val << TRCVICTLR_EXLEVEL_S_SHIFT);
767 spin_unlock(&drvdata->spinlock);
768 return size;
769}
770static DEVICE_ATTR_RW(s_exlevel_vinst);
771
772static ssize_t ns_exlevel_vinst_show(struct device *dev,
773 struct device_attribute *attr,
774 char *buf)
775{
776 unsigned long val;
777 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
778 struct etmv4_config *config = &drvdata->config;
779
780 /* EXLEVEL_NS, bits[23:20] */
781 val = (config->vinst_ctrl & TRCVICTLR_EXLEVEL_NS_MASK) >> TRCVICTLR_EXLEVEL_NS_SHIFT;
782 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
783}
784
785static ssize_t ns_exlevel_vinst_store(struct device *dev,
786 struct device_attribute *attr,
787 const char *buf, size_t size)
788{
789 unsigned long val;
790 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
791 struct etmv4_config *config = &drvdata->config;
792
793 if (kstrtoul(buf, 16, &val))
794 return -EINVAL;
795
796 spin_lock(&drvdata->spinlock);
797 /* clear EXLEVEL_NS bits */
798 config->vinst_ctrl &= ~(TRCVICTLR_EXLEVEL_NS_MASK);
799 /* enable instruction tracing for corresponding exception level */
800 val &= drvdata->ns_ex_level;
801 config->vinst_ctrl |= (val << TRCVICTLR_EXLEVEL_NS_SHIFT);
802 spin_unlock(&drvdata->spinlock);
803 return size;
804}
805static DEVICE_ATTR_RW(ns_exlevel_vinst);
806
807static ssize_t addr_idx_show(struct device *dev,
808 struct device_attribute *attr,
809 char *buf)
810{
811 unsigned long val;
812 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
813 struct etmv4_config *config = &drvdata->config;
814
815 val = config->addr_idx;
816 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
817}
818
819static ssize_t addr_idx_store(struct device *dev,
820 struct device_attribute *attr,
821 const char *buf, size_t size)
822{
823 unsigned long val;
824 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
825 struct etmv4_config *config = &drvdata->config;
826
827 if (kstrtoul(buf, 16, &val))
828 return -EINVAL;
829 if (val >= drvdata->nr_addr_cmp * 2)
830 return -EINVAL;
831
832 /*
833 * Use spinlock to ensure index doesn't change while it gets
834 * dereferenced multiple times within a spinlock block elsewhere.
835 */
836 spin_lock(&drvdata->spinlock);
837 config->addr_idx = val;
838 spin_unlock(&drvdata->spinlock);
839 return size;
840}
841static DEVICE_ATTR_RW(addr_idx);
842
843static ssize_t addr_instdatatype_show(struct device *dev,
844 struct device_attribute *attr,
845 char *buf)
846{
847 ssize_t len;
848 u8 val, idx;
849 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
850 struct etmv4_config *config = &drvdata->config;
851
852 spin_lock(&drvdata->spinlock);
853 idx = config->addr_idx;
854 val = BMVAL(config->addr_acc[idx], 0, 1);
855 len = scnprintf(buf, PAGE_SIZE, "%s\n",
856 val == ETM_INSTR_ADDR ? "instr" :
857 (val == ETM_DATA_LOAD_ADDR ? "data_load" :
858 (val == ETM_DATA_STORE_ADDR ? "data_store" :
859 "data_load_store")));
860 spin_unlock(&drvdata->spinlock);
861 return len;
862}
863
864static ssize_t addr_instdatatype_store(struct device *dev,
865 struct device_attribute *attr,
866 const char *buf, size_t size)
867{
868 u8 idx;
869 char str[20] = "";
870 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
871 struct etmv4_config *config = &drvdata->config;
872
873 if (strlen(buf) >= 20)
874 return -EINVAL;
875 if (sscanf(buf, "%s", str) != 1)
876 return -EINVAL;
877
878 spin_lock(&drvdata->spinlock);
879 idx = config->addr_idx;
880 if (!strcmp(str, "instr"))
881 /* TYPE, bits[1:0] */
882 config->addr_acc[idx] &= ~(BIT(0) | BIT(1));
883
884 spin_unlock(&drvdata->spinlock);
885 return size;
886}
887static DEVICE_ATTR_RW(addr_instdatatype);
888
889static ssize_t addr_single_show(struct device *dev,
890 struct device_attribute *attr,
891 char *buf)
892{
893 u8 idx;
894 unsigned long val;
895 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
896 struct etmv4_config *config = &drvdata->config;
897
898 idx = config->addr_idx;
899 spin_lock(&drvdata->spinlock);
900 if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
901 config->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
902 spin_unlock(&drvdata->spinlock);
903 return -EPERM;
904 }
905 val = (unsigned long)config->addr_val[idx];
906 spin_unlock(&drvdata->spinlock);
907 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
908}
909
910static ssize_t addr_single_store(struct device *dev,
911 struct device_attribute *attr,
912 const char *buf, size_t size)
913{
914 u8 idx;
915 unsigned long val;
916 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
917 struct etmv4_config *config = &drvdata->config;
918
919 if (kstrtoul(buf, 16, &val))
920 return -EINVAL;
921
922 spin_lock(&drvdata->spinlock);
923 idx = config->addr_idx;
924 if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
925 config->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
926 spin_unlock(&drvdata->spinlock);
927 return -EPERM;
928 }
929
930 config->addr_val[idx] = (u64)val;
931 config->addr_type[idx] = ETM_ADDR_TYPE_SINGLE;
932 spin_unlock(&drvdata->spinlock);
933 return size;
934}
935static DEVICE_ATTR_RW(addr_single);
936
937static ssize_t addr_range_show(struct device *dev,
938 struct device_attribute *attr,
939 char *buf)
940{
941 u8 idx;
942 unsigned long val1, val2;
943 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
944 struct etmv4_config *config = &drvdata->config;
945
946 spin_lock(&drvdata->spinlock);
947 idx = config->addr_idx;
948 if (idx % 2 != 0) {
949 spin_unlock(&drvdata->spinlock);
950 return -EPERM;
951 }
952 if (!((config->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
953 config->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
954 (config->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
955 config->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
956 spin_unlock(&drvdata->spinlock);
957 return -EPERM;
958 }
959
960 val1 = (unsigned long)config->addr_val[idx];
961 val2 = (unsigned long)config->addr_val[idx + 1];
962 spin_unlock(&drvdata->spinlock);
963 return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
964}
965
966static ssize_t addr_range_store(struct device *dev,
967 struct device_attribute *attr,
968 const char *buf, size_t size)
969{
970 u8 idx;
971 unsigned long val1, val2;
972 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
973 struct etmv4_config *config = &drvdata->config;
974 int elements, exclude;
975
976 elements = sscanf(buf, "%lx %lx %x", &val1, &val2, &exclude);
977
978 /* exclude is optional, but need at least two parameter */
979 if (elements < 2)
980 return -EINVAL;
981 /* lower address comparator cannot have a higher address value */
982 if (val1 > val2)
983 return -EINVAL;
984
985 spin_lock(&drvdata->spinlock);
986 idx = config->addr_idx;
987 if (idx % 2 != 0) {
988 spin_unlock(&drvdata->spinlock);
989 return -EPERM;
990 }
991
992 if (!((config->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
993 config->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
994 (config->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
995 config->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
996 spin_unlock(&drvdata->spinlock);
997 return -EPERM;
998 }
999
1000 config->addr_val[idx] = (u64)val1;
1001 config->addr_type[idx] = ETM_ADDR_TYPE_RANGE;
1002 config->addr_val[idx + 1] = (u64)val2;
1003 config->addr_type[idx + 1] = ETM_ADDR_TYPE_RANGE;
1004 /*
1005 * Program include or exclude control bits for vinst or vdata
1006 * whenever we change addr comparators to ETM_ADDR_TYPE_RANGE
1007 * use supplied value, or default to bit set in 'mode'
1008 */
1009 if (elements != 3)
1010 exclude = config->mode & ETM_MODE_EXCLUDE;
1011 etm4_set_mode_exclude(drvdata, exclude ? true : false);
1012
1013 spin_unlock(&drvdata->spinlock);
1014 return size;
1015}
1016static DEVICE_ATTR_RW(addr_range);
1017
1018static ssize_t addr_start_show(struct device *dev,
1019 struct device_attribute *attr,
1020 char *buf)
1021{
1022 u8 idx;
1023 unsigned long val;
1024 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1025 struct etmv4_config *config = &drvdata->config;
1026
1027 spin_lock(&drvdata->spinlock);
1028 idx = config->addr_idx;
1029
1030 if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1031 config->addr_type[idx] == ETM_ADDR_TYPE_START)) {
1032 spin_unlock(&drvdata->spinlock);
1033 return -EPERM;
1034 }
1035
1036 val = (unsigned long)config->addr_val[idx];
1037 spin_unlock(&drvdata->spinlock);
1038 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1039}
1040
1041static ssize_t addr_start_store(struct device *dev,
1042 struct device_attribute *attr,
1043 const char *buf, size_t size)
1044{
1045 u8 idx;
1046 unsigned long val;
1047 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1048 struct etmv4_config *config = &drvdata->config;
1049
1050 if (kstrtoul(buf, 16, &val))
1051 return -EINVAL;
1052
1053 spin_lock(&drvdata->spinlock);
1054 idx = config->addr_idx;
1055 if (!drvdata->nr_addr_cmp) {
1056 spin_unlock(&drvdata->spinlock);
1057 return -EINVAL;
1058 }
1059 if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1060 config->addr_type[idx] == ETM_ADDR_TYPE_START)) {
1061 spin_unlock(&drvdata->spinlock);
1062 return -EPERM;
1063 }
1064
1065 config->addr_val[idx] = (u64)val;
1066 config->addr_type[idx] = ETM_ADDR_TYPE_START;
1067 config->vissctlr |= BIT(idx);
1068 spin_unlock(&drvdata->spinlock);
1069 return size;
1070}
1071static DEVICE_ATTR_RW(addr_start);
1072
1073static ssize_t addr_stop_show(struct device *dev,
1074 struct device_attribute *attr,
1075 char *buf)
1076{
1077 u8 idx;
1078 unsigned long val;
1079 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1080 struct etmv4_config *config = &drvdata->config;
1081
1082 spin_lock(&drvdata->spinlock);
1083 idx = config->addr_idx;
1084
1085 if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1086 config->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
1087 spin_unlock(&drvdata->spinlock);
1088 return -EPERM;
1089 }
1090
1091 val = (unsigned long)config->addr_val[idx];
1092 spin_unlock(&drvdata->spinlock);
1093 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1094}
1095
1096static ssize_t addr_stop_store(struct device *dev,
1097 struct device_attribute *attr,
1098 const char *buf, size_t size)
1099{
1100 u8 idx;
1101 unsigned long val;
1102 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1103 struct etmv4_config *config = &drvdata->config;
1104
1105 if (kstrtoul(buf, 16, &val))
1106 return -EINVAL;
1107
1108 spin_lock(&drvdata->spinlock);
1109 idx = config->addr_idx;
1110 if (!drvdata->nr_addr_cmp) {
1111 spin_unlock(&drvdata->spinlock);
1112 return -EINVAL;
1113 }
1114 if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1115 config->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
1116 spin_unlock(&drvdata->spinlock);
1117 return -EPERM;
1118 }
1119
1120 config->addr_val[idx] = (u64)val;
1121 config->addr_type[idx] = ETM_ADDR_TYPE_STOP;
1122 config->vissctlr |= BIT(idx + 16);
1123 spin_unlock(&drvdata->spinlock);
1124 return size;
1125}
1126static DEVICE_ATTR_RW(addr_stop);
1127
1128static ssize_t addr_ctxtype_show(struct device *dev,
1129 struct device_attribute *attr,
1130 char *buf)
1131{
1132 ssize_t len;
1133 u8 idx, val;
1134 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1135 struct etmv4_config *config = &drvdata->config;
1136
1137 spin_lock(&drvdata->spinlock);
1138 idx = config->addr_idx;
1139 /* CONTEXTTYPE, bits[3:2] */
1140 val = BMVAL(config->addr_acc[idx], 2, 3);
1141 len = scnprintf(buf, PAGE_SIZE, "%s\n", val == ETM_CTX_NONE ? "none" :
1142 (val == ETM_CTX_CTXID ? "ctxid" :
1143 (val == ETM_CTX_VMID ? "vmid" : "all")));
1144 spin_unlock(&drvdata->spinlock);
1145 return len;
1146}
1147
1148static ssize_t addr_ctxtype_store(struct device *dev,
1149 struct device_attribute *attr,
1150 const char *buf, size_t size)
1151{
1152 u8 idx;
1153 char str[10] = "";
1154 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1155 struct etmv4_config *config = &drvdata->config;
1156
1157 if (strlen(buf) >= 10)
1158 return -EINVAL;
1159 if (sscanf(buf, "%s", str) != 1)
1160 return -EINVAL;
1161
1162 spin_lock(&drvdata->spinlock);
1163 idx = config->addr_idx;
1164 if (!strcmp(str, "none"))
1165 /* start by clearing context type bits */
1166 config->addr_acc[idx] &= ~(BIT(2) | BIT(3));
1167 else if (!strcmp(str, "ctxid")) {
1168 /* 0b01 The trace unit performs a Context ID */
1169 if (drvdata->numcidc) {
1170 config->addr_acc[idx] |= BIT(2);
1171 config->addr_acc[idx] &= ~BIT(3);
1172 }
1173 } else if (!strcmp(str, "vmid")) {
1174 /* 0b10 The trace unit performs a VMID */
1175 if (drvdata->numvmidc) {
1176 config->addr_acc[idx] &= ~BIT(2);
1177 config->addr_acc[idx] |= BIT(3);
1178 }
1179 } else if (!strcmp(str, "all")) {
1180 /*
1181 * 0b11 The trace unit performs a Context ID
1182 * comparison and a VMID
1183 */
1184 if (drvdata->numcidc)
1185 config->addr_acc[idx] |= BIT(2);
1186 if (drvdata->numvmidc)
1187 config->addr_acc[idx] |= BIT(3);
1188 }
1189 spin_unlock(&drvdata->spinlock);
1190 return size;
1191}
1192static DEVICE_ATTR_RW(addr_ctxtype);
1193
1194static ssize_t addr_context_show(struct device *dev,
1195 struct device_attribute *attr,
1196 char *buf)
1197{
1198 u8 idx;
1199 unsigned long val;
1200 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1201 struct etmv4_config *config = &drvdata->config;
1202
1203 spin_lock(&drvdata->spinlock);
1204 idx = config->addr_idx;
1205 /* context ID comparator bits[6:4] */
1206 val = BMVAL(config->addr_acc[idx], 4, 6);
1207 spin_unlock(&drvdata->spinlock);
1208 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1209}
1210
1211static ssize_t addr_context_store(struct device *dev,
1212 struct device_attribute *attr,
1213 const char *buf, size_t size)
1214{
1215 u8 idx;
1216 unsigned long val;
1217 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1218 struct etmv4_config *config = &drvdata->config;
1219
1220 if (kstrtoul(buf, 16, &val))
1221 return -EINVAL;
1222 if ((drvdata->numcidc <= 1) && (drvdata->numvmidc <= 1))
1223 return -EINVAL;
1224 if (val >= (drvdata->numcidc >= drvdata->numvmidc ?
1225 drvdata->numcidc : drvdata->numvmidc))
1226 return -EINVAL;
1227
1228 spin_lock(&drvdata->spinlock);
1229 idx = config->addr_idx;
1230 /* clear context ID comparator bits[6:4] */
1231 config->addr_acc[idx] &= ~(BIT(4) | BIT(5) | BIT(6));
1232 config->addr_acc[idx] |= (val << 4);
1233 spin_unlock(&drvdata->spinlock);
1234 return size;
1235}
1236static DEVICE_ATTR_RW(addr_context);
1237
1238static ssize_t addr_exlevel_s_ns_show(struct device *dev,
1239 struct device_attribute *attr,
1240 char *buf)
1241{
1242 u8 idx;
1243 unsigned long val;
1244 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1245 struct etmv4_config *config = &drvdata->config;
1246
1247 spin_lock(&drvdata->spinlock);
1248 idx = config->addr_idx;
1249 val = BMVAL(config->addr_acc[idx], 8, 14);
1250 spin_unlock(&drvdata->spinlock);
1251 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1252}
1253
1254static ssize_t addr_exlevel_s_ns_store(struct device *dev,
1255 struct device_attribute *attr,
1256 const char *buf, size_t size)
1257{
1258 u8 idx;
1259 unsigned long val;
1260 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1261 struct etmv4_config *config = &drvdata->config;
1262
1263 if (kstrtoul(buf, 0, &val))
1264 return -EINVAL;
1265
1266 if (val & ~((GENMASK(14, 8) >> 8)))
1267 return -EINVAL;
1268
1269 spin_lock(&drvdata->spinlock);
1270 idx = config->addr_idx;
1271 /* clear Exlevel_ns & Exlevel_s bits[14:12, 11:8], bit[15] is res0 */
1272 config->addr_acc[idx] &= ~(GENMASK(14, 8));
1273 config->addr_acc[idx] |= (val << 8);
1274 spin_unlock(&drvdata->spinlock);
1275 return size;
1276}
1277static DEVICE_ATTR_RW(addr_exlevel_s_ns);
1278
1279static const char * const addr_type_names[] = {
1280 "unused",
1281 "single",
1282 "range",
1283 "start",
1284 "stop"
1285};
1286
1287static ssize_t addr_cmp_view_show(struct device *dev,
1288 struct device_attribute *attr, char *buf)
1289{
1290 u8 idx, addr_type;
1291 unsigned long addr_v, addr_v2, addr_ctrl;
1292 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1293 struct etmv4_config *config = &drvdata->config;
1294 int size = 0;
1295 bool exclude = false;
1296
1297 spin_lock(&drvdata->spinlock);
1298 idx = config->addr_idx;
1299 addr_v = config->addr_val[idx];
1300 addr_ctrl = config->addr_acc[idx];
1301 addr_type = config->addr_type[idx];
1302 if (addr_type == ETM_ADDR_TYPE_RANGE) {
1303 if (idx & 0x1) {
1304 idx -= 1;
1305 addr_v2 = addr_v;
1306 addr_v = config->addr_val[idx];
1307 } else {
1308 addr_v2 = config->addr_val[idx + 1];
1309 }
1310 exclude = config->viiectlr & BIT(idx / 2 + 16);
1311 }
1312 spin_unlock(&drvdata->spinlock);
1313 if (addr_type) {
1314 size = scnprintf(buf, PAGE_SIZE, "addr_cmp[%i] %s %#lx", idx,
1315 addr_type_names[addr_type], addr_v);
1316 if (addr_type == ETM_ADDR_TYPE_RANGE) {
1317 size += scnprintf(buf + size, PAGE_SIZE - size,
1318 " %#lx %s", addr_v2,
1319 exclude ? "exclude" : "include");
1320 }
1321 size += scnprintf(buf + size, PAGE_SIZE - size,
1322 " ctrl(%#lx)\n", addr_ctrl);
1323 } else {
1324 size = scnprintf(buf, PAGE_SIZE, "addr_cmp[%i] unused\n", idx);
1325 }
1326 return size;
1327}
1328static DEVICE_ATTR_RO(addr_cmp_view);
1329
1330static ssize_t vinst_pe_cmp_start_stop_show(struct device *dev,
1331 struct device_attribute *attr,
1332 char *buf)
1333{
1334 unsigned long val;
1335 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1336 struct etmv4_config *config = &drvdata->config;
1337
1338 if (!drvdata->nr_pe_cmp)
1339 return -EINVAL;
1340 val = config->vipcssctlr;
1341 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1342}
1343static ssize_t vinst_pe_cmp_start_stop_store(struct device *dev,
1344 struct device_attribute *attr,
1345 const char *buf, size_t size)
1346{
1347 unsigned long val;
1348 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1349 struct etmv4_config *config = &drvdata->config;
1350
1351 if (kstrtoul(buf, 16, &val))
1352 return -EINVAL;
1353 if (!drvdata->nr_pe_cmp)
1354 return -EINVAL;
1355
1356 spin_lock(&drvdata->spinlock);
1357 config->vipcssctlr = val;
1358 spin_unlock(&drvdata->spinlock);
1359 return size;
1360}
1361static DEVICE_ATTR_RW(vinst_pe_cmp_start_stop);
1362
1363static ssize_t seq_idx_show(struct device *dev,
1364 struct device_attribute *attr,
1365 char *buf)
1366{
1367 unsigned long val;
1368 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1369 struct etmv4_config *config = &drvdata->config;
1370
1371 val = config->seq_idx;
1372 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1373}
1374
1375static ssize_t seq_idx_store(struct device *dev,
1376 struct device_attribute *attr,
1377 const char *buf, size_t size)
1378{
1379 unsigned long val;
1380 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1381 struct etmv4_config *config = &drvdata->config;
1382
1383 if (kstrtoul(buf, 16, &val))
1384 return -EINVAL;
1385 if (val >= drvdata->nrseqstate - 1)
1386 return -EINVAL;
1387
1388 /*
1389 * Use spinlock to ensure index doesn't change while it gets
1390 * dereferenced multiple times within a spinlock block elsewhere.
1391 */
1392 spin_lock(&drvdata->spinlock);
1393 config->seq_idx = val;
1394 spin_unlock(&drvdata->spinlock);
1395 return size;
1396}
1397static DEVICE_ATTR_RW(seq_idx);
1398
1399static ssize_t seq_state_show(struct device *dev,
1400 struct device_attribute *attr,
1401 char *buf)
1402{
1403 unsigned long val;
1404 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1405 struct etmv4_config *config = &drvdata->config;
1406
1407 val = config->seq_state;
1408 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1409}
1410
1411static ssize_t seq_state_store(struct device *dev,
1412 struct device_attribute *attr,
1413 const char *buf, size_t size)
1414{
1415 unsigned long val;
1416 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1417 struct etmv4_config *config = &drvdata->config;
1418
1419 if (kstrtoul(buf, 16, &val))
1420 return -EINVAL;
1421 if (val >= drvdata->nrseqstate)
1422 return -EINVAL;
1423
1424 config->seq_state = val;
1425 return size;
1426}
1427static DEVICE_ATTR_RW(seq_state);
1428
1429static ssize_t seq_event_show(struct device *dev,
1430 struct device_attribute *attr,
1431 char *buf)
1432{
1433 u8 idx;
1434 unsigned long val;
1435 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1436 struct etmv4_config *config = &drvdata->config;
1437
1438 spin_lock(&drvdata->spinlock);
1439 idx = config->seq_idx;
1440 val = config->seq_ctrl[idx];
1441 spin_unlock(&drvdata->spinlock);
1442 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1443}
1444
1445static ssize_t seq_event_store(struct device *dev,
1446 struct device_attribute *attr,
1447 const char *buf, size_t size)
1448{
1449 u8 idx;
1450 unsigned long val;
1451 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1452 struct etmv4_config *config = &drvdata->config;
1453
1454 if (kstrtoul(buf, 16, &val))
1455 return -EINVAL;
1456
1457 spin_lock(&drvdata->spinlock);
1458 idx = config->seq_idx;
1459 /* Seq control has two masks B[15:8] F[7:0] */
1460 config->seq_ctrl[idx] = val & 0xFFFF;
1461 spin_unlock(&drvdata->spinlock);
1462 return size;
1463}
1464static DEVICE_ATTR_RW(seq_event);
1465
1466static ssize_t seq_reset_event_show(struct device *dev,
1467 struct device_attribute *attr,
1468 char *buf)
1469{
1470 unsigned long val;
1471 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1472 struct etmv4_config *config = &drvdata->config;
1473
1474 val = config->seq_rst;
1475 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1476}
1477
1478static ssize_t seq_reset_event_store(struct device *dev,
1479 struct device_attribute *attr,
1480 const char *buf, size_t size)
1481{
1482 unsigned long val;
1483 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1484 struct etmv4_config *config = &drvdata->config;
1485
1486 if (kstrtoul(buf, 16, &val))
1487 return -EINVAL;
1488 if (!(drvdata->nrseqstate))
1489 return -EINVAL;
1490
1491 config->seq_rst = val & ETMv4_EVENT_MASK;
1492 return size;
1493}
1494static DEVICE_ATTR_RW(seq_reset_event);
1495
1496static ssize_t cntr_idx_show(struct device *dev,
1497 struct device_attribute *attr,
1498 char *buf)
1499{
1500 unsigned long val;
1501 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1502 struct etmv4_config *config = &drvdata->config;
1503
1504 val = config->cntr_idx;
1505 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1506}
1507
1508static ssize_t cntr_idx_store(struct device *dev,
1509 struct device_attribute *attr,
1510 const char *buf, size_t size)
1511{
1512 unsigned long val;
1513 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1514 struct etmv4_config *config = &drvdata->config;
1515
1516 if (kstrtoul(buf, 16, &val))
1517 return -EINVAL;
1518 if (val >= drvdata->nr_cntr)
1519 return -EINVAL;
1520
1521 /*
1522 * Use spinlock to ensure index doesn't change while it gets
1523 * dereferenced multiple times within a spinlock block elsewhere.
1524 */
1525 spin_lock(&drvdata->spinlock);
1526 config->cntr_idx = val;
1527 spin_unlock(&drvdata->spinlock);
1528 return size;
1529}
1530static DEVICE_ATTR_RW(cntr_idx);
1531
1532static ssize_t cntrldvr_show(struct device *dev,
1533 struct device_attribute *attr,
1534 char *buf)
1535{
1536 u8 idx;
1537 unsigned long val;
1538 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1539 struct etmv4_config *config = &drvdata->config;
1540
1541 spin_lock(&drvdata->spinlock);
1542 idx = config->cntr_idx;
1543 val = config->cntrldvr[idx];
1544 spin_unlock(&drvdata->spinlock);
1545 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1546}
1547
1548static ssize_t cntrldvr_store(struct device *dev,
1549 struct device_attribute *attr,
1550 const char *buf, size_t size)
1551{
1552 u8 idx;
1553 unsigned long val;
1554 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1555 struct etmv4_config *config = &drvdata->config;
1556
1557 if (kstrtoul(buf, 16, &val))
1558 return -EINVAL;
1559 if (val > ETM_CNTR_MAX_VAL)
1560 return -EINVAL;
1561
1562 spin_lock(&drvdata->spinlock);
1563 idx = config->cntr_idx;
1564 config->cntrldvr[idx] = val;
1565 spin_unlock(&drvdata->spinlock);
1566 return size;
1567}
1568static DEVICE_ATTR_RW(cntrldvr);
1569
1570static ssize_t cntr_val_show(struct device *dev,
1571 struct device_attribute *attr,
1572 char *buf)
1573{
1574 u8 idx;
1575 unsigned long val;
1576 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1577 struct etmv4_config *config = &drvdata->config;
1578
1579 spin_lock(&drvdata->spinlock);
1580 idx = config->cntr_idx;
1581 val = config->cntr_val[idx];
1582 spin_unlock(&drvdata->spinlock);
1583 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1584}
1585
1586static ssize_t cntr_val_store(struct device *dev,
1587 struct device_attribute *attr,
1588 const char *buf, size_t size)
1589{
1590 u8 idx;
1591 unsigned long val;
1592 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1593 struct etmv4_config *config = &drvdata->config;
1594
1595 if (kstrtoul(buf, 16, &val))
1596 return -EINVAL;
1597 if (val > ETM_CNTR_MAX_VAL)
1598 return -EINVAL;
1599
1600 spin_lock(&drvdata->spinlock);
1601 idx = config->cntr_idx;
1602 config->cntr_val[idx] = val;
1603 spin_unlock(&drvdata->spinlock);
1604 return size;
1605}
1606static DEVICE_ATTR_RW(cntr_val);
1607
1608static ssize_t cntr_ctrl_show(struct device *dev,
1609 struct device_attribute *attr,
1610 char *buf)
1611{
1612 u8 idx;
1613 unsigned long val;
1614 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1615 struct etmv4_config *config = &drvdata->config;
1616
1617 spin_lock(&drvdata->spinlock);
1618 idx = config->cntr_idx;
1619 val = config->cntr_ctrl[idx];
1620 spin_unlock(&drvdata->spinlock);
1621 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1622}
1623
1624static ssize_t cntr_ctrl_store(struct device *dev,
1625 struct device_attribute *attr,
1626 const char *buf, size_t size)
1627{
1628 u8 idx;
1629 unsigned long val;
1630 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1631 struct etmv4_config *config = &drvdata->config;
1632
1633 if (kstrtoul(buf, 16, &val))
1634 return -EINVAL;
1635
1636 spin_lock(&drvdata->spinlock);
1637 idx = config->cntr_idx;
1638 config->cntr_ctrl[idx] = val;
1639 spin_unlock(&drvdata->spinlock);
1640 return size;
1641}
1642static DEVICE_ATTR_RW(cntr_ctrl);
1643
1644static ssize_t res_idx_show(struct device *dev,
1645 struct device_attribute *attr,
1646 char *buf)
1647{
1648 unsigned long val;
1649 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1650 struct etmv4_config *config = &drvdata->config;
1651
1652 val = config->res_idx;
1653 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1654}
1655
1656static ssize_t res_idx_store(struct device *dev,
1657 struct device_attribute *attr,
1658 const char *buf, size_t size)
1659{
1660 unsigned long val;
1661 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1662 struct etmv4_config *config = &drvdata->config;
1663
1664 if (kstrtoul(buf, 16, &val))
1665 return -EINVAL;
1666 /*
1667 * Resource selector pair 0 is always implemented and reserved,
1668 * namely an idx with 0 and 1 is illegal.
1669 */
1670 if ((val < 2) || (val >= 2 * drvdata->nr_resource))
1671 return -EINVAL;
1672
1673 /*
1674 * Use spinlock to ensure index doesn't change while it gets
1675 * dereferenced multiple times within a spinlock block elsewhere.
1676 */
1677 spin_lock(&drvdata->spinlock);
1678 config->res_idx = val;
1679 spin_unlock(&drvdata->spinlock);
1680 return size;
1681}
1682static DEVICE_ATTR_RW(res_idx);
1683
1684static ssize_t res_ctrl_show(struct device *dev,
1685 struct device_attribute *attr,
1686 char *buf)
1687{
1688 u8 idx;
1689 unsigned long val;
1690 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1691 struct etmv4_config *config = &drvdata->config;
1692
1693 spin_lock(&drvdata->spinlock);
1694 idx = config->res_idx;
1695 val = config->res_ctrl[idx];
1696 spin_unlock(&drvdata->spinlock);
1697 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1698}
1699
1700static ssize_t res_ctrl_store(struct device *dev,
1701 struct device_attribute *attr,
1702 const char *buf, size_t size)
1703{
1704 u8 idx;
1705 unsigned long val;
1706 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1707 struct etmv4_config *config = &drvdata->config;
1708
1709 if (kstrtoul(buf, 16, &val))
1710 return -EINVAL;
1711
1712 spin_lock(&drvdata->spinlock);
1713 idx = config->res_idx;
1714 /* For odd idx pair inversal bit is RES0 */
1715 if (idx % 2 != 0)
1716 /* PAIRINV, bit[21] */
1717 val &= ~BIT(21);
1718 config->res_ctrl[idx] = val & GENMASK(21, 0);
1719 spin_unlock(&drvdata->spinlock);
1720 return size;
1721}
1722static DEVICE_ATTR_RW(res_ctrl);
1723
1724static ssize_t sshot_idx_show(struct device *dev,
1725 struct device_attribute *attr, char *buf)
1726{
1727 unsigned long val;
1728 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1729 struct etmv4_config *config = &drvdata->config;
1730
1731 val = config->ss_idx;
1732 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1733}
1734
1735static ssize_t sshot_idx_store(struct device *dev,
1736 struct device_attribute *attr,
1737 const char *buf, size_t size)
1738{
1739 unsigned long val;
1740 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1741 struct etmv4_config *config = &drvdata->config;
1742
1743 if (kstrtoul(buf, 16, &val))
1744 return -EINVAL;
1745 if (val >= drvdata->nr_ss_cmp)
1746 return -EINVAL;
1747
1748 spin_lock(&drvdata->spinlock);
1749 config->ss_idx = val;
1750 spin_unlock(&drvdata->spinlock);
1751 return size;
1752}
1753static DEVICE_ATTR_RW(sshot_idx);
1754
1755static ssize_t sshot_ctrl_show(struct device *dev,
1756 struct device_attribute *attr,
1757 char *buf)
1758{
1759 unsigned long val;
1760 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1761 struct etmv4_config *config = &drvdata->config;
1762
1763 spin_lock(&drvdata->spinlock);
1764 val = config->ss_ctrl[config->ss_idx];
1765 spin_unlock(&drvdata->spinlock);
1766 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1767}
1768
1769static ssize_t sshot_ctrl_store(struct device *dev,
1770 struct device_attribute *attr,
1771 const char *buf, size_t size)
1772{
1773 u8 idx;
1774 unsigned long val;
1775 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1776 struct etmv4_config *config = &drvdata->config;
1777
1778 if (kstrtoul(buf, 16, &val))
1779 return -EINVAL;
1780
1781 spin_lock(&drvdata->spinlock);
1782 idx = config->ss_idx;
1783 config->ss_ctrl[idx] = val & GENMASK(24, 0);
1784 /* must clear bit 31 in related status register on programming */
1785 config->ss_status[idx] &= ~BIT(31);
1786 spin_unlock(&drvdata->spinlock);
1787 return size;
1788}
1789static DEVICE_ATTR_RW(sshot_ctrl);
1790
1791static ssize_t sshot_status_show(struct device *dev,
1792 struct device_attribute *attr, char *buf)
1793{
1794 unsigned long val;
1795 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1796 struct etmv4_config *config = &drvdata->config;
1797
1798 spin_lock(&drvdata->spinlock);
1799 val = config->ss_status[config->ss_idx];
1800 spin_unlock(&drvdata->spinlock);
1801 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1802}
1803static DEVICE_ATTR_RO(sshot_status);
1804
1805static ssize_t sshot_pe_ctrl_show(struct device *dev,
1806 struct device_attribute *attr,
1807 char *buf)
1808{
1809 unsigned long val;
1810 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1811 struct etmv4_config *config = &drvdata->config;
1812
1813 spin_lock(&drvdata->spinlock);
1814 val = config->ss_pe_cmp[config->ss_idx];
1815 spin_unlock(&drvdata->spinlock);
1816 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1817}
1818
1819static ssize_t sshot_pe_ctrl_store(struct device *dev,
1820 struct device_attribute *attr,
1821 const char *buf, size_t size)
1822{
1823 u8 idx;
1824 unsigned long val;
1825 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1826 struct etmv4_config *config = &drvdata->config;
1827
1828 if (kstrtoul(buf, 16, &val))
1829 return -EINVAL;
1830
1831 spin_lock(&drvdata->spinlock);
1832 idx = config->ss_idx;
1833 config->ss_pe_cmp[idx] = val & GENMASK(7, 0);
1834 /* must clear bit 31 in related status register on programming */
1835 config->ss_status[idx] &= ~BIT(31);
1836 spin_unlock(&drvdata->spinlock);
1837 return size;
1838}
1839static DEVICE_ATTR_RW(sshot_pe_ctrl);
1840
1841static ssize_t ctxid_idx_show(struct device *dev,
1842 struct device_attribute *attr,
1843 char *buf)
1844{
1845 unsigned long val;
1846 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1847 struct etmv4_config *config = &drvdata->config;
1848
1849 val = config->ctxid_idx;
1850 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1851}
1852
1853static ssize_t ctxid_idx_store(struct device *dev,
1854 struct device_attribute *attr,
1855 const char *buf, size_t size)
1856{
1857 unsigned long val;
1858 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1859 struct etmv4_config *config = &drvdata->config;
1860
1861 if (kstrtoul(buf, 16, &val))
1862 return -EINVAL;
1863 if (val >= drvdata->numcidc)
1864 return -EINVAL;
1865
1866 /*
1867 * Use spinlock to ensure index doesn't change while it gets
1868 * dereferenced multiple times within a spinlock block elsewhere.
1869 */
1870 spin_lock(&drvdata->spinlock);
1871 config->ctxid_idx = val;
1872 spin_unlock(&drvdata->spinlock);
1873 return size;
1874}
1875static DEVICE_ATTR_RW(ctxid_idx);
1876
1877static ssize_t ctxid_pid_show(struct device *dev,
1878 struct device_attribute *attr,
1879 char *buf)
1880{
1881 u8 idx;
1882 unsigned long val;
1883 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1884 struct etmv4_config *config = &drvdata->config;
1885
1886 /*
1887 * Don't use contextID tracing if coming from a PID namespace. See
1888 * comment in ctxid_pid_store().
1889 */
1890 if (task_active_pid_ns(current) != &init_pid_ns)
1891 return -EINVAL;
1892
1893 spin_lock(&drvdata->spinlock);
1894 idx = config->ctxid_idx;
1895 val = (unsigned long)config->ctxid_pid[idx];
1896 spin_unlock(&drvdata->spinlock);
1897 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1898}
1899
1900static ssize_t ctxid_pid_store(struct device *dev,
1901 struct device_attribute *attr,
1902 const char *buf, size_t size)
1903{
1904 u8 idx;
1905 unsigned long pid;
1906 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1907 struct etmv4_config *config = &drvdata->config;
1908
1909 /*
1910 * When contextID tracing is enabled the tracers will insert the
1911 * value found in the contextID register in the trace stream. But if
1912 * a process is in a namespace the PID of that process as seen from the
1913 * namespace won't be what the kernel sees, something that makes the
1914 * feature confusing and can potentially leak kernel only information.
1915 * As such refuse to use the feature if @current is not in the initial
1916 * PID namespace.
1917 */
1918 if (task_active_pid_ns(current) != &init_pid_ns)
1919 return -EINVAL;
1920
1921 /*
1922 * only implemented when ctxid tracing is enabled, i.e. at least one
1923 * ctxid comparator is implemented and ctxid is greater than 0 bits
1924 * in length
1925 */
1926 if (!drvdata->ctxid_size || !drvdata->numcidc)
1927 return -EINVAL;
1928 if (kstrtoul(buf, 16, &pid))
1929 return -EINVAL;
1930
1931 spin_lock(&drvdata->spinlock);
1932 idx = config->ctxid_idx;
1933 config->ctxid_pid[idx] = (u64)pid;
1934 spin_unlock(&drvdata->spinlock);
1935 return size;
1936}
1937static DEVICE_ATTR_RW(ctxid_pid);
1938
1939static ssize_t ctxid_masks_show(struct device *dev,
1940 struct device_attribute *attr,
1941 char *buf)
1942{
1943 unsigned long val1, val2;
1944 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1945 struct etmv4_config *config = &drvdata->config;
1946
1947 /*
1948 * Don't use contextID tracing if coming from a PID namespace. See
1949 * comment in ctxid_pid_store().
1950 */
1951 if (task_active_pid_ns(current) != &init_pid_ns)
1952 return -EINVAL;
1953
1954 spin_lock(&drvdata->spinlock);
1955 val1 = config->ctxid_mask0;
1956 val2 = config->ctxid_mask1;
1957 spin_unlock(&drvdata->spinlock);
1958 return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
1959}
1960
1961static ssize_t ctxid_masks_store(struct device *dev,
1962 struct device_attribute *attr,
1963 const char *buf, size_t size)
1964{
1965 u8 i, j, maskbyte;
1966 unsigned long val1, val2, mask;
1967 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1968 struct etmv4_config *config = &drvdata->config;
1969 int nr_inputs;
1970
1971 /*
1972 * Don't use contextID tracing if coming from a PID namespace. See
1973 * comment in ctxid_pid_store().
1974 */
1975 if (task_active_pid_ns(current) != &init_pid_ns)
1976 return -EINVAL;
1977
1978 /*
1979 * only implemented when ctxid tracing is enabled, i.e. at least one
1980 * ctxid comparator is implemented and ctxid is greater than 0 bits
1981 * in length
1982 */
1983 if (!drvdata->ctxid_size || !drvdata->numcidc)
1984 return -EINVAL;
1985 /* one mask if <= 4 comparators, two for up to 8 */
1986 nr_inputs = sscanf(buf, "%lx %lx", &val1, &val2);
1987 if ((drvdata->numcidc > 4) && (nr_inputs != 2))
1988 return -EINVAL;
1989
1990 spin_lock(&drvdata->spinlock);
1991 /*
1992 * each byte[0..3] controls mask value applied to ctxid
1993 * comparator[0..3]
1994 */
1995 switch (drvdata->numcidc) {
1996 case 0x1:
1997 /* COMP0, bits[7:0] */
1998 config->ctxid_mask0 = val1 & 0xFF;
1999 break;
2000 case 0x2:
2001 /* COMP1, bits[15:8] */
2002 config->ctxid_mask0 = val1 & 0xFFFF;
2003 break;
2004 case 0x3:
2005 /* COMP2, bits[23:16] */
2006 config->ctxid_mask0 = val1 & 0xFFFFFF;
2007 break;
2008 case 0x4:
2009 /* COMP3, bits[31:24] */
2010 config->ctxid_mask0 = val1;
2011 break;
2012 case 0x5:
2013 /* COMP4, bits[7:0] */
2014 config->ctxid_mask0 = val1;
2015 config->ctxid_mask1 = val2 & 0xFF;
2016 break;
2017 case 0x6:
2018 /* COMP5, bits[15:8] */
2019 config->ctxid_mask0 = val1;
2020 config->ctxid_mask1 = val2 & 0xFFFF;
2021 break;
2022 case 0x7:
2023 /* COMP6, bits[23:16] */
2024 config->ctxid_mask0 = val1;
2025 config->ctxid_mask1 = val2 & 0xFFFFFF;
2026 break;
2027 case 0x8:
2028 /* COMP7, bits[31:24] */
2029 config->ctxid_mask0 = val1;
2030 config->ctxid_mask1 = val2;
2031 break;
2032 default:
2033 break;
2034 }
2035 /*
2036 * If software sets a mask bit to 1, it must program relevant byte
2037 * of ctxid comparator value 0x0, otherwise behavior is unpredictable.
2038 * For example, if bit[3] of ctxid_mask0 is 1, we must clear bits[31:24]
2039 * of ctxid comparator0 value (corresponding to byte 0) register.
2040 */
2041 mask = config->ctxid_mask0;
2042 for (i = 0; i < drvdata->numcidc; i++) {
2043 /* mask value of corresponding ctxid comparator */
2044 maskbyte = mask & ETMv4_EVENT_MASK;
2045 /*
2046 * each bit corresponds to a byte of respective ctxid comparator
2047 * value register
2048 */
2049 for (j = 0; j < 8; j++) {
2050 if (maskbyte & 1)
2051 config->ctxid_pid[i] &= ~(0xFFUL << (j * 8));
2052 maskbyte >>= 1;
2053 }
2054 /* Select the next ctxid comparator mask value */
2055 if (i == 3)
2056 /* ctxid comparators[4-7] */
2057 mask = config->ctxid_mask1;
2058 else
2059 mask >>= 0x8;
2060 }
2061
2062 spin_unlock(&drvdata->spinlock);
2063 return size;
2064}
2065static DEVICE_ATTR_RW(ctxid_masks);
2066
2067static ssize_t vmid_idx_show(struct device *dev,
2068 struct device_attribute *attr,
2069 char *buf)
2070{
2071 unsigned long val;
2072 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2073 struct etmv4_config *config = &drvdata->config;
2074
2075 val = config->vmid_idx;
2076 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
2077}
2078
2079static ssize_t vmid_idx_store(struct device *dev,
2080 struct device_attribute *attr,
2081 const char *buf, size_t size)
2082{
2083 unsigned long val;
2084 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2085 struct etmv4_config *config = &drvdata->config;
2086
2087 if (kstrtoul(buf, 16, &val))
2088 return -EINVAL;
2089 if (val >= drvdata->numvmidc)
2090 return -EINVAL;
2091
2092 /*
2093 * Use spinlock to ensure index doesn't change while it gets
2094 * dereferenced multiple times within a spinlock block elsewhere.
2095 */
2096 spin_lock(&drvdata->spinlock);
2097 config->vmid_idx = val;
2098 spin_unlock(&drvdata->spinlock);
2099 return size;
2100}
2101static DEVICE_ATTR_RW(vmid_idx);
2102
2103static ssize_t vmid_val_show(struct device *dev,
2104 struct device_attribute *attr,
2105 char *buf)
2106{
2107 unsigned long val;
2108 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2109 struct etmv4_config *config = &drvdata->config;
2110
2111 val = (unsigned long)config->vmid_val[config->vmid_idx];
2112 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
2113}
2114
2115static ssize_t vmid_val_store(struct device *dev,
2116 struct device_attribute *attr,
2117 const char *buf, size_t size)
2118{
2119 unsigned long val;
2120 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2121 struct etmv4_config *config = &drvdata->config;
2122
2123 /*
2124 * only implemented when vmid tracing is enabled, i.e. at least one
2125 * vmid comparator is implemented and at least 8 bit vmid size
2126 */
2127 if (!drvdata->vmid_size || !drvdata->numvmidc)
2128 return -EINVAL;
2129 if (kstrtoul(buf, 16, &val))
2130 return -EINVAL;
2131
2132 spin_lock(&drvdata->spinlock);
2133 config->vmid_val[config->vmid_idx] = (u64)val;
2134 spin_unlock(&drvdata->spinlock);
2135 return size;
2136}
2137static DEVICE_ATTR_RW(vmid_val);
2138
2139static ssize_t vmid_masks_show(struct device *dev,
2140 struct device_attribute *attr, char *buf)
2141{
2142 unsigned long val1, val2;
2143 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2144 struct etmv4_config *config = &drvdata->config;
2145
2146 spin_lock(&drvdata->spinlock);
2147 val1 = config->vmid_mask0;
2148 val2 = config->vmid_mask1;
2149 spin_unlock(&drvdata->spinlock);
2150 return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
2151}
2152
2153static ssize_t vmid_masks_store(struct device *dev,
2154 struct device_attribute *attr,
2155 const char *buf, size_t size)
2156{
2157 u8 i, j, maskbyte;
2158 unsigned long val1, val2, mask;
2159 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2160 struct etmv4_config *config = &drvdata->config;
2161 int nr_inputs;
2162
2163 /*
2164 * only implemented when vmid tracing is enabled, i.e. at least one
2165 * vmid comparator is implemented and at least 8 bit vmid size
2166 */
2167 if (!drvdata->vmid_size || !drvdata->numvmidc)
2168 return -EINVAL;
2169 /* one mask if <= 4 comparators, two for up to 8 */
2170 nr_inputs = sscanf(buf, "%lx %lx", &val1, &val2);
2171 if ((drvdata->numvmidc > 4) && (nr_inputs != 2))
2172 return -EINVAL;
2173
2174 spin_lock(&drvdata->spinlock);
2175
2176 /*
2177 * each byte[0..3] controls mask value applied to vmid
2178 * comparator[0..3]
2179 */
2180 switch (drvdata->numvmidc) {
2181 case 0x1:
2182 /* COMP0, bits[7:0] */
2183 config->vmid_mask0 = val1 & 0xFF;
2184 break;
2185 case 0x2:
2186 /* COMP1, bits[15:8] */
2187 config->vmid_mask0 = val1 & 0xFFFF;
2188 break;
2189 case 0x3:
2190 /* COMP2, bits[23:16] */
2191 config->vmid_mask0 = val1 & 0xFFFFFF;
2192 break;
2193 case 0x4:
2194 /* COMP3, bits[31:24] */
2195 config->vmid_mask0 = val1;
2196 break;
2197 case 0x5:
2198 /* COMP4, bits[7:0] */
2199 config->vmid_mask0 = val1;
2200 config->vmid_mask1 = val2 & 0xFF;
2201 break;
2202 case 0x6:
2203 /* COMP5, bits[15:8] */
2204 config->vmid_mask0 = val1;
2205 config->vmid_mask1 = val2 & 0xFFFF;
2206 break;
2207 case 0x7:
2208 /* COMP6, bits[23:16] */
2209 config->vmid_mask0 = val1;
2210 config->vmid_mask1 = val2 & 0xFFFFFF;
2211 break;
2212 case 0x8:
2213 /* COMP7, bits[31:24] */
2214 config->vmid_mask0 = val1;
2215 config->vmid_mask1 = val2;
2216 break;
2217 default:
2218 break;
2219 }
2220
2221 /*
2222 * If software sets a mask bit to 1, it must program relevant byte
2223 * of vmid comparator value 0x0, otherwise behavior is unpredictable.
2224 * For example, if bit[3] of vmid_mask0 is 1, we must clear bits[31:24]
2225 * of vmid comparator0 value (corresponding to byte 0) register.
2226 */
2227 mask = config->vmid_mask0;
2228 for (i = 0; i < drvdata->numvmidc; i++) {
2229 /* mask value of corresponding vmid comparator */
2230 maskbyte = mask & ETMv4_EVENT_MASK;
2231 /*
2232 * each bit corresponds to a byte of respective vmid comparator
2233 * value register
2234 */
2235 for (j = 0; j < 8; j++) {
2236 if (maskbyte & 1)
2237 config->vmid_val[i] &= ~(0xFFUL << (j * 8));
2238 maskbyte >>= 1;
2239 }
2240 /* Select the next vmid comparator mask value */
2241 if (i == 3)
2242 /* vmid comparators[4-7] */
2243 mask = config->vmid_mask1;
2244 else
2245 mask >>= 0x8;
2246 }
2247 spin_unlock(&drvdata->spinlock);
2248 return size;
2249}
2250static DEVICE_ATTR_RW(vmid_masks);
2251
2252static ssize_t cpu_show(struct device *dev,
2253 struct device_attribute *attr, char *buf)
2254{
2255 int val;
2256 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2257
2258 val = drvdata->cpu;
2259 return scnprintf(buf, PAGE_SIZE, "%d\n", val);
2260
2261}
2262static DEVICE_ATTR_RO(cpu);
2263
2264static struct attribute *coresight_etmv4_attrs[] = {
2265 &dev_attr_nr_pe_cmp.attr,
2266 &dev_attr_nr_addr_cmp.attr,
2267 &dev_attr_nr_cntr.attr,
2268 &dev_attr_nr_ext_inp.attr,
2269 &dev_attr_numcidc.attr,
2270 &dev_attr_numvmidc.attr,
2271 &dev_attr_nrseqstate.attr,
2272 &dev_attr_nr_resource.attr,
2273 &dev_attr_nr_ss_cmp.attr,
2274 &dev_attr_reset.attr,
2275 &dev_attr_mode.attr,
2276 &dev_attr_pe.attr,
2277 &dev_attr_event.attr,
2278 &dev_attr_event_instren.attr,
2279 &dev_attr_event_ts.attr,
2280 &dev_attr_syncfreq.attr,
2281 &dev_attr_cyc_threshold.attr,
2282 &dev_attr_bb_ctrl.attr,
2283 &dev_attr_event_vinst.attr,
2284 &dev_attr_s_exlevel_vinst.attr,
2285 &dev_attr_ns_exlevel_vinst.attr,
2286 &dev_attr_addr_idx.attr,
2287 &dev_attr_addr_instdatatype.attr,
2288 &dev_attr_addr_single.attr,
2289 &dev_attr_addr_range.attr,
2290 &dev_attr_addr_start.attr,
2291 &dev_attr_addr_stop.attr,
2292 &dev_attr_addr_ctxtype.attr,
2293 &dev_attr_addr_context.attr,
2294 &dev_attr_addr_exlevel_s_ns.attr,
2295 &dev_attr_addr_cmp_view.attr,
2296 &dev_attr_vinst_pe_cmp_start_stop.attr,
2297 &dev_attr_sshot_idx.attr,
2298 &dev_attr_sshot_ctrl.attr,
2299 &dev_attr_sshot_pe_ctrl.attr,
2300 &dev_attr_sshot_status.attr,
2301 &dev_attr_seq_idx.attr,
2302 &dev_attr_seq_state.attr,
2303 &dev_attr_seq_event.attr,
2304 &dev_attr_seq_reset_event.attr,
2305 &dev_attr_cntr_idx.attr,
2306 &dev_attr_cntrldvr.attr,
2307 &dev_attr_cntr_val.attr,
2308 &dev_attr_cntr_ctrl.attr,
2309 &dev_attr_res_idx.attr,
2310 &dev_attr_res_ctrl.attr,
2311 &dev_attr_ctxid_idx.attr,
2312 &dev_attr_ctxid_pid.attr,
2313 &dev_attr_ctxid_masks.attr,
2314 &dev_attr_vmid_idx.attr,
2315 &dev_attr_vmid_val.attr,
2316 &dev_attr_vmid_masks.attr,
2317 &dev_attr_cpu.attr,
2318 NULL,
2319};
2320
2321struct etmv4_reg {
2322 struct coresight_device *csdev;
2323 u32 offset;
2324 u32 data;
2325};
2326
2327static void do_smp_cross_read(void *data)
2328{
2329 struct etmv4_reg *reg = data;
2330
2331 reg->data = etm4x_relaxed_read32(®->csdev->access, reg->offset);
2332}
2333
2334static u32 etmv4_cross_read(const struct etmv4_drvdata *drvdata, u32 offset)
2335{
2336 struct etmv4_reg reg;
2337
2338 reg.offset = offset;
2339 reg.csdev = drvdata->csdev;
2340
2341 /*
2342 * smp cross call ensures the CPU will be powered up before
2343 * accessing the ETMv4 trace core registers
2344 */
2345 smp_call_function_single(drvdata->cpu, do_smp_cross_read, ®, 1);
2346 return reg.data;
2347}
2348
2349static inline u32 coresight_etm4x_attr_to_offset(struct device_attribute *attr)
2350{
2351 struct dev_ext_attribute *eattr;
2352
2353 eattr = container_of(attr, struct dev_ext_attribute, attr);
2354 return (u32)(unsigned long)eattr->var;
2355}
2356
2357static ssize_t coresight_etm4x_reg_show(struct device *dev,
2358 struct device_attribute *d_attr,
2359 char *buf)
2360{
2361 u32 val, offset;
2362 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2363
2364 offset = coresight_etm4x_attr_to_offset(d_attr);
2365
2366 pm_runtime_get_sync(dev->parent);
2367 val = etmv4_cross_read(drvdata, offset);
2368 pm_runtime_put_sync(dev->parent);
2369
2370 return scnprintf(buf, PAGE_SIZE, "0x%x\n", val);
2371}
2372
2373static inline bool
2374etm4x_register_implemented(struct etmv4_drvdata *drvdata, u32 offset)
2375{
2376 switch (offset) {
2377 ETM_COMMON_SYSREG_LIST_CASES
2378 /*
2379 * Common registers to ETE & ETM4x accessible via system
2380 * instructions are always implemented.
2381 */
2382 return true;
2383
2384 ETM4x_ONLY_SYSREG_LIST_CASES
2385 /*
2386 * We only support etm4x and ete. So if the device is not
2387 * ETE, it must be ETMv4x.
2388 */
2389 return !etm4x_is_ete(drvdata);
2390
2391 ETM4x_MMAP_LIST_CASES
2392 /*
2393 * Registers accessible only via memory-mapped registers
2394 * must not be accessed via system instructions.
2395 * We cannot access the drvdata->csdev here, as this
2396 * function is called during the device creation, via
2397 * coresight_register() and the csdev is not initialized
2398 * until that is done. So rely on the drvdata->base to
2399 * detect if we have a memory mapped access.
2400 * Also ETE doesn't implement memory mapped access, thus
2401 * it is sufficient to check that we are using mmio.
2402 */
2403 return !!drvdata->base;
2404
2405 ETE_ONLY_SYSREG_LIST_CASES
2406 return etm4x_is_ete(drvdata);
2407 }
2408
2409 return false;
2410}
2411
2412/*
2413 * Hide the ETM4x registers that may not be available on the
2414 * hardware.
2415 * There are certain management registers unavailable via system
2416 * instructions. Make those sysfs attributes hidden on such
2417 * systems.
2418 */
2419static umode_t
2420coresight_etm4x_attr_reg_implemented(struct kobject *kobj,
2421 struct attribute *attr, int unused)
2422{
2423 struct device *dev = kobj_to_dev(kobj);
2424 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2425 struct device_attribute *d_attr;
2426 u32 offset;
2427
2428 d_attr = container_of(attr, struct device_attribute, attr);
2429 offset = coresight_etm4x_attr_to_offset(d_attr);
2430
2431 if (etm4x_register_implemented(drvdata, offset))
2432 return attr->mode;
2433 return 0;
2434}
2435
2436#define coresight_etm4x_reg(name, offset) \
2437 &((struct dev_ext_attribute[]) { \
2438 { \
2439 __ATTR(name, 0444, coresight_etm4x_reg_show, NULL), \
2440 (void *)(unsigned long)offset \
2441 } \
2442 })[0].attr.attr
2443
2444static struct attribute *coresight_etmv4_mgmt_attrs[] = {
2445 coresight_etm4x_reg(trcpdcr, TRCPDCR),
2446 coresight_etm4x_reg(trcpdsr, TRCPDSR),
2447 coresight_etm4x_reg(trclsr, TRCLSR),
2448 coresight_etm4x_reg(trcauthstatus, TRCAUTHSTATUS),
2449 coresight_etm4x_reg(trcdevid, TRCDEVID),
2450 coresight_etm4x_reg(trcdevtype, TRCDEVTYPE),
2451 coresight_etm4x_reg(trcpidr0, TRCPIDR0),
2452 coresight_etm4x_reg(trcpidr1, TRCPIDR1),
2453 coresight_etm4x_reg(trcpidr2, TRCPIDR2),
2454 coresight_etm4x_reg(trcpidr3, TRCPIDR3),
2455 coresight_etm4x_reg(trcoslsr, TRCOSLSR),
2456 coresight_etm4x_reg(trcconfig, TRCCONFIGR),
2457 coresight_etm4x_reg(trctraceid, TRCTRACEIDR),
2458 coresight_etm4x_reg(trcdevarch, TRCDEVARCH),
2459 NULL,
2460};
2461
2462static struct attribute *coresight_etmv4_trcidr_attrs[] = {
2463 coresight_etm4x_reg(trcidr0, TRCIDR0),
2464 coresight_etm4x_reg(trcidr1, TRCIDR1),
2465 coresight_etm4x_reg(trcidr2, TRCIDR2),
2466 coresight_etm4x_reg(trcidr3, TRCIDR3),
2467 coresight_etm4x_reg(trcidr4, TRCIDR4),
2468 coresight_etm4x_reg(trcidr5, TRCIDR5),
2469 /* trcidr[6,7] are reserved */
2470 coresight_etm4x_reg(trcidr8, TRCIDR8),
2471 coresight_etm4x_reg(trcidr9, TRCIDR9),
2472 coresight_etm4x_reg(trcidr10, TRCIDR10),
2473 coresight_etm4x_reg(trcidr11, TRCIDR11),
2474 coresight_etm4x_reg(trcidr12, TRCIDR12),
2475 coresight_etm4x_reg(trcidr13, TRCIDR13),
2476 NULL,
2477};
2478
2479static const struct attribute_group coresight_etmv4_group = {
2480 .attrs = coresight_etmv4_attrs,
2481};
2482
2483static const struct attribute_group coresight_etmv4_mgmt_group = {
2484 .is_visible = coresight_etm4x_attr_reg_implemented,
2485 .attrs = coresight_etmv4_mgmt_attrs,
2486 .name = "mgmt",
2487};
2488
2489static const struct attribute_group coresight_etmv4_trcidr_group = {
2490 .attrs = coresight_etmv4_trcidr_attrs,
2491 .name = "trcidr",
2492};
2493
2494const struct attribute_group *coresight_etmv4_groups[] = {
2495 &coresight_etmv4_group,
2496 &coresight_etmv4_mgmt_group,
2497 &coresight_etmv4_trcidr_group,
2498 NULL,
2499};