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1/*
2 * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
3 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
4 * Authors: Yong Zhi
5 * Mythri pk <mythripk@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#define DSS_SUBSYS_NAME "HDMI"
21
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/err.h>
25#include <linux/io.h>
26#include <linux/interrupt.h>
27#include <linux/mutex.h>
28#include <linux/delay.h>
29#include <linux/string.h>
30#include <linux/platform_device.h>
31#include <linux/pm_runtime.h>
32#include <linux/clk.h>
33#include <linux/gpio.h>
34#include <linux/regulator/consumer.h>
35#include <linux/component.h>
36#include <video/omapdss.h>
37#include <sound/omap-hdmi-audio.h>
38
39#include "hdmi4_core.h"
40#include "dss.h"
41#include "dss_features.h"
42#include "hdmi.h"
43
44static struct omap_hdmi hdmi;
45
46static int hdmi_runtime_get(void)
47{
48 int r;
49
50 DSSDBG("hdmi_runtime_get\n");
51
52 r = pm_runtime_get_sync(&hdmi.pdev->dev);
53 WARN_ON(r < 0);
54 if (r < 0)
55 return r;
56
57 return 0;
58}
59
60static void hdmi_runtime_put(void)
61{
62 int r;
63
64 DSSDBG("hdmi_runtime_put\n");
65
66 r = pm_runtime_put_sync(&hdmi.pdev->dev);
67 WARN_ON(r < 0 && r != -ENOSYS);
68}
69
70static irqreturn_t hdmi_irq_handler(int irq, void *data)
71{
72 struct hdmi_wp_data *wp = data;
73 u32 irqstatus;
74
75 irqstatus = hdmi_wp_get_irqstatus(wp);
76 hdmi_wp_set_irqstatus(wp, irqstatus);
77
78 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
79 irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
80 /*
81 * If we get both connect and disconnect interrupts at the same
82 * time, turn off the PHY, clear interrupts, and restart, which
83 * raises connect interrupt if a cable is connected, or nothing
84 * if cable is not connected.
85 */
86 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
87
88 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
89 HDMI_IRQ_LINK_DISCONNECT);
90
91 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
92 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
93 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
94 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
95 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
96 }
97
98 return IRQ_HANDLED;
99}
100
101static int hdmi_init_regulator(void)
102{
103 int r;
104 struct regulator *reg;
105
106 if (hdmi.vdda_reg != NULL)
107 return 0;
108
109 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
110
111 if (IS_ERR(reg)) {
112 if (PTR_ERR(reg) != -EPROBE_DEFER)
113 DSSERR("can't get VDDA regulator\n");
114 return PTR_ERR(reg);
115 }
116
117 if (regulator_can_change_voltage(reg)) {
118 r = regulator_set_voltage(reg, 1800000, 1800000);
119 if (r) {
120 devm_regulator_put(reg);
121 DSSWARN("can't set the regulator voltage\n");
122 return r;
123 }
124 }
125
126 hdmi.vdda_reg = reg;
127
128 return 0;
129}
130
131static int hdmi_power_on_core(struct omap_dss_device *dssdev)
132{
133 int r;
134
135 r = regulator_enable(hdmi.vdda_reg);
136 if (r)
137 return r;
138
139 r = hdmi_runtime_get();
140 if (r)
141 goto err_runtime_get;
142
143 /* Make selection of HDMI in DSS */
144 dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
145
146 hdmi.core_enabled = true;
147
148 return 0;
149
150err_runtime_get:
151 regulator_disable(hdmi.vdda_reg);
152
153 return r;
154}
155
156static void hdmi_power_off_core(struct omap_dss_device *dssdev)
157{
158 hdmi.core_enabled = false;
159
160 hdmi_runtime_put();
161 regulator_disable(hdmi.vdda_reg);
162}
163
164static int hdmi_power_on_full(struct omap_dss_device *dssdev)
165{
166 int r;
167 struct omap_video_timings *p;
168 enum omap_channel channel = dssdev->dispc_channel;
169 struct hdmi_wp_data *wp = &hdmi.wp;
170 struct dss_pll_clock_info hdmi_cinfo = { 0 };
171 unsigned pc;
172
173 r = hdmi_power_on_core(dssdev);
174 if (r)
175 return r;
176
177 /* disable and clear irqs */
178 hdmi_wp_clear_irqenable(wp, 0xffffffff);
179 hdmi_wp_set_irqstatus(wp, 0xffffffff);
180
181 p = &hdmi.cfg.timings;
182
183 DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
184
185 pc = p->pixelclock;
186 if (p->double_pixel)
187 pc *= 2;
188
189 hdmi_pll_compute(&hdmi.pll, pc, &hdmi_cinfo);
190
191 r = dss_pll_enable(&hdmi.pll.pll);
192 if (r) {
193 DSSERR("Failed to enable PLL\n");
194 goto err_pll_enable;
195 }
196
197 r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
198 if (r) {
199 DSSERR("Failed to configure PLL\n");
200 goto err_pll_cfg;
201 }
202
203 r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
204 hdmi_cinfo.clkout[0]);
205 if (r) {
206 DSSDBG("Failed to configure PHY\n");
207 goto err_phy_cfg;
208 }
209
210 r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
211 if (r)
212 goto err_phy_pwr;
213
214 hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
215
216 /* bypass TV gamma table */
217 dispc_enable_gamma_table(0);
218
219 /* tv size */
220 dss_mgr_set_timings(channel, p);
221
222 r = dss_mgr_enable(channel);
223 if (r)
224 goto err_mgr_enable;
225
226 r = hdmi_wp_video_start(&hdmi.wp);
227 if (r)
228 goto err_vid_enable;
229
230 hdmi_wp_set_irqenable(wp,
231 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
232
233 return 0;
234
235err_vid_enable:
236 dss_mgr_disable(channel);
237err_mgr_enable:
238 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
239err_phy_pwr:
240err_phy_cfg:
241err_pll_cfg:
242 dss_pll_disable(&hdmi.pll.pll);
243err_pll_enable:
244 hdmi_power_off_core(dssdev);
245 return -EIO;
246}
247
248static void hdmi_power_off_full(struct omap_dss_device *dssdev)
249{
250 enum omap_channel channel = dssdev->dispc_channel;
251
252 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
253
254 hdmi_wp_video_stop(&hdmi.wp);
255
256 dss_mgr_disable(channel);
257
258 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
259
260 dss_pll_disable(&hdmi.pll.pll);
261
262 hdmi_power_off_core(dssdev);
263}
264
265static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
266 struct omap_video_timings *timings)
267{
268 if (!dispc_mgr_timings_ok(dssdev->dispc_channel, timings))
269 return -EINVAL;
270
271 return 0;
272}
273
274static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
275 struct omap_video_timings *timings)
276{
277 mutex_lock(&hdmi.lock);
278
279 hdmi.cfg.timings = *timings;
280
281 dispc_set_tv_pclk(timings->pixelclock);
282
283 mutex_unlock(&hdmi.lock);
284}
285
286static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
287 struct omap_video_timings *timings)
288{
289 *timings = hdmi.cfg.timings;
290}
291
292static void hdmi_dump_regs(struct seq_file *s)
293{
294 mutex_lock(&hdmi.lock);
295
296 if (hdmi_runtime_get()) {
297 mutex_unlock(&hdmi.lock);
298 return;
299 }
300
301 hdmi_wp_dump(&hdmi.wp, s);
302 hdmi_pll_dump(&hdmi.pll, s);
303 hdmi_phy_dump(&hdmi.phy, s);
304 hdmi4_core_dump(&hdmi.core, s);
305
306 hdmi_runtime_put();
307 mutex_unlock(&hdmi.lock);
308}
309
310static int read_edid(u8 *buf, int len)
311{
312 int r;
313
314 mutex_lock(&hdmi.lock);
315
316 r = hdmi_runtime_get();
317 BUG_ON(r);
318
319 r = hdmi4_read_edid(&hdmi.core, buf, len);
320
321 hdmi_runtime_put();
322 mutex_unlock(&hdmi.lock);
323
324 return r;
325}
326
327static void hdmi_start_audio_stream(struct omap_hdmi *hd)
328{
329 hdmi_wp_audio_enable(&hd->wp, true);
330 hdmi4_audio_start(&hd->core, &hd->wp);
331}
332
333static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
334{
335 hdmi4_audio_stop(&hd->core, &hd->wp);
336 hdmi_wp_audio_enable(&hd->wp, false);
337}
338
339static int hdmi_display_enable(struct omap_dss_device *dssdev)
340{
341 struct omap_dss_device *out = &hdmi.output;
342 unsigned long flags;
343 int r = 0;
344
345 DSSDBG("ENTER hdmi_display_enable\n");
346
347 mutex_lock(&hdmi.lock);
348
349 if (!out->dispc_channel_connected) {
350 DSSERR("failed to enable display: no output/manager\n");
351 r = -ENODEV;
352 goto err0;
353 }
354
355 r = hdmi_power_on_full(dssdev);
356 if (r) {
357 DSSERR("failed to power on device\n");
358 goto err0;
359 }
360
361 if (hdmi.audio_configured) {
362 r = hdmi4_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,
363 hdmi.cfg.timings.pixelclock);
364 if (r) {
365 DSSERR("Error restoring audio configuration: %d", r);
366 hdmi.audio_abort_cb(&hdmi.pdev->dev);
367 hdmi.audio_configured = false;
368 }
369 }
370
371 spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
372 if (hdmi.audio_configured && hdmi.audio_playing)
373 hdmi_start_audio_stream(&hdmi);
374 hdmi.display_enabled = true;
375 spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
376
377 mutex_unlock(&hdmi.lock);
378 return 0;
379
380err0:
381 mutex_unlock(&hdmi.lock);
382 return r;
383}
384
385static void hdmi_display_disable(struct omap_dss_device *dssdev)
386{
387 unsigned long flags;
388
389 DSSDBG("Enter hdmi_display_disable\n");
390
391 mutex_lock(&hdmi.lock);
392
393 spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
394 hdmi_stop_audio_stream(&hdmi);
395 hdmi.display_enabled = false;
396 spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
397
398 hdmi_power_off_full(dssdev);
399
400 mutex_unlock(&hdmi.lock);
401}
402
403static int hdmi_core_enable(struct omap_dss_device *dssdev)
404{
405 int r = 0;
406
407 DSSDBG("ENTER omapdss_hdmi_core_enable\n");
408
409 mutex_lock(&hdmi.lock);
410
411 r = hdmi_power_on_core(dssdev);
412 if (r) {
413 DSSERR("failed to power on device\n");
414 goto err0;
415 }
416
417 mutex_unlock(&hdmi.lock);
418 return 0;
419
420err0:
421 mutex_unlock(&hdmi.lock);
422 return r;
423}
424
425static void hdmi_core_disable(struct omap_dss_device *dssdev)
426{
427 DSSDBG("Enter omapdss_hdmi_core_disable\n");
428
429 mutex_lock(&hdmi.lock);
430
431 hdmi_power_off_core(dssdev);
432
433 mutex_unlock(&hdmi.lock);
434}
435
436static int hdmi_connect(struct omap_dss_device *dssdev,
437 struct omap_dss_device *dst)
438{
439 enum omap_channel channel = dssdev->dispc_channel;
440 int r;
441
442 r = hdmi_init_regulator();
443 if (r)
444 return r;
445
446 r = dss_mgr_connect(channel, dssdev);
447 if (r)
448 return r;
449
450 r = omapdss_output_set_device(dssdev, dst);
451 if (r) {
452 DSSERR("failed to connect output to new device: %s\n",
453 dst->name);
454 dss_mgr_disconnect(channel, dssdev);
455 return r;
456 }
457
458 return 0;
459}
460
461static void hdmi_disconnect(struct omap_dss_device *dssdev,
462 struct omap_dss_device *dst)
463{
464 enum omap_channel channel = dssdev->dispc_channel;
465
466 WARN_ON(dst != dssdev->dst);
467
468 if (dst != dssdev->dst)
469 return;
470
471 omapdss_output_unset_device(dssdev);
472
473 dss_mgr_disconnect(channel, dssdev);
474}
475
476static int hdmi_read_edid(struct omap_dss_device *dssdev,
477 u8 *edid, int len)
478{
479 bool need_enable;
480 int r;
481
482 need_enable = hdmi.core_enabled == false;
483
484 if (need_enable) {
485 r = hdmi_core_enable(dssdev);
486 if (r)
487 return r;
488 }
489
490 r = read_edid(edid, len);
491
492 if (need_enable)
493 hdmi_core_disable(dssdev);
494
495 return r;
496}
497
498static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
499 const struct hdmi_avi_infoframe *avi)
500{
501 hdmi.cfg.infoframe = *avi;
502 return 0;
503}
504
505static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
506 bool hdmi_mode)
507{
508 hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
509 return 0;
510}
511
512static const struct omapdss_hdmi_ops hdmi_ops = {
513 .connect = hdmi_connect,
514 .disconnect = hdmi_disconnect,
515
516 .enable = hdmi_display_enable,
517 .disable = hdmi_display_disable,
518
519 .check_timings = hdmi_display_check_timing,
520 .set_timings = hdmi_display_set_timing,
521 .get_timings = hdmi_display_get_timings,
522
523 .read_edid = hdmi_read_edid,
524 .set_infoframe = hdmi_set_infoframe,
525 .set_hdmi_mode = hdmi_set_hdmi_mode,
526};
527
528static void hdmi_init_output(struct platform_device *pdev)
529{
530 struct omap_dss_device *out = &hdmi.output;
531
532 out->dev = &pdev->dev;
533 out->id = OMAP_DSS_OUTPUT_HDMI;
534 out->output_type = OMAP_DISPLAY_TYPE_HDMI;
535 out->name = "hdmi.0";
536 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
537 out->ops.hdmi = &hdmi_ops;
538 out->owner = THIS_MODULE;
539
540 omapdss_register_output(out);
541}
542
543static void hdmi_uninit_output(struct platform_device *pdev)
544{
545 struct omap_dss_device *out = &hdmi.output;
546
547 omapdss_unregister_output(out);
548}
549
550static int hdmi_probe_of(struct platform_device *pdev)
551{
552 struct device_node *node = pdev->dev.of_node;
553 struct device_node *ep;
554 int r;
555
556 ep = omapdss_of_get_first_endpoint(node);
557 if (!ep)
558 return 0;
559
560 r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
561 if (r)
562 goto err;
563
564 of_node_put(ep);
565 return 0;
566
567err:
568 of_node_put(ep);
569 return r;
570}
571
572/* Audio callbacks */
573static int hdmi_audio_startup(struct device *dev,
574 void (*abort_cb)(struct device *dev))
575{
576 struct omap_hdmi *hd = dev_get_drvdata(dev);
577 int ret = 0;
578
579 mutex_lock(&hd->lock);
580
581 if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
582 ret = -EPERM;
583 goto out;
584 }
585
586 hd->audio_abort_cb = abort_cb;
587
588out:
589 mutex_unlock(&hd->lock);
590
591 return ret;
592}
593
594static int hdmi_audio_shutdown(struct device *dev)
595{
596 struct omap_hdmi *hd = dev_get_drvdata(dev);
597
598 mutex_lock(&hd->lock);
599 hd->audio_abort_cb = NULL;
600 hd->audio_configured = false;
601 hd->audio_playing = false;
602 mutex_unlock(&hd->lock);
603
604 return 0;
605}
606
607static int hdmi_audio_start(struct device *dev)
608{
609 struct omap_hdmi *hd = dev_get_drvdata(dev);
610 unsigned long flags;
611
612 WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
613
614 spin_lock_irqsave(&hd->audio_playing_lock, flags);
615
616 if (hd->display_enabled)
617 hdmi_start_audio_stream(hd);
618 hd->audio_playing = true;
619
620 spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
621 return 0;
622}
623
624static void hdmi_audio_stop(struct device *dev)
625{
626 struct omap_hdmi *hd = dev_get_drvdata(dev);
627 unsigned long flags;
628
629 WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
630
631 spin_lock_irqsave(&hd->audio_playing_lock, flags);
632
633 if (hd->display_enabled)
634 hdmi_stop_audio_stream(hd);
635 hd->audio_playing = false;
636
637 spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
638}
639
640static int hdmi_audio_config(struct device *dev,
641 struct omap_dss_audio *dss_audio)
642{
643 struct omap_hdmi *hd = dev_get_drvdata(dev);
644 int ret;
645
646 mutex_lock(&hd->lock);
647
648 if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
649 ret = -EPERM;
650 goto out;
651 }
652
653 ret = hdmi4_audio_config(&hd->core, &hd->wp, dss_audio,
654 hd->cfg.timings.pixelclock);
655 if (!ret) {
656 hd->audio_configured = true;
657 hd->audio_config = *dss_audio;
658 }
659out:
660 mutex_unlock(&hd->lock);
661
662 return ret;
663}
664
665static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
666 .audio_startup = hdmi_audio_startup,
667 .audio_shutdown = hdmi_audio_shutdown,
668 .audio_start = hdmi_audio_start,
669 .audio_stop = hdmi_audio_stop,
670 .audio_config = hdmi_audio_config,
671};
672
673static int hdmi_audio_register(struct device *dev)
674{
675 struct omap_hdmi_audio_pdata pdata = {
676 .dev = dev,
677 .dss_version = omapdss_get_version(),
678 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
679 .ops = &hdmi_audio_ops,
680 };
681
682 hdmi.audio_pdev = platform_device_register_data(
683 dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
684 &pdata, sizeof(pdata));
685
686 if (IS_ERR(hdmi.audio_pdev))
687 return PTR_ERR(hdmi.audio_pdev);
688
689 return 0;
690}
691
692/* HDMI HW IP initialisation */
693static int hdmi4_bind(struct device *dev, struct device *master, void *data)
694{
695 struct platform_device *pdev = to_platform_device(dev);
696 int r;
697 int irq;
698
699 hdmi.pdev = pdev;
700 dev_set_drvdata(&pdev->dev, &hdmi);
701
702 mutex_init(&hdmi.lock);
703 spin_lock_init(&hdmi.audio_playing_lock);
704
705 if (pdev->dev.of_node) {
706 r = hdmi_probe_of(pdev);
707 if (r)
708 return r;
709 }
710
711 r = hdmi_wp_init(pdev, &hdmi.wp);
712 if (r)
713 return r;
714
715 r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
716 if (r)
717 return r;
718
719 r = hdmi_phy_init(pdev, &hdmi.phy);
720 if (r)
721 goto err;
722
723 r = hdmi4_core_init(pdev, &hdmi.core);
724 if (r)
725 goto err;
726
727 irq = platform_get_irq(pdev, 0);
728 if (irq < 0) {
729 DSSERR("platform_get_irq failed\n");
730 r = -ENODEV;
731 goto err;
732 }
733
734 r = devm_request_threaded_irq(&pdev->dev, irq,
735 NULL, hdmi_irq_handler,
736 IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
737 if (r) {
738 DSSERR("HDMI IRQ request failed\n");
739 goto err;
740 }
741
742 pm_runtime_enable(&pdev->dev);
743
744 hdmi_init_output(pdev);
745
746 r = hdmi_audio_register(&pdev->dev);
747 if (r) {
748 DSSERR("Registering HDMI audio failed\n");
749 hdmi_uninit_output(pdev);
750 pm_runtime_disable(&pdev->dev);
751 return r;
752 }
753
754 dss_debugfs_create_file("hdmi", hdmi_dump_regs);
755
756 return 0;
757err:
758 hdmi_pll_uninit(&hdmi.pll);
759 return r;
760}
761
762static void hdmi4_unbind(struct device *dev, struct device *master, void *data)
763{
764 struct platform_device *pdev = to_platform_device(dev);
765
766 if (hdmi.audio_pdev)
767 platform_device_unregister(hdmi.audio_pdev);
768
769 hdmi_uninit_output(pdev);
770
771 hdmi_pll_uninit(&hdmi.pll);
772
773 pm_runtime_disable(&pdev->dev);
774}
775
776static const struct component_ops hdmi4_component_ops = {
777 .bind = hdmi4_bind,
778 .unbind = hdmi4_unbind,
779};
780
781static int hdmi4_probe(struct platform_device *pdev)
782{
783 return component_add(&pdev->dev, &hdmi4_component_ops);
784}
785
786static int hdmi4_remove(struct platform_device *pdev)
787{
788 component_del(&pdev->dev, &hdmi4_component_ops);
789 return 0;
790}
791
792static int hdmi_runtime_suspend(struct device *dev)
793{
794 dispc_runtime_put();
795
796 return 0;
797}
798
799static int hdmi_runtime_resume(struct device *dev)
800{
801 int r;
802
803 r = dispc_runtime_get();
804 if (r < 0)
805 return r;
806
807 return 0;
808}
809
810static const struct dev_pm_ops hdmi_pm_ops = {
811 .runtime_suspend = hdmi_runtime_suspend,
812 .runtime_resume = hdmi_runtime_resume,
813};
814
815static const struct of_device_id hdmi_of_match[] = {
816 { .compatible = "ti,omap4-hdmi", },
817 {},
818};
819
820static struct platform_driver omapdss_hdmihw_driver = {
821 .probe = hdmi4_probe,
822 .remove = hdmi4_remove,
823 .driver = {
824 .name = "omapdss_hdmi",
825 .pm = &hdmi_pm_ops,
826 .of_match_table = hdmi_of_match,
827 .suppress_bind_attrs = true,
828 },
829};
830
831int __init hdmi4_init_platform_driver(void)
832{
833 return platform_driver_register(&omapdss_hdmihw_driver);
834}
835
836void hdmi4_uninit_platform_driver(void)
837{
838 platform_driver_unregister(&omapdss_hdmihw_driver);
839}
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
4 *
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
6 * Authors: Yong Zhi
7 * Mythri pk <mythripk@ti.com>
8 */
9
10#define DSS_SUBSYS_NAME "HDMI"
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/err.h>
15#include <linux/io.h>
16#include <linux/interrupt.h>
17#include <linux/mutex.h>
18#include <linux/delay.h>
19#include <linux/string.h>
20#include <linux/platform_device.h>
21#include <linux/pm_runtime.h>
22#include <linux/clk.h>
23#include <linux/regulator/consumer.h>
24#include <linux/component.h>
25#include <linux/of.h>
26#include <linux/of_graph.h>
27#include <sound/omap-hdmi-audio.h>
28#include <media/cec.h>
29
30#include <drm/drm_atomic.h>
31#include <drm/drm_atomic_state_helper.h>
32
33#include "omapdss.h"
34#include "hdmi4_core.h"
35#include "hdmi4_cec.h"
36#include "dss.h"
37#include "hdmi.h"
38
39static int hdmi_runtime_get(struct omap_hdmi *hdmi)
40{
41 int r;
42
43 DSSDBG("hdmi_runtime_get\n");
44
45 r = pm_runtime_get_sync(&hdmi->pdev->dev);
46 if (WARN_ON(r < 0)) {
47 pm_runtime_put_noidle(&hdmi->pdev->dev);
48 return r;
49 }
50 return 0;
51}
52
53static void hdmi_runtime_put(struct omap_hdmi *hdmi)
54{
55 int r;
56
57 DSSDBG("hdmi_runtime_put\n");
58
59 r = pm_runtime_put_sync(&hdmi->pdev->dev);
60 WARN_ON(r < 0 && r != -ENOSYS);
61}
62
63static irqreturn_t hdmi_irq_handler(int irq, void *data)
64{
65 struct omap_hdmi *hdmi = data;
66 struct hdmi_wp_data *wp = &hdmi->wp;
67 u32 irqstatus;
68
69 irqstatus = hdmi_wp_get_irqstatus(wp);
70 hdmi_wp_set_irqstatus(wp, irqstatus);
71
72 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
73 irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
74 /*
75 * If we get both connect and disconnect interrupts at the same
76 * time, turn off the PHY, clear interrupts, and restart, which
77 * raises connect interrupt if a cable is connected, or nothing
78 * if cable is not connected.
79 */
80 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
81
82 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
83 HDMI_IRQ_LINK_DISCONNECT);
84
85 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
86 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
87 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
88 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
89 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
90 }
91 if (irqstatus & HDMI_IRQ_CORE) {
92 u32 intr4 = hdmi_read_reg(hdmi->core.base, HDMI_CORE_SYS_INTR4);
93
94 hdmi_write_reg(hdmi->core.base, HDMI_CORE_SYS_INTR4, intr4);
95 if (intr4 & 8)
96 hdmi4_cec_irq(&hdmi->core);
97 }
98
99 return IRQ_HANDLED;
100}
101
102static int hdmi_power_on_core(struct omap_hdmi *hdmi)
103{
104 int r;
105
106 if (hdmi->core.core_pwr_cnt++)
107 return 0;
108
109 r = regulator_enable(hdmi->vdda_reg);
110 if (r)
111 goto err_reg_enable;
112
113 r = hdmi_runtime_get(hdmi);
114 if (r)
115 goto err_runtime_get;
116
117 hdmi4_core_powerdown_disable(&hdmi->core);
118
119 /* Make selection of HDMI in DSS */
120 dss_select_hdmi_venc_clk_source(hdmi->dss, DSS_HDMI_M_PCLK);
121
122 hdmi->core_enabled = true;
123
124 return 0;
125
126err_runtime_get:
127 regulator_disable(hdmi->vdda_reg);
128err_reg_enable:
129 hdmi->core.core_pwr_cnt--;
130
131 return r;
132}
133
134static void hdmi_power_off_core(struct omap_hdmi *hdmi)
135{
136 if (--hdmi->core.core_pwr_cnt)
137 return;
138
139 hdmi->core_enabled = false;
140
141 hdmi_runtime_put(hdmi);
142 regulator_disable(hdmi->vdda_reg);
143}
144
145static int hdmi_power_on_full(struct omap_hdmi *hdmi)
146{
147 int r;
148 const struct videomode *vm;
149 struct hdmi_wp_data *wp = &hdmi->wp;
150 struct dss_pll_clock_info hdmi_cinfo = { 0 };
151 unsigned int pc;
152
153 r = hdmi_power_on_core(hdmi);
154 if (r)
155 return r;
156
157 /* disable and clear irqs */
158 hdmi_wp_clear_irqenable(wp, ~HDMI_IRQ_CORE);
159 hdmi_wp_set_irqstatus(wp, ~HDMI_IRQ_CORE);
160
161 vm = &hdmi->cfg.vm;
162
163 DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive,
164 vm->vactive);
165
166 pc = vm->pixelclock;
167 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
168 pc *= 2;
169
170 /* DSS_HDMI_TCLK is bitclk / 10 */
171 pc *= 10;
172
173 dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin),
174 pc, &hdmi_cinfo);
175
176 r = dss_pll_enable(&hdmi->pll.pll);
177 if (r) {
178 DSSERR("Failed to enable PLL\n");
179 goto err_pll_enable;
180 }
181
182 r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo);
183 if (r) {
184 DSSERR("Failed to configure PLL\n");
185 goto err_pll_cfg;
186 }
187
188 r = hdmi_phy_configure(&hdmi->phy, hdmi_cinfo.clkdco,
189 hdmi_cinfo.clkout[0]);
190 if (r) {
191 DSSDBG("Failed to configure PHY\n");
192 goto err_phy_cfg;
193 }
194
195 r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
196 if (r)
197 goto err_phy_pwr;
198
199 hdmi4_configure(&hdmi->core, &hdmi->wp, &hdmi->cfg);
200
201 r = dss_mgr_enable(&hdmi->output);
202 if (r)
203 goto err_mgr_enable;
204
205 r = hdmi_wp_video_start(&hdmi->wp);
206 if (r)
207 goto err_vid_enable;
208
209 hdmi_wp_set_irqenable(wp,
210 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
211
212 return 0;
213
214err_vid_enable:
215 dss_mgr_disable(&hdmi->output);
216err_mgr_enable:
217 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
218err_phy_pwr:
219err_phy_cfg:
220err_pll_cfg:
221 dss_pll_disable(&hdmi->pll.pll);
222err_pll_enable:
223 hdmi_power_off_core(hdmi);
224 return -EIO;
225}
226
227static void hdmi_power_off_full(struct omap_hdmi *hdmi)
228{
229 hdmi_wp_clear_irqenable(&hdmi->wp, ~HDMI_IRQ_CORE);
230
231 hdmi_wp_video_stop(&hdmi->wp);
232
233 dss_mgr_disable(&hdmi->output);
234
235 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
236
237 dss_pll_disable(&hdmi->pll.pll);
238
239 hdmi_power_off_core(hdmi);
240}
241
242static int hdmi_dump_regs(struct seq_file *s, void *p)
243{
244 struct omap_hdmi *hdmi = s->private;
245
246 mutex_lock(&hdmi->lock);
247
248 if (hdmi_runtime_get(hdmi)) {
249 mutex_unlock(&hdmi->lock);
250 return 0;
251 }
252
253 hdmi_wp_dump(&hdmi->wp, s);
254 hdmi_pll_dump(&hdmi->pll, s);
255 hdmi_phy_dump(&hdmi->phy, s);
256 hdmi4_core_dump(&hdmi->core, s);
257
258 hdmi_runtime_put(hdmi);
259 mutex_unlock(&hdmi->lock);
260 return 0;
261}
262
263static void hdmi_start_audio_stream(struct omap_hdmi *hd)
264{
265 hdmi_wp_audio_enable(&hd->wp, true);
266 hdmi4_audio_start(&hd->core, &hd->wp);
267}
268
269static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
270{
271 hdmi4_audio_stop(&hd->core, &hd->wp);
272 hdmi_wp_audio_enable(&hd->wp, false);
273}
274
275int hdmi4_core_enable(struct hdmi_core_data *core)
276{
277 struct omap_hdmi *hdmi = container_of(core, struct omap_hdmi, core);
278 int r = 0;
279
280 DSSDBG("ENTER omapdss_hdmi4_core_enable\n");
281
282 mutex_lock(&hdmi->lock);
283
284 r = hdmi_power_on_core(hdmi);
285 if (r) {
286 DSSERR("failed to power on device\n");
287 goto err0;
288 }
289
290 mutex_unlock(&hdmi->lock);
291 return 0;
292
293err0:
294 mutex_unlock(&hdmi->lock);
295 return r;
296}
297
298void hdmi4_core_disable(struct hdmi_core_data *core)
299{
300 struct omap_hdmi *hdmi = container_of(core, struct omap_hdmi, core);
301
302 DSSDBG("Enter omapdss_hdmi4_core_disable\n");
303
304 mutex_lock(&hdmi->lock);
305
306 hdmi_power_off_core(hdmi);
307
308 mutex_unlock(&hdmi->lock);
309}
310
311/* -----------------------------------------------------------------------------
312 * DRM Bridge Operations
313 */
314
315static int hdmi4_bridge_attach(struct drm_bridge *bridge,
316 enum drm_bridge_attach_flags flags)
317{
318 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
319
320 if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR))
321 return -EINVAL;
322
323 return drm_bridge_attach(bridge->encoder, hdmi->output.next_bridge,
324 bridge, flags);
325}
326
327static void hdmi4_bridge_mode_set(struct drm_bridge *bridge,
328 const struct drm_display_mode *mode,
329 const struct drm_display_mode *adjusted_mode)
330{
331 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
332
333 mutex_lock(&hdmi->lock);
334
335 drm_display_mode_to_videomode(adjusted_mode, &hdmi->cfg.vm);
336
337 dispc_set_tv_pclk(hdmi->dss->dispc, adjusted_mode->clock * 1000);
338
339 mutex_unlock(&hdmi->lock);
340}
341
342static void hdmi4_bridge_enable(struct drm_bridge *bridge,
343 struct drm_bridge_state *bridge_state)
344{
345 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
346 struct drm_atomic_state *state = bridge_state->base.state;
347 struct drm_connector_state *conn_state;
348 struct drm_connector *connector;
349 struct drm_crtc_state *crtc_state;
350 unsigned long flags;
351 int ret;
352
353 /*
354 * None of these should fail, as the bridge can't be enabled without a
355 * valid CRTC to connector path with fully populated new states.
356 */
357 connector = drm_atomic_get_new_connector_for_encoder(state,
358 bridge->encoder);
359 if (WARN_ON(!connector))
360 return;
361 conn_state = drm_atomic_get_new_connector_state(state, connector);
362 if (WARN_ON(!conn_state))
363 return;
364 crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
365 if (WARN_ON(!crtc_state))
366 return;
367
368 hdmi->cfg.hdmi_dvi_mode = connector->display_info.is_hdmi
369 ? HDMI_HDMI : HDMI_DVI;
370
371 if (connector->display_info.is_hdmi) {
372 const struct drm_display_mode *mode;
373 struct hdmi_avi_infoframe avi;
374
375 mode = &crtc_state->adjusted_mode;
376 ret = drm_hdmi_avi_infoframe_from_display_mode(&avi, connector,
377 mode);
378 if (ret == 0)
379 hdmi->cfg.infoframe = avi;
380 }
381
382 mutex_lock(&hdmi->lock);
383
384 ret = hdmi_power_on_full(hdmi);
385 if (ret) {
386 DSSERR("failed to power on device\n");
387 goto done;
388 }
389
390 if (hdmi->audio_configured) {
391 ret = hdmi4_audio_config(&hdmi->core, &hdmi->wp,
392 &hdmi->audio_config,
393 hdmi->cfg.vm.pixelclock);
394 if (ret) {
395 DSSERR("Error restoring audio configuration: %d", ret);
396 hdmi->audio_abort_cb(&hdmi->pdev->dev);
397 hdmi->audio_configured = false;
398 }
399 }
400
401 spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
402 if (hdmi->audio_configured && hdmi->audio_playing)
403 hdmi_start_audio_stream(hdmi);
404 hdmi->display_enabled = true;
405 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
406
407done:
408 mutex_unlock(&hdmi->lock);
409}
410
411static void hdmi4_bridge_disable(struct drm_bridge *bridge,
412 struct drm_bridge_state *bridge_state)
413{
414 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
415 unsigned long flags;
416
417 mutex_lock(&hdmi->lock);
418
419 spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
420 hdmi_stop_audio_stream(hdmi);
421 hdmi->display_enabled = false;
422 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
423
424 hdmi_power_off_full(hdmi);
425
426 mutex_unlock(&hdmi->lock);
427}
428
429static void hdmi4_bridge_hpd_notify(struct drm_bridge *bridge,
430 enum drm_connector_status status)
431{
432 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
433
434 if (status == connector_status_disconnected)
435 hdmi4_cec_set_phys_addr(&hdmi->core, CEC_PHYS_ADDR_INVALID);
436}
437
438static struct edid *hdmi4_bridge_get_edid(struct drm_bridge *bridge,
439 struct drm_connector *connector)
440{
441 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
442 struct edid *edid = NULL;
443 unsigned int cec_addr;
444 bool need_enable;
445 int r;
446
447 need_enable = hdmi->core_enabled == false;
448
449 if (need_enable) {
450 r = hdmi4_core_enable(&hdmi->core);
451 if (r)
452 return NULL;
453 }
454
455 mutex_lock(&hdmi->lock);
456 r = hdmi_runtime_get(hdmi);
457 BUG_ON(r);
458
459 r = hdmi4_core_ddc_init(&hdmi->core);
460 if (r)
461 goto done;
462
463 edid = drm_do_get_edid(connector, hdmi4_core_ddc_read, &hdmi->core);
464
465done:
466 hdmi_runtime_put(hdmi);
467 mutex_unlock(&hdmi->lock);
468
469 if (edid && edid->extensions) {
470 unsigned int len = (edid->extensions + 1) * EDID_LENGTH;
471
472 cec_addr = cec_get_edid_phys_addr((u8 *)edid, len, NULL);
473 } else {
474 cec_addr = CEC_PHYS_ADDR_INVALID;
475 }
476
477 hdmi4_cec_set_phys_addr(&hdmi->core, cec_addr);
478
479 if (need_enable)
480 hdmi4_core_disable(&hdmi->core);
481
482 return edid;
483}
484
485static const struct drm_bridge_funcs hdmi4_bridge_funcs = {
486 .attach = hdmi4_bridge_attach,
487 .mode_set = hdmi4_bridge_mode_set,
488 .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
489 .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
490 .atomic_reset = drm_atomic_helper_bridge_reset,
491 .atomic_enable = hdmi4_bridge_enable,
492 .atomic_disable = hdmi4_bridge_disable,
493 .hpd_notify = hdmi4_bridge_hpd_notify,
494 .get_edid = hdmi4_bridge_get_edid,
495};
496
497static void hdmi4_bridge_init(struct omap_hdmi *hdmi)
498{
499 hdmi->bridge.funcs = &hdmi4_bridge_funcs;
500 hdmi->bridge.of_node = hdmi->pdev->dev.of_node;
501 hdmi->bridge.ops = DRM_BRIDGE_OP_EDID;
502 hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
503
504 drm_bridge_add(&hdmi->bridge);
505}
506
507static void hdmi4_bridge_cleanup(struct omap_hdmi *hdmi)
508{
509 drm_bridge_remove(&hdmi->bridge);
510}
511
512/* -----------------------------------------------------------------------------
513 * Audio Callbacks
514 */
515
516static int hdmi_audio_startup(struct device *dev,
517 void (*abort_cb)(struct device *dev))
518{
519 struct omap_hdmi *hd = dev_get_drvdata(dev);
520
521 mutex_lock(&hd->lock);
522
523 WARN_ON(hd->audio_abort_cb != NULL);
524
525 hd->audio_abort_cb = abort_cb;
526
527 mutex_unlock(&hd->lock);
528
529 return 0;
530}
531
532static int hdmi_audio_shutdown(struct device *dev)
533{
534 struct omap_hdmi *hd = dev_get_drvdata(dev);
535
536 mutex_lock(&hd->lock);
537 hd->audio_abort_cb = NULL;
538 hd->audio_configured = false;
539 hd->audio_playing = false;
540 mutex_unlock(&hd->lock);
541
542 return 0;
543}
544
545static int hdmi_audio_start(struct device *dev)
546{
547 struct omap_hdmi *hd = dev_get_drvdata(dev);
548 unsigned long flags;
549
550 spin_lock_irqsave(&hd->audio_playing_lock, flags);
551
552 if (hd->display_enabled) {
553 if (!hdmi_mode_has_audio(&hd->cfg))
554 DSSERR("%s: Video mode does not support audio\n",
555 __func__);
556 hdmi_start_audio_stream(hd);
557 }
558 hd->audio_playing = true;
559
560 spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
561 return 0;
562}
563
564static void hdmi_audio_stop(struct device *dev)
565{
566 struct omap_hdmi *hd = dev_get_drvdata(dev);
567 unsigned long flags;
568
569 WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
570
571 spin_lock_irqsave(&hd->audio_playing_lock, flags);
572
573 if (hd->display_enabled)
574 hdmi_stop_audio_stream(hd);
575 hd->audio_playing = false;
576
577 spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
578}
579
580static int hdmi_audio_config(struct device *dev,
581 struct omap_dss_audio *dss_audio)
582{
583 struct omap_hdmi *hd = dev_get_drvdata(dev);
584 int ret = 0;
585
586 mutex_lock(&hd->lock);
587
588 if (hd->display_enabled) {
589 ret = hdmi4_audio_config(&hd->core, &hd->wp, dss_audio,
590 hd->cfg.vm.pixelclock);
591 if (ret)
592 goto out;
593 }
594
595 hd->audio_configured = true;
596 hd->audio_config = *dss_audio;
597out:
598 mutex_unlock(&hd->lock);
599
600 return ret;
601}
602
603static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
604 .audio_startup = hdmi_audio_startup,
605 .audio_shutdown = hdmi_audio_shutdown,
606 .audio_start = hdmi_audio_start,
607 .audio_stop = hdmi_audio_stop,
608 .audio_config = hdmi_audio_config,
609};
610
611static int hdmi_audio_register(struct omap_hdmi *hdmi)
612{
613 struct omap_hdmi_audio_pdata pdata = {
614 .dev = &hdmi->pdev->dev,
615 .version = 4,
616 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi->wp),
617 .ops = &hdmi_audio_ops,
618 };
619
620 hdmi->audio_pdev = platform_device_register_data(
621 &hdmi->pdev->dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
622 &pdata, sizeof(pdata));
623
624 if (IS_ERR(hdmi->audio_pdev))
625 return PTR_ERR(hdmi->audio_pdev);
626
627 return 0;
628}
629
630/* -----------------------------------------------------------------------------
631 * Component Bind & Unbind
632 */
633
634static int hdmi4_bind(struct device *dev, struct device *master, void *data)
635{
636 struct dss_device *dss = dss_get_device(master);
637 struct omap_hdmi *hdmi = dev_get_drvdata(dev);
638 int r;
639
640 hdmi->dss = dss;
641
642 r = hdmi_runtime_get(hdmi);
643 if (r)
644 return r;
645
646 r = hdmi_pll_init(dss, hdmi->pdev, &hdmi->pll, &hdmi->wp);
647 if (r)
648 goto err_runtime_put;
649
650 r = hdmi4_cec_init(hdmi->pdev, &hdmi->core, &hdmi->wp);
651 if (r)
652 goto err_pll_uninit;
653
654 r = hdmi_audio_register(hdmi);
655 if (r) {
656 DSSERR("Registering HDMI audio failed\n");
657 goto err_cec_uninit;
658 }
659
660 hdmi->debugfs = dss_debugfs_create_file(dss, "hdmi", hdmi_dump_regs,
661 hdmi);
662
663 hdmi_runtime_put(hdmi);
664
665 return 0;
666
667err_cec_uninit:
668 hdmi4_cec_uninit(&hdmi->core);
669err_pll_uninit:
670 hdmi_pll_uninit(&hdmi->pll);
671err_runtime_put:
672 hdmi_runtime_put(hdmi);
673 return r;
674}
675
676static void hdmi4_unbind(struct device *dev, struct device *master, void *data)
677{
678 struct omap_hdmi *hdmi = dev_get_drvdata(dev);
679
680 dss_debugfs_remove_file(hdmi->debugfs);
681
682 if (hdmi->audio_pdev)
683 platform_device_unregister(hdmi->audio_pdev);
684
685 hdmi4_cec_uninit(&hdmi->core);
686 hdmi_pll_uninit(&hdmi->pll);
687}
688
689static const struct component_ops hdmi4_component_ops = {
690 .bind = hdmi4_bind,
691 .unbind = hdmi4_unbind,
692};
693
694/* -----------------------------------------------------------------------------
695 * Probe & Remove, Suspend & Resume
696 */
697
698static int hdmi4_init_output(struct omap_hdmi *hdmi)
699{
700 struct omap_dss_device *out = &hdmi->output;
701 int r;
702
703 hdmi4_bridge_init(hdmi);
704
705 out->dev = &hdmi->pdev->dev;
706 out->id = OMAP_DSS_OUTPUT_HDMI;
707 out->type = OMAP_DISPLAY_TYPE_HDMI;
708 out->name = "hdmi.0";
709 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
710 out->of_port = 0;
711
712 r = omapdss_device_init_output(out, &hdmi->bridge);
713 if (r < 0) {
714 hdmi4_bridge_cleanup(hdmi);
715 return r;
716 }
717
718 omapdss_device_register(out);
719
720 return 0;
721}
722
723static void hdmi4_uninit_output(struct omap_hdmi *hdmi)
724{
725 struct omap_dss_device *out = &hdmi->output;
726
727 omapdss_device_unregister(out);
728 omapdss_device_cleanup_output(out);
729
730 hdmi4_bridge_cleanup(hdmi);
731}
732
733static int hdmi4_probe_of(struct omap_hdmi *hdmi)
734{
735 struct platform_device *pdev = hdmi->pdev;
736 struct device_node *node = pdev->dev.of_node;
737 struct device_node *ep;
738 int r;
739
740 ep = of_graph_get_endpoint_by_regs(node, 0, 0);
741 if (!ep)
742 return 0;
743
744 r = hdmi_parse_lanes_of(pdev, ep, &hdmi->phy);
745 of_node_put(ep);
746 return r;
747}
748
749static int hdmi4_probe(struct platform_device *pdev)
750{
751 struct omap_hdmi *hdmi;
752 int irq;
753 int r;
754
755 hdmi = kzalloc(sizeof(*hdmi), GFP_KERNEL);
756 if (!hdmi)
757 return -ENOMEM;
758
759 hdmi->pdev = pdev;
760
761 dev_set_drvdata(&pdev->dev, hdmi);
762
763 mutex_init(&hdmi->lock);
764 spin_lock_init(&hdmi->audio_playing_lock);
765
766 r = hdmi4_probe_of(hdmi);
767 if (r)
768 goto err_free;
769
770 r = hdmi_wp_init(pdev, &hdmi->wp, 4);
771 if (r)
772 goto err_free;
773
774 r = hdmi_phy_init(pdev, &hdmi->phy, 4);
775 if (r)
776 goto err_free;
777
778 r = hdmi4_core_init(pdev, &hdmi->core);
779 if (r)
780 goto err_free;
781
782 irq = platform_get_irq(pdev, 0);
783 if (irq < 0) {
784 DSSERR("platform_get_irq failed\n");
785 r = -ENODEV;
786 goto err_free;
787 }
788
789 r = devm_request_threaded_irq(&pdev->dev, irq,
790 NULL, hdmi_irq_handler,
791 IRQF_ONESHOT, "OMAP HDMI", hdmi);
792 if (r) {
793 DSSERR("HDMI IRQ request failed\n");
794 goto err_free;
795 }
796
797 hdmi->vdda_reg = devm_regulator_get(&pdev->dev, "vdda");
798 if (IS_ERR(hdmi->vdda_reg)) {
799 r = PTR_ERR(hdmi->vdda_reg);
800 if (r != -EPROBE_DEFER)
801 DSSERR("can't get VDDA regulator\n");
802 goto err_free;
803 }
804
805 pm_runtime_enable(&pdev->dev);
806
807 r = hdmi4_init_output(hdmi);
808 if (r)
809 goto err_pm_disable;
810
811 r = component_add(&pdev->dev, &hdmi4_component_ops);
812 if (r)
813 goto err_uninit_output;
814
815 return 0;
816
817err_uninit_output:
818 hdmi4_uninit_output(hdmi);
819err_pm_disable:
820 pm_runtime_disable(&pdev->dev);
821err_free:
822 kfree(hdmi);
823 return r;
824}
825
826static int hdmi4_remove(struct platform_device *pdev)
827{
828 struct omap_hdmi *hdmi = platform_get_drvdata(pdev);
829
830 component_del(&pdev->dev, &hdmi4_component_ops);
831
832 hdmi4_uninit_output(hdmi);
833
834 pm_runtime_disable(&pdev->dev);
835
836 kfree(hdmi);
837 return 0;
838}
839
840static const struct of_device_id hdmi_of_match[] = {
841 { .compatible = "ti,omap4-hdmi", },
842 {},
843};
844
845struct platform_driver omapdss_hdmi4hw_driver = {
846 .probe = hdmi4_probe,
847 .remove = hdmi4_remove,
848 .driver = {
849 .name = "omapdss_hdmi",
850 .of_match_table = hdmi_of_match,
851 .suppress_bind_attrs = true,
852 },
853};