1/*
 2 * Copyright (c) 2015, Linaro Limited
 3 *
 4 * This software is licensed under the terms of the GNU General Public
 5 * License version 2, as published by the Free Software Foundation, and
 6 * may be copied, distributed, and modified under those terms.
 7 *
 8 * This program is distributed in the hope that it will be useful,
 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11 * GNU General Public License for more details.
12 *
13 */
14#include <linux/linkage.h>
 
15
 
16#include <asm/opcodes-sec.h>
17#include <asm/opcodes-virt.h>
18#include <asm/unwind.h>
19
20	/*
21	 * Wrap c macros in asm macros to delay expansion until after the
22	 * SMCCC asm macro is expanded.
23	 */
24	.macro SMCCC_SMC
25	__SMC(0)
26	.endm
27
28	.macro SMCCC_HVC
29	__HVC(0)
30	.endm
31
32	.macro SMCCC instr
33UNWIND(	.fnstart)
34	mov	r12, sp
35	push	{r4-r7}
36UNWIND(	.save	{r4-r7})
37	ldm	r12, {r4-r7}
38	\instr
39	pop	{r4-r7}
 
 
 
 
 
 
 
40	ldr	r12, [sp, #(4 * 4)]
41	stm	r12, {r0-r3}
42	bx	lr
43UNWIND(	.fnend)
44	.endm
45
46/*
47 * void smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2,
48 *		  unsigned long a3, unsigned long a4, unsigned long a5,
49 *		  unsigned long a6, unsigned long a7, struct arm_smccc_res *res)
 
50 */
51ENTRY(arm_smccc_smc)
52	SMCCC SMCCC_SMC
53ENDPROC(arm_smccc_smc)
54
55/*
56 * void smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2,
57 *		  unsigned long a3, unsigned long a4, unsigned long a5,
58 *		  unsigned long a6, unsigned long a7, struct arm_smccc_res *res)
 
59 */
60ENTRY(arm_smccc_hvc)
61	SMCCC SMCCC_HVC
62ENDPROC(arm_smccc_hvc)

 1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 * Copyright (c) 2015, Linaro Limited
 
 
 
 
 
 
 
 
 
 
 4 */
 5#include <linux/linkage.h>
 6#include <linux/arm-smccc.h>
 7
 8#include <asm/asm-offsets.h>
 9#include <asm/opcodes-sec.h>
10#include <asm/opcodes-virt.h>
11#include <asm/unwind.h>
12
13	/*
14	 * Wrap c macros in asm macros to delay expansion until after the
15	 * SMCCC asm macro is expanded.
16	 */
17	.macro SMCCC_SMC
18	__SMC(0)
19	.endm
20
21	.macro SMCCC_HVC
22	__HVC(0)
23	.endm
24
25	.macro SMCCC instr
26UNWIND(	.fnstart)
27	mov	r12, sp
28	push	{r4-r7}
29UNWIND(	.save	{r4-r7})
30	ldm	r12, {r4-r7}
31	\instr
32	ldr	r4, [sp, #36]
33	cmp	r4, #0
34	beq	1f			// No quirk structure
35	ldr     r5, [r4, #ARM_SMCCC_QUIRK_ID_OFFS]
36	cmp     r5, #ARM_SMCCC_QUIRK_QCOM_A6
37	bne	1f			// No quirk present
38	str	r6, [r4, #ARM_SMCCC_QUIRK_STATE_OFFS]
391:	pop	{r4-r7}
40	ldr	r12, [sp, #(4 * 4)]
41	stm	r12, {r0-r3}
42	bx	lr
43UNWIND(	.fnend)
44	.endm
45
46/*
47 * void smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2,
48 *		  unsigned long a3, unsigned long a4, unsigned long a5,
49 *		  unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
50 *		  struct arm_smccc_quirk *quirk)
51 */
52ENTRY(__arm_smccc_smc)
53	SMCCC SMCCC_SMC
54ENDPROC(__arm_smccc_smc)
55
56/*
57 * void smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2,
58 *		  unsigned long a3, unsigned long a4, unsigned long a5,
59 *		  unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
60 *		  struct arm_smccc_quirk *quirk)
61 */
62ENTRY(__arm_smccc_hvc)
63	SMCCC SMCCC_HVC
64ENDPROC(__arm_smccc_hvc)