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v4.6
  1/*
  2 *  Copyright (C) 1995  Linus Torvalds
  3 *
  4 *  Pentium III FXSR, SSE support
  5 *	Gareth Hughes <gareth@valinux.com>, May 2000
  6 */
  7
  8/*
  9 * This file handles the architecture-dependent parts of process handling..
 10 */
 11
 12#include <linux/cpu.h>
 13#include <linux/errno.h>
 14#include <linux/sched.h>
 
 
 15#include <linux/fs.h>
 16#include <linux/kernel.h>
 17#include <linux/mm.h>
 18#include <linux/elfcore.h>
 19#include <linux/smp.h>
 20#include <linux/stddef.h>
 21#include <linux/slab.h>
 22#include <linux/vmalloc.h>
 23#include <linux/user.h>
 24#include <linux/interrupt.h>
 25#include <linux/delay.h>
 26#include <linux/reboot.h>
 27#include <linux/mc146818rtc.h>
 28#include <linux/module.h>
 29#include <linux/kallsyms.h>
 30#include <linux/ptrace.h>
 31#include <linux/personality.h>
 32#include <linux/percpu.h>
 33#include <linux/prctl.h>
 34#include <linux/ftrace.h>
 35#include <linux/uaccess.h>
 36#include <linux/io.h>
 37#include <linux/kdebug.h>
 
 38
 39#include <asm/pgtable.h>
 40#include <asm/ldt.h>
 41#include <asm/processor.h>
 42#include <asm/fpu/internal.h>
 43#include <asm/desc.h>
 44#ifdef CONFIG_MATH_EMULATION
 45#include <asm/math_emu.h>
 46#endif
 47
 48#include <linux/err.h>
 49
 50#include <asm/tlbflush.h>
 51#include <asm/cpu.h>
 52#include <asm/idle.h>
 53#include <asm/syscalls.h>
 54#include <asm/debugreg.h>
 55#include <asm/switch_to.h>
 56#include <asm/vm86.h>
 
 
 57
 58asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
 59asmlinkage void ret_from_kernel_thread(void) __asm__("ret_from_kernel_thread");
 60
 61/*
 62 * Return saved PC of a blocked thread.
 63 */
 64unsigned long thread_saved_pc(struct task_struct *tsk)
 65{
 66	return ((unsigned long *)tsk->thread.sp)[3];
 67}
 68
 69void __show_regs(struct pt_regs *regs, int all)
 70{
 71	unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;
 72	unsigned long d0, d1, d2, d3, d6, d7;
 73	unsigned long sp;
 74	unsigned short ss, gs;
 75
 76	if (user_mode(regs)) {
 77		sp = regs->sp;
 78		ss = regs->ss & 0xffff;
 79		gs = get_user_gs(regs);
 80	} else {
 81		sp = kernel_stack_pointer(regs);
 82		savesegment(ss, ss);
 83		savesegment(gs, gs);
 84	}
 85
 86	printk(KERN_DEFAULT "EIP: %04x:[<%08lx>] EFLAGS: %08lx CPU: %d\n",
 87			(u16)regs->cs, regs->ip, regs->flags,
 88			smp_processor_id());
 89	print_symbol("EIP is at %s\n", regs->ip);
 90
 91	printk(KERN_DEFAULT "EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n",
 92		regs->ax, regs->bx, regs->cx, regs->dx);
 93	printk(KERN_DEFAULT "ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n",
 94		regs->si, regs->di, regs->bp, sp);
 95	printk(KERN_DEFAULT " DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n",
 96	       (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss);
 97
 98	if (!all)
 99		return;
100
101	cr0 = read_cr0();
102	cr2 = read_cr2();
103	cr3 = read_cr3();
104	cr4 = __read_cr4_safe();
105	printk(KERN_DEFAULT "CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n",
106			cr0, cr2, cr3, cr4);
107
108	get_debugreg(d0, 0);
109	get_debugreg(d1, 1);
110	get_debugreg(d2, 2);
111	get_debugreg(d3, 3);
112	get_debugreg(d6, 6);
113	get_debugreg(d7, 7);
114
115	/* Only print out debug registers if they are in their non-default state. */
116	if ((d0 == 0) && (d1 == 0) && (d2 == 0) && (d3 == 0) &&
117	    (d6 == DR6_RESERVED) && (d7 == 0x400))
118		return;
119
120	printk(KERN_DEFAULT "DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n",
121			d0, d1, d2, d3);
122	printk(KERN_DEFAULT "DR6: %08lx DR7: %08lx\n",
123			d6, d7);
124}
125
126void release_thread(struct task_struct *dead_task)
127{
128	BUG_ON(dead_task->mm);
129	release_vm86_irqs(dead_task);
130}
131
132int copy_thread_tls(unsigned long clone_flags, unsigned long sp,
133	unsigned long arg, struct task_struct *p, unsigned long tls)
134{
135	struct pt_regs *childregs = task_pt_regs(p);
136	struct task_struct *tsk;
137	int err;
138
139	p->thread.sp = (unsigned long) childregs;
140	p->thread.sp0 = (unsigned long) (childregs+1);
141	memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
142
143	if (unlikely(p->flags & PF_KTHREAD)) {
144		/* kernel thread */
145		memset(childregs, 0, sizeof(struct pt_regs));
146		p->thread.ip = (unsigned long) ret_from_kernel_thread;
147		task_user_gs(p) = __KERNEL_STACK_CANARY;
148		childregs->ds = __USER_DS;
149		childregs->es = __USER_DS;
150		childregs->fs = __KERNEL_PERCPU;
151		childregs->bx = sp;	/* function */
152		childregs->bp = arg;
153		childregs->orig_ax = -1;
154		childregs->cs = __KERNEL_CS | get_kernel_rpl();
155		childregs->flags = X86_EFLAGS_IF | X86_EFLAGS_FIXED;
156		p->thread.io_bitmap_ptr = NULL;
157		return 0;
158	}
159	*childregs = *current_pt_regs();
160	childregs->ax = 0;
161	if (sp)
162		childregs->sp = sp;
163
164	p->thread.ip = (unsigned long) ret_from_fork;
165	task_user_gs(p) = get_user_gs(current_pt_regs());
166
167	p->thread.io_bitmap_ptr = NULL;
168	tsk = current;
169	err = -ENOMEM;
170
171	if (unlikely(test_tsk_thread_flag(tsk, TIF_IO_BITMAP))) {
172		p->thread.io_bitmap_ptr = kmemdup(tsk->thread.io_bitmap_ptr,
173						IO_BITMAP_BYTES, GFP_KERNEL);
174		if (!p->thread.io_bitmap_ptr) {
175			p->thread.io_bitmap_max = 0;
176			return -ENOMEM;
177		}
178		set_tsk_thread_flag(p, TIF_IO_BITMAP);
179	}
180
181	err = 0;
182
183	/*
184	 * Set a new TLS for the child thread?
185	 */
186	if (clone_flags & CLONE_SETTLS)
187		err = do_set_thread_area(p, -1,
188			(struct user_desc __user *)tls, 0);
189
190	if (err && p->thread.io_bitmap_ptr) {
191		kfree(p->thread.io_bitmap_ptr);
192		p->thread.io_bitmap_max = 0;
193	}
194	return err;
195}
196
197void
198start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
199{
200	set_user_gs(regs, 0);
201	regs->fs		= 0;
202	regs->ds		= __USER_DS;
203	regs->es		= __USER_DS;
204	regs->ss		= __USER_DS;
205	regs->cs		= __USER_CS;
206	regs->ip		= new_ip;
207	regs->sp		= new_sp;
208	regs->flags		= X86_EFLAGS_IF;
209	force_iret();
210}
211EXPORT_SYMBOL_GPL(start_thread);
212
213
214/*
215 *	switch_to(x,y) should switch tasks from x to y.
216 *
217 * We fsave/fwait so that an exception goes off at the right time
218 * (as a call from the fsave or fwait in effect) rather than to
219 * the wrong process. Lazy FP saving no longer makes any sense
220 * with modern CPU's, and this simplifies a lot of things (SMP
221 * and UP become the same).
222 *
223 * NOTE! We used to use the x86 hardware context switching. The
224 * reason for not using it any more becomes apparent when you
225 * try to recover gracefully from saved state that is no longer
226 * valid (stale segment register values in particular). With the
227 * hardware task-switch, there is no way to fix up bad state in
228 * a reasonable manner.
229 *
230 * The fact that Intel documents the hardware task-switching to
231 * be slow is a fairly red herring - this code is not noticeably
232 * faster. However, there _is_ some room for improvement here,
233 * so the performance issues may eventually be a valid point.
234 * More important, however, is the fact that this allows us much
235 * more flexibility.
236 *
237 * The return value (in %ax) will be the "prev" task after
238 * the task-switch, and shows up in ret_from_fork in entry.S,
239 * for example.
240 */
241__visible __notrace_funcgraph struct task_struct *
242__switch_to(struct task_struct *prev_p, struct task_struct *next_p)
243{
244	struct thread_struct *prev = &prev_p->thread,
245			     *next = &next_p->thread;
246	struct fpu *prev_fpu = &prev->fpu;
247	struct fpu *next_fpu = &next->fpu;
248	int cpu = smp_processor_id();
249	struct tss_struct *tss = &per_cpu(cpu_tss, cpu);
250	fpu_switch_t fpu_switch;
251
252	/* never put a printk in __switch_to... printk() calls wake_up*() indirectly */
253
254	fpu_switch = switch_fpu_prepare(prev_fpu, next_fpu, cpu);
 
255
256	/*
257	 * Save away %gs. No need to save %fs, as it was saved on the
258	 * stack on entry.  No need to save %es and %ds, as those are
259	 * always kernel segments while inside the kernel.  Doing this
260	 * before setting the new TLS descriptors avoids the situation
261	 * where we temporarily have non-reloadable segments in %fs
262	 * and %gs.  This could be an issue if the NMI handler ever
263	 * used %fs or %gs (it does not today), or if the kernel is
264	 * running inside of a hypervisor layer.
265	 */
266	lazy_save_gs(prev->gs);
267
268	/*
269	 * Load the per-thread Thread-Local Storage descriptor.
270	 */
271	load_TLS(next, cpu);
272
273	/*
274	 * Restore IOPL if needed.  In normal use, the flags restore
275	 * in the switch assembly will handle this.  But if the kernel
276	 * is running virtualized at a non-zero CPL, the popf will
277	 * not restore flags, so it must be done in a separate step.
278	 */
279	if (get_kernel_rpl() && unlikely(prev->iopl != next->iopl))
280		set_iopl_mask(next->iopl);
281
282	/*
283	 * Now maybe handle debug registers and/or IO bitmaps
284	 */
285	if (unlikely(task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV ||
286		     task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT))
287		__switch_to_xtra(prev_p, next_p, tss);
288
289	/*
290	 * Leave lazy mode, flushing any hypercalls made here.
291	 * This must be done before restoring TLS segments so
292	 * the GDT and LDT are properly updated, and must be
293	 * done before fpu__restore(), so the TS bit is up
294	 * to date.
295	 */
296	arch_end_context_switch(next_p);
297
298	/*
299	 * Reload esp0 and cpu_current_top_of_stack.  This changes
300	 * current_thread_info().
 
301	 */
302	load_sp0(tss, next);
 
303	this_cpu_write(cpu_current_top_of_stack,
304		       (unsigned long)task_stack_page(next_p) +
305		       THREAD_SIZE);
306
307	/*
308	 * Restore %gs if needed (which is common)
309	 */
310	if (prev->gs | next->gs)
311		lazy_load_gs(next->gs);
312
313	switch_fpu_finish(next_fpu, fpu_switch);
314
315	this_cpu_write(current_task, next_p);
316
 
 
 
 
 
317	return prev_p;
 
 
 
 
 
318}
v5.14.15
  1/*
  2 *  Copyright (C) 1995  Linus Torvalds
  3 *
  4 *  Pentium III FXSR, SSE support
  5 *	Gareth Hughes <gareth@valinux.com>, May 2000
  6 */
  7
  8/*
  9 * This file handles the architecture-dependent parts of process handling..
 10 */
 11
 12#include <linux/cpu.h>
 13#include <linux/errno.h>
 14#include <linux/sched.h>
 15#include <linux/sched/task.h>
 16#include <linux/sched/task_stack.h>
 17#include <linux/fs.h>
 18#include <linux/kernel.h>
 19#include <linux/mm.h>
 20#include <linux/elfcore.h>
 21#include <linux/smp.h>
 22#include <linux/stddef.h>
 23#include <linux/slab.h>
 24#include <linux/vmalloc.h>
 25#include <linux/user.h>
 26#include <linux/interrupt.h>
 27#include <linux/delay.h>
 28#include <linux/reboot.h>
 29#include <linux/mc146818rtc.h>
 30#include <linux/export.h>
 31#include <linux/kallsyms.h>
 32#include <linux/ptrace.h>
 33#include <linux/personality.h>
 34#include <linux/percpu.h>
 35#include <linux/prctl.h>
 36#include <linux/ftrace.h>
 37#include <linux/uaccess.h>
 38#include <linux/io.h>
 39#include <linux/kdebug.h>
 40#include <linux/syscalls.h>
 41
 
 42#include <asm/ldt.h>
 43#include <asm/processor.h>
 44#include <asm/fpu/internal.h>
 45#include <asm/desc.h>
 
 
 
 46
 47#include <linux/err.h>
 48
 49#include <asm/tlbflush.h>
 50#include <asm/cpu.h>
 
 
 51#include <asm/debugreg.h>
 52#include <asm/switch_to.h>
 53#include <asm/vm86.h>
 54#include <asm/resctrl.h>
 55#include <asm/proto.h>
 56
 57#include "process.h"
 
 58
 59void __show_regs(struct pt_regs *regs, enum show_regs_mode mode,
 60		 const char *log_lvl)
 
 
 
 
 
 
 
 61{
 62	unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;
 63	unsigned long d0, d1, d2, d3, d6, d7;
 64	unsigned short gs;
 
 65
 66	if (user_mode(regs))
 
 
 67		gs = get_user_gs(regs);
 68	else
 
 
 69		savesegment(gs, gs);
 
 70
 71	show_ip(regs, log_lvl);
 72
 73	printk("%sEAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n",
 74		log_lvl, regs->ax, regs->bx, regs->cx, regs->dx);
 75	printk("%sESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n",
 76		log_lvl, regs->si, regs->di, regs->bp, regs->sp);
 77	printk("%sDS: %04x ES: %04x FS: %04x GS: %04x SS: %04x EFLAGS: %08lx\n",
 78	       log_lvl, (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, regs->ss, regs->flags);
 
 
 
 79
 80	if (mode != SHOW_REGS_ALL)
 81		return;
 82
 83	cr0 = read_cr0();
 84	cr2 = read_cr2();
 85	cr3 = __read_cr3();
 86	cr4 = __read_cr4();
 87	printk("%sCR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n",
 88		log_lvl, cr0, cr2, cr3, cr4);
 89
 90	get_debugreg(d0, 0);
 91	get_debugreg(d1, 1);
 92	get_debugreg(d2, 2);
 93	get_debugreg(d3, 3);
 94	get_debugreg(d6, 6);
 95	get_debugreg(d7, 7);
 96
 97	/* Only print out debug registers if they are in their non-default state. */
 98	if ((d0 == 0) && (d1 == 0) && (d2 == 0) && (d3 == 0) &&
 99	    (d6 == DR6_RESERVED) && (d7 == 0x400))
100		return;
101
102	printk("%sDR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n",
103		log_lvl, d0, d1, d2, d3);
104	printk("%sDR6: %08lx DR7: %08lx\n",
105		log_lvl, d6, d7);
106}
107
108void release_thread(struct task_struct *dead_task)
109{
110	BUG_ON(dead_task->mm);
111	release_vm86_irqs(dead_task);
112}
113
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
114void
115start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
116{
117	set_user_gs(regs, 0);
118	regs->fs		= 0;
119	regs->ds		= __USER_DS;
120	regs->es		= __USER_DS;
121	regs->ss		= __USER_DS;
122	regs->cs		= __USER_CS;
123	regs->ip		= new_ip;
124	regs->sp		= new_sp;
125	regs->flags		= X86_EFLAGS_IF;
 
126}
127EXPORT_SYMBOL_GPL(start_thread);
128
129
130/*
131 *	switch_to(x,y) should switch tasks from x to y.
132 *
133 * We fsave/fwait so that an exception goes off at the right time
134 * (as a call from the fsave or fwait in effect) rather than to
135 * the wrong process. Lazy FP saving no longer makes any sense
136 * with modern CPU's, and this simplifies a lot of things (SMP
137 * and UP become the same).
138 *
139 * NOTE! We used to use the x86 hardware context switching. The
140 * reason for not using it any more becomes apparent when you
141 * try to recover gracefully from saved state that is no longer
142 * valid (stale segment register values in particular). With the
143 * hardware task-switch, there is no way to fix up bad state in
144 * a reasonable manner.
145 *
146 * The fact that Intel documents the hardware task-switching to
147 * be slow is a fairly red herring - this code is not noticeably
148 * faster. However, there _is_ some room for improvement here,
149 * so the performance issues may eventually be a valid point.
150 * More important, however, is the fact that this allows us much
151 * more flexibility.
152 *
153 * The return value (in %ax) will be the "prev" task after
154 * the task-switch, and shows up in ret_from_fork in entry.S,
155 * for example.
156 */
157__visible __notrace_funcgraph struct task_struct *
158__switch_to(struct task_struct *prev_p, struct task_struct *next_p)
159{
160	struct thread_struct *prev = &prev_p->thread,
161			     *next = &next_p->thread;
162	struct fpu *prev_fpu = &prev->fpu;
163	struct fpu *next_fpu = &next->fpu;
164	int cpu = smp_processor_id();
 
 
165
166	/* never put a printk in __switch_to... printk() calls wake_up*() indirectly */
167
168	if (!test_thread_flag(TIF_NEED_FPU_LOAD))
169		switch_fpu_prepare(prev_fpu, cpu);
170
171	/*
172	 * Save away %gs. No need to save %fs, as it was saved on the
173	 * stack on entry.  No need to save %es and %ds, as those are
174	 * always kernel segments while inside the kernel.  Doing this
175	 * before setting the new TLS descriptors avoids the situation
176	 * where we temporarily have non-reloadable segments in %fs
177	 * and %gs.  This could be an issue if the NMI handler ever
178	 * used %fs or %gs (it does not today), or if the kernel is
179	 * running inside of a hypervisor layer.
180	 */
181	lazy_save_gs(prev->gs);
182
183	/*
184	 * Load the per-thread Thread-Local Storage descriptor.
185	 */
186	load_TLS(next, cpu);
187
188	switch_to_extra(prev_p, next_p);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
189
190	/*
191	 * Leave lazy mode, flushing any hypercalls made here.
192	 * This must be done before restoring TLS segments so
193	 * the GDT and LDT are properly updated.
 
 
194	 */
195	arch_end_context_switch(next_p);
196
197	/*
198	 * Reload esp0 and cpu_current_top_of_stack.  This changes
199	 * current_thread_info().  Refresh the SYSENTER configuration in
200	 * case prev or next is vm86.
201	 */
202	update_task_stack(next_p);
203	refresh_sysenter_cs(next);
204	this_cpu_write(cpu_current_top_of_stack,
205		       (unsigned long)task_stack_page(next_p) +
206		       THREAD_SIZE);
207
208	/*
209	 * Restore %gs if needed (which is common)
210	 */
211	if (prev->gs | next->gs)
212		lazy_load_gs(next->gs);
213
 
 
214	this_cpu_write(current_task, next_p);
215
216	switch_fpu_finish(next_fpu);
217
218	/* Load the Intel cache allocation PQR MSR. */
219	resctrl_sched_in();
220
221	return prev_p;
222}
223
224SYSCALL_DEFINE2(arch_prctl, int, option, unsigned long, arg2)
225{
226	return do_arch_prctl_common(current, option, arg2);
227}