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1menu "IRQ subsystem"
2# Options selectable by the architecture code
3
4# Make sparse irq Kconfig switch below available
5config MAY_HAVE_SPARSE_IRQ
6 bool
7
8# Legacy support, required for itanic
9config GENERIC_IRQ_LEGACY
10 bool
11
12# Enable the generic irq autoprobe mechanism
13config GENERIC_IRQ_PROBE
14 bool
15
16# Use the generic /proc/interrupts implementation
17config GENERIC_IRQ_SHOW
18 bool
19
20# Print level/edge extra information
21config GENERIC_IRQ_SHOW_LEVEL
22 bool
23
24# Facility to allocate a hardware interrupt. This is legacy support
25# and should not be used in new code. Use irq domains instead.
26config GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
27 bool
28
29# Support for delayed migration from interrupt context
30config GENERIC_PENDING_IRQ
31 bool
32
33# Support for generic irq migrating off cpu before the cpu is offline.
34config GENERIC_IRQ_MIGRATION
35 bool
36
37# Alpha specific irq affinity mechanism
38config AUTO_IRQ_AFFINITY
39 bool
40
41# Tasklet based software resend for pending interrupts on enable_irq()
42config HARDIRQS_SW_RESEND
43 bool
44
45# Preflow handler support for fasteoi (sparc64)
46config IRQ_PREFLOW_FASTEOI
47 bool
48
49# Edge style eoi based handler (cell)
50config IRQ_EDGE_EOI_HANDLER
51 bool
52
53# Generic configurable interrupt chip implementation
54config GENERIC_IRQ_CHIP
55 bool
56 select IRQ_DOMAIN
57
58# Generic irq_domain hw <--> linux irq number translation
59config IRQ_DOMAIN
60 bool
61
62# Support for hierarchical irq domains
63config IRQ_DOMAIN_HIERARCHY
64 bool
65 select IRQ_DOMAIN
66
67# Generic IRQ IPI support
68config GENERIC_IRQ_IPI
69 bool
70
71# Generic MSI interrupt support
72config GENERIC_MSI_IRQ
73 bool
74
75# Generic MSI hierarchical interrupt domain support
76config GENERIC_MSI_IRQ_DOMAIN
77 bool
78 select IRQ_DOMAIN_HIERARCHY
79 select GENERIC_MSI_IRQ
80
81config HANDLE_DOMAIN_IRQ
82 bool
83
84config IRQ_DOMAIN_DEBUG
85 bool "Expose hardware/virtual IRQ mapping via debugfs"
86 depends on IRQ_DOMAIN && DEBUG_FS
87 help
88 This option will show the mapping relationship between hardware irq
89 numbers and Linux irq numbers. The mapping is exposed via debugfs
90 in the file "irq_domain_mapping".
91
92 If you don't know what this means you don't need it.
93
94# Support forced irq threading
95config IRQ_FORCED_THREADING
96 bool
97
98config SPARSE_IRQ
99 bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
100 ---help---
101
102 Sparse irq numbering is useful for distro kernels that want
103 to define a high CONFIG_NR_CPUS value but still want to have
104 low kernel memory footprint on smaller machines.
105
106 ( Sparse irqs can also be beneficial on NUMA boxes, as they spread
107 out the interrupt descriptors in a more NUMA-friendly way. )
108
109 If you don't know what to do here, say N.
110
111endmenu
1menu "IRQ subsystem"
2# Options selectable by the architecture code
3
4# Make sparse irq Kconfig switch below available
5config MAY_HAVE_SPARSE_IRQ
6 bool
7
8# Legacy support, required for itanic
9config GENERIC_IRQ_LEGACY
10 bool
11
12# Enable the generic irq autoprobe mechanism
13config GENERIC_IRQ_PROBE
14 bool
15
16# Use the generic /proc/interrupts implementation
17config GENERIC_IRQ_SHOW
18 bool
19
20# Print level/edge extra information
21config GENERIC_IRQ_SHOW_LEVEL
22 bool
23
24# Supports effective affinity mask
25config GENERIC_IRQ_EFFECTIVE_AFF_MASK
26 bool
27
28# Facility to allocate a hardware interrupt. This is legacy support
29# and should not be used in new code. Use irq domains instead.
30config GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
31 bool
32
33# Support for delayed migration from interrupt context
34config GENERIC_PENDING_IRQ
35 bool
36
37# Support for generic irq migrating off cpu before the cpu is offline.
38config GENERIC_IRQ_MIGRATION
39 bool
40
41# Alpha specific irq affinity mechanism
42config AUTO_IRQ_AFFINITY
43 bool
44
45# Tasklet based software resend for pending interrupts on enable_irq()
46config HARDIRQS_SW_RESEND
47 bool
48
49# Preflow handler support for fasteoi (sparc64)
50config IRQ_PREFLOW_FASTEOI
51 bool
52
53# Edge style eoi based handler (cell)
54config IRQ_EDGE_EOI_HANDLER
55 bool
56
57# Generic configurable interrupt chip implementation
58config GENERIC_IRQ_CHIP
59 bool
60 select IRQ_DOMAIN
61
62# Generic irq_domain hw <--> linux irq number translation
63config IRQ_DOMAIN
64 bool
65
66# Support for simulated interrupts
67config IRQ_SIM
68 bool
69 select IRQ_WORK
70
71# Support for hierarchical irq domains
72config IRQ_DOMAIN_HIERARCHY
73 bool
74 select IRQ_DOMAIN
75
76# Support for hierarchical fasteoi+edge and fasteoi+level handlers
77config IRQ_FASTEOI_HIERARCHY_HANDLERS
78 bool
79
80# Generic IRQ IPI support
81config GENERIC_IRQ_IPI
82 bool
83
84# Generic MSI interrupt support
85config GENERIC_MSI_IRQ
86 bool
87
88# Generic MSI hierarchical interrupt domain support
89config GENERIC_MSI_IRQ_DOMAIN
90 bool
91 select IRQ_DOMAIN_HIERARCHY
92 select GENERIC_MSI_IRQ
93
94config HANDLE_DOMAIN_IRQ
95 bool
96
97config IRQ_TIMINGS
98 bool
99
100config GENERIC_IRQ_MATRIX_ALLOCATOR
101 bool
102
103config GENERIC_IRQ_RESERVATION_MODE
104 bool
105
106# Support forced irq threading
107config IRQ_FORCED_THREADING
108 bool
109
110config SPARSE_IRQ
111 bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
112 ---help---
113
114 Sparse irq numbering is useful for distro kernels that want
115 to define a high CONFIG_NR_CPUS value but still want to have
116 low kernel memory footprint on smaller machines.
117
118 ( Sparse irqs can also be beneficial on NUMA boxes, as they spread
119 out the interrupt descriptors in a more NUMA-friendly way. )
120
121 If you don't know what to do here, say N.
122
123config GENERIC_IRQ_DEBUGFS
124 bool "Expose irq internals in debugfs"
125 depends on DEBUG_FS
126 default n
127 ---help---
128
129 Exposes internal state information through debugfs. Mostly for
130 developers and debugging of hard to diagnose interrupt problems.
131
132 If you don't know what to do here, say N.
133
134endmenu
135
136config GENERIC_IRQ_MULTI_HANDLER
137 depends on !MULTI_IRQ_HANDLER
138 bool
139 help
140 Allow to specify the low level IRQ handler at run time.