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1/*
2 * Copyright (c) 2013, The Linux Foundation. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef _DT_BINDINGS_RESET_MSM_GCC_8960_H
15#define _DT_BINDINGS_RESET_MSM_GCC_8960_H
16
17#define SFAB_MSS_Q6_SW_RESET 0
18#define SFAB_MSS_Q6_FW_RESET 1
19#define QDSS_STM_RESET 2
20#define AFAB_SMPSS_S_RESET 3
21#define AFAB_SMPSS_M1_RESET 4
22#define AFAB_SMPSS_M0_RESET 5
23#define AFAB_EBI1_CH0_RESET 6
24#define AFAB_EBI1_CH1_RESET 7
25#define SFAB_ADM0_M0_RESET 8
26#define SFAB_ADM0_M1_RESET 9
27#define SFAB_ADM0_M2_RESET 10
28#define ADM0_C2_RESET 11
29#define ADM0_C1_RESET 12
30#define ADM0_C0_RESET 13
31#define ADM0_PBUS_RESET 14
32#define ADM0_RESET 15
33#define QDSS_CLKS_SW_RESET 16
34#define QDSS_POR_RESET 17
35#define QDSS_TSCTR_RESET 18
36#define QDSS_HRESET_RESET 19
37#define QDSS_AXI_RESET 20
38#define QDSS_DBG_RESET 21
39#define PCIE_A_RESET 22
40#define PCIE_AUX_RESET 23
41#define PCIE_H_RESET 24
42#define SFAB_PCIE_M_RESET 25
43#define SFAB_PCIE_S_RESET 26
44#define SFAB_MSS_M_RESET 27
45#define SFAB_USB3_M_RESET 28
46#define SFAB_RIVA_M_RESET 29
47#define SFAB_LPASS_RESET 30
48#define SFAB_AFAB_M_RESET 31
49#define AFAB_SFAB_M0_RESET 32
50#define AFAB_SFAB_M1_RESET 33
51#define SFAB_SATA_S_RESET 34
52#define SFAB_DFAB_M_RESET 35
53#define DFAB_SFAB_M_RESET 36
54#define DFAB_SWAY0_RESET 37
55#define DFAB_SWAY1_RESET 38
56#define DFAB_ARB0_RESET 39
57#define DFAB_ARB1_RESET 40
58#define PPSS_PROC_RESET 41
59#define PPSS_RESET 42
60#define DMA_BAM_RESET 43
61#define SPS_TIC_H_RESET 44
62#define SLIMBUS_H_RESET 45
63#define SFAB_CFPB_M_RESET 46
64#define SFAB_CFPB_S_RESET 47
65#define TSIF_H_RESET 48
66#define CE1_H_RESET 49
67#define CE1_CORE_RESET 50
68#define CE1_SLEEP_RESET 51
69#define CE2_H_RESET 52
70#define CE2_CORE_RESET 53
71#define SFAB_SFPB_M_RESET 54
72#define SFAB_SFPB_S_RESET 55
73#define RPM_PROC_RESET 56
74#define PMIC_SSBI2_RESET 57
75#define SDC1_RESET 58
76#define SDC2_RESET 59
77#define SDC3_RESET 60
78#define SDC4_RESET 61
79#define SDC5_RESET 62
80#define DFAB_A2_RESET 63
81#define USB_HS1_RESET 64
82#define USB_HSIC_RESET 65
83#define USB_FS1_XCVR_RESET 66
84#define USB_FS1_RESET 67
85#define USB_FS2_XCVR_RESET 68
86#define USB_FS2_RESET 69
87#define GSBI1_RESET 70
88#define GSBI2_RESET 71
89#define GSBI3_RESET 72
90#define GSBI4_RESET 73
91#define GSBI5_RESET 74
92#define GSBI6_RESET 75
93#define GSBI7_RESET 76
94#define GSBI8_RESET 77
95#define GSBI9_RESET 78
96#define GSBI10_RESET 79
97#define GSBI11_RESET 80
98#define GSBI12_RESET 81
99#define SPDM_RESET 82
100#define TLMM_H_RESET 83
101#define SFAB_MSS_S_RESET 84
102#define MSS_SLP_RESET 85
103#define MSS_Q6SW_JTAG_RESET 86
104#define MSS_Q6FW_JTAG_RESET 87
105#define MSS_RESET 88
106#define SATA_H_RESET 89
107#define SATA_RXOOB_RESE 90
108#define SATA_PMALIVE_RESET 91
109#define SATA_SFAB_M_RESET 92
110#define TSSC_RESET 93
111#define PDM_RESET 94
112#define MPM_H_RESET 95
113#define MPM_RESET 96
114#define SFAB_SMPSS_S_RESET 97
115#define PRNG_RESET 98
116#define RIVA_RESET 99
117#define USB_HS3_RESET 100
118#define USB_HS4_RESET 101
119#define CE3_RESET 102
120#define PCIE_EXT_PCI_RESET 103
121#define PCIE_PHY_RESET 104
122#define PCIE_PCI_RESET 105
123#define PCIE_POR_RESET 106
124#define PCIE_HCLK_RESET 107
125#define PCIE_ACLK_RESET 108
126#define CE3_H_RESET 109
127#define SFAB_CE3_M_RESET 110
128#define SFAB_CE3_S_RESET 111
129#define SATA_RESET 112
130#define CE3_SLEEP_RESET 113
131#define GSS_SLP_RESET 114
132#define GSS_RESET 115
133
134#endif
1/*
2 * Copyright (c) 2013, The Linux Foundation. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef _DT_BINDINGS_RESET_MSM_GCC_8960_H
15#define _DT_BINDINGS_RESET_MSM_GCC_8960_H
16
17#define SFAB_MSS_Q6_SW_RESET 0
18#define SFAB_MSS_Q6_FW_RESET 1
19#define QDSS_STM_RESET 2
20#define AFAB_SMPSS_S_RESET 3
21#define AFAB_SMPSS_M1_RESET 4
22#define AFAB_SMPSS_M0_RESET 5
23#define AFAB_EBI1_CH0_RESET 6
24#define AFAB_EBI1_CH1_RESET 7
25#define SFAB_ADM0_M0_RESET 8
26#define SFAB_ADM0_M1_RESET 9
27#define SFAB_ADM0_M2_RESET 10
28#define ADM0_C2_RESET 11
29#define ADM0_C1_RESET 12
30#define ADM0_C0_RESET 13
31#define ADM0_PBUS_RESET 14
32#define ADM0_RESET 15
33#define QDSS_CLKS_SW_RESET 16
34#define QDSS_POR_RESET 17
35#define QDSS_TSCTR_RESET 18
36#define QDSS_HRESET_RESET 19
37#define QDSS_AXI_RESET 20
38#define QDSS_DBG_RESET 21
39#define PCIE_A_RESET 22
40#define PCIE_AUX_RESET 23
41#define PCIE_H_RESET 24
42#define SFAB_PCIE_M_RESET 25
43#define SFAB_PCIE_S_RESET 26
44#define SFAB_MSS_M_RESET 27
45#define SFAB_USB3_M_RESET 28
46#define SFAB_RIVA_M_RESET 29
47#define SFAB_LPASS_RESET 30
48#define SFAB_AFAB_M_RESET 31
49#define AFAB_SFAB_M0_RESET 32
50#define AFAB_SFAB_M1_RESET 33
51#define SFAB_SATA_S_RESET 34
52#define SFAB_DFAB_M_RESET 35
53#define DFAB_SFAB_M_RESET 36
54#define DFAB_SWAY0_RESET 37
55#define DFAB_SWAY1_RESET 38
56#define DFAB_ARB0_RESET 39
57#define DFAB_ARB1_RESET 40
58#define PPSS_PROC_RESET 41
59#define PPSS_RESET 42
60#define DMA_BAM_RESET 43
61#define SPS_TIC_H_RESET 44
62#define SLIMBUS_H_RESET 45
63#define SFAB_CFPB_M_RESET 46
64#define SFAB_CFPB_S_RESET 47
65#define TSIF_H_RESET 48
66#define CE1_H_RESET 49
67#define CE1_CORE_RESET 50
68#define CE1_SLEEP_RESET 51
69#define CE2_H_RESET 52
70#define CE2_CORE_RESET 53
71#define SFAB_SFPB_M_RESET 54
72#define SFAB_SFPB_S_RESET 55
73#define RPM_PROC_RESET 56
74#define PMIC_SSBI2_RESET 57
75#define SDC1_RESET 58
76#define SDC2_RESET 59
77#define SDC3_RESET 60
78#define SDC4_RESET 61
79#define SDC5_RESET 62
80#define DFAB_A2_RESET 63
81#define USB_HS1_RESET 64
82#define USB_HSIC_RESET 65
83#define USB_FS1_XCVR_RESET 66
84#define USB_FS1_RESET 67
85#define USB_FS2_XCVR_RESET 68
86#define USB_FS2_RESET 69
87#define GSBI1_RESET 70
88#define GSBI2_RESET 71
89#define GSBI3_RESET 72
90#define GSBI4_RESET 73
91#define GSBI5_RESET 74
92#define GSBI6_RESET 75
93#define GSBI7_RESET 76
94#define GSBI8_RESET 77
95#define GSBI9_RESET 78
96#define GSBI10_RESET 79
97#define GSBI11_RESET 80
98#define GSBI12_RESET 81
99#define SPDM_RESET 82
100#define TLMM_H_RESET 83
101#define SFAB_MSS_S_RESET 84
102#define MSS_SLP_RESET 85
103#define MSS_Q6SW_JTAG_RESET 86
104#define MSS_Q6FW_JTAG_RESET 87
105#define MSS_RESET 88
106#define SATA_H_RESET 89
107#define SATA_RXOOB_RESE 90
108#define SATA_PMALIVE_RESET 91
109#define SATA_SFAB_M_RESET 92
110#define TSSC_RESET 93
111#define PDM_RESET 94
112#define MPM_H_RESET 95
113#define MPM_RESET 96
114#define SFAB_SMPSS_S_RESET 97
115#define PRNG_RESET 98
116#define RIVA_RESET 99
117#define USB_HS3_RESET 100
118#define USB_HS4_RESET 101
119#define CE3_RESET 102
120#define PCIE_EXT_PCI_RESET 103
121#define PCIE_PHY_RESET 104
122#define PCIE_PCI_RESET 105
123#define PCIE_POR_RESET 106
124#define PCIE_HCLK_RESET 107
125#define PCIE_ACLK_RESET 108
126#define CE3_H_RESET 109
127#define SFAB_CE3_M_RESET 110
128#define SFAB_CE3_S_RESET 111
129#define SATA_RESET 112
130#define CE3_SLEEP_RESET 113
131#define GSS_SLP_RESET 114
132#define GSS_RESET 115
133
134#endif