1/*
  2 * Copyright (C) 2010 Google, Inc.
  3 * Author: Erik Gilling <konkers@android.com>
  4 *
  5 * Copyright (C) 2011-2013 NVIDIA Corporation
  6 *
  7 * This software is licensed under the terms of the GNU General Public
  8 * License version 2, as published by the Free Software Foundation, and
  9 * may be copied, distributed, and modified under those terms.
 10 *
 11 * This program is distributed in the hope that it will be useful,
 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 14 * GNU General Public License for more details.
 15 *
 16 */
 17
 18#include "../dev.h"
 19#include "../debug.h"
 20#include "../cdma.h"
 21#include "../channel.h"
 22
 23static void host1x_debug_show_channel_cdma(struct host1x *host,
 24					   struct host1x_channel *ch,
 25					   struct output *o)
 26{
 27	struct host1x_cdma *cdma = &ch->cdma;
 28	u32 dmaput, dmaget, dmactrl;
 29	u32 cbstat, cbread;
 30	u32 val, base, baseval;
 31
 32	dmaput = host1x_ch_readl(ch, HOST1X_CHANNEL_DMAPUT);
 33	dmaget = host1x_ch_readl(ch, HOST1X_CHANNEL_DMAGET);
 34	dmactrl = host1x_ch_readl(ch, HOST1X_CHANNEL_DMACTRL);
 35	cbread = host1x_sync_readl(host, HOST1X_SYNC_CBREAD(ch->id));
 36	cbstat = host1x_sync_readl(host, HOST1X_SYNC_CBSTAT(ch->id));
 37
 38	host1x_debug_output(o, "%u-%s: ", ch->id, dev_name(ch->dev));
 39
 40	if (HOST1X_CHANNEL_DMACTRL_DMASTOP_V(dmactrl) ||
 41	    !ch->cdma.push_buffer.mapped) {
 42		host1x_debug_output(o, "inactive\n\n");
 43		return;
 44	}
 45
 46	if (HOST1X_SYNC_CBSTAT_CBCLASS_V(cbstat) == HOST1X_CLASS_HOST1X &&
 47	    HOST1X_SYNC_CBSTAT_CBOFFSET_V(cbstat) ==
 48			HOST1X_UCLASS_WAIT_SYNCPT)
 49		host1x_debug_output(o, "waiting on syncpt %d val %d\n",
 50				    cbread >> 24, cbread & 0xffffff);
 51	else if (HOST1X_SYNC_CBSTAT_CBCLASS_V(cbstat) ==
 52				HOST1X_CLASS_HOST1X &&
 53		 HOST1X_SYNC_CBSTAT_CBOFFSET_V(cbstat) ==
 54				HOST1X_UCLASS_WAIT_SYNCPT_BASE) {
 55		base = (cbread >> 16) & 0xff;
 56		baseval =
 57			host1x_sync_readl(host, HOST1X_SYNC_SYNCPT_BASE(base));
 58		val = cbread & 0xffff;
 59		host1x_debug_output(o, "waiting on syncpt %d val %d (base %d = %d; offset = %d)\n",
 60				    cbread >> 24, baseval + val, base,
 61				    baseval, val);
 62	} else
 63		host1x_debug_output(o, "active class %02x, offset %04x, val %08x\n",
 64				    HOST1X_SYNC_CBSTAT_CBCLASS_V(cbstat),
 65				    HOST1X_SYNC_CBSTAT_CBOFFSET_V(cbstat),
 66				    cbread);
 67
 68	host1x_debug_output(o, "DMAPUT %08x, DMAGET %08x, DMACTL %08x\n",
 69			    dmaput, dmaget, dmactrl);
 70	host1x_debug_output(o, "CBREAD %08x, CBSTAT %08x\n", cbread, cbstat);
 71
 72	show_channel_gathers(o, cdma);
 73	host1x_debug_output(o, "\n");
 74}
 75
 76static void host1x_debug_show_channel_fifo(struct host1x *host,
 77					   struct host1x_channel *ch,
 78					   struct output *o)
 79{
 80	u32 val, rd_ptr, wr_ptr, start, end;
 81	unsigned int data_count = 0;
 82
 83	host1x_debug_output(o, "%u: fifo:\n", ch->id);
 84
 85	val = host1x_ch_readl(ch, HOST1X_CHANNEL_FIFOSTAT);
 86	host1x_debug_output(o, "FIFOSTAT %08x\n", val);
 87	if (HOST1X_CHANNEL_FIFOSTAT_CFEMPTY_V(val)) {
 88		host1x_debug_output(o, "[empty]\n");
 89		return;
 90	}
 91
 92	host1x_sync_writel(host, 0x0, HOST1X_SYNC_CFPEEK_CTRL);
 93	host1x_sync_writel(host, HOST1X_SYNC_CFPEEK_CTRL_ENA_F(1) |
 94			   HOST1X_SYNC_CFPEEK_CTRL_CHANNR_F(ch->id),
 95			   HOST1X_SYNC_CFPEEK_CTRL);
 96
 97	val = host1x_sync_readl(host, HOST1X_SYNC_CFPEEK_PTRS);
 98	rd_ptr = HOST1X_SYNC_CFPEEK_PTRS_CF_RD_PTR_V(val);
 99	wr_ptr = HOST1X_SYNC_CFPEEK_PTRS_CF_WR_PTR_V(val);
100
101	val = host1x_sync_readl(host, HOST1X_SYNC_CF_SETUP(ch->id));
102	start = HOST1X_SYNC_CF_SETUP_BASE_V(val);
103	end = HOST1X_SYNC_CF_SETUP_LIMIT_V(val);
104
105	do {
106		host1x_sync_writel(host, 0x0, HOST1X_SYNC_CFPEEK_CTRL);
107		host1x_sync_writel(host, HOST1X_SYNC_CFPEEK_CTRL_ENA_F(1) |
108				   HOST1X_SYNC_CFPEEK_CTRL_CHANNR_F(ch->id) |
109				   HOST1X_SYNC_CFPEEK_CTRL_ADDR_F(rd_ptr),
110				   HOST1X_SYNC_CFPEEK_CTRL);
111		val = host1x_sync_readl(host, HOST1X_SYNC_CFPEEK_READ);
112
113		if (!data_count) {
114			host1x_debug_output(o, "%08x: ", val);
115			data_count = show_channel_command(o, val, NULL);
116		} else {
117			host1x_debug_cont(o, "%08x%s", val,
118					  data_count > 1 ? ", " : "])\n");
119			data_count--;
120		}
121
122		if (rd_ptr == end)
123			rd_ptr = start;
124		else
125			rd_ptr++;
126	} while (rd_ptr != wr_ptr);
127
128	if (data_count)
129		host1x_debug_cont(o, ", ...])\n");
130	host1x_debug_output(o, "\n");
131
132	host1x_sync_writel(host, 0x0, HOST1X_SYNC_CFPEEK_CTRL);
133}
134
135static void host1x_debug_show_mlocks(struct host1x *host, struct output *o)
136{
137	unsigned int i;
138
139	host1x_debug_output(o, "---- mlocks ----\n");
140
141	for (i = 0; i < host1x_syncpt_nb_mlocks(host); i++) {
142		u32 owner =
143			host1x_sync_readl(host, HOST1X_SYNC_MLOCK_OWNER(i));
144		if (HOST1X_SYNC_MLOCK_OWNER_CH_OWNS_V(owner))
145			host1x_debug_output(o, "%u: locked by channel %u\n",
146				i, HOST1X_SYNC_MLOCK_OWNER_CHID_V(owner));
147		else if (HOST1X_SYNC_MLOCK_OWNER_CPU_OWNS_V(owner))
148			host1x_debug_output(o, "%u: locked by cpu\n", i);
149		else
150			host1x_debug_output(o, "%u: unlocked\n", i);
151	}
152
153	host1x_debug_output(o, "\n");
154}