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1/*
2 * rcar_du_kms.c -- R-Car Display Unit Mode Setting
3 *
4 * Copyright (C) 2013-2015 Renesas Electronics Corporation
5 *
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <drm/drmP.h>
15#include <drm/drm_atomic.h>
16#include <drm/drm_atomic_helper.h>
17#include <drm/drm_crtc.h>
18#include <drm/drm_crtc_helper.h>
19#include <drm/drm_fb_cma_helper.h>
20#include <drm/drm_gem_cma_helper.h>
21
22#include <linux/of_graph.h>
23#include <linux/wait.h>
24
25#include "rcar_du_crtc.h"
26#include "rcar_du_drv.h"
27#include "rcar_du_encoder.h"
28#include "rcar_du_kms.h"
29#include "rcar_du_lvdsenc.h"
30#include "rcar_du_regs.h"
31#include "rcar_du_vsp.h"
32
33/* -----------------------------------------------------------------------------
34 * Format helpers
35 */
36
37static const struct rcar_du_format_info rcar_du_format_infos[] = {
38 {
39 .fourcc = DRM_FORMAT_RGB565,
40 .bpp = 16,
41 .planes = 1,
42 .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
43 .edf = PnDDCR4_EDF_NONE,
44 }, {
45 .fourcc = DRM_FORMAT_ARGB1555,
46 .bpp = 16,
47 .planes = 1,
48 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
49 .edf = PnDDCR4_EDF_NONE,
50 }, {
51 .fourcc = DRM_FORMAT_XRGB1555,
52 .bpp = 16,
53 .planes = 1,
54 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
55 .edf = PnDDCR4_EDF_NONE,
56 }, {
57 .fourcc = DRM_FORMAT_XRGB8888,
58 .bpp = 32,
59 .planes = 1,
60 .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
61 .edf = PnDDCR4_EDF_RGB888,
62 }, {
63 .fourcc = DRM_FORMAT_ARGB8888,
64 .bpp = 32,
65 .planes = 1,
66 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
67 .edf = PnDDCR4_EDF_ARGB8888,
68 }, {
69 .fourcc = DRM_FORMAT_UYVY,
70 .bpp = 16,
71 .planes = 1,
72 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
73 .edf = PnDDCR4_EDF_NONE,
74 }, {
75 .fourcc = DRM_FORMAT_YUYV,
76 .bpp = 16,
77 .planes = 1,
78 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
79 .edf = PnDDCR4_EDF_NONE,
80 }, {
81 .fourcc = DRM_FORMAT_NV12,
82 .bpp = 12,
83 .planes = 2,
84 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
85 .edf = PnDDCR4_EDF_NONE,
86 }, {
87 .fourcc = DRM_FORMAT_NV21,
88 .bpp = 12,
89 .planes = 2,
90 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
91 .edf = PnDDCR4_EDF_NONE,
92 }, {
93 .fourcc = DRM_FORMAT_NV16,
94 .bpp = 16,
95 .planes = 2,
96 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
97 .edf = PnDDCR4_EDF_NONE,
98 },
99 /* The following formats are not supported on Gen2 and thus have no
100 * associated .pnmr or .edf settings.
101 */
102 {
103 .fourcc = DRM_FORMAT_NV61,
104 .bpp = 16,
105 .planes = 2,
106 }, {
107 .fourcc = DRM_FORMAT_YUV420,
108 .bpp = 12,
109 .planes = 3,
110 }, {
111 .fourcc = DRM_FORMAT_YVU420,
112 .bpp = 12,
113 .planes = 3,
114 }, {
115 .fourcc = DRM_FORMAT_YUV422,
116 .bpp = 16,
117 .planes = 3,
118 }, {
119 .fourcc = DRM_FORMAT_YVU422,
120 .bpp = 16,
121 .planes = 3,
122 }, {
123 .fourcc = DRM_FORMAT_YUV444,
124 .bpp = 24,
125 .planes = 3,
126 }, {
127 .fourcc = DRM_FORMAT_YVU444,
128 .bpp = 24,
129 .planes = 3,
130 },
131};
132
133const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
134{
135 unsigned int i;
136
137 for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
138 if (rcar_du_format_infos[i].fourcc == fourcc)
139 return &rcar_du_format_infos[i];
140 }
141
142 return NULL;
143}
144
145/* -----------------------------------------------------------------------------
146 * Frame buffer
147 */
148
149int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
150 struct drm_mode_create_dumb *args)
151{
152 struct rcar_du_device *rcdu = dev->dev_private;
153 unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
154 unsigned int align;
155
156 /* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
157 * but the R8A7790 DU seems to require a 128 bytes pitch alignment.
158 */
159 if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
160 align = 128;
161 else
162 align = 16 * args->bpp / 8;
163
164 args->pitch = roundup(min_pitch, align);
165
166 return drm_gem_cma_dumb_create_internal(file, dev, args);
167}
168
169static struct drm_framebuffer *
170rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
171 const struct drm_mode_fb_cmd2 *mode_cmd)
172{
173 struct rcar_du_device *rcdu = dev->dev_private;
174 const struct rcar_du_format_info *format;
175 unsigned int max_pitch;
176 unsigned int align;
177 unsigned int bpp;
178 unsigned int i;
179
180 format = rcar_du_format_info(mode_cmd->pixel_format);
181 if (format == NULL) {
182 dev_dbg(dev->dev, "unsupported pixel format %08x\n",
183 mode_cmd->pixel_format);
184 return ERR_PTR(-EINVAL);
185 }
186
187 /*
188 * The pitch and alignment constraints are expressed in pixels on the
189 * hardware side and in bytes in the DRM API.
190 */
191 bpp = format->planes == 1 ? format->bpp / 8 : 1;
192 max_pitch = 4096 * bpp;
193
194 if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
195 align = 128;
196 else
197 align = 16 * bpp;
198
199 if (mode_cmd->pitches[0] & (align - 1) ||
200 mode_cmd->pitches[0] >= max_pitch) {
201 dev_dbg(dev->dev, "invalid pitch value %u\n",
202 mode_cmd->pitches[0]);
203 return ERR_PTR(-EINVAL);
204 }
205
206 for (i = 1; i < format->planes; ++i) {
207 if (mode_cmd->pitches[i] != mode_cmd->pitches[0]) {
208 dev_dbg(dev->dev,
209 "luma and chroma pitches do not match\n");
210 return ERR_PTR(-EINVAL);
211 }
212 }
213
214 return drm_fb_cma_create(dev, file_priv, mode_cmd);
215}
216
217static void rcar_du_output_poll_changed(struct drm_device *dev)
218{
219 struct rcar_du_device *rcdu = dev->dev_private;
220
221 drm_fbdev_cma_hotplug_event(rcdu->fbdev);
222}
223
224/* -----------------------------------------------------------------------------
225 * Atomic Check and Update
226 */
227
228static int rcar_du_atomic_check(struct drm_device *dev,
229 struct drm_atomic_state *state)
230{
231 struct rcar_du_device *rcdu = dev->dev_private;
232 int ret;
233
234 ret = drm_atomic_helper_check(dev, state);
235 if (ret < 0)
236 return ret;
237
238 if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE))
239 return 0;
240
241 return rcar_du_atomic_check_planes(dev, state);
242}
243
244struct rcar_du_commit {
245 struct work_struct work;
246 struct drm_device *dev;
247 struct drm_atomic_state *state;
248 u32 crtcs;
249};
250
251static void rcar_du_atomic_complete(struct rcar_du_commit *commit)
252{
253 struct drm_device *dev = commit->dev;
254 struct rcar_du_device *rcdu = dev->dev_private;
255 struct drm_atomic_state *old_state = commit->state;
256
257 /* Apply the atomic update. */
258 drm_atomic_helper_commit_modeset_disables(dev, old_state);
259 drm_atomic_helper_commit_modeset_enables(dev, old_state);
260 drm_atomic_helper_commit_planes(dev, old_state, true);
261
262 drm_atomic_helper_wait_for_vblanks(dev, old_state);
263
264 drm_atomic_helper_cleanup_planes(dev, old_state);
265
266 drm_atomic_state_free(old_state);
267
268 /* Complete the commit, wake up any waiter. */
269 spin_lock(&rcdu->commit.wait.lock);
270 rcdu->commit.pending &= ~commit->crtcs;
271 wake_up_all_locked(&rcdu->commit.wait);
272 spin_unlock(&rcdu->commit.wait.lock);
273
274 kfree(commit);
275}
276
277static void rcar_du_atomic_work(struct work_struct *work)
278{
279 struct rcar_du_commit *commit =
280 container_of(work, struct rcar_du_commit, work);
281
282 rcar_du_atomic_complete(commit);
283}
284
285static int rcar_du_atomic_commit(struct drm_device *dev,
286 struct drm_atomic_state *state, bool async)
287{
288 struct rcar_du_device *rcdu = dev->dev_private;
289 struct rcar_du_commit *commit;
290 unsigned int i;
291 int ret;
292
293 ret = drm_atomic_helper_prepare_planes(dev, state);
294 if (ret)
295 return ret;
296
297 /* Allocate the commit object. */
298 commit = kzalloc(sizeof(*commit), GFP_KERNEL);
299 if (commit == NULL) {
300 ret = -ENOMEM;
301 goto error;
302 }
303
304 INIT_WORK(&commit->work, rcar_du_atomic_work);
305 commit->dev = dev;
306 commit->state = state;
307
308 /* Wait until all affected CRTCs have completed previous commits and
309 * mark them as pending.
310 */
311 for (i = 0; i < dev->mode_config.num_crtc; ++i) {
312 if (state->crtcs[i])
313 commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]);
314 }
315
316 spin_lock(&rcdu->commit.wait.lock);
317 ret = wait_event_interruptible_locked(rcdu->commit.wait,
318 !(rcdu->commit.pending & commit->crtcs));
319 if (ret == 0)
320 rcdu->commit.pending |= commit->crtcs;
321 spin_unlock(&rcdu->commit.wait.lock);
322
323 if (ret) {
324 kfree(commit);
325 goto error;
326 }
327
328 /* Swap the state, this is the point of no return. */
329 drm_atomic_helper_swap_state(dev, state);
330
331 if (async)
332 schedule_work(&commit->work);
333 else
334 rcar_du_atomic_complete(commit);
335
336 return 0;
337
338error:
339 drm_atomic_helper_cleanup_planes(dev, state);
340 return ret;
341}
342
343/* -----------------------------------------------------------------------------
344 * Initialization
345 */
346
347static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
348 .fb_create = rcar_du_fb_create,
349 .output_poll_changed = rcar_du_output_poll_changed,
350 .atomic_check = rcar_du_atomic_check,
351 .atomic_commit = rcar_du_atomic_commit,
352};
353
354static int rcar_du_encoders_init_one(struct rcar_du_device *rcdu,
355 enum rcar_du_output output,
356 struct of_endpoint *ep)
357{
358 static const struct {
359 const char *compatible;
360 enum rcar_du_encoder_type type;
361 } encoders[] = {
362 { "adi,adv7123", RCAR_DU_ENCODER_VGA },
363 { "adi,adv7511w", RCAR_DU_ENCODER_HDMI },
364 { "thine,thc63lvdm83d", RCAR_DU_ENCODER_LVDS },
365 };
366
367 enum rcar_du_encoder_type enc_type = RCAR_DU_ENCODER_NONE;
368 struct device_node *connector = NULL;
369 struct device_node *encoder = NULL;
370 struct device_node *ep_node = NULL;
371 struct device_node *entity_ep_node;
372 struct device_node *entity;
373 int ret;
374
375 /*
376 * Locate the connected entity and infer its type from the number of
377 * endpoints.
378 */
379 entity = of_graph_get_remote_port_parent(ep->local_node);
380 if (!entity) {
381 dev_dbg(rcdu->dev, "unconnected endpoint %s, skipping\n",
382 ep->local_node->full_name);
383 return -ENODEV;
384 }
385
386 entity_ep_node = of_parse_phandle(ep->local_node, "remote-endpoint", 0);
387
388 for_each_endpoint_of_node(entity, ep_node) {
389 if (ep_node == entity_ep_node)
390 continue;
391
392 /*
393 * We've found one endpoint other than the input, this must
394 * be an encoder. Locate the connector.
395 */
396 encoder = entity;
397 connector = of_graph_get_remote_port_parent(ep_node);
398 of_node_put(ep_node);
399
400 if (!connector) {
401 dev_warn(rcdu->dev,
402 "no connector for encoder %s, skipping\n",
403 encoder->full_name);
404 of_node_put(entity_ep_node);
405 of_node_put(encoder);
406 return -ENODEV;
407 }
408
409 break;
410 }
411
412 of_node_put(entity_ep_node);
413
414 if (encoder) {
415 /*
416 * If an encoder has been found, get its type based on its
417 * compatible string.
418 */
419 unsigned int i;
420
421 for (i = 0; i < ARRAY_SIZE(encoders); ++i) {
422 if (of_device_is_compatible(encoder,
423 encoders[i].compatible)) {
424 enc_type = encoders[i].type;
425 break;
426 }
427 }
428
429 if (i == ARRAY_SIZE(encoders)) {
430 dev_warn(rcdu->dev,
431 "unknown encoder type for %s, skipping\n",
432 encoder->full_name);
433 of_node_put(encoder);
434 of_node_put(connector);
435 return -EINVAL;
436 }
437 } else {
438 /*
439 * If no encoder has been found the entity must be the
440 * connector.
441 */
442 connector = entity;
443 }
444
445 ret = rcar_du_encoder_init(rcdu, enc_type, output, encoder, connector);
446 of_node_put(encoder);
447 of_node_put(connector);
448
449 if (ret && ret != -EPROBE_DEFER)
450 dev_warn(rcdu->dev,
451 "failed to initialize encoder %s (%d), skipping\n",
452 encoder->full_name, ret);
453
454 return ret;
455}
456
457static int rcar_du_encoders_init(struct rcar_du_device *rcdu)
458{
459 struct device_node *np = rcdu->dev->of_node;
460 struct device_node *ep_node;
461 unsigned int num_encoders = 0;
462
463 /*
464 * Iterate over the endpoints and create one encoder for each output
465 * pipeline.
466 */
467 for_each_endpoint_of_node(np, ep_node) {
468 enum rcar_du_output output;
469 struct of_endpoint ep;
470 unsigned int i;
471 int ret;
472
473 ret = of_graph_parse_endpoint(ep_node, &ep);
474 if (ret < 0) {
475 of_node_put(ep_node);
476 return ret;
477 }
478
479 /* Find the output route corresponding to the port number. */
480 for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) {
481 if (rcdu->info->routes[i].possible_crtcs &&
482 rcdu->info->routes[i].port == ep.port) {
483 output = i;
484 break;
485 }
486 }
487
488 if (i == RCAR_DU_OUTPUT_MAX) {
489 dev_warn(rcdu->dev,
490 "port %u references unexisting output, skipping\n",
491 ep.port);
492 continue;
493 }
494
495 /* Process the output pipeline. */
496 ret = rcar_du_encoders_init_one(rcdu, output, &ep);
497 if (ret < 0) {
498 if (ret == -EPROBE_DEFER) {
499 of_node_put(ep_node);
500 return ret;
501 }
502
503 continue;
504 }
505
506 num_encoders++;
507 }
508
509 return num_encoders;
510}
511
512static int rcar_du_properties_init(struct rcar_du_device *rcdu)
513{
514 rcdu->props.alpha =
515 drm_property_create_range(rcdu->ddev, 0, "alpha", 0, 255);
516 if (rcdu->props.alpha == NULL)
517 return -ENOMEM;
518
519 /* The color key is expressed as an RGB888 triplet stored in a 32-bit
520 * integer in XRGB8888 format. Bit 24 is used as a flag to disable (0)
521 * or enable source color keying (1).
522 */
523 rcdu->props.colorkey =
524 drm_property_create_range(rcdu->ddev, 0, "colorkey",
525 0, 0x01ffffff);
526 if (rcdu->props.colorkey == NULL)
527 return -ENOMEM;
528
529 rcdu->props.zpos =
530 drm_property_create_range(rcdu->ddev, 0, "zpos", 1, 7);
531 if (rcdu->props.zpos == NULL)
532 return -ENOMEM;
533
534 return 0;
535}
536
537int rcar_du_modeset_init(struct rcar_du_device *rcdu)
538{
539 static const unsigned int mmio_offsets[] = {
540 DU0_REG_OFFSET, DU2_REG_OFFSET
541 };
542
543 struct drm_device *dev = rcdu->ddev;
544 struct drm_encoder *encoder;
545 struct drm_fbdev_cma *fbdev;
546 unsigned int num_encoders;
547 unsigned int num_groups;
548 unsigned int i;
549 int ret;
550
551 drm_mode_config_init(dev);
552
553 dev->mode_config.min_width = 0;
554 dev->mode_config.min_height = 0;
555 dev->mode_config.max_width = 4095;
556 dev->mode_config.max_height = 2047;
557 dev->mode_config.funcs = &rcar_du_mode_config_funcs;
558
559 rcdu->num_crtcs = rcdu->info->num_crtcs;
560
561 ret = rcar_du_properties_init(rcdu);
562 if (ret < 0)
563 return ret;
564
565 /* Initialize the groups. */
566 num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);
567
568 for (i = 0; i < num_groups; ++i) {
569 struct rcar_du_group *rgrp = &rcdu->groups[i];
570
571 mutex_init(&rgrp->lock);
572
573 rgrp->dev = rcdu;
574 rgrp->mmio_offset = mmio_offsets[i];
575 rgrp->index = i;
576 rgrp->num_crtcs = min(rcdu->num_crtcs - 2 * i, 2U);
577
578 /* If we have more than one CRTCs in this group pre-associate
579 * the low-order planes with CRTC 0 and the high-order planes
580 * with CRTC 1 to minimize flicker occurring when the
581 * association is changed.
582 */
583 rgrp->dptsr_planes = rgrp->num_crtcs > 1
584 ? (rcdu->info->gen >= 3 ? 0x04 : 0xf0)
585 : 0;
586
587 if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) {
588 ret = rcar_du_planes_init(rgrp);
589 if (ret < 0)
590 return ret;
591 }
592 }
593
594 /* Initialize the compositors. */
595 if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) {
596 for (i = 0; i < rcdu->num_crtcs; ++i) {
597 struct rcar_du_vsp *vsp = &rcdu->vsps[i];
598
599 vsp->index = i;
600 vsp->dev = rcdu;
601 rcdu->crtcs[i].vsp = vsp;
602
603 ret = rcar_du_vsp_init(vsp);
604 if (ret < 0)
605 return ret;
606 }
607 }
608
609 /* Create the CRTCs. */
610 for (i = 0; i < rcdu->num_crtcs; ++i) {
611 struct rcar_du_group *rgrp = &rcdu->groups[i / 2];
612
613 ret = rcar_du_crtc_create(rgrp, i);
614 if (ret < 0)
615 return ret;
616 }
617
618 /* Initialize the encoders. */
619 ret = rcar_du_lvdsenc_init(rcdu);
620 if (ret < 0)
621 return ret;
622
623 ret = rcar_du_encoders_init(rcdu);
624 if (ret < 0)
625 return ret;
626
627 if (ret == 0) {
628 dev_err(rcdu->dev, "error: no encoder could be initialized\n");
629 return -EINVAL;
630 }
631
632 num_encoders = ret;
633
634 /* Set the possible CRTCs and possible clones. There's always at least
635 * one way for all encoders to clone each other, set all bits in the
636 * possible clones field.
637 */
638 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
639 struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
640 const struct rcar_du_output_routing *route =
641 &rcdu->info->routes[renc->output];
642
643 encoder->possible_crtcs = route->possible_crtcs;
644 encoder->possible_clones = (1 << num_encoders) - 1;
645 }
646
647 drm_mode_config_reset(dev);
648
649 drm_kms_helper_poll_init(dev);
650
651 if (dev->mode_config.num_connector) {
652 fbdev = drm_fbdev_cma_init(dev, 32, dev->mode_config.num_crtc,
653 dev->mode_config.num_connector);
654 if (IS_ERR(fbdev))
655 return PTR_ERR(fbdev);
656
657 rcdu->fbdev = fbdev;
658 } else {
659 dev_info(rcdu->dev,
660 "no connector found, disabling fbdev emulation\n");
661 }
662
663 return 0;
664}
1/*
2 * rcar_du_kms.c -- R-Car Display Unit Mode Setting
3 *
4 * Copyright (C) 2013-2015 Renesas Electronics Corporation
5 *
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <drm/drmP.h>
15#include <drm/drm_atomic.h>
16#include <drm/drm_atomic_helper.h>
17#include <drm/drm_crtc.h>
18#include <drm/drm_crtc_helper.h>
19#include <drm/drm_fb_cma_helper.h>
20#include <drm/drm_gem_cma_helper.h>
21#include <drm/drm_gem_framebuffer_helper.h>
22
23#include <linux/of_graph.h>
24#include <linux/wait.h>
25
26#include "rcar_du_crtc.h"
27#include "rcar_du_drv.h"
28#include "rcar_du_encoder.h"
29#include "rcar_du_kms.h"
30#include "rcar_du_regs.h"
31#include "rcar_du_vsp.h"
32
33/* -----------------------------------------------------------------------------
34 * Format helpers
35 */
36
37static const struct rcar_du_format_info rcar_du_format_infos[] = {
38 {
39 .fourcc = DRM_FORMAT_RGB565,
40 .bpp = 16,
41 .planes = 1,
42 .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
43 .edf = PnDDCR4_EDF_NONE,
44 }, {
45 .fourcc = DRM_FORMAT_ARGB1555,
46 .bpp = 16,
47 .planes = 1,
48 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
49 .edf = PnDDCR4_EDF_NONE,
50 }, {
51 .fourcc = DRM_FORMAT_XRGB1555,
52 .bpp = 16,
53 .planes = 1,
54 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
55 .edf = PnDDCR4_EDF_NONE,
56 }, {
57 .fourcc = DRM_FORMAT_XRGB8888,
58 .bpp = 32,
59 .planes = 1,
60 .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
61 .edf = PnDDCR4_EDF_RGB888,
62 }, {
63 .fourcc = DRM_FORMAT_ARGB8888,
64 .bpp = 32,
65 .planes = 1,
66 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
67 .edf = PnDDCR4_EDF_ARGB8888,
68 }, {
69 .fourcc = DRM_FORMAT_UYVY,
70 .bpp = 16,
71 .planes = 1,
72 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
73 .edf = PnDDCR4_EDF_NONE,
74 }, {
75 .fourcc = DRM_FORMAT_YUYV,
76 .bpp = 16,
77 .planes = 1,
78 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
79 .edf = PnDDCR4_EDF_NONE,
80 }, {
81 .fourcc = DRM_FORMAT_NV12,
82 .bpp = 12,
83 .planes = 2,
84 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
85 .edf = PnDDCR4_EDF_NONE,
86 }, {
87 .fourcc = DRM_FORMAT_NV21,
88 .bpp = 12,
89 .planes = 2,
90 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
91 .edf = PnDDCR4_EDF_NONE,
92 }, {
93 .fourcc = DRM_FORMAT_NV16,
94 .bpp = 16,
95 .planes = 2,
96 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
97 .edf = PnDDCR4_EDF_NONE,
98 },
99 /*
100 * The following formats are not supported on Gen2 and thus have no
101 * associated .pnmr or .edf settings.
102 */
103 {
104 .fourcc = DRM_FORMAT_NV61,
105 .bpp = 16,
106 .planes = 2,
107 }, {
108 .fourcc = DRM_FORMAT_YUV420,
109 .bpp = 12,
110 .planes = 3,
111 }, {
112 .fourcc = DRM_FORMAT_YVU420,
113 .bpp = 12,
114 .planes = 3,
115 }, {
116 .fourcc = DRM_FORMAT_YUV422,
117 .bpp = 16,
118 .planes = 3,
119 }, {
120 .fourcc = DRM_FORMAT_YVU422,
121 .bpp = 16,
122 .planes = 3,
123 }, {
124 .fourcc = DRM_FORMAT_YUV444,
125 .bpp = 24,
126 .planes = 3,
127 }, {
128 .fourcc = DRM_FORMAT_YVU444,
129 .bpp = 24,
130 .planes = 3,
131 },
132};
133
134const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
135{
136 unsigned int i;
137
138 for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
139 if (rcar_du_format_infos[i].fourcc == fourcc)
140 return &rcar_du_format_infos[i];
141 }
142
143 return NULL;
144}
145
146/* -----------------------------------------------------------------------------
147 * Frame buffer
148 */
149
150int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
151 struct drm_mode_create_dumb *args)
152{
153 struct rcar_du_device *rcdu = dev->dev_private;
154 unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
155 unsigned int align;
156
157 /*
158 * The R8A7779 DU requires a 16 pixels pitch alignment as documented,
159 * but the R8A7790 DU seems to require a 128 bytes pitch alignment.
160 */
161 if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
162 align = 128;
163 else
164 align = 16 * args->bpp / 8;
165
166 args->pitch = roundup(min_pitch, align);
167
168 return drm_gem_cma_dumb_create_internal(file, dev, args);
169}
170
171static struct drm_framebuffer *
172rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
173 const struct drm_mode_fb_cmd2 *mode_cmd)
174{
175 struct rcar_du_device *rcdu = dev->dev_private;
176 const struct rcar_du_format_info *format;
177 unsigned int max_pitch;
178 unsigned int align;
179 unsigned int bpp;
180 unsigned int i;
181
182 format = rcar_du_format_info(mode_cmd->pixel_format);
183 if (format == NULL) {
184 dev_dbg(dev->dev, "unsupported pixel format %08x\n",
185 mode_cmd->pixel_format);
186 return ERR_PTR(-EINVAL);
187 }
188
189 /*
190 * The pitch and alignment constraints are expressed in pixels on the
191 * hardware side and in bytes in the DRM API.
192 */
193 bpp = format->planes == 1 ? format->bpp / 8 : 1;
194 max_pitch = 4096 * bpp;
195
196 if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
197 align = 128;
198 else
199 align = 16 * bpp;
200
201 if (mode_cmd->pitches[0] & (align - 1) ||
202 mode_cmd->pitches[0] >= max_pitch) {
203 dev_dbg(dev->dev, "invalid pitch value %u\n",
204 mode_cmd->pitches[0]);
205 return ERR_PTR(-EINVAL);
206 }
207
208 for (i = 1; i < format->planes; ++i) {
209 if (mode_cmd->pitches[i] != mode_cmd->pitches[0]) {
210 dev_dbg(dev->dev,
211 "luma and chroma pitches do not match\n");
212 return ERR_PTR(-EINVAL);
213 }
214 }
215
216 return drm_gem_fb_create(dev, file_priv, mode_cmd);
217}
218
219static void rcar_du_output_poll_changed(struct drm_device *dev)
220{
221 struct rcar_du_device *rcdu = dev->dev_private;
222
223 drm_fbdev_cma_hotplug_event(rcdu->fbdev);
224}
225
226/* -----------------------------------------------------------------------------
227 * Atomic Check and Update
228 */
229
230static int rcar_du_atomic_check(struct drm_device *dev,
231 struct drm_atomic_state *state)
232{
233 struct rcar_du_device *rcdu = dev->dev_private;
234 int ret;
235
236 ret = drm_atomic_helper_check_modeset(dev, state);
237 if (ret)
238 return ret;
239
240 ret = drm_atomic_normalize_zpos(dev, state);
241 if (ret)
242 return ret;
243
244 ret = drm_atomic_helper_check_planes(dev, state);
245 if (ret)
246 return ret;
247
248 if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE))
249 return 0;
250
251 return rcar_du_atomic_check_planes(dev, state);
252}
253
254static void rcar_du_atomic_commit_tail(struct drm_atomic_state *old_state)
255{
256 struct drm_device *dev = old_state->dev;
257
258 /* Apply the atomic update. */
259 drm_atomic_helper_commit_modeset_disables(dev, old_state);
260 drm_atomic_helper_commit_planes(dev, old_state,
261 DRM_PLANE_COMMIT_ACTIVE_ONLY);
262 drm_atomic_helper_commit_modeset_enables(dev, old_state);
263
264 drm_atomic_helper_commit_hw_done(old_state);
265 drm_atomic_helper_wait_for_flip_done(dev, old_state);
266
267 drm_atomic_helper_cleanup_planes(dev, old_state);
268}
269
270/* -----------------------------------------------------------------------------
271 * Initialization
272 */
273
274static const struct drm_mode_config_helper_funcs rcar_du_mode_config_helper = {
275 .atomic_commit_tail = rcar_du_atomic_commit_tail,
276};
277
278static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
279 .fb_create = rcar_du_fb_create,
280 .output_poll_changed = rcar_du_output_poll_changed,
281 .atomic_check = rcar_du_atomic_check,
282 .atomic_commit = drm_atomic_helper_commit,
283};
284
285static int rcar_du_encoders_init_one(struct rcar_du_device *rcdu,
286 enum rcar_du_output output,
287 struct of_endpoint *ep)
288{
289 struct device_node *connector = NULL;
290 struct device_node *encoder = NULL;
291 struct device_node *ep_node = NULL;
292 struct device_node *entity_ep_node;
293 struct device_node *entity;
294 int ret;
295
296 /*
297 * Locate the connected entity and infer its type from the number of
298 * endpoints.
299 */
300 entity = of_graph_get_remote_port_parent(ep->local_node);
301 if (!entity) {
302 dev_dbg(rcdu->dev, "unconnected endpoint %pOF, skipping\n",
303 ep->local_node);
304 return -ENODEV;
305 }
306
307 if (!of_device_is_available(entity)) {
308 dev_dbg(rcdu->dev,
309 "connected entity %pOF is disabled, skipping\n",
310 entity);
311 return -ENODEV;
312 }
313
314 entity_ep_node = of_graph_get_remote_endpoint(ep->local_node);
315
316 for_each_endpoint_of_node(entity, ep_node) {
317 if (ep_node == entity_ep_node)
318 continue;
319
320 /*
321 * We've found one endpoint other than the input, this must
322 * be an encoder. Locate the connector.
323 */
324 encoder = entity;
325 connector = of_graph_get_remote_port_parent(ep_node);
326 of_node_put(ep_node);
327
328 if (!connector) {
329 dev_warn(rcdu->dev,
330 "no connector for encoder %pOF, skipping\n",
331 encoder);
332 of_node_put(entity_ep_node);
333 of_node_put(encoder);
334 return -ENODEV;
335 }
336
337 break;
338 }
339
340 of_node_put(entity_ep_node);
341
342 if (!encoder) {
343 dev_warn(rcdu->dev,
344 "no encoder found for endpoint %pOF, skipping\n",
345 ep->local_node);
346 return -ENODEV;
347 }
348
349 ret = rcar_du_encoder_init(rcdu, output, encoder, connector);
350 if (ret && ret != -EPROBE_DEFER)
351 dev_warn(rcdu->dev,
352 "failed to initialize encoder %pOF on output %u (%d), skipping\n",
353 encoder, output, ret);
354
355 of_node_put(encoder);
356 of_node_put(connector);
357
358 return ret;
359}
360
361static int rcar_du_encoders_init(struct rcar_du_device *rcdu)
362{
363 struct device_node *np = rcdu->dev->of_node;
364 struct device_node *ep_node;
365 unsigned int num_encoders = 0;
366
367 /*
368 * Iterate over the endpoints and create one encoder for each output
369 * pipeline.
370 */
371 for_each_endpoint_of_node(np, ep_node) {
372 enum rcar_du_output output;
373 struct of_endpoint ep;
374 unsigned int i;
375 int ret;
376
377 ret = of_graph_parse_endpoint(ep_node, &ep);
378 if (ret < 0) {
379 of_node_put(ep_node);
380 return ret;
381 }
382
383 /* Find the output route corresponding to the port number. */
384 for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) {
385 if (rcdu->info->routes[i].possible_crtcs &&
386 rcdu->info->routes[i].port == ep.port) {
387 output = i;
388 break;
389 }
390 }
391
392 if (i == RCAR_DU_OUTPUT_MAX) {
393 dev_warn(rcdu->dev,
394 "port %u references unexisting output, skipping\n",
395 ep.port);
396 continue;
397 }
398
399 /* Process the output pipeline. */
400 ret = rcar_du_encoders_init_one(rcdu, output, &ep);
401 if (ret < 0) {
402 if (ret == -EPROBE_DEFER) {
403 of_node_put(ep_node);
404 return ret;
405 }
406
407 continue;
408 }
409
410 num_encoders++;
411 }
412
413 return num_encoders;
414}
415
416static int rcar_du_properties_init(struct rcar_du_device *rcdu)
417{
418 rcdu->props.alpha =
419 drm_property_create_range(rcdu->ddev, 0, "alpha", 0, 255);
420 if (rcdu->props.alpha == NULL)
421 return -ENOMEM;
422
423 /*
424 * The color key is expressed as an RGB888 triplet stored in a 32-bit
425 * integer in XRGB8888 format. Bit 24 is used as a flag to disable (0)
426 * or enable source color keying (1).
427 */
428 rcdu->props.colorkey =
429 drm_property_create_range(rcdu->ddev, 0, "colorkey",
430 0, 0x01ffffff);
431 if (rcdu->props.colorkey == NULL)
432 return -ENOMEM;
433
434 return 0;
435}
436
437static int rcar_du_vsps_init(struct rcar_du_device *rcdu)
438{
439 const struct device_node *np = rcdu->dev->of_node;
440 struct of_phandle_args args;
441 struct {
442 struct device_node *np;
443 unsigned int crtcs_mask;
444 } vsps[RCAR_DU_MAX_VSPS] = { { 0, }, };
445 unsigned int vsps_count = 0;
446 unsigned int cells;
447 unsigned int i;
448 int ret;
449
450 /*
451 * First parse the DT vsps property to populate the list of VSPs. Each
452 * entry contains a pointer to the VSP DT node and a bitmask of the
453 * connected DU CRTCs.
454 */
455 cells = of_property_count_u32_elems(np, "vsps") / rcdu->num_crtcs - 1;
456 if (cells > 1)
457 return -EINVAL;
458
459 for (i = 0; i < rcdu->num_crtcs; ++i) {
460 unsigned int j;
461
462 ret = of_parse_phandle_with_fixed_args(np, "vsps", cells, i,
463 &args);
464 if (ret < 0)
465 goto error;
466
467 /*
468 * Add the VSP to the list or update the corresponding existing
469 * entry if the VSP has already been added.
470 */
471 for (j = 0; j < vsps_count; ++j) {
472 if (vsps[j].np == args.np)
473 break;
474 }
475
476 if (j < vsps_count)
477 of_node_put(args.np);
478 else
479 vsps[vsps_count++].np = args.np;
480
481 vsps[j].crtcs_mask |= BIT(i);
482
483 /* Store the VSP pointer and pipe index in the CRTC. */
484 rcdu->crtcs[i].vsp = &rcdu->vsps[j];
485 rcdu->crtcs[i].vsp_pipe = cells >= 1 ? args.args[0] : 0;
486 }
487
488 /*
489 * Then initialize all the VSPs from the node pointers and CRTCs bitmask
490 * computed previously.
491 */
492 for (i = 0; i < vsps_count; ++i) {
493 struct rcar_du_vsp *vsp = &rcdu->vsps[i];
494
495 vsp->index = i;
496 vsp->dev = rcdu;
497
498 ret = rcar_du_vsp_init(vsp, vsps[i].np, vsps[i].crtcs_mask);
499 if (ret < 0)
500 goto error;
501 }
502
503 return 0;
504
505error:
506 for (i = 0; i < ARRAY_SIZE(vsps); ++i)
507 of_node_put(vsps[i].np);
508
509 return ret;
510}
511
512int rcar_du_modeset_init(struct rcar_du_device *rcdu)
513{
514 static const unsigned int mmio_offsets[] = {
515 DU0_REG_OFFSET, DU2_REG_OFFSET
516 };
517
518 struct drm_device *dev = rcdu->ddev;
519 struct drm_encoder *encoder;
520 struct drm_fbdev_cma *fbdev;
521 unsigned int num_encoders;
522 unsigned int num_groups;
523 unsigned int i;
524 int ret;
525
526 drm_mode_config_init(dev);
527
528 dev->mode_config.min_width = 0;
529 dev->mode_config.min_height = 0;
530 dev->mode_config.max_width = 4095;
531 dev->mode_config.max_height = 2047;
532 dev->mode_config.funcs = &rcar_du_mode_config_funcs;
533 dev->mode_config.helper_private = &rcar_du_mode_config_helper;
534
535 rcdu->num_crtcs = rcdu->info->num_crtcs;
536
537 ret = rcar_du_properties_init(rcdu);
538 if (ret < 0)
539 return ret;
540
541 /*
542 * Initialize vertical blanking interrupts handling. Start with vblank
543 * disabled for all CRTCs.
544 */
545 ret = drm_vblank_init(dev, (1 << rcdu->info->num_crtcs) - 1);
546 if (ret < 0)
547 return ret;
548
549 /* Initialize the groups. */
550 num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);
551
552 for (i = 0; i < num_groups; ++i) {
553 struct rcar_du_group *rgrp = &rcdu->groups[i];
554
555 mutex_init(&rgrp->lock);
556
557 rgrp->dev = rcdu;
558 rgrp->mmio_offset = mmio_offsets[i];
559 rgrp->index = i;
560 rgrp->num_crtcs = min(rcdu->num_crtcs - 2 * i, 2U);
561
562 /*
563 * If we have more than one CRTCs in this group pre-associate
564 * the low-order planes with CRTC 0 and the high-order planes
565 * with CRTC 1 to minimize flicker occurring when the
566 * association is changed.
567 */
568 rgrp->dptsr_planes = rgrp->num_crtcs > 1
569 ? (rcdu->info->gen >= 3 ? 0x04 : 0xf0)
570 : 0;
571
572 if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) {
573 ret = rcar_du_planes_init(rgrp);
574 if (ret < 0)
575 return ret;
576 }
577 }
578
579 /* Initialize the compositors. */
580 if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) {
581 ret = rcar_du_vsps_init(rcdu);
582 if (ret < 0)
583 return ret;
584 }
585
586 /* Create the CRTCs. */
587 for (i = 0; i < rcdu->num_crtcs; ++i) {
588 struct rcar_du_group *rgrp = &rcdu->groups[i / 2];
589
590 ret = rcar_du_crtc_create(rgrp, i);
591 if (ret < 0)
592 return ret;
593 }
594
595 /* Initialize the encoders. */
596 ret = rcar_du_encoders_init(rcdu);
597 if (ret < 0)
598 return ret;
599
600 if (ret == 0) {
601 dev_err(rcdu->dev, "error: no encoder could be initialized\n");
602 return -EINVAL;
603 }
604
605 num_encoders = ret;
606
607 /*
608 * Set the possible CRTCs and possible clones. There's always at least
609 * one way for all encoders to clone each other, set all bits in the
610 * possible clones field.
611 */
612 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
613 struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
614 const struct rcar_du_output_routing *route =
615 &rcdu->info->routes[renc->output];
616
617 encoder->possible_crtcs = route->possible_crtcs;
618 encoder->possible_clones = (1 << num_encoders) - 1;
619 }
620
621 drm_mode_config_reset(dev);
622
623 drm_kms_helper_poll_init(dev);
624
625 if (dev->mode_config.num_connector) {
626 fbdev = drm_fbdev_cma_init(dev, 32,
627 dev->mode_config.num_connector);
628 if (IS_ERR(fbdev))
629 return PTR_ERR(fbdev);
630
631 rcdu->fbdev = fbdev;
632 } else {
633 dev_info(rcdu->dev,
634 "no connector found, disabling fbdev emulation\n");
635 }
636
637 return 0;
638}