Loading...
1/*
2 * NEC NL8048HL11 Panel driver
3 *
4 * Copyright (C) 2010 Texas Instruments Inc.
5 * Author: Erik Gilling <konkers@android.com>
6 * Converted to new DSS device model: Tomi Valkeinen <tomi.valkeinen@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/delay.h>
16#include <linux/spi/spi.h>
17#include <linux/fb.h>
18#include <linux/gpio.h>
19#include <linux/of_gpio.h>
20
21#include <video/omapdss.h>
22
23struct panel_drv_data {
24 struct omap_dss_device dssdev;
25 struct omap_dss_device *in;
26
27 struct omap_video_timings videomode;
28
29 int data_lines;
30
31 int res_gpio;
32 int qvga_gpio;
33
34 struct spi_device *spi;
35};
36
37#define LCD_XRES 800
38#define LCD_YRES 480
39/*
40 * NEC PIX Clock Ratings
41 * MIN:21.8MHz TYP:23.8MHz MAX:25.7MHz
42 */
43#define LCD_PIXEL_CLOCK 23800000
44
45static const struct {
46 unsigned char addr;
47 unsigned char dat;
48} nec_8048_init_seq[] = {
49 { 3, 0x01 }, { 0, 0x00 }, { 1, 0x01 }, { 4, 0x00 }, { 5, 0x14 },
50 { 6, 0x24 }, { 16, 0xD7 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x55 },
51 { 20, 0x01 }, { 21, 0x70 }, { 22, 0x1E }, { 23, 0x25 }, { 24, 0x25 },
52 { 25, 0x02 }, { 26, 0x02 }, { 27, 0xA0 }, { 32, 0x2F }, { 33, 0x0F },
53 { 34, 0x0F }, { 35, 0x0F }, { 36, 0x0F }, { 37, 0x0F }, { 38, 0x0F },
54 { 39, 0x00 }, { 40, 0x02 }, { 41, 0x02 }, { 42, 0x02 }, { 43, 0x0F },
55 { 44, 0x0F }, { 45, 0x0F }, { 46, 0x0F }, { 47, 0x0F }, { 48, 0x0F },
56 { 49, 0x0F }, { 50, 0x00 }, { 51, 0x02 }, { 52, 0x02 }, { 53, 0x02 },
57 { 80, 0x0C }, { 83, 0x42 }, { 84, 0x42 }, { 85, 0x41 }, { 86, 0x14 },
58 { 89, 0x88 }, { 90, 0x01 }, { 91, 0x00 }, { 92, 0x02 }, { 93, 0x0C },
59 { 94, 0x1C }, { 95, 0x27 }, { 98, 0x49 }, { 99, 0x27 }, { 102, 0x76 },
60 { 103, 0x27 }, { 112, 0x01 }, { 113, 0x0E }, { 114, 0x02 },
61 { 115, 0x0C }, { 118, 0x0C }, { 121, 0x30 }, { 130, 0x00 },
62 { 131, 0x00 }, { 132, 0xFC }, { 134, 0x00 }, { 136, 0x00 },
63 { 138, 0x00 }, { 139, 0x00 }, { 140, 0x00 }, { 141, 0xFC },
64 { 143, 0x00 }, { 145, 0x00 }, { 147, 0x00 }, { 148, 0x00 },
65 { 149, 0x00 }, { 150, 0xFC }, { 152, 0x00 }, { 154, 0x00 },
66 { 156, 0x00 }, { 157, 0x00 }, { 2, 0x00 },
67};
68
69static const struct omap_video_timings nec_8048_panel_timings = {
70 .x_res = LCD_XRES,
71 .y_res = LCD_YRES,
72 .pixelclock = LCD_PIXEL_CLOCK,
73 .hfp = 6,
74 .hsw = 1,
75 .hbp = 4,
76 .vfp = 3,
77 .vsw = 1,
78 .vbp = 4,
79
80 .vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
81 .hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
82 .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
83 .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
84 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
85};
86
87#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
88
89static int nec_8048_spi_send(struct spi_device *spi, unsigned char reg_addr,
90 unsigned char reg_data)
91{
92 int ret = 0;
93 unsigned int cmd = 0, data = 0;
94
95 cmd = 0x0000 | reg_addr; /* register address write */
96 data = 0x0100 | reg_data; /* register data write */
97 data = (cmd << 16) | data;
98
99 ret = spi_write(spi, (unsigned char *)&data, 4);
100 if (ret)
101 pr_err("error in spi_write %x\n", data);
102
103 return ret;
104}
105
106static int init_nec_8048_wvga_lcd(struct spi_device *spi)
107{
108 unsigned int i;
109 /* Initialization Sequence */
110 /* nec_8048_spi_send(spi, REG, VAL) */
111 for (i = 0; i < (ARRAY_SIZE(nec_8048_init_seq) - 1); i++)
112 nec_8048_spi_send(spi, nec_8048_init_seq[i].addr,
113 nec_8048_init_seq[i].dat);
114 udelay(20);
115 nec_8048_spi_send(spi, nec_8048_init_seq[i].addr,
116 nec_8048_init_seq[i].dat);
117 return 0;
118}
119
120static int nec_8048_connect(struct omap_dss_device *dssdev)
121{
122 struct panel_drv_data *ddata = to_panel_data(dssdev);
123 struct omap_dss_device *in = ddata->in;
124 int r;
125
126 if (omapdss_device_is_connected(dssdev))
127 return 0;
128
129 r = in->ops.dpi->connect(in, dssdev);
130 if (r)
131 return r;
132
133 return 0;
134}
135
136static void nec_8048_disconnect(struct omap_dss_device *dssdev)
137{
138 struct panel_drv_data *ddata = to_panel_data(dssdev);
139 struct omap_dss_device *in = ddata->in;
140
141 if (!omapdss_device_is_connected(dssdev))
142 return;
143
144 in->ops.dpi->disconnect(in, dssdev);
145}
146
147static int nec_8048_enable(struct omap_dss_device *dssdev)
148{
149 struct panel_drv_data *ddata = to_panel_data(dssdev);
150 struct omap_dss_device *in = ddata->in;
151 int r;
152
153 if (!omapdss_device_is_connected(dssdev))
154 return -ENODEV;
155
156 if (omapdss_device_is_enabled(dssdev))
157 return 0;
158
159 if (ddata->data_lines)
160 in->ops.dpi->set_data_lines(in, ddata->data_lines);
161 in->ops.dpi->set_timings(in, &ddata->videomode);
162
163 r = in->ops.dpi->enable(in);
164 if (r)
165 return r;
166
167 if (gpio_is_valid(ddata->res_gpio))
168 gpio_set_value_cansleep(ddata->res_gpio, 1);
169
170 dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
171
172 return 0;
173}
174
175static void nec_8048_disable(struct omap_dss_device *dssdev)
176{
177 struct panel_drv_data *ddata = to_panel_data(dssdev);
178 struct omap_dss_device *in = ddata->in;
179
180 if (!omapdss_device_is_enabled(dssdev))
181 return;
182
183 if (gpio_is_valid(ddata->res_gpio))
184 gpio_set_value_cansleep(ddata->res_gpio, 0);
185
186 in->ops.dpi->disable(in);
187
188 dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
189}
190
191static void nec_8048_set_timings(struct omap_dss_device *dssdev,
192 struct omap_video_timings *timings)
193{
194 struct panel_drv_data *ddata = to_panel_data(dssdev);
195 struct omap_dss_device *in = ddata->in;
196
197 ddata->videomode = *timings;
198 dssdev->panel.timings = *timings;
199
200 in->ops.dpi->set_timings(in, timings);
201}
202
203static void nec_8048_get_timings(struct omap_dss_device *dssdev,
204 struct omap_video_timings *timings)
205{
206 struct panel_drv_data *ddata = to_panel_data(dssdev);
207
208 *timings = ddata->videomode;
209}
210
211static int nec_8048_check_timings(struct omap_dss_device *dssdev,
212 struct omap_video_timings *timings)
213{
214 struct panel_drv_data *ddata = to_panel_data(dssdev);
215 struct omap_dss_device *in = ddata->in;
216
217 return in->ops.dpi->check_timings(in, timings);
218}
219
220static struct omap_dss_driver nec_8048_ops = {
221 .connect = nec_8048_connect,
222 .disconnect = nec_8048_disconnect,
223
224 .enable = nec_8048_enable,
225 .disable = nec_8048_disable,
226
227 .set_timings = nec_8048_set_timings,
228 .get_timings = nec_8048_get_timings,
229 .check_timings = nec_8048_check_timings,
230
231 .get_resolution = omapdss_default_get_resolution,
232};
233
234static int nec_8048_probe_of(struct spi_device *spi)
235{
236 struct device_node *node = spi->dev.of_node;
237 struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
238 struct omap_dss_device *in;
239 int gpio;
240
241 gpio = of_get_named_gpio(node, "reset-gpios", 0);
242 if (!gpio_is_valid(gpio)) {
243 dev_err(&spi->dev, "failed to parse enable gpio\n");
244 return gpio;
245 }
246 ddata->res_gpio = gpio;
247
248 /* XXX the panel spec doesn't mention any QVGA pin?? */
249 ddata->qvga_gpio = -ENOENT;
250
251 in = omapdss_of_find_source_for_first_ep(node);
252 if (IS_ERR(in)) {
253 dev_err(&spi->dev, "failed to find video source\n");
254 return PTR_ERR(in);
255 }
256
257 ddata->in = in;
258
259 return 0;
260}
261
262static int nec_8048_probe(struct spi_device *spi)
263{
264 struct panel_drv_data *ddata;
265 struct omap_dss_device *dssdev;
266 int r;
267
268 dev_dbg(&spi->dev, "%s\n", __func__);
269
270 spi->mode = SPI_MODE_0;
271 spi->bits_per_word = 32;
272
273 r = spi_setup(spi);
274 if (r < 0) {
275 dev_err(&spi->dev, "spi_setup failed: %d\n", r);
276 return r;
277 }
278
279 init_nec_8048_wvga_lcd(spi);
280
281 ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL);
282 if (ddata == NULL)
283 return -ENOMEM;
284
285 dev_set_drvdata(&spi->dev, ddata);
286
287 ddata->spi = spi;
288
289 if (!spi->dev.of_node)
290 return -ENODEV;
291
292 r = nec_8048_probe_of(spi);
293 if (r)
294 return r;
295
296 if (gpio_is_valid(ddata->qvga_gpio)) {
297 r = devm_gpio_request_one(&spi->dev, ddata->qvga_gpio,
298 GPIOF_OUT_INIT_HIGH, "lcd QVGA");
299 if (r)
300 goto err_gpio;
301 }
302
303 if (gpio_is_valid(ddata->res_gpio)) {
304 r = devm_gpio_request_one(&spi->dev, ddata->res_gpio,
305 GPIOF_OUT_INIT_LOW, "lcd RES");
306 if (r)
307 goto err_gpio;
308 }
309
310 ddata->videomode = nec_8048_panel_timings;
311
312 dssdev = &ddata->dssdev;
313 dssdev->dev = &spi->dev;
314 dssdev->driver = &nec_8048_ops;
315 dssdev->type = OMAP_DISPLAY_TYPE_DPI;
316 dssdev->owner = THIS_MODULE;
317 dssdev->panel.timings = ddata->videomode;
318
319 r = omapdss_register_display(dssdev);
320 if (r) {
321 dev_err(&spi->dev, "Failed to register panel\n");
322 goto err_reg;
323 }
324
325 return 0;
326
327err_reg:
328err_gpio:
329 omap_dss_put_device(ddata->in);
330 return r;
331}
332
333static int nec_8048_remove(struct spi_device *spi)
334{
335 struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
336 struct omap_dss_device *dssdev = &ddata->dssdev;
337 struct omap_dss_device *in = ddata->in;
338
339 dev_dbg(&ddata->spi->dev, "%s\n", __func__);
340
341 omapdss_unregister_display(dssdev);
342
343 nec_8048_disable(dssdev);
344 nec_8048_disconnect(dssdev);
345
346 omap_dss_put_device(in);
347
348 return 0;
349}
350
351#ifdef CONFIG_PM_SLEEP
352static int nec_8048_suspend(struct device *dev)
353{
354 struct spi_device *spi = to_spi_device(dev);
355
356 nec_8048_spi_send(spi, 2, 0x01);
357 mdelay(40);
358
359 return 0;
360}
361
362static int nec_8048_resume(struct device *dev)
363{
364 struct spi_device *spi = to_spi_device(dev);
365
366 /* reinitialize the panel */
367 spi_setup(spi);
368 nec_8048_spi_send(spi, 2, 0x00);
369 init_nec_8048_wvga_lcd(spi);
370
371 return 0;
372}
373static SIMPLE_DEV_PM_OPS(nec_8048_pm_ops, nec_8048_suspend,
374 nec_8048_resume);
375#define NEC_8048_PM_OPS (&nec_8048_pm_ops)
376#else
377#define NEC_8048_PM_OPS NULL
378#endif
379
380static const struct of_device_id nec_8048_of_match[] = {
381 { .compatible = "omapdss,nec,nl8048hl11", },
382 {},
383};
384
385MODULE_DEVICE_TABLE(of, nec_8048_of_match);
386
387static struct spi_driver nec_8048_driver = {
388 .driver = {
389 .name = "panel-nec-nl8048hl11",
390 .pm = NEC_8048_PM_OPS,
391 .of_match_table = nec_8048_of_match,
392 .suppress_bind_attrs = true,
393 },
394 .probe = nec_8048_probe,
395 .remove = nec_8048_remove,
396};
397
398module_spi_driver(nec_8048_driver);
399
400MODULE_ALIAS("spi:nec,nl8048hl11");
401MODULE_AUTHOR("Erik Gilling <konkers@android.com>");
402MODULE_DESCRIPTION("NEC-NL8048HL11 Driver");
403MODULE_LICENSE("GPL");
1/*
2 * NEC NL8048HL11 Panel driver
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Author: Erik Gilling <konkers@android.com>
6 * Converted to new DSS device model: Tomi Valkeinen <tomi.valkeinen@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/delay.h>
16#include <linux/spi/spi.h>
17#include <linux/gpio/consumer.h>
18#include <linux/of_gpio.h>
19
20#include "../dss/omapdss.h"
21
22struct panel_drv_data {
23 struct omap_dss_device dssdev;
24 struct omap_dss_device *in;
25
26 struct videomode vm;
27
28 int res_gpio;
29 int qvga_gpio;
30
31 struct spi_device *spi;
32};
33
34#define LCD_XRES 800
35#define LCD_YRES 480
36/*
37 * NEC PIX Clock Ratings
38 * MIN:21.8MHz TYP:23.8MHz MAX:25.7MHz
39 */
40#define LCD_PIXEL_CLOCK 23800000
41
42static const struct {
43 unsigned char addr;
44 unsigned char dat;
45} nec_8048_init_seq[] = {
46 { 3, 0x01 }, { 0, 0x00 }, { 1, 0x01 }, { 4, 0x00 }, { 5, 0x14 },
47 { 6, 0x24 }, { 16, 0xD7 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x55 },
48 { 20, 0x01 }, { 21, 0x70 }, { 22, 0x1E }, { 23, 0x25 }, { 24, 0x25 },
49 { 25, 0x02 }, { 26, 0x02 }, { 27, 0xA0 }, { 32, 0x2F }, { 33, 0x0F },
50 { 34, 0x0F }, { 35, 0x0F }, { 36, 0x0F }, { 37, 0x0F }, { 38, 0x0F },
51 { 39, 0x00 }, { 40, 0x02 }, { 41, 0x02 }, { 42, 0x02 }, { 43, 0x0F },
52 { 44, 0x0F }, { 45, 0x0F }, { 46, 0x0F }, { 47, 0x0F }, { 48, 0x0F },
53 { 49, 0x0F }, { 50, 0x00 }, { 51, 0x02 }, { 52, 0x02 }, { 53, 0x02 },
54 { 80, 0x0C }, { 83, 0x42 }, { 84, 0x42 }, { 85, 0x41 }, { 86, 0x14 },
55 { 89, 0x88 }, { 90, 0x01 }, { 91, 0x00 }, { 92, 0x02 }, { 93, 0x0C },
56 { 94, 0x1C }, { 95, 0x27 }, { 98, 0x49 }, { 99, 0x27 }, { 102, 0x76 },
57 { 103, 0x27 }, { 112, 0x01 }, { 113, 0x0E }, { 114, 0x02 },
58 { 115, 0x0C }, { 118, 0x0C }, { 121, 0x30 }, { 130, 0x00 },
59 { 131, 0x00 }, { 132, 0xFC }, { 134, 0x00 }, { 136, 0x00 },
60 { 138, 0x00 }, { 139, 0x00 }, { 140, 0x00 }, { 141, 0xFC },
61 { 143, 0x00 }, { 145, 0x00 }, { 147, 0x00 }, { 148, 0x00 },
62 { 149, 0x00 }, { 150, 0xFC }, { 152, 0x00 }, { 154, 0x00 },
63 { 156, 0x00 }, { 157, 0x00 }, { 2, 0x00 },
64};
65
66static const struct videomode nec_8048_panel_vm = {
67 .hactive = LCD_XRES,
68 .vactive = LCD_YRES,
69 .pixelclock = LCD_PIXEL_CLOCK,
70 .hfront_porch = 6,
71 .hsync_len = 1,
72 .hback_porch = 4,
73 .vfront_porch = 3,
74 .vsync_len = 1,
75 .vback_porch = 4,
76
77 .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
78 DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_SYNC_POSEDGE |
79 DISPLAY_FLAGS_PIXDATA_POSEDGE,
80};
81
82#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
83
84static int nec_8048_spi_send(struct spi_device *spi, unsigned char reg_addr,
85 unsigned char reg_data)
86{
87 int ret = 0;
88 unsigned int cmd = 0, data = 0;
89
90 cmd = 0x0000 | reg_addr; /* register address write */
91 data = 0x0100 | reg_data; /* register data write */
92 data = (cmd << 16) | data;
93
94 ret = spi_write(spi, (unsigned char *)&data, 4);
95 if (ret)
96 pr_err("error in spi_write %x\n", data);
97
98 return ret;
99}
100
101static int init_nec_8048_wvga_lcd(struct spi_device *spi)
102{
103 unsigned int i;
104 /* Initialization Sequence */
105 /* nec_8048_spi_send(spi, REG, VAL) */
106 for (i = 0; i < (ARRAY_SIZE(nec_8048_init_seq) - 1); i++)
107 nec_8048_spi_send(spi, nec_8048_init_seq[i].addr,
108 nec_8048_init_seq[i].dat);
109 udelay(20);
110 nec_8048_spi_send(spi, nec_8048_init_seq[i].addr,
111 nec_8048_init_seq[i].dat);
112 return 0;
113}
114
115static int nec_8048_connect(struct omap_dss_device *dssdev)
116{
117 struct panel_drv_data *ddata = to_panel_data(dssdev);
118 struct omap_dss_device *in;
119 int r;
120
121 if (omapdss_device_is_connected(dssdev))
122 return 0;
123
124 in = omapdss_of_find_source_for_first_ep(dssdev->dev->of_node);
125 if (IS_ERR(in)) {
126 dev_err(dssdev->dev, "failed to find video source\n");
127 return PTR_ERR(in);
128 }
129
130 r = in->ops.dpi->connect(in, dssdev);
131 if (r) {
132 omap_dss_put_device(in);
133 return r;
134 }
135
136 ddata->in = in;
137 return 0;
138}
139
140static void nec_8048_disconnect(struct omap_dss_device *dssdev)
141{
142 struct panel_drv_data *ddata = to_panel_data(dssdev);
143 struct omap_dss_device *in = ddata->in;
144
145 if (!omapdss_device_is_connected(dssdev))
146 return;
147
148 in->ops.dpi->disconnect(in, dssdev);
149
150 omap_dss_put_device(in);
151 ddata->in = NULL;
152}
153
154static int nec_8048_enable(struct omap_dss_device *dssdev)
155{
156 struct panel_drv_data *ddata = to_panel_data(dssdev);
157 struct omap_dss_device *in = ddata->in;
158 int r;
159
160 if (!omapdss_device_is_connected(dssdev))
161 return -ENODEV;
162
163 if (omapdss_device_is_enabled(dssdev))
164 return 0;
165
166 in->ops.dpi->set_timings(in, &ddata->vm);
167
168 r = in->ops.dpi->enable(in);
169 if (r)
170 return r;
171
172 if (gpio_is_valid(ddata->res_gpio))
173 gpio_set_value_cansleep(ddata->res_gpio, 1);
174
175 dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
176
177 return 0;
178}
179
180static void nec_8048_disable(struct omap_dss_device *dssdev)
181{
182 struct panel_drv_data *ddata = to_panel_data(dssdev);
183 struct omap_dss_device *in = ddata->in;
184
185 if (!omapdss_device_is_enabled(dssdev))
186 return;
187
188 if (gpio_is_valid(ddata->res_gpio))
189 gpio_set_value_cansleep(ddata->res_gpio, 0);
190
191 in->ops.dpi->disable(in);
192
193 dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
194}
195
196static void nec_8048_set_timings(struct omap_dss_device *dssdev,
197 struct videomode *vm)
198{
199 struct panel_drv_data *ddata = to_panel_data(dssdev);
200 struct omap_dss_device *in = ddata->in;
201
202 ddata->vm = *vm;
203 dssdev->panel.vm = *vm;
204
205 in->ops.dpi->set_timings(in, vm);
206}
207
208static void nec_8048_get_timings(struct omap_dss_device *dssdev,
209 struct videomode *vm)
210{
211 struct panel_drv_data *ddata = to_panel_data(dssdev);
212
213 *vm = ddata->vm;
214}
215
216static int nec_8048_check_timings(struct omap_dss_device *dssdev,
217 struct videomode *vm)
218{
219 struct panel_drv_data *ddata = to_panel_data(dssdev);
220 struct omap_dss_device *in = ddata->in;
221
222 return in->ops.dpi->check_timings(in, vm);
223}
224
225static struct omap_dss_driver nec_8048_ops = {
226 .connect = nec_8048_connect,
227 .disconnect = nec_8048_disconnect,
228
229 .enable = nec_8048_enable,
230 .disable = nec_8048_disable,
231
232 .set_timings = nec_8048_set_timings,
233 .get_timings = nec_8048_get_timings,
234 .check_timings = nec_8048_check_timings,
235};
236
237static int nec_8048_probe_of(struct spi_device *spi)
238{
239 struct device_node *node = spi->dev.of_node;
240 struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
241 int gpio;
242
243 gpio = of_get_named_gpio(node, "reset-gpios", 0);
244 if (!gpio_is_valid(gpio)) {
245 dev_err(&spi->dev, "failed to parse enable gpio\n");
246 return gpio;
247 }
248 ddata->res_gpio = gpio;
249
250 /* XXX the panel spec doesn't mention any QVGA pin?? */
251 ddata->qvga_gpio = -ENOENT;
252
253 return 0;
254}
255
256static int nec_8048_probe(struct spi_device *spi)
257{
258 struct panel_drv_data *ddata;
259 struct omap_dss_device *dssdev;
260 int r;
261
262 dev_dbg(&spi->dev, "%s\n", __func__);
263
264 spi->mode = SPI_MODE_0;
265 spi->bits_per_word = 32;
266
267 r = spi_setup(spi);
268 if (r < 0) {
269 dev_err(&spi->dev, "spi_setup failed: %d\n", r);
270 return r;
271 }
272
273 init_nec_8048_wvga_lcd(spi);
274
275 ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL);
276 if (ddata == NULL)
277 return -ENOMEM;
278
279 dev_set_drvdata(&spi->dev, ddata);
280
281 ddata->spi = spi;
282
283 r = nec_8048_probe_of(spi);
284 if (r)
285 return r;
286
287 if (gpio_is_valid(ddata->qvga_gpio)) {
288 r = devm_gpio_request_one(&spi->dev, ddata->qvga_gpio,
289 GPIOF_OUT_INIT_HIGH, "lcd QVGA");
290 if (r)
291 return r;
292 }
293
294 if (gpio_is_valid(ddata->res_gpio)) {
295 r = devm_gpio_request_one(&spi->dev, ddata->res_gpio,
296 GPIOF_OUT_INIT_LOW, "lcd RES");
297 if (r)
298 return r;
299 }
300
301 ddata->vm = nec_8048_panel_vm;
302
303 dssdev = &ddata->dssdev;
304 dssdev->dev = &spi->dev;
305 dssdev->driver = &nec_8048_ops;
306 dssdev->type = OMAP_DISPLAY_TYPE_DPI;
307 dssdev->owner = THIS_MODULE;
308 dssdev->panel.vm = ddata->vm;
309
310 r = omapdss_register_display(dssdev);
311 if (r) {
312 dev_err(&spi->dev, "Failed to register panel\n");
313 return r;
314 }
315
316 return 0;
317}
318
319static int nec_8048_remove(struct spi_device *spi)
320{
321 struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
322 struct omap_dss_device *dssdev = &ddata->dssdev;
323
324 dev_dbg(&ddata->spi->dev, "%s\n", __func__);
325
326 omapdss_unregister_display(dssdev);
327
328 nec_8048_disable(dssdev);
329 nec_8048_disconnect(dssdev);
330
331 return 0;
332}
333
334#ifdef CONFIG_PM_SLEEP
335static int nec_8048_suspend(struct device *dev)
336{
337 struct spi_device *spi = to_spi_device(dev);
338
339 nec_8048_spi_send(spi, 2, 0x01);
340 mdelay(40);
341
342 return 0;
343}
344
345static int nec_8048_resume(struct device *dev)
346{
347 struct spi_device *spi = to_spi_device(dev);
348
349 /* reinitialize the panel */
350 spi_setup(spi);
351 nec_8048_spi_send(spi, 2, 0x00);
352 init_nec_8048_wvga_lcd(spi);
353
354 return 0;
355}
356static SIMPLE_DEV_PM_OPS(nec_8048_pm_ops, nec_8048_suspend,
357 nec_8048_resume);
358#define NEC_8048_PM_OPS (&nec_8048_pm_ops)
359#else
360#define NEC_8048_PM_OPS NULL
361#endif
362
363static const struct of_device_id nec_8048_of_match[] = {
364 { .compatible = "omapdss,nec,nl8048hl11", },
365 {},
366};
367
368MODULE_DEVICE_TABLE(of, nec_8048_of_match);
369
370static struct spi_driver nec_8048_driver = {
371 .driver = {
372 .name = "panel-nec-nl8048hl11",
373 .pm = NEC_8048_PM_OPS,
374 .of_match_table = nec_8048_of_match,
375 .suppress_bind_attrs = true,
376 },
377 .probe = nec_8048_probe,
378 .remove = nec_8048_remove,
379};
380
381module_spi_driver(nec_8048_driver);
382
383MODULE_ALIAS("spi:nec,nl8048hl11");
384MODULE_AUTHOR("Erik Gilling <konkers@android.com>");
385MODULE_DESCRIPTION("NEC-NL8048HL11 Driver");
386MODULE_LICENSE("GPL");