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1/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27#include <linux/i2c.h>
28#include <linux/slab.h>
29#include <drm/drmP.h>
30#include <drm/drm_atomic_helper.h>
31#include <drm/drm_crtc.h>
32#include "intel_drv.h"
33#include <drm/i915_drm.h>
34#include "i915_drv.h"
35#include "dvo.h"
36
37#define SIL164_ADDR 0x38
38#define CH7xxx_ADDR 0x76
39#define TFP410_ADDR 0x38
40#define NS2501_ADDR 0x38
41
42static const struct intel_dvo_device intel_dvo_devices[] = {
43 {
44 .type = INTEL_DVO_CHIP_TMDS,
45 .name = "sil164",
46 .dvo_reg = DVOC,
47 .dvo_srcdim_reg = DVOC_SRCDIM,
48 .slave_addr = SIL164_ADDR,
49 .dev_ops = &sil164_ops,
50 },
51 {
52 .type = INTEL_DVO_CHIP_TMDS,
53 .name = "ch7xxx",
54 .dvo_reg = DVOC,
55 .dvo_srcdim_reg = DVOC_SRCDIM,
56 .slave_addr = CH7xxx_ADDR,
57 .dev_ops = &ch7xxx_ops,
58 },
59 {
60 .type = INTEL_DVO_CHIP_TMDS,
61 .name = "ch7xxx",
62 .dvo_reg = DVOC,
63 .dvo_srcdim_reg = DVOC_SRCDIM,
64 .slave_addr = 0x75, /* For some ch7010 */
65 .dev_ops = &ch7xxx_ops,
66 },
67 {
68 .type = INTEL_DVO_CHIP_LVDS,
69 .name = "ivch",
70 .dvo_reg = DVOA,
71 .dvo_srcdim_reg = DVOA_SRCDIM,
72 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
73 .dev_ops = &ivch_ops,
74 },
75 {
76 .type = INTEL_DVO_CHIP_TMDS,
77 .name = "tfp410",
78 .dvo_reg = DVOC,
79 .dvo_srcdim_reg = DVOC_SRCDIM,
80 .slave_addr = TFP410_ADDR,
81 .dev_ops = &tfp410_ops,
82 },
83 {
84 .type = INTEL_DVO_CHIP_LVDS,
85 .name = "ch7017",
86 .dvo_reg = DVOC,
87 .dvo_srcdim_reg = DVOC_SRCDIM,
88 .slave_addr = 0x75,
89 .gpio = GMBUS_PIN_DPB,
90 .dev_ops = &ch7017_ops,
91 },
92 {
93 .type = INTEL_DVO_CHIP_TMDS,
94 .name = "ns2501",
95 .dvo_reg = DVOB,
96 .dvo_srcdim_reg = DVOB_SRCDIM,
97 .slave_addr = NS2501_ADDR,
98 .dev_ops = &ns2501_ops,
99 }
100};
101
102struct intel_dvo {
103 struct intel_encoder base;
104
105 struct intel_dvo_device dev;
106
107 struct intel_connector *attached_connector;
108
109 bool panel_wants_dither;
110};
111
112static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
113{
114 return container_of(encoder, struct intel_dvo, base);
115}
116
117static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
118{
119 return enc_to_dvo(intel_attached_encoder(connector));
120}
121
122static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
123{
124 struct drm_device *dev = connector->base.dev;
125 struct drm_i915_private *dev_priv = dev->dev_private;
126 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
127 u32 tmp;
128
129 tmp = I915_READ(intel_dvo->dev.dvo_reg);
130
131 if (!(tmp & DVO_ENABLE))
132 return false;
133
134 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
135}
136
137static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
138 enum pipe *pipe)
139{
140 struct drm_device *dev = encoder->base.dev;
141 struct drm_i915_private *dev_priv = dev->dev_private;
142 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
143 u32 tmp;
144
145 tmp = I915_READ(intel_dvo->dev.dvo_reg);
146
147 if (!(tmp & DVO_ENABLE))
148 return false;
149
150 *pipe = PORT_TO_PIPE(tmp);
151
152 return true;
153}
154
155static void intel_dvo_get_config(struct intel_encoder *encoder,
156 struct intel_crtc_state *pipe_config)
157{
158 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
159 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
160 u32 tmp, flags = 0;
161
162 tmp = I915_READ(intel_dvo->dev.dvo_reg);
163 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
164 flags |= DRM_MODE_FLAG_PHSYNC;
165 else
166 flags |= DRM_MODE_FLAG_NHSYNC;
167 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
168 flags |= DRM_MODE_FLAG_PVSYNC;
169 else
170 flags |= DRM_MODE_FLAG_NVSYNC;
171
172 pipe_config->base.adjusted_mode.flags |= flags;
173
174 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
175}
176
177static void intel_disable_dvo(struct intel_encoder *encoder)
178{
179 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
180 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
181 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
182 u32 temp = I915_READ(dvo_reg);
183
184 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
185 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
186 I915_READ(dvo_reg);
187}
188
189static void intel_enable_dvo(struct intel_encoder *encoder)
190{
191 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
192 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
193 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
194 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
195 u32 temp = I915_READ(dvo_reg);
196
197 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
198 &crtc->config->base.mode,
199 &crtc->config->base.adjusted_mode);
200
201 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
202 I915_READ(dvo_reg);
203
204 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
205}
206
207static enum drm_mode_status
208intel_dvo_mode_valid(struct drm_connector *connector,
209 struct drm_display_mode *mode)
210{
211 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
212 const struct drm_display_mode *fixed_mode =
213 to_intel_connector(connector)->panel.fixed_mode;
214 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
215 int target_clock = mode->clock;
216
217 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
218 return MODE_NO_DBLESCAN;
219
220 /* XXX: Validate clock range */
221
222 if (fixed_mode) {
223 if (mode->hdisplay > fixed_mode->hdisplay)
224 return MODE_PANEL;
225 if (mode->vdisplay > fixed_mode->vdisplay)
226 return MODE_PANEL;
227
228 target_clock = fixed_mode->clock;
229 }
230
231 if (target_clock > max_dotclk)
232 return MODE_CLOCK_HIGH;
233
234 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
235}
236
237static bool intel_dvo_compute_config(struct intel_encoder *encoder,
238 struct intel_crtc_state *pipe_config)
239{
240 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
241 const struct drm_display_mode *fixed_mode =
242 intel_dvo->attached_connector->panel.fixed_mode;
243 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
244
245 /* If we have timings from the BIOS for the panel, put them in
246 * to the adjusted mode. The CRTC will be set up for this mode,
247 * with the panel scaling set up to source from the H/VDisplay
248 * of the original mode.
249 */
250 if (fixed_mode)
251 intel_fixed_panel_mode(fixed_mode, adjusted_mode);
252
253 return true;
254}
255
256static void intel_dvo_pre_enable(struct intel_encoder *encoder)
257{
258 struct drm_device *dev = encoder->base.dev;
259 struct drm_i915_private *dev_priv = dev->dev_private;
260 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
261 const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
262 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
263 int pipe = crtc->pipe;
264 u32 dvo_val;
265 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
266 i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
267
268 /* Save the data order, since I don't know what it should be set to. */
269 dvo_val = I915_READ(dvo_reg) &
270 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
271 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
272 DVO_BLANK_ACTIVE_HIGH;
273
274 if (pipe == 1)
275 dvo_val |= DVO_PIPE_B_SELECT;
276 dvo_val |= DVO_PIPE_STALL;
277 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
278 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
279 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
280 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
281
282 /*I915_WRITE(DVOB_SRCDIM,
283 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
284 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
285 I915_WRITE(dvo_srcdim_reg,
286 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
287 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
288 /*I915_WRITE(DVOB, dvo_val);*/
289 I915_WRITE(dvo_reg, dvo_val);
290}
291
292/**
293 * Detect the output connection on our DVO device.
294 *
295 * Unimplemented.
296 */
297static enum drm_connector_status
298intel_dvo_detect(struct drm_connector *connector, bool force)
299{
300 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
301 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
302 connector->base.id, connector->name);
303 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
304}
305
306static int intel_dvo_get_modes(struct drm_connector *connector)
307{
308 struct drm_i915_private *dev_priv = connector->dev->dev_private;
309 const struct drm_display_mode *fixed_mode =
310 to_intel_connector(connector)->panel.fixed_mode;
311
312 /* We should probably have an i2c driver get_modes function for those
313 * devices which will have a fixed set of modes determined by the chip
314 * (TV-out, for example), but for now with just TMDS and LVDS,
315 * that's not the case.
316 */
317 intel_ddc_get_modes(connector,
318 intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
319 if (!list_empty(&connector->probed_modes))
320 return 1;
321
322 if (fixed_mode) {
323 struct drm_display_mode *mode;
324 mode = drm_mode_duplicate(connector->dev, fixed_mode);
325 if (mode) {
326 drm_mode_probed_add(connector, mode);
327 return 1;
328 }
329 }
330
331 return 0;
332}
333
334static void intel_dvo_destroy(struct drm_connector *connector)
335{
336 drm_connector_cleanup(connector);
337 intel_panel_fini(&to_intel_connector(connector)->panel);
338 kfree(connector);
339}
340
341static const struct drm_connector_funcs intel_dvo_connector_funcs = {
342 .dpms = drm_atomic_helper_connector_dpms,
343 .detect = intel_dvo_detect,
344 .destroy = intel_dvo_destroy,
345 .fill_modes = drm_helper_probe_single_connector_modes,
346 .atomic_get_property = intel_connector_atomic_get_property,
347 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
348 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
349};
350
351static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
352 .mode_valid = intel_dvo_mode_valid,
353 .get_modes = intel_dvo_get_modes,
354 .best_encoder = intel_best_encoder,
355};
356
357static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
358{
359 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
360
361 if (intel_dvo->dev.dev_ops->destroy)
362 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
363
364 intel_encoder_destroy(encoder);
365}
366
367static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
368 .destroy = intel_dvo_enc_destroy,
369};
370
371/**
372 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
373 *
374 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
375 * chip being on DVOB/C and having multiple pipes.
376 */
377static struct drm_display_mode *
378intel_dvo_get_current_mode(struct drm_connector *connector)
379{
380 struct drm_device *dev = connector->dev;
381 struct drm_i915_private *dev_priv = dev->dev_private;
382 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
383 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
384 struct drm_display_mode *mode = NULL;
385
386 /* If the DVO port is active, that'll be the LVDS, so we can pull out
387 * its timings to get how the BIOS set up the panel.
388 */
389 if (dvo_val & DVO_ENABLE) {
390 struct drm_crtc *crtc;
391 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
392
393 crtc = intel_get_crtc_for_pipe(dev, pipe);
394 if (crtc) {
395 mode = intel_crtc_mode_get(dev, crtc);
396 if (mode) {
397 mode->type |= DRM_MODE_TYPE_PREFERRED;
398 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
399 mode->flags |= DRM_MODE_FLAG_PHSYNC;
400 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
401 mode->flags |= DRM_MODE_FLAG_PVSYNC;
402 }
403 }
404 }
405
406 return mode;
407}
408
409void intel_dvo_init(struct drm_device *dev)
410{
411 struct drm_i915_private *dev_priv = dev->dev_private;
412 struct intel_encoder *intel_encoder;
413 struct intel_dvo *intel_dvo;
414 struct intel_connector *intel_connector;
415 int i;
416 int encoder_type = DRM_MODE_ENCODER_NONE;
417
418 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
419 if (!intel_dvo)
420 return;
421
422 intel_connector = intel_connector_alloc();
423 if (!intel_connector) {
424 kfree(intel_dvo);
425 return;
426 }
427
428 intel_dvo->attached_connector = intel_connector;
429
430 intel_encoder = &intel_dvo->base;
431 drm_encoder_init(dev, &intel_encoder->base,
432 &intel_dvo_enc_funcs, encoder_type, NULL);
433
434 intel_encoder->disable = intel_disable_dvo;
435 intel_encoder->enable = intel_enable_dvo;
436 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
437 intel_encoder->get_config = intel_dvo_get_config;
438 intel_encoder->compute_config = intel_dvo_compute_config;
439 intel_encoder->pre_enable = intel_dvo_pre_enable;
440 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
441 intel_connector->unregister = intel_connector_unregister;
442
443 /* Now, try to find a controller */
444 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
445 struct drm_connector *connector = &intel_connector->base;
446 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
447 struct i2c_adapter *i2c;
448 int gpio;
449 bool dvoinit;
450 enum pipe pipe;
451 uint32_t dpll[I915_MAX_PIPES];
452
453 /* Allow the I2C driver info to specify the GPIO to be used in
454 * special cases, but otherwise default to what's defined
455 * in the spec.
456 */
457 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
458 gpio = dvo->gpio;
459 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
460 gpio = GMBUS_PIN_SSC;
461 else
462 gpio = GMBUS_PIN_DPB;
463
464 /* Set up the I2C bus necessary for the chip we're probing.
465 * It appears that everything is on GPIOE except for panels
466 * on i830 laptops, which are on GPIOB (DVOA).
467 */
468 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
469
470 intel_dvo->dev = *dvo;
471
472 /* GMBUS NAK handling seems to be unstable, hence let the
473 * transmitter detection run in bit banging mode for now.
474 */
475 intel_gmbus_force_bit(i2c, true);
476
477 /* ns2501 requires the DVO 2x clock before it will
478 * respond to i2c accesses, so make sure we have
479 * have the clock enabled before we attempt to
480 * initialize the device.
481 */
482 for_each_pipe(dev_priv, pipe) {
483 dpll[pipe] = I915_READ(DPLL(pipe));
484 I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
485 }
486
487 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
488
489 /* restore the DVO 2x clock state to original */
490 for_each_pipe(dev_priv, pipe) {
491 I915_WRITE(DPLL(pipe), dpll[pipe]);
492 }
493
494 intel_gmbus_force_bit(i2c, false);
495
496 if (!dvoinit)
497 continue;
498
499 intel_encoder->type = INTEL_OUTPUT_DVO;
500 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
501 switch (dvo->type) {
502 case INTEL_DVO_CHIP_TMDS:
503 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
504 (1 << INTEL_OUTPUT_DVO);
505 drm_connector_init(dev, connector,
506 &intel_dvo_connector_funcs,
507 DRM_MODE_CONNECTOR_DVII);
508 encoder_type = DRM_MODE_ENCODER_TMDS;
509 break;
510 case INTEL_DVO_CHIP_LVDS:
511 intel_encoder->cloneable = 0;
512 drm_connector_init(dev, connector,
513 &intel_dvo_connector_funcs,
514 DRM_MODE_CONNECTOR_LVDS);
515 encoder_type = DRM_MODE_ENCODER_LVDS;
516 break;
517 }
518
519 drm_connector_helper_add(connector,
520 &intel_dvo_connector_helper_funcs);
521 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
522 connector->interlace_allowed = false;
523 connector->doublescan_allowed = false;
524
525 intel_connector_attach_encoder(intel_connector, intel_encoder);
526 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
527 /* For our LVDS chipsets, we should hopefully be able
528 * to dig the fixed panel mode out of the BIOS data.
529 * However, it's in a different format from the BIOS
530 * data on chipsets with integrated LVDS (stored in AIM
531 * headers, likely), so for now, just get the current
532 * mode being output through DVO.
533 */
534 intel_panel_init(&intel_connector->panel,
535 intel_dvo_get_current_mode(connector),
536 NULL);
537 intel_dvo->panel_wants_dither = true;
538 }
539
540 drm_connector_register(connector);
541 return;
542 }
543
544 drm_encoder_cleanup(&intel_encoder->base);
545 kfree(intel_dvo);
546 kfree(intel_connector);
547}
1/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27#include <linux/i2c.h>
28#include <linux/slab.h>
29#include <drm/drmP.h>
30#include <drm/drm_atomic_helper.h>
31#include <drm/drm_crtc.h>
32#include "intel_drv.h"
33#include <drm/i915_drm.h>
34#include "i915_drv.h"
35#include "dvo.h"
36
37#define SIL164_ADDR 0x38
38#define CH7xxx_ADDR 0x76
39#define TFP410_ADDR 0x38
40#define NS2501_ADDR 0x38
41
42static const struct intel_dvo_device intel_dvo_devices[] = {
43 {
44 .type = INTEL_DVO_CHIP_TMDS,
45 .name = "sil164",
46 .dvo_reg = DVOC,
47 .dvo_srcdim_reg = DVOC_SRCDIM,
48 .slave_addr = SIL164_ADDR,
49 .dev_ops = &sil164_ops,
50 },
51 {
52 .type = INTEL_DVO_CHIP_TMDS,
53 .name = "ch7xxx",
54 .dvo_reg = DVOC,
55 .dvo_srcdim_reg = DVOC_SRCDIM,
56 .slave_addr = CH7xxx_ADDR,
57 .dev_ops = &ch7xxx_ops,
58 },
59 {
60 .type = INTEL_DVO_CHIP_TMDS,
61 .name = "ch7xxx",
62 .dvo_reg = DVOC,
63 .dvo_srcdim_reg = DVOC_SRCDIM,
64 .slave_addr = 0x75, /* For some ch7010 */
65 .dev_ops = &ch7xxx_ops,
66 },
67 {
68 .type = INTEL_DVO_CHIP_LVDS,
69 .name = "ivch",
70 .dvo_reg = DVOA,
71 .dvo_srcdim_reg = DVOA_SRCDIM,
72 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
73 .dev_ops = &ivch_ops,
74 },
75 {
76 .type = INTEL_DVO_CHIP_TMDS,
77 .name = "tfp410",
78 .dvo_reg = DVOC,
79 .dvo_srcdim_reg = DVOC_SRCDIM,
80 .slave_addr = TFP410_ADDR,
81 .dev_ops = &tfp410_ops,
82 },
83 {
84 .type = INTEL_DVO_CHIP_LVDS,
85 .name = "ch7017",
86 .dvo_reg = DVOC,
87 .dvo_srcdim_reg = DVOC_SRCDIM,
88 .slave_addr = 0x75,
89 .gpio = GMBUS_PIN_DPB,
90 .dev_ops = &ch7017_ops,
91 },
92 {
93 .type = INTEL_DVO_CHIP_TMDS,
94 .name = "ns2501",
95 .dvo_reg = DVOB,
96 .dvo_srcdim_reg = DVOB_SRCDIM,
97 .slave_addr = NS2501_ADDR,
98 .dev_ops = &ns2501_ops,
99 }
100};
101
102struct intel_dvo {
103 struct intel_encoder base;
104
105 struct intel_dvo_device dev;
106
107 struct intel_connector *attached_connector;
108
109 bool panel_wants_dither;
110};
111
112static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
113{
114 return container_of(encoder, struct intel_dvo, base);
115}
116
117static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
118{
119 return enc_to_dvo(intel_attached_encoder(connector));
120}
121
122static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
123{
124 struct drm_device *dev = connector->base.dev;
125 struct drm_i915_private *dev_priv = to_i915(dev);
126 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
127 u32 tmp;
128
129 tmp = I915_READ(intel_dvo->dev.dvo_reg);
130
131 if (!(tmp & DVO_ENABLE))
132 return false;
133
134 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
135}
136
137static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
138 enum pipe *pipe)
139{
140 struct drm_device *dev = encoder->base.dev;
141 struct drm_i915_private *dev_priv = to_i915(dev);
142 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
143 u32 tmp;
144
145 tmp = I915_READ(intel_dvo->dev.dvo_reg);
146
147 if (!(tmp & DVO_ENABLE))
148 return false;
149
150 *pipe = PORT_TO_PIPE(tmp);
151
152 return true;
153}
154
155static void intel_dvo_get_config(struct intel_encoder *encoder,
156 struct intel_crtc_state *pipe_config)
157{
158 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
159 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
160 u32 tmp, flags = 0;
161
162 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
163
164 tmp = I915_READ(intel_dvo->dev.dvo_reg);
165 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
166 flags |= DRM_MODE_FLAG_PHSYNC;
167 else
168 flags |= DRM_MODE_FLAG_NHSYNC;
169 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
170 flags |= DRM_MODE_FLAG_PVSYNC;
171 else
172 flags |= DRM_MODE_FLAG_NVSYNC;
173
174 pipe_config->base.adjusted_mode.flags |= flags;
175
176 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
177}
178
179static void intel_disable_dvo(struct intel_encoder *encoder,
180 const struct intel_crtc_state *old_crtc_state,
181 const struct drm_connector_state *old_conn_state)
182{
183 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
184 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
185 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
186 u32 temp = I915_READ(dvo_reg);
187
188 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
189 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
190 I915_READ(dvo_reg);
191}
192
193static void intel_enable_dvo(struct intel_encoder *encoder,
194 const struct intel_crtc_state *pipe_config,
195 const struct drm_connector_state *conn_state)
196{
197 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
198 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
199 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
200 u32 temp = I915_READ(dvo_reg);
201
202 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
203 &pipe_config->base.mode,
204 &pipe_config->base.adjusted_mode);
205
206 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
207 I915_READ(dvo_reg);
208
209 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
210}
211
212static enum drm_mode_status
213intel_dvo_mode_valid(struct drm_connector *connector,
214 struct drm_display_mode *mode)
215{
216 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
217 const struct drm_display_mode *fixed_mode =
218 to_intel_connector(connector)->panel.fixed_mode;
219 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
220 int target_clock = mode->clock;
221
222 /* XXX: Validate clock range */
223
224 if (fixed_mode) {
225 if (mode->hdisplay > fixed_mode->hdisplay)
226 return MODE_PANEL;
227 if (mode->vdisplay > fixed_mode->vdisplay)
228 return MODE_PANEL;
229
230 target_clock = fixed_mode->clock;
231 }
232
233 if (target_clock > max_dotclk)
234 return MODE_CLOCK_HIGH;
235
236 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
237}
238
239static bool intel_dvo_compute_config(struct intel_encoder *encoder,
240 struct intel_crtc_state *pipe_config,
241 struct drm_connector_state *conn_state)
242{
243 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
244 const struct drm_display_mode *fixed_mode =
245 intel_dvo->attached_connector->panel.fixed_mode;
246 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
247
248 /*
249 * If we have timings from the BIOS for the panel, put them in
250 * to the adjusted mode. The CRTC will be set up for this mode,
251 * with the panel scaling set up to source from the H/VDisplay
252 * of the original mode.
253 */
254 if (fixed_mode)
255 intel_fixed_panel_mode(fixed_mode, adjusted_mode);
256
257 return true;
258}
259
260static void intel_dvo_pre_enable(struct intel_encoder *encoder,
261 const struct intel_crtc_state *pipe_config,
262 const struct drm_connector_state *conn_state)
263{
264 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
265 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
266 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
267 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
268 int pipe = crtc->pipe;
269 u32 dvo_val;
270 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
271 i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
272
273 /* Save the data order, since I don't know what it should be set to. */
274 dvo_val = I915_READ(dvo_reg) &
275 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
276 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
277 DVO_BLANK_ACTIVE_HIGH;
278
279 if (pipe == 1)
280 dvo_val |= DVO_PIPE_B_SELECT;
281 dvo_val |= DVO_PIPE_STALL;
282 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
283 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
284 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
285 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
286
287 /*I915_WRITE(DVOB_SRCDIM,
288 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
289 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
290 I915_WRITE(dvo_srcdim_reg,
291 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
292 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
293 /*I915_WRITE(DVOB, dvo_val);*/
294 I915_WRITE(dvo_reg, dvo_val);
295}
296
297static enum drm_connector_status
298intel_dvo_detect(struct drm_connector *connector, bool force)
299{
300 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
301 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
302 connector->base.id, connector->name);
303 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
304}
305
306static int intel_dvo_get_modes(struct drm_connector *connector)
307{
308 struct drm_i915_private *dev_priv = to_i915(connector->dev);
309 const struct drm_display_mode *fixed_mode =
310 to_intel_connector(connector)->panel.fixed_mode;
311
312 /*
313 * We should probably have an i2c driver get_modes function for those
314 * devices which will have a fixed set of modes determined by the chip
315 * (TV-out, for example), but for now with just TMDS and LVDS,
316 * that's not the case.
317 */
318 intel_ddc_get_modes(connector,
319 intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
320 if (!list_empty(&connector->probed_modes))
321 return 1;
322
323 if (fixed_mode) {
324 struct drm_display_mode *mode;
325 mode = drm_mode_duplicate(connector->dev, fixed_mode);
326 if (mode) {
327 drm_mode_probed_add(connector, mode);
328 return 1;
329 }
330 }
331
332 return 0;
333}
334
335static void intel_dvo_destroy(struct drm_connector *connector)
336{
337 drm_connector_cleanup(connector);
338 intel_panel_fini(&to_intel_connector(connector)->panel);
339 kfree(connector);
340}
341
342static const struct drm_connector_funcs intel_dvo_connector_funcs = {
343 .detect = intel_dvo_detect,
344 .late_register = intel_connector_register,
345 .early_unregister = intel_connector_unregister,
346 .destroy = intel_dvo_destroy,
347 .fill_modes = drm_helper_probe_single_connector_modes,
348 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
349 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
350};
351
352static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
353 .mode_valid = intel_dvo_mode_valid,
354 .get_modes = intel_dvo_get_modes,
355};
356
357static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
358{
359 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
360
361 if (intel_dvo->dev.dev_ops->destroy)
362 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
363
364 intel_encoder_destroy(encoder);
365}
366
367static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
368 .destroy = intel_dvo_enc_destroy,
369};
370
371/*
372 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
373 *
374 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
375 * chip being on DVOB/C and having multiple pipes.
376 */
377static struct drm_display_mode *
378intel_dvo_get_current_mode(struct intel_encoder *encoder)
379{
380 struct drm_display_mode *mode;
381
382 mode = intel_encoder_current_mode(encoder);
383 if (mode) {
384 DRM_DEBUG_KMS("using current (BIOS) mode: ");
385 drm_mode_debug_printmodeline(mode);
386 mode->type |= DRM_MODE_TYPE_PREFERRED;
387 }
388
389 return mode;
390}
391
392static enum port intel_dvo_port(i915_reg_t dvo_reg)
393{
394 if (i915_mmio_reg_equal(dvo_reg, DVOA))
395 return PORT_A;
396 else if (i915_mmio_reg_equal(dvo_reg, DVOB))
397 return PORT_B;
398 else
399 return PORT_C;
400}
401
402void intel_dvo_init(struct drm_i915_private *dev_priv)
403{
404 struct intel_encoder *intel_encoder;
405 struct intel_dvo *intel_dvo;
406 struct intel_connector *intel_connector;
407 int i;
408 int encoder_type = DRM_MODE_ENCODER_NONE;
409
410 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
411 if (!intel_dvo)
412 return;
413
414 intel_connector = intel_connector_alloc();
415 if (!intel_connector) {
416 kfree(intel_dvo);
417 return;
418 }
419
420 intel_dvo->attached_connector = intel_connector;
421
422 intel_encoder = &intel_dvo->base;
423
424 intel_encoder->disable = intel_disable_dvo;
425 intel_encoder->enable = intel_enable_dvo;
426 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
427 intel_encoder->get_config = intel_dvo_get_config;
428 intel_encoder->compute_config = intel_dvo_compute_config;
429 intel_encoder->pre_enable = intel_dvo_pre_enable;
430 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
431
432 /* Now, try to find a controller */
433 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
434 struct drm_connector *connector = &intel_connector->base;
435 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
436 struct i2c_adapter *i2c;
437 int gpio;
438 bool dvoinit;
439 enum pipe pipe;
440 uint32_t dpll[I915_MAX_PIPES];
441 enum port port;
442
443 /*
444 * Allow the I2C driver info to specify the GPIO to be used in
445 * special cases, but otherwise default to what's defined
446 * in the spec.
447 */
448 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
449 gpio = dvo->gpio;
450 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
451 gpio = GMBUS_PIN_SSC;
452 else
453 gpio = GMBUS_PIN_DPB;
454
455 /*
456 * Set up the I2C bus necessary for the chip we're probing.
457 * It appears that everything is on GPIOE except for panels
458 * on i830 laptops, which are on GPIOB (DVOA).
459 */
460 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
461
462 intel_dvo->dev = *dvo;
463
464 /*
465 * GMBUS NAK handling seems to be unstable, hence let the
466 * transmitter detection run in bit banging mode for now.
467 */
468 intel_gmbus_force_bit(i2c, true);
469
470 /*
471 * ns2501 requires the DVO 2x clock before it will
472 * respond to i2c accesses, so make sure we have
473 * have the clock enabled before we attempt to
474 * initialize the device.
475 */
476 for_each_pipe(dev_priv, pipe) {
477 dpll[pipe] = I915_READ(DPLL(pipe));
478 I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
479 }
480
481 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
482
483 /* restore the DVO 2x clock state to original */
484 for_each_pipe(dev_priv, pipe) {
485 I915_WRITE(DPLL(pipe), dpll[pipe]);
486 }
487
488 intel_gmbus_force_bit(i2c, false);
489
490 if (!dvoinit)
491 continue;
492
493 port = intel_dvo_port(dvo->dvo_reg);
494 drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
495 &intel_dvo_enc_funcs, encoder_type,
496 "DVO %c", port_name(port));
497
498 intel_encoder->type = INTEL_OUTPUT_DVO;
499 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
500 intel_encoder->port = port;
501 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
502
503 switch (dvo->type) {
504 case INTEL_DVO_CHIP_TMDS:
505 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
506 (1 << INTEL_OUTPUT_DVO);
507 drm_connector_init(&dev_priv->drm, connector,
508 &intel_dvo_connector_funcs,
509 DRM_MODE_CONNECTOR_DVII);
510 encoder_type = DRM_MODE_ENCODER_TMDS;
511 break;
512 case INTEL_DVO_CHIP_LVDS:
513 intel_encoder->cloneable = 0;
514 drm_connector_init(&dev_priv->drm, connector,
515 &intel_dvo_connector_funcs,
516 DRM_MODE_CONNECTOR_LVDS);
517 encoder_type = DRM_MODE_ENCODER_LVDS;
518 break;
519 }
520
521 drm_connector_helper_add(connector,
522 &intel_dvo_connector_helper_funcs);
523 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
524 connector->interlace_allowed = false;
525 connector->doublescan_allowed = false;
526
527 intel_connector_attach_encoder(intel_connector, intel_encoder);
528 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
529 /*
530 * For our LVDS chipsets, we should hopefully be able
531 * to dig the fixed panel mode out of the BIOS data.
532 * However, it's in a different format from the BIOS
533 * data on chipsets with integrated LVDS (stored in AIM
534 * headers, likely), so for now, just get the current
535 * mode being output through DVO.
536 */
537 intel_panel_init(&intel_connector->panel,
538 intel_dvo_get_current_mode(intel_encoder),
539 NULL, NULL);
540 intel_dvo->panel_wants_dither = true;
541 }
542
543 return;
544 }
545
546 kfree(intel_dvo);
547 kfree(intel_connector);
548}