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1/*
2 * Copyright (C) 2012 Russell King
3 * Rewritten from the dovefb driver, and Armada510 manuals.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9#include <drm/drmP.h>
10#include <drm/drm_plane_helper.h>
11#include "armada_crtc.h"
12#include "armada_drm.h"
13#include "armada_fb.h"
14#include "armada_gem.h"
15#include "armada_hw.h"
16#include <drm/armada_drm.h>
17#include "armada_ioctlP.h"
18
19struct armada_ovl_plane_properties {
20 uint32_t colorkey_yr;
21 uint32_t colorkey_ug;
22 uint32_t colorkey_vb;
23#define K2R(val) (((val) >> 0) & 0xff)
24#define K2G(val) (((val) >> 8) & 0xff)
25#define K2B(val) (((val) >> 16) & 0xff)
26 int16_t brightness;
27 uint16_t contrast;
28 uint16_t saturation;
29 uint32_t colorkey_mode;
30};
31
32struct armada_ovl_plane {
33 struct armada_plane base;
34 struct drm_framebuffer *old_fb;
35 uint32_t src_hw;
36 uint32_t dst_hw;
37 uint32_t dst_yx;
38 uint32_t ctrl0;
39 struct {
40 struct armada_plane_work work;
41 struct armada_regs regs[13];
42 } vbl;
43 struct armada_ovl_plane_properties prop;
44};
45#define drm_to_armada_ovl_plane(p) \
46 container_of(p, struct armada_ovl_plane, base.base)
47
48
49static void
50armada_ovl_update_attr(struct armada_ovl_plane_properties *prop,
51 struct armada_crtc *dcrtc)
52{
53 writel_relaxed(prop->colorkey_yr, dcrtc->base + LCD_SPU_COLORKEY_Y);
54 writel_relaxed(prop->colorkey_ug, dcrtc->base + LCD_SPU_COLORKEY_U);
55 writel_relaxed(prop->colorkey_vb, dcrtc->base + LCD_SPU_COLORKEY_V);
56
57 writel_relaxed(prop->brightness << 16 | prop->contrast,
58 dcrtc->base + LCD_SPU_CONTRAST);
59 /* Docs say 15:0, but it seems to actually be 31:16 on Armada 510 */
60 writel_relaxed(prop->saturation << 16,
61 dcrtc->base + LCD_SPU_SATURATION);
62 writel_relaxed(0x00002000, dcrtc->base + LCD_SPU_CBSH_HUE);
63
64 spin_lock_irq(&dcrtc->irq_lock);
65 armada_updatel(prop->colorkey_mode | CFG_ALPHAM_GRA,
66 CFG_CKMODE_MASK | CFG_ALPHAM_MASK | CFG_ALPHA_MASK,
67 dcrtc->base + LCD_SPU_DMA_CTRL1);
68
69 armada_updatel(ADV_GRACOLORKEY, 0, dcrtc->base + LCD_SPU_ADV_REG);
70 spin_unlock_irq(&dcrtc->irq_lock);
71}
72
73static void armada_ovl_retire_fb(struct armada_ovl_plane *dplane,
74 struct drm_framebuffer *fb)
75{
76 struct drm_framebuffer *old_fb;
77
78 old_fb = xchg(&dplane->old_fb, fb);
79
80 if (old_fb)
81 armada_drm_queue_unref_work(dplane->base.base.dev, old_fb);
82}
83
84/* === Plane support === */
85static void armada_ovl_plane_work(struct armada_crtc *dcrtc,
86 struct armada_plane *plane, struct armada_plane_work *work)
87{
88 struct armada_ovl_plane *dplane = container_of(plane, struct armada_ovl_plane, base);
89
90 armada_drm_crtc_update_regs(dcrtc, dplane->vbl.regs);
91 armada_ovl_retire_fb(dplane, NULL);
92}
93
94static int
95armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
96 struct drm_framebuffer *fb,
97 int crtc_x, int crtc_y, unsigned crtc_w, unsigned crtc_h,
98 uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h)
99{
100 struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane);
101 struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
102 struct drm_rect src = {
103 .x1 = src_x,
104 .y1 = src_y,
105 .x2 = src_x + src_w,
106 .y2 = src_y + src_h,
107 };
108 struct drm_rect dest = {
109 .x1 = crtc_x,
110 .y1 = crtc_y,
111 .x2 = crtc_x + crtc_w,
112 .y2 = crtc_y + crtc_h,
113 };
114 const struct drm_rect clip = {
115 .x2 = crtc->mode.hdisplay,
116 .y2 = crtc->mode.vdisplay,
117 };
118 uint32_t val, ctrl0;
119 unsigned idx = 0;
120 bool visible;
121 int ret;
122
123 ret = drm_plane_helper_check_update(plane, crtc, fb, &src, &dest, &clip,
124 0, INT_MAX, true, false, &visible);
125 if (ret)
126 return ret;
127
128 ctrl0 = CFG_DMA_FMT(drm_fb_to_armada_fb(fb)->fmt) |
129 CFG_DMA_MOD(drm_fb_to_armada_fb(fb)->mod) |
130 CFG_CBSH_ENA | CFG_DMA_HSMOOTH | CFG_DMA_ENA;
131
132 /* Does the position/size result in nothing to display? */
133 if (!visible)
134 ctrl0 &= ~CFG_DMA_ENA;
135
136 if (!dcrtc->plane) {
137 dcrtc->plane = plane;
138 armada_ovl_update_attr(&dplane->prop, dcrtc);
139 }
140
141 /* FIXME: overlay on an interlaced display */
142 /* Just updating the position/size? */
143 if (plane->fb == fb && dplane->ctrl0 == ctrl0) {
144 val = (drm_rect_height(&src) & 0xffff0000) |
145 drm_rect_width(&src) >> 16;
146 dplane->src_hw = val;
147 writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_HPXL_VLN);
148
149 val = drm_rect_height(&dest) << 16 | drm_rect_width(&dest);
150 dplane->dst_hw = val;
151 writel_relaxed(val, dcrtc->base + LCD_SPU_DZM_HPXL_VLN);
152
153 val = dest.y1 << 16 | dest.x1;
154 dplane->dst_yx = val;
155 writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_OVSA_HPXL_VLN);
156
157 return 0;
158 } else if (~dplane->ctrl0 & ctrl0 & CFG_DMA_ENA) {
159 /* Power up the Y/U/V FIFOs on ENA 0->1 transitions */
160 armada_updatel(0, CFG_PDWN16x66 | CFG_PDWN32x66,
161 dcrtc->base + LCD_SPU_SRAM_PARA1);
162 }
163
164 if (armada_drm_plane_work_wait(&dplane->base, HZ / 25) == 0)
165 armada_drm_plane_work_cancel(dcrtc, &dplane->base);
166
167 if (plane->fb != fb) {
168 struct armada_gem_object *obj = drm_fb_obj(fb);
169 uint32_t addr[3], pixel_format;
170 int i, num_planes, hsub;
171
172 /*
173 * Take a reference on the new framebuffer - we want to
174 * hold on to it while the hardware is displaying it.
175 */
176 drm_framebuffer_reference(fb);
177
178 if (plane->fb)
179 armada_ovl_retire_fb(dplane, plane->fb);
180
181 src_y = src.y1 >> 16;
182 src_x = src.x1 >> 16;
183
184 pixel_format = fb->pixel_format;
185 hsub = drm_format_horz_chroma_subsampling(pixel_format);
186 num_planes = drm_format_num_planes(pixel_format);
187
188 /*
189 * Annoyingly, shifting a YUYV-format image by one pixel
190 * causes the U/V planes to toggle. Toggle the UV swap.
191 * (Unfortunately, this causes momentary colour flickering.)
192 */
193 if (src_x & (hsub - 1) && num_planes == 1)
194 ctrl0 ^= CFG_DMA_MOD(CFG_SWAPUV);
195
196 for (i = 0; i < num_planes; i++)
197 addr[i] = obj->dev_addr + fb->offsets[i] +
198 src_y * fb->pitches[i] +
199 src_x * drm_format_plane_cpp(pixel_format, i);
200 for (; i < ARRAY_SIZE(addr); i++)
201 addr[i] = 0;
202
203 armada_reg_queue_set(dplane->vbl.regs, idx, addr[0],
204 LCD_SPU_DMA_START_ADDR_Y0);
205 armada_reg_queue_set(dplane->vbl.regs, idx, addr[1],
206 LCD_SPU_DMA_START_ADDR_U0);
207 armada_reg_queue_set(dplane->vbl.regs, idx, addr[2],
208 LCD_SPU_DMA_START_ADDR_V0);
209 armada_reg_queue_set(dplane->vbl.regs, idx, addr[0],
210 LCD_SPU_DMA_START_ADDR_Y1);
211 armada_reg_queue_set(dplane->vbl.regs, idx, addr[1],
212 LCD_SPU_DMA_START_ADDR_U1);
213 armada_reg_queue_set(dplane->vbl.regs, idx, addr[2],
214 LCD_SPU_DMA_START_ADDR_V1);
215
216 val = fb->pitches[0] << 16 | fb->pitches[0];
217 armada_reg_queue_set(dplane->vbl.regs, idx, val,
218 LCD_SPU_DMA_PITCH_YC);
219 val = fb->pitches[1] << 16 | fb->pitches[2];
220 armada_reg_queue_set(dplane->vbl.regs, idx, val,
221 LCD_SPU_DMA_PITCH_UV);
222 }
223
224 val = (drm_rect_height(&src) & 0xffff0000) | drm_rect_width(&src) >> 16;
225 if (dplane->src_hw != val) {
226 dplane->src_hw = val;
227 armada_reg_queue_set(dplane->vbl.regs, idx, val,
228 LCD_SPU_DMA_HPXL_VLN);
229 }
230
231 val = drm_rect_height(&dest) << 16 | drm_rect_width(&dest);
232 if (dplane->dst_hw != val) {
233 dplane->dst_hw = val;
234 armada_reg_queue_set(dplane->vbl.regs, idx, val,
235 LCD_SPU_DZM_HPXL_VLN);
236 }
237
238 val = dest.y1 << 16 | dest.x1;
239 if (dplane->dst_yx != val) {
240 dplane->dst_yx = val;
241 armada_reg_queue_set(dplane->vbl.regs, idx, val,
242 LCD_SPU_DMA_OVSA_HPXL_VLN);
243 }
244
245 if (dplane->ctrl0 != ctrl0) {
246 dplane->ctrl0 = ctrl0;
247 armada_reg_queue_mod(dplane->vbl.regs, idx, ctrl0,
248 CFG_CBSH_ENA | CFG_DMAFORMAT | CFG_DMA_FTOGGLE |
249 CFG_DMA_HSMOOTH | CFG_DMA_TSTMODE |
250 CFG_DMA_MOD(CFG_SWAPRB | CFG_SWAPUV | CFG_SWAPYU |
251 CFG_YUV2RGB) | CFG_DMA_ENA,
252 LCD_SPU_DMA_CTRL0);
253 }
254 if (idx) {
255 armada_reg_queue_end(dplane->vbl.regs, idx);
256 armada_drm_plane_work_queue(dcrtc, &dplane->base,
257 &dplane->vbl.work);
258 }
259 return 0;
260}
261
262static int armada_ovl_plane_disable(struct drm_plane *plane)
263{
264 struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane);
265 struct drm_framebuffer *fb;
266 struct armada_crtc *dcrtc;
267
268 if (!dplane->base.base.crtc)
269 return 0;
270
271 dcrtc = drm_to_armada_crtc(dplane->base.base.crtc);
272
273 armada_drm_plane_work_cancel(dcrtc, &dplane->base);
274 armada_drm_crtc_plane_disable(dcrtc, plane);
275
276 dcrtc->plane = NULL;
277 dplane->ctrl0 = 0;
278
279 fb = xchg(&dplane->old_fb, NULL);
280 if (fb)
281 drm_framebuffer_unreference(fb);
282
283 return 0;
284}
285
286static void armada_ovl_plane_destroy(struct drm_plane *plane)
287{
288 struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane);
289
290 drm_plane_cleanup(plane);
291
292 kfree(dplane);
293}
294
295static int armada_ovl_plane_set_property(struct drm_plane *plane,
296 struct drm_property *property, uint64_t val)
297{
298 struct armada_private *priv = plane->dev->dev_private;
299 struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane);
300 bool update_attr = false;
301
302 if (property == priv->colorkey_prop) {
303#define CCC(v) ((v) << 24 | (v) << 16 | (v) << 8)
304 dplane->prop.colorkey_yr = CCC(K2R(val));
305 dplane->prop.colorkey_ug = CCC(K2G(val));
306 dplane->prop.colorkey_vb = CCC(K2B(val));
307#undef CCC
308 update_attr = true;
309 } else if (property == priv->colorkey_min_prop) {
310 dplane->prop.colorkey_yr &= ~0x00ff0000;
311 dplane->prop.colorkey_yr |= K2R(val) << 16;
312 dplane->prop.colorkey_ug &= ~0x00ff0000;
313 dplane->prop.colorkey_ug |= K2G(val) << 16;
314 dplane->prop.colorkey_vb &= ~0x00ff0000;
315 dplane->prop.colorkey_vb |= K2B(val) << 16;
316 update_attr = true;
317 } else if (property == priv->colorkey_max_prop) {
318 dplane->prop.colorkey_yr &= ~0xff000000;
319 dplane->prop.colorkey_yr |= K2R(val) << 24;
320 dplane->prop.colorkey_ug &= ~0xff000000;
321 dplane->prop.colorkey_ug |= K2G(val) << 24;
322 dplane->prop.colorkey_vb &= ~0xff000000;
323 dplane->prop.colorkey_vb |= K2B(val) << 24;
324 update_attr = true;
325 } else if (property == priv->colorkey_val_prop) {
326 dplane->prop.colorkey_yr &= ~0x0000ff00;
327 dplane->prop.colorkey_yr |= K2R(val) << 8;
328 dplane->prop.colorkey_ug &= ~0x0000ff00;
329 dplane->prop.colorkey_ug |= K2G(val) << 8;
330 dplane->prop.colorkey_vb &= ~0x0000ff00;
331 dplane->prop.colorkey_vb |= K2B(val) << 8;
332 update_attr = true;
333 } else if (property == priv->colorkey_alpha_prop) {
334 dplane->prop.colorkey_yr &= ~0x000000ff;
335 dplane->prop.colorkey_yr |= K2R(val);
336 dplane->prop.colorkey_ug &= ~0x000000ff;
337 dplane->prop.colorkey_ug |= K2G(val);
338 dplane->prop.colorkey_vb &= ~0x000000ff;
339 dplane->prop.colorkey_vb |= K2B(val);
340 update_attr = true;
341 } else if (property == priv->colorkey_mode_prop) {
342 dplane->prop.colorkey_mode &= ~CFG_CKMODE_MASK;
343 dplane->prop.colorkey_mode |= CFG_CKMODE(val);
344 update_attr = true;
345 } else if (property == priv->brightness_prop) {
346 dplane->prop.brightness = val - 256;
347 update_attr = true;
348 } else if (property == priv->contrast_prop) {
349 dplane->prop.contrast = val;
350 update_attr = true;
351 } else if (property == priv->saturation_prop) {
352 dplane->prop.saturation = val;
353 update_attr = true;
354 }
355
356 if (update_attr && dplane->base.base.crtc)
357 armada_ovl_update_attr(&dplane->prop,
358 drm_to_armada_crtc(dplane->base.base.crtc));
359
360 return 0;
361}
362
363static const struct drm_plane_funcs armada_ovl_plane_funcs = {
364 .update_plane = armada_ovl_plane_update,
365 .disable_plane = armada_ovl_plane_disable,
366 .destroy = armada_ovl_plane_destroy,
367 .set_property = armada_ovl_plane_set_property,
368};
369
370static const uint32_t armada_ovl_formats[] = {
371 DRM_FORMAT_UYVY,
372 DRM_FORMAT_YUYV,
373 DRM_FORMAT_YUV420,
374 DRM_FORMAT_YVU420,
375 DRM_FORMAT_YUV422,
376 DRM_FORMAT_YVU422,
377 DRM_FORMAT_VYUY,
378 DRM_FORMAT_YVYU,
379 DRM_FORMAT_ARGB8888,
380 DRM_FORMAT_ABGR8888,
381 DRM_FORMAT_XRGB8888,
382 DRM_FORMAT_XBGR8888,
383 DRM_FORMAT_RGB888,
384 DRM_FORMAT_BGR888,
385 DRM_FORMAT_ARGB1555,
386 DRM_FORMAT_ABGR1555,
387 DRM_FORMAT_RGB565,
388 DRM_FORMAT_BGR565,
389};
390
391static struct drm_prop_enum_list armada_drm_colorkey_enum_list[] = {
392 { CKMODE_DISABLE, "disabled" },
393 { CKMODE_Y, "Y component" },
394 { CKMODE_U, "U component" },
395 { CKMODE_V, "V component" },
396 { CKMODE_RGB, "RGB" },
397 { CKMODE_R, "R component" },
398 { CKMODE_G, "G component" },
399 { CKMODE_B, "B component" },
400};
401
402static int armada_overlay_create_properties(struct drm_device *dev)
403{
404 struct armada_private *priv = dev->dev_private;
405
406 if (priv->colorkey_prop)
407 return 0;
408
409 priv->colorkey_prop = drm_property_create_range(dev, 0,
410 "colorkey", 0, 0xffffff);
411 priv->colorkey_min_prop = drm_property_create_range(dev, 0,
412 "colorkey_min", 0, 0xffffff);
413 priv->colorkey_max_prop = drm_property_create_range(dev, 0,
414 "colorkey_max", 0, 0xffffff);
415 priv->colorkey_val_prop = drm_property_create_range(dev, 0,
416 "colorkey_val", 0, 0xffffff);
417 priv->colorkey_alpha_prop = drm_property_create_range(dev, 0,
418 "colorkey_alpha", 0, 0xffffff);
419 priv->colorkey_mode_prop = drm_property_create_enum(dev, 0,
420 "colorkey_mode",
421 armada_drm_colorkey_enum_list,
422 ARRAY_SIZE(armada_drm_colorkey_enum_list));
423 priv->brightness_prop = drm_property_create_range(dev, 0,
424 "brightness", 0, 256 + 255);
425 priv->contrast_prop = drm_property_create_range(dev, 0,
426 "contrast", 0, 0x7fff);
427 priv->saturation_prop = drm_property_create_range(dev, 0,
428 "saturation", 0, 0x7fff);
429
430 if (!priv->colorkey_prop)
431 return -ENOMEM;
432
433 return 0;
434}
435
436int armada_overlay_plane_create(struct drm_device *dev, unsigned long crtcs)
437{
438 struct armada_private *priv = dev->dev_private;
439 struct drm_mode_object *mobj;
440 struct armada_ovl_plane *dplane;
441 int ret;
442
443 ret = armada_overlay_create_properties(dev);
444 if (ret)
445 return ret;
446
447 dplane = kzalloc(sizeof(*dplane), GFP_KERNEL);
448 if (!dplane)
449 return -ENOMEM;
450
451 ret = armada_drm_plane_init(&dplane->base);
452 if (ret) {
453 kfree(dplane);
454 return ret;
455 }
456
457 dplane->vbl.work.fn = armada_ovl_plane_work;
458
459 ret = drm_universal_plane_init(dev, &dplane->base.base, crtcs,
460 &armada_ovl_plane_funcs,
461 armada_ovl_formats,
462 ARRAY_SIZE(armada_ovl_formats),
463 DRM_PLANE_TYPE_OVERLAY, NULL);
464 if (ret) {
465 kfree(dplane);
466 return ret;
467 }
468
469 dplane->prop.colorkey_yr = 0xfefefe00;
470 dplane->prop.colorkey_ug = 0x01010100;
471 dplane->prop.colorkey_vb = 0x01010100;
472 dplane->prop.colorkey_mode = CFG_CKMODE(CKMODE_RGB);
473 dplane->prop.brightness = 0;
474 dplane->prop.contrast = 0x4000;
475 dplane->prop.saturation = 0x4000;
476
477 mobj = &dplane->base.base.base;
478 drm_object_attach_property(mobj, priv->colorkey_prop,
479 0x0101fe);
480 drm_object_attach_property(mobj, priv->colorkey_min_prop,
481 0x0101fe);
482 drm_object_attach_property(mobj, priv->colorkey_max_prop,
483 0x0101fe);
484 drm_object_attach_property(mobj, priv->colorkey_val_prop,
485 0x0101fe);
486 drm_object_attach_property(mobj, priv->colorkey_alpha_prop,
487 0x000000);
488 drm_object_attach_property(mobj, priv->colorkey_mode_prop,
489 CKMODE_RGB);
490 drm_object_attach_property(mobj, priv->brightness_prop, 256);
491 drm_object_attach_property(mobj, priv->contrast_prop,
492 dplane->prop.contrast);
493 drm_object_attach_property(mobj, priv->saturation_prop,
494 dplane->prop.saturation);
495
496 return 0;
497}
1/*
2 * Copyright (C) 2012 Russell King
3 * Rewritten from the dovefb driver, and Armada510 manuals.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9#include <drm/drmP.h>
10#include <drm/drm_atomic_helper.h>
11#include "armada_crtc.h"
12#include "armada_drm.h"
13#include "armada_fb.h"
14#include "armada_gem.h"
15#include "armada_hw.h"
16#include <drm/armada_drm.h>
17#include "armada_ioctlP.h"
18#include "armada_trace.h"
19
20struct armada_ovl_plane_properties {
21 uint32_t colorkey_yr;
22 uint32_t colorkey_ug;
23 uint32_t colorkey_vb;
24#define K2R(val) (((val) >> 0) & 0xff)
25#define K2G(val) (((val) >> 8) & 0xff)
26#define K2B(val) (((val) >> 16) & 0xff)
27 int16_t brightness;
28 uint16_t contrast;
29 uint16_t saturation;
30 uint32_t colorkey_mode;
31};
32
33struct armada_ovl_plane {
34 struct armada_plane base;
35 struct armada_ovl_plane_properties prop;
36};
37#define drm_to_armada_ovl_plane(p) \
38 container_of(p, struct armada_ovl_plane, base.base)
39
40
41static void
42armada_ovl_update_attr(struct armada_ovl_plane_properties *prop,
43 struct armada_crtc *dcrtc)
44{
45 writel_relaxed(prop->colorkey_yr, dcrtc->base + LCD_SPU_COLORKEY_Y);
46 writel_relaxed(prop->colorkey_ug, dcrtc->base + LCD_SPU_COLORKEY_U);
47 writel_relaxed(prop->colorkey_vb, dcrtc->base + LCD_SPU_COLORKEY_V);
48
49 writel_relaxed(prop->brightness << 16 | prop->contrast,
50 dcrtc->base + LCD_SPU_CONTRAST);
51 /* Docs say 15:0, but it seems to actually be 31:16 on Armada 510 */
52 writel_relaxed(prop->saturation << 16,
53 dcrtc->base + LCD_SPU_SATURATION);
54 writel_relaxed(0x00002000, dcrtc->base + LCD_SPU_CBSH_HUE);
55
56 spin_lock_irq(&dcrtc->irq_lock);
57 armada_updatel(prop->colorkey_mode | CFG_ALPHAM_GRA,
58 CFG_CKMODE_MASK | CFG_ALPHAM_MASK | CFG_ALPHA_MASK,
59 dcrtc->base + LCD_SPU_DMA_CTRL1);
60
61 armada_updatel(ADV_GRACOLORKEY, 0, dcrtc->base + LCD_SPU_ADV_REG);
62 spin_unlock_irq(&dcrtc->irq_lock);
63}
64
65/* === Plane support === */
66static void armada_ovl_plane_work(struct armada_crtc *dcrtc,
67 struct armada_plane_work *work)
68{
69 unsigned long flags;
70
71 trace_armada_ovl_plane_work(&dcrtc->crtc, work->plane);
72
73 spin_lock_irqsave(&dcrtc->irq_lock, flags);
74 armada_drm_crtc_update_regs(dcrtc, work->regs);
75 spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
76}
77
78static void armada_ovl_plane_update_state(struct drm_plane_state *state,
79 struct armada_regs *regs)
80{
81 struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(state->plane);
82 struct armada_framebuffer *dfb = drm_fb_to_armada_fb(state->fb);
83 const struct drm_format_info *format;
84 unsigned int idx = 0;
85 bool fb_changed;
86 u32 val, ctrl0;
87 u16 src_x, src_y;
88
89 ctrl0 = CFG_DMA_FMT(dfb->fmt) | CFG_DMA_MOD(dfb->mod) | CFG_CBSH_ENA;
90 if (state->visible)
91 ctrl0 |= CFG_DMA_ENA;
92 if (drm_rect_width(&state->src) >> 16 != drm_rect_width(&state->dst))
93 ctrl0 |= CFG_DMA_HSMOOTH;
94
95 /*
96 * Shifting a YUV packed format image by one pixel causes the U/V
97 * planes to swap. Compensate for it by also toggling the UV swap.
98 */
99 format = dfb->fb.format;
100 if (format->num_planes == 1 && state->src.x1 >> 16 & (format->hsub - 1))
101 ctrl0 ^= CFG_DMA_MOD(CFG_SWAPUV);
102
103 if (~dplane->base.state.ctrl0 & ctrl0 & CFG_DMA_ENA) {
104 /* Power up the Y/U/V FIFOs on ENA 0->1 transitions */
105 armada_reg_queue_mod(regs, idx,
106 0, CFG_PDWN16x66 | CFG_PDWN32x66,
107 LCD_SPU_SRAM_PARA1);
108 }
109
110 fb_changed = dplane->base.base.fb != &dfb->fb ||
111 dplane->base.state.src_x != state->src.x1 >> 16 ||
112 dplane->base.state.src_y != state->src.y1 >> 16;
113
114 dplane->base.state.vsync_update = fb_changed;
115
116 /* FIXME: overlay on an interlaced display */
117 if (fb_changed) {
118 u32 addrs[3];
119
120 dplane->base.state.src_y = src_y = state->src.y1 >> 16;
121 dplane->base.state.src_x = src_x = state->src.x1 >> 16;
122
123 armada_drm_plane_calc_addrs(addrs, &dfb->fb, src_x, src_y);
124
125 armada_reg_queue_set(regs, idx, addrs[0],
126 LCD_SPU_DMA_START_ADDR_Y0);
127 armada_reg_queue_set(regs, idx, addrs[1],
128 LCD_SPU_DMA_START_ADDR_U0);
129 armada_reg_queue_set(regs, idx, addrs[2],
130 LCD_SPU_DMA_START_ADDR_V0);
131 armada_reg_queue_set(regs, idx, addrs[0],
132 LCD_SPU_DMA_START_ADDR_Y1);
133 armada_reg_queue_set(regs, idx, addrs[1],
134 LCD_SPU_DMA_START_ADDR_U1);
135 armada_reg_queue_set(regs, idx, addrs[2],
136 LCD_SPU_DMA_START_ADDR_V1);
137
138 val = dfb->fb.pitches[0] << 16 | dfb->fb.pitches[0];
139 armada_reg_queue_set(regs, idx, val,
140 LCD_SPU_DMA_PITCH_YC);
141 val = dfb->fb.pitches[1] << 16 | dfb->fb.pitches[2];
142 armada_reg_queue_set(regs, idx, val,
143 LCD_SPU_DMA_PITCH_UV);
144 }
145
146 val = (drm_rect_height(&state->src) & 0xffff0000) |
147 drm_rect_width(&state->src) >> 16;
148 if (dplane->base.state.src_hw != val) {
149 dplane->base.state.src_hw = val;
150 armada_reg_queue_set(regs, idx, val,
151 LCD_SPU_DMA_HPXL_VLN);
152 }
153
154 val = drm_rect_height(&state->dst) << 16 | drm_rect_width(&state->dst);
155 if (dplane->base.state.dst_hw != val) {
156 dplane->base.state.dst_hw = val;
157 armada_reg_queue_set(regs, idx, val,
158 LCD_SPU_DZM_HPXL_VLN);
159 }
160
161 val = state->dst.y1 << 16 | state->dst.x1;
162 if (dplane->base.state.dst_yx != val) {
163 dplane->base.state.dst_yx = val;
164 armada_reg_queue_set(regs, idx, val,
165 LCD_SPU_DMA_OVSA_HPXL_VLN);
166 }
167
168 if (dplane->base.state.ctrl0 != ctrl0) {
169 dplane->base.state.ctrl0 = ctrl0;
170 armada_reg_queue_mod(regs, idx, ctrl0,
171 CFG_CBSH_ENA | CFG_DMAFORMAT | CFG_DMA_FTOGGLE |
172 CFG_DMA_HSMOOTH | CFG_DMA_TSTMODE |
173 CFG_DMA_MOD(CFG_SWAPRB | CFG_SWAPUV | CFG_SWAPYU |
174 CFG_YUV2RGB) | CFG_DMA_ENA,
175 LCD_SPU_DMA_CTRL0);
176 dplane->base.state.vsync_update = true;
177 }
178
179 dplane->base.state.changed = idx != 0;
180
181 armada_reg_queue_end(regs, idx);
182}
183
184static int
185armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
186 struct drm_framebuffer *fb,
187 int crtc_x, int crtc_y, unsigned crtc_w, unsigned crtc_h,
188 uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h,
189 struct drm_modeset_acquire_ctx *ctx)
190{
191 struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane);
192 struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
193 struct armada_plane_work *work;
194 struct drm_plane_state state = {
195 .plane = plane,
196 .crtc = crtc,
197 .fb = fb,
198 .src_x = src_x,
199 .src_y = src_y,
200 .src_w = src_w,
201 .src_h = src_h,
202 .crtc_x = crtc_x,
203 .crtc_y = crtc_y,
204 .crtc_w = crtc_w,
205 .crtc_h = crtc_h,
206 .rotation = DRM_MODE_ROTATE_0,
207 };
208 struct drm_crtc_state crtc_state = {
209 .crtc = crtc,
210 .enable = crtc->enabled,
211 .mode = crtc->mode,
212 };
213 int ret;
214
215 trace_armada_ovl_plane_update(plane, crtc, fb,
216 crtc_x, crtc_y, crtc_w, crtc_h,
217 src_x, src_y, src_w, src_h);
218
219 ret = drm_atomic_helper_check_plane_state(&state, &crtc_state, 0,
220 INT_MAX, true, false);
221 if (ret)
222 return ret;
223
224 work = &dplane->base.works[dplane->base.next_work];
225
226 if (plane->fb != fb) {
227 /*
228 * Take a reference on the new framebuffer - we want to
229 * hold on to it while the hardware is displaying it.
230 */
231 drm_framebuffer_reference(fb);
232
233 work->old_fb = plane->fb;
234 } else {
235 work->old_fb = NULL;
236 }
237
238 armada_ovl_plane_update_state(&state, work->regs);
239
240 if (!dplane->base.state.changed)
241 return 0;
242
243 /* Wait for pending work to complete */
244 if (armada_drm_plane_work_wait(&dplane->base, HZ / 25) == 0)
245 armada_drm_plane_work_cancel(dcrtc, &dplane->base);
246
247 /* Just updating the position/size? */
248 if (!dplane->base.state.vsync_update) {
249 armada_ovl_plane_work(dcrtc, work);
250 return 0;
251 }
252
253 if (!dcrtc->plane) {
254 dcrtc->plane = plane;
255 armada_ovl_update_attr(&dplane->prop, dcrtc);
256 }
257
258 /* Queue it for update on the next interrupt if we are enabled */
259 ret = armada_drm_plane_work_queue(dcrtc, work);
260 if (ret)
261 DRM_ERROR("failed to queue plane work: %d\n", ret);
262
263 dplane->base.next_work = !dplane->base.next_work;
264
265 return 0;
266}
267
268static void armada_ovl_plane_destroy(struct drm_plane *plane)
269{
270 struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane);
271
272 drm_plane_cleanup(plane);
273
274 kfree(dplane);
275}
276
277static int armada_ovl_plane_set_property(struct drm_plane *plane,
278 struct drm_property *property, uint64_t val)
279{
280 struct armada_private *priv = plane->dev->dev_private;
281 struct armada_ovl_plane *dplane = drm_to_armada_ovl_plane(plane);
282 bool update_attr = false;
283
284 if (property == priv->colorkey_prop) {
285#define CCC(v) ((v) << 24 | (v) << 16 | (v) << 8)
286 dplane->prop.colorkey_yr = CCC(K2R(val));
287 dplane->prop.colorkey_ug = CCC(K2G(val));
288 dplane->prop.colorkey_vb = CCC(K2B(val));
289#undef CCC
290 update_attr = true;
291 } else if (property == priv->colorkey_min_prop) {
292 dplane->prop.colorkey_yr &= ~0x00ff0000;
293 dplane->prop.colorkey_yr |= K2R(val) << 16;
294 dplane->prop.colorkey_ug &= ~0x00ff0000;
295 dplane->prop.colorkey_ug |= K2G(val) << 16;
296 dplane->prop.colorkey_vb &= ~0x00ff0000;
297 dplane->prop.colorkey_vb |= K2B(val) << 16;
298 update_attr = true;
299 } else if (property == priv->colorkey_max_prop) {
300 dplane->prop.colorkey_yr &= ~0xff000000;
301 dplane->prop.colorkey_yr |= K2R(val) << 24;
302 dplane->prop.colorkey_ug &= ~0xff000000;
303 dplane->prop.colorkey_ug |= K2G(val) << 24;
304 dplane->prop.colorkey_vb &= ~0xff000000;
305 dplane->prop.colorkey_vb |= K2B(val) << 24;
306 update_attr = true;
307 } else if (property == priv->colorkey_val_prop) {
308 dplane->prop.colorkey_yr &= ~0x0000ff00;
309 dplane->prop.colorkey_yr |= K2R(val) << 8;
310 dplane->prop.colorkey_ug &= ~0x0000ff00;
311 dplane->prop.colorkey_ug |= K2G(val) << 8;
312 dplane->prop.colorkey_vb &= ~0x0000ff00;
313 dplane->prop.colorkey_vb |= K2B(val) << 8;
314 update_attr = true;
315 } else if (property == priv->colorkey_alpha_prop) {
316 dplane->prop.colorkey_yr &= ~0x000000ff;
317 dplane->prop.colorkey_yr |= K2R(val);
318 dplane->prop.colorkey_ug &= ~0x000000ff;
319 dplane->prop.colorkey_ug |= K2G(val);
320 dplane->prop.colorkey_vb &= ~0x000000ff;
321 dplane->prop.colorkey_vb |= K2B(val);
322 update_attr = true;
323 } else if (property == priv->colorkey_mode_prop) {
324 dplane->prop.colorkey_mode &= ~CFG_CKMODE_MASK;
325 dplane->prop.colorkey_mode |= CFG_CKMODE(val);
326 update_attr = true;
327 } else if (property == priv->brightness_prop) {
328 dplane->prop.brightness = val - 256;
329 update_attr = true;
330 } else if (property == priv->contrast_prop) {
331 dplane->prop.contrast = val;
332 update_attr = true;
333 } else if (property == priv->saturation_prop) {
334 dplane->prop.saturation = val;
335 update_attr = true;
336 }
337
338 if (update_attr && dplane->base.base.crtc)
339 armada_ovl_update_attr(&dplane->prop,
340 drm_to_armada_crtc(dplane->base.base.crtc));
341
342 return 0;
343}
344
345static const struct drm_plane_funcs armada_ovl_plane_funcs = {
346 .update_plane = armada_ovl_plane_update,
347 .disable_plane = armada_drm_plane_disable,
348 .destroy = armada_ovl_plane_destroy,
349 .set_property = armada_ovl_plane_set_property,
350};
351
352static const uint32_t armada_ovl_formats[] = {
353 DRM_FORMAT_UYVY,
354 DRM_FORMAT_YUYV,
355 DRM_FORMAT_YUV420,
356 DRM_FORMAT_YVU420,
357 DRM_FORMAT_YUV422,
358 DRM_FORMAT_YVU422,
359 DRM_FORMAT_VYUY,
360 DRM_FORMAT_YVYU,
361 DRM_FORMAT_ARGB8888,
362 DRM_FORMAT_ABGR8888,
363 DRM_FORMAT_XRGB8888,
364 DRM_FORMAT_XBGR8888,
365 DRM_FORMAT_RGB888,
366 DRM_FORMAT_BGR888,
367 DRM_FORMAT_ARGB1555,
368 DRM_FORMAT_ABGR1555,
369 DRM_FORMAT_RGB565,
370 DRM_FORMAT_BGR565,
371};
372
373static const struct drm_prop_enum_list armada_drm_colorkey_enum_list[] = {
374 { CKMODE_DISABLE, "disabled" },
375 { CKMODE_Y, "Y component" },
376 { CKMODE_U, "U component" },
377 { CKMODE_V, "V component" },
378 { CKMODE_RGB, "RGB" },
379 { CKMODE_R, "R component" },
380 { CKMODE_G, "G component" },
381 { CKMODE_B, "B component" },
382};
383
384static int armada_overlay_create_properties(struct drm_device *dev)
385{
386 struct armada_private *priv = dev->dev_private;
387
388 if (priv->colorkey_prop)
389 return 0;
390
391 priv->colorkey_prop = drm_property_create_range(dev, 0,
392 "colorkey", 0, 0xffffff);
393 priv->colorkey_min_prop = drm_property_create_range(dev, 0,
394 "colorkey_min", 0, 0xffffff);
395 priv->colorkey_max_prop = drm_property_create_range(dev, 0,
396 "colorkey_max", 0, 0xffffff);
397 priv->colorkey_val_prop = drm_property_create_range(dev, 0,
398 "colorkey_val", 0, 0xffffff);
399 priv->colorkey_alpha_prop = drm_property_create_range(dev, 0,
400 "colorkey_alpha", 0, 0xffffff);
401 priv->colorkey_mode_prop = drm_property_create_enum(dev, 0,
402 "colorkey_mode",
403 armada_drm_colorkey_enum_list,
404 ARRAY_SIZE(armada_drm_colorkey_enum_list));
405 priv->brightness_prop = drm_property_create_range(dev, 0,
406 "brightness", 0, 256 + 255);
407 priv->contrast_prop = drm_property_create_range(dev, 0,
408 "contrast", 0, 0x7fff);
409 priv->saturation_prop = drm_property_create_range(dev, 0,
410 "saturation", 0, 0x7fff);
411
412 if (!priv->colorkey_prop)
413 return -ENOMEM;
414
415 return 0;
416}
417
418int armada_overlay_plane_create(struct drm_device *dev, unsigned long crtcs)
419{
420 struct armada_private *priv = dev->dev_private;
421 struct drm_mode_object *mobj;
422 struct armada_ovl_plane *dplane;
423 int ret;
424
425 ret = armada_overlay_create_properties(dev);
426 if (ret)
427 return ret;
428
429 dplane = kzalloc(sizeof(*dplane), GFP_KERNEL);
430 if (!dplane)
431 return -ENOMEM;
432
433 ret = armada_drm_plane_init(&dplane->base);
434 if (ret) {
435 kfree(dplane);
436 return ret;
437 }
438
439 dplane->base.works[0].fn = armada_ovl_plane_work;
440 dplane->base.works[1].fn = armada_ovl_plane_work;
441
442 ret = drm_universal_plane_init(dev, &dplane->base.base, crtcs,
443 &armada_ovl_plane_funcs,
444 armada_ovl_formats,
445 ARRAY_SIZE(armada_ovl_formats),
446 NULL,
447 DRM_PLANE_TYPE_OVERLAY, NULL);
448 if (ret) {
449 kfree(dplane);
450 return ret;
451 }
452
453 dplane->prop.colorkey_yr = 0xfefefe00;
454 dplane->prop.colorkey_ug = 0x01010100;
455 dplane->prop.colorkey_vb = 0x01010100;
456 dplane->prop.colorkey_mode = CFG_CKMODE(CKMODE_RGB);
457 dplane->prop.brightness = 0;
458 dplane->prop.contrast = 0x4000;
459 dplane->prop.saturation = 0x4000;
460
461 mobj = &dplane->base.base.base;
462 drm_object_attach_property(mobj, priv->colorkey_prop,
463 0x0101fe);
464 drm_object_attach_property(mobj, priv->colorkey_min_prop,
465 0x0101fe);
466 drm_object_attach_property(mobj, priv->colorkey_max_prop,
467 0x0101fe);
468 drm_object_attach_property(mobj, priv->colorkey_val_prop,
469 0x0101fe);
470 drm_object_attach_property(mobj, priv->colorkey_alpha_prop,
471 0x000000);
472 drm_object_attach_property(mobj, priv->colorkey_mode_prop,
473 CKMODE_RGB);
474 drm_object_attach_property(mobj, priv->brightness_prop, 256);
475 drm_object_attach_property(mobj, priv->contrast_prop,
476 dplane->prop.contrast);
477 drm_object_attach_property(mobj, priv->saturation_prop,
478 dplane->prop.saturation);
479
480 return 0;
481}