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1/*
2 * Copyright (C) 2012 Russell King
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef ARMADA_CRTC_H
9#define ARMADA_CRTC_H
10
11struct armada_gem_object;
12
13struct armada_regs {
14 uint32_t offset;
15 uint32_t mask;
16 uint32_t val;
17};
18
19#define armada_reg_queue_mod(_r, _i, _v, _m, _o) \
20 do { \
21 struct armada_regs *__reg = _r; \
22 __reg[_i].offset = _o; \
23 __reg[_i].mask = ~(_m); \
24 __reg[_i].val = _v; \
25 _i++; \
26 } while (0)
27
28#define armada_reg_queue_set(_r, _i, _v, _o) \
29 armada_reg_queue_mod(_r, _i, _v, ~0, _o)
30
31#define armada_reg_queue_end(_r, _i) \
32 armada_reg_queue_mod(_r, _i, 0, 0, ~0)
33
34struct armada_crtc;
35struct armada_plane;
36struct armada_variant;
37
38struct armada_plane_work {
39 void (*fn)(struct armada_crtc *,
40 struct armada_plane *,
41 struct armada_plane_work *);
42};
43
44struct armada_plane {
45 struct drm_plane base;
46 wait_queue_head_t frame_wait;
47 struct armada_plane_work *work;
48};
49#define drm_to_armada_plane(p) container_of(p, struct armada_plane, base)
50
51int armada_drm_plane_init(struct armada_plane *plane);
52int armada_drm_plane_work_queue(struct armada_crtc *dcrtc,
53 struct armada_plane *plane, struct armada_plane_work *work);
54int armada_drm_plane_work_wait(struct armada_plane *plane, long timeout);
55struct armada_plane_work *armada_drm_plane_work_cancel(
56 struct armada_crtc *dcrtc, struct armada_plane *plane);
57
58struct armada_crtc {
59 struct drm_crtc crtc;
60 const struct armada_variant *variant;
61 unsigned num;
62 void __iomem *base;
63 struct clk *clk;
64 struct clk *extclk[2];
65 struct {
66 uint32_t spu_v_h_total;
67 uint32_t spu_v_porch;
68 uint32_t spu_adv_reg;
69 } v[2];
70 bool interlaced;
71 bool cursor_update;
72 uint8_t csc_yuv_mode;
73 uint8_t csc_rgb_mode;
74
75 struct drm_plane *plane;
76
77 struct armada_gem_object *cursor_obj;
78 int cursor_x;
79 int cursor_y;
80 uint32_t cursor_hw_pos;
81 uint32_t cursor_hw_sz;
82 uint32_t cursor_w;
83 uint32_t cursor_h;
84
85 int dpms;
86 uint32_t cfg_dumb_ctrl;
87 uint32_t dumb_ctrl;
88 uint32_t spu_iopad_ctrl;
89
90 spinlock_t irq_lock;
91 uint32_t irq_ena;
92};
93#define drm_to_armada_crtc(c) container_of(c, struct armada_crtc, crtc)
94
95void armada_drm_crtc_gamma_set(struct drm_crtc *, u16, u16, u16, int);
96void armada_drm_crtc_gamma_get(struct drm_crtc *, u16 *, u16 *, u16 *, int);
97void armada_drm_crtc_disable_irq(struct armada_crtc *, u32);
98void armada_drm_crtc_enable_irq(struct armada_crtc *, u32);
99void armada_drm_crtc_update_regs(struct armada_crtc *, struct armada_regs *);
100
101void armada_drm_crtc_plane_disable(struct armada_crtc *dcrtc,
102 struct drm_plane *plane);
103
104extern struct platform_driver armada_lcd_platform_driver;
105
106#endif
1/*
2 * Copyright (C) 2012 Russell King
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef ARMADA_CRTC_H
9#define ARMADA_CRTC_H
10
11struct armada_gem_object;
12
13struct armada_regs {
14 uint32_t offset;
15 uint32_t mask;
16 uint32_t val;
17};
18
19#define armada_reg_queue_mod(_r, _i, _v, _m, _o) \
20 do { \
21 struct armada_regs *__reg = _r; \
22 __reg[_i].offset = _o; \
23 __reg[_i].mask = ~(_m); \
24 __reg[_i].val = _v; \
25 _i++; \
26 } while (0)
27
28#define armada_reg_queue_set(_r, _i, _v, _o) \
29 armada_reg_queue_mod(_r, _i, _v, ~0, _o)
30
31#define armada_reg_queue_end(_r, _i) \
32 armada_reg_queue_mod(_r, _i, 0, 0, ~0)
33
34struct armada_crtc;
35struct armada_plane;
36struct armada_variant;
37
38struct armada_plane_work {
39 void (*fn)(struct armada_crtc *, struct armada_plane_work *);
40 void (*cancel)(struct armada_crtc *, struct armada_plane_work *);
41 bool need_kfree;
42 struct drm_plane *plane;
43 struct drm_framebuffer *old_fb;
44 struct drm_pending_vblank_event *event;
45 struct armada_regs regs[14];
46};
47
48struct armada_plane_state {
49 u16 src_x;
50 u16 src_y;
51 u32 src_hw;
52 u32 dst_hw;
53 u32 dst_yx;
54 u32 ctrl0;
55 bool changed;
56 bool vsync_update;
57};
58
59struct armada_plane {
60 struct drm_plane base;
61 wait_queue_head_t frame_wait;
62 bool next_work;
63 struct armada_plane_work works[2];
64 struct armada_plane_work *work;
65 struct armada_plane_state state;
66};
67#define drm_to_armada_plane(p) container_of(p, struct armada_plane, base)
68
69int armada_drm_plane_init(struct armada_plane *plane);
70int armada_drm_plane_work_queue(struct armada_crtc *dcrtc,
71 struct armada_plane_work *work);
72int armada_drm_plane_work_wait(struct armada_plane *plane, long timeout);
73void armada_drm_plane_work_cancel(struct armada_crtc *dcrtc,
74 struct armada_plane *plane);
75void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb,
76 int x, int y);
77
78struct armada_crtc {
79 struct drm_crtc crtc;
80 const struct armada_variant *variant;
81 unsigned num;
82 void __iomem *base;
83 struct clk *clk;
84 struct clk *extclk[2];
85 struct {
86 uint32_t spu_v_h_total;
87 uint32_t spu_v_porch;
88 uint32_t spu_adv_reg;
89 } v[2];
90 bool interlaced;
91 bool cursor_update;
92 uint8_t csc_yuv_mode;
93 uint8_t csc_rgb_mode;
94
95 struct drm_plane *plane;
96
97 struct armada_gem_object *cursor_obj;
98 int cursor_x;
99 int cursor_y;
100 uint32_t cursor_hw_pos;
101 uint32_t cursor_hw_sz;
102 uint32_t cursor_w;
103 uint32_t cursor_h;
104
105 int dpms;
106 uint32_t cfg_dumb_ctrl;
107 uint32_t dumb_ctrl;
108 uint32_t spu_iopad_ctrl;
109
110 spinlock_t irq_lock;
111 uint32_t irq_ena;
112};
113#define drm_to_armada_crtc(c) container_of(c, struct armada_crtc, crtc)
114
115void armada_drm_crtc_update_regs(struct armada_crtc *, struct armada_regs *);
116
117int armada_drm_plane_disable(struct drm_plane *plane,
118 struct drm_modeset_acquire_ctx *ctx);
119
120extern struct platform_driver armada_lcd_platform_driver;
121
122#endif