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1/*
2 * FPGA Manager Core
3 *
4 * Copyright (C) 2013-2015 Altera Corporation
5 *
6 * With code from the mailing list:
7 * Copyright (C) 2013 Xilinx, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms and conditions of the GNU General Public License,
11 * version 2, as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * more details.
17 *
18 * You should have received a copy of the GNU General Public License along with
19 * this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21#include <linux/firmware.h>
22#include <linux/fpga/fpga-mgr.h>
23#include <linux/idr.h>
24#include <linux/module.h>
25#include <linux/of.h>
26#include <linux/mutex.h>
27#include <linux/slab.h>
28
29static DEFINE_IDA(fpga_mgr_ida);
30static struct class *fpga_mgr_class;
31
32/**
33 * fpga_mgr_buf_load - load fpga from image in buffer
34 * @mgr: fpga manager
35 * @flags: flags setting fpga confuration modes
36 * @buf: buffer contain fpga image
37 * @count: byte count of buf
38 *
39 * Step the low level fpga manager through the device-specific steps of getting
40 * an FPGA ready to be configured, writing the image to it, then doing whatever
41 * post-configuration steps necessary. This code assumes the caller got the
42 * mgr pointer from of_fpga_mgr_get() and checked that it is not an error code.
43 *
44 * Return: 0 on success, negative error code otherwise.
45 */
46int fpga_mgr_buf_load(struct fpga_manager *mgr, u32 flags, const char *buf,
47 size_t count)
48{
49 struct device *dev = &mgr->dev;
50 int ret;
51
52 /*
53 * Call the low level driver's write_init function. This will do the
54 * device-specific things to get the FPGA into the state where it is
55 * ready to receive an FPGA image.
56 */
57 mgr->state = FPGA_MGR_STATE_WRITE_INIT;
58 ret = mgr->mops->write_init(mgr, flags, buf, count);
59 if (ret) {
60 dev_err(dev, "Error preparing FPGA for writing\n");
61 mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
62 return ret;
63 }
64
65 /*
66 * Write the FPGA image to the FPGA.
67 */
68 mgr->state = FPGA_MGR_STATE_WRITE;
69 ret = mgr->mops->write(mgr, buf, count);
70 if (ret) {
71 dev_err(dev, "Error while writing image data to FPGA\n");
72 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
73 return ret;
74 }
75
76 /*
77 * After all the FPGA image has been written, do the device specific
78 * steps to finish and set the FPGA into operating mode.
79 */
80 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
81 ret = mgr->mops->write_complete(mgr, flags);
82 if (ret) {
83 dev_err(dev, "Error after writing image data to FPGA\n");
84 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
85 return ret;
86 }
87 mgr->state = FPGA_MGR_STATE_OPERATING;
88
89 return 0;
90}
91EXPORT_SYMBOL_GPL(fpga_mgr_buf_load);
92
93/**
94 * fpga_mgr_firmware_load - request firmware and load to fpga
95 * @mgr: fpga manager
96 * @flags: flags setting fpga confuration modes
97 * @image_name: name of image file on the firmware search path
98 *
99 * Request an FPGA image using the firmware class, then write out to the FPGA.
100 * Update the state before each step to provide info on what step failed if
101 * there is a failure. This code assumes the caller got the mgr pointer
102 * from of_fpga_mgr_get() and checked that it is not an error code.
103 *
104 * Return: 0 on success, negative error code otherwise.
105 */
106int fpga_mgr_firmware_load(struct fpga_manager *mgr, u32 flags,
107 const char *image_name)
108{
109 struct device *dev = &mgr->dev;
110 const struct firmware *fw;
111 int ret;
112
113 dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
114
115 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
116
117 ret = request_firmware(&fw, image_name, dev);
118 if (ret) {
119 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
120 dev_err(dev, "Error requesting firmware %s\n", image_name);
121 return ret;
122 }
123
124 ret = fpga_mgr_buf_load(mgr, flags, fw->data, fw->size);
125
126 release_firmware(fw);
127
128 return ret;
129}
130EXPORT_SYMBOL_GPL(fpga_mgr_firmware_load);
131
132static const char * const state_str[] = {
133 [FPGA_MGR_STATE_UNKNOWN] = "unknown",
134 [FPGA_MGR_STATE_POWER_OFF] = "power off",
135 [FPGA_MGR_STATE_POWER_UP] = "power up",
136 [FPGA_MGR_STATE_RESET] = "reset",
137
138 /* requesting FPGA image from firmware */
139 [FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request",
140 [FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error",
141
142 /* Preparing FPGA to receive image */
143 [FPGA_MGR_STATE_WRITE_INIT] = "write init",
144 [FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error",
145
146 /* Writing image to FPGA */
147 [FPGA_MGR_STATE_WRITE] = "write",
148 [FPGA_MGR_STATE_WRITE_ERR] = "write error",
149
150 /* Finishing configuration after image has been written */
151 [FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete",
152 [FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error",
153
154 /* FPGA reports to be in normal operating mode */
155 [FPGA_MGR_STATE_OPERATING] = "operating",
156};
157
158static ssize_t name_show(struct device *dev,
159 struct device_attribute *attr, char *buf)
160{
161 struct fpga_manager *mgr = to_fpga_manager(dev);
162
163 return sprintf(buf, "%s\n", mgr->name);
164}
165
166static ssize_t state_show(struct device *dev,
167 struct device_attribute *attr, char *buf)
168{
169 struct fpga_manager *mgr = to_fpga_manager(dev);
170
171 return sprintf(buf, "%s\n", state_str[mgr->state]);
172}
173
174static DEVICE_ATTR_RO(name);
175static DEVICE_ATTR_RO(state);
176
177static struct attribute *fpga_mgr_attrs[] = {
178 &dev_attr_name.attr,
179 &dev_attr_state.attr,
180 NULL,
181};
182ATTRIBUTE_GROUPS(fpga_mgr);
183
184static int fpga_mgr_of_node_match(struct device *dev, const void *data)
185{
186 return dev->of_node == data;
187}
188
189/**
190 * of_fpga_mgr_get - get an exclusive reference to a fpga mgr
191 * @node: device node
192 *
193 * Given a device node, get an exclusive reference to a fpga mgr.
194 *
195 * Return: fpga manager struct or IS_ERR() condition containing error code.
196 */
197struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
198{
199 struct fpga_manager *mgr;
200 struct device *dev;
201 int ret = -ENODEV;
202
203 dev = class_find_device(fpga_mgr_class, NULL, node,
204 fpga_mgr_of_node_match);
205 if (!dev)
206 return ERR_PTR(-ENODEV);
207
208 mgr = to_fpga_manager(dev);
209 if (!mgr)
210 goto err_dev;
211
212 /* Get exclusive use of fpga manager */
213 if (!mutex_trylock(&mgr->ref_mutex)) {
214 ret = -EBUSY;
215 goto err_dev;
216 }
217
218 if (!try_module_get(dev->parent->driver->owner))
219 goto err_ll_mod;
220
221 return mgr;
222
223err_ll_mod:
224 mutex_unlock(&mgr->ref_mutex);
225err_dev:
226 put_device(dev);
227 return ERR_PTR(ret);
228}
229EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
230
231/**
232 * fpga_mgr_put - release a reference to a fpga manager
233 * @mgr: fpga manager structure
234 */
235void fpga_mgr_put(struct fpga_manager *mgr)
236{
237 module_put(mgr->dev.parent->driver->owner);
238 mutex_unlock(&mgr->ref_mutex);
239 put_device(&mgr->dev);
240}
241EXPORT_SYMBOL_GPL(fpga_mgr_put);
242
243/**
244 * fpga_mgr_register - register a low level fpga manager driver
245 * @dev: fpga manager device from pdev
246 * @name: fpga manager name
247 * @mops: pointer to structure of fpga manager ops
248 * @priv: fpga manager private data
249 *
250 * Return: 0 on success, negative error code otherwise.
251 */
252int fpga_mgr_register(struct device *dev, const char *name,
253 const struct fpga_manager_ops *mops,
254 void *priv)
255{
256 struct fpga_manager *mgr;
257 int id, ret;
258
259 if (!mops || !mops->write_init || !mops->write ||
260 !mops->write_complete || !mops->state) {
261 dev_err(dev, "Attempt to register without fpga_manager_ops\n");
262 return -EINVAL;
263 }
264
265 if (!name || !strlen(name)) {
266 dev_err(dev, "Attempt to register with no name!\n");
267 return -EINVAL;
268 }
269
270 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
271 if (!mgr)
272 return -ENOMEM;
273
274 id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
275 if (id < 0) {
276 ret = id;
277 goto error_kfree;
278 }
279
280 mutex_init(&mgr->ref_mutex);
281
282 mgr->name = name;
283 mgr->mops = mops;
284 mgr->priv = priv;
285
286 /*
287 * Initialize framework state by requesting low level driver read state
288 * from device. FPGA may be in reset mode or may have been programmed
289 * by bootloader or EEPROM.
290 */
291 mgr->state = mgr->mops->state(mgr);
292
293 device_initialize(&mgr->dev);
294 mgr->dev.class = fpga_mgr_class;
295 mgr->dev.parent = dev;
296 mgr->dev.of_node = dev->of_node;
297 mgr->dev.id = id;
298 dev_set_drvdata(dev, mgr);
299
300 ret = dev_set_name(&mgr->dev, "fpga%d", id);
301 if (ret)
302 goto error_device;
303
304 ret = device_add(&mgr->dev);
305 if (ret)
306 goto error_device;
307
308 dev_info(&mgr->dev, "%s registered\n", mgr->name);
309
310 return 0;
311
312error_device:
313 ida_simple_remove(&fpga_mgr_ida, id);
314error_kfree:
315 kfree(mgr);
316
317 return ret;
318}
319EXPORT_SYMBOL_GPL(fpga_mgr_register);
320
321/**
322 * fpga_mgr_unregister - unregister a low level fpga manager driver
323 * @dev: fpga manager device from pdev
324 */
325void fpga_mgr_unregister(struct device *dev)
326{
327 struct fpga_manager *mgr = dev_get_drvdata(dev);
328
329 dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
330
331 /*
332 * If the low level driver provides a method for putting fpga into
333 * a desired state upon unregister, do it.
334 */
335 if (mgr->mops->fpga_remove)
336 mgr->mops->fpga_remove(mgr);
337
338 device_unregister(&mgr->dev);
339}
340EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
341
342static void fpga_mgr_dev_release(struct device *dev)
343{
344 struct fpga_manager *mgr = to_fpga_manager(dev);
345
346 ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
347 kfree(mgr);
348}
349
350static int __init fpga_mgr_class_init(void)
351{
352 pr_info("FPGA manager framework\n");
353
354 fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
355 if (IS_ERR(fpga_mgr_class))
356 return PTR_ERR(fpga_mgr_class);
357
358 fpga_mgr_class->dev_groups = fpga_mgr_groups;
359 fpga_mgr_class->dev_release = fpga_mgr_dev_release;
360
361 return 0;
362}
363
364static void __exit fpga_mgr_class_exit(void)
365{
366 class_destroy(fpga_mgr_class);
367 ida_destroy(&fpga_mgr_ida);
368}
369
370MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
371MODULE_DESCRIPTION("FPGA manager framework");
372MODULE_LICENSE("GPL v2");
373
374subsys_initcall(fpga_mgr_class_init);
375module_exit(fpga_mgr_class_exit);
1/*
2 * FPGA Manager Core
3 *
4 * Copyright (C) 2013-2015 Altera Corporation
5 * Copyright (C) 2017 Intel Corporation
6 *
7 * With code from the mailing list:
8 * Copyright (C) 2013 Xilinx, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms and conditions of the GNU General Public License,
12 * version 2, as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
21 */
22#include <linux/firmware.h>
23#include <linux/fpga/fpga-mgr.h>
24#include <linux/idr.h>
25#include <linux/module.h>
26#include <linux/of.h>
27#include <linux/mutex.h>
28#include <linux/slab.h>
29#include <linux/scatterlist.h>
30#include <linux/highmem.h>
31
32static DEFINE_IDA(fpga_mgr_ida);
33static struct class *fpga_mgr_class;
34
35struct fpga_image_info *fpga_image_info_alloc(struct device *dev)
36{
37 struct fpga_image_info *info;
38
39 get_device(dev);
40
41 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
42 if (!info) {
43 put_device(dev);
44 return NULL;
45 }
46
47 info->dev = dev;
48
49 return info;
50}
51EXPORT_SYMBOL_GPL(fpga_image_info_alloc);
52
53void fpga_image_info_free(struct fpga_image_info *info)
54{
55 struct device *dev;
56
57 if (!info)
58 return;
59
60 dev = info->dev;
61 if (info->firmware_name)
62 devm_kfree(dev, info->firmware_name);
63
64 devm_kfree(dev, info);
65 put_device(dev);
66}
67EXPORT_SYMBOL_GPL(fpga_image_info_free);
68
69/*
70 * Call the low level driver's write_init function. This will do the
71 * device-specific things to get the FPGA into the state where it is ready to
72 * receive an FPGA image. The low level driver only gets to see the first
73 * initial_header_size bytes in the buffer.
74 */
75static int fpga_mgr_write_init_buf(struct fpga_manager *mgr,
76 struct fpga_image_info *info,
77 const char *buf, size_t count)
78{
79 int ret;
80
81 mgr->state = FPGA_MGR_STATE_WRITE_INIT;
82 if (!mgr->mops->initial_header_size)
83 ret = mgr->mops->write_init(mgr, info, NULL, 0);
84 else
85 ret = mgr->mops->write_init(
86 mgr, info, buf, min(mgr->mops->initial_header_size, count));
87
88 if (ret) {
89 dev_err(&mgr->dev, "Error preparing FPGA for writing\n");
90 mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
91 return ret;
92 }
93
94 return 0;
95}
96
97static int fpga_mgr_write_init_sg(struct fpga_manager *mgr,
98 struct fpga_image_info *info,
99 struct sg_table *sgt)
100{
101 struct sg_mapping_iter miter;
102 size_t len;
103 char *buf;
104 int ret;
105
106 if (!mgr->mops->initial_header_size)
107 return fpga_mgr_write_init_buf(mgr, info, NULL, 0);
108
109 /*
110 * First try to use miter to map the first fragment to access the
111 * header, this is the typical path.
112 */
113 sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
114 if (sg_miter_next(&miter) &&
115 miter.length >= mgr->mops->initial_header_size) {
116 ret = fpga_mgr_write_init_buf(mgr, info, miter.addr,
117 miter.length);
118 sg_miter_stop(&miter);
119 return ret;
120 }
121 sg_miter_stop(&miter);
122
123 /* Otherwise copy the fragments into temporary memory. */
124 buf = kmalloc(mgr->mops->initial_header_size, GFP_KERNEL);
125 if (!buf)
126 return -ENOMEM;
127
128 len = sg_copy_to_buffer(sgt->sgl, sgt->nents, buf,
129 mgr->mops->initial_header_size);
130 ret = fpga_mgr_write_init_buf(mgr, info, buf, len);
131
132 kfree(buf);
133
134 return ret;
135}
136
137/*
138 * After all the FPGA image has been written, do the device specific steps to
139 * finish and set the FPGA into operating mode.
140 */
141static int fpga_mgr_write_complete(struct fpga_manager *mgr,
142 struct fpga_image_info *info)
143{
144 int ret;
145
146 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
147 ret = mgr->mops->write_complete(mgr, info);
148 if (ret) {
149 dev_err(&mgr->dev, "Error after writing image data to FPGA\n");
150 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
151 return ret;
152 }
153 mgr->state = FPGA_MGR_STATE_OPERATING;
154
155 return 0;
156}
157
158/**
159 * fpga_mgr_buf_load_sg - load fpga from image in buffer from a scatter list
160 * @mgr: fpga manager
161 * @info: fpga image specific information
162 * @sgt: scatterlist table
163 *
164 * Step the low level fpga manager through the device-specific steps of getting
165 * an FPGA ready to be configured, writing the image to it, then doing whatever
166 * post-configuration steps necessary. This code assumes the caller got the
167 * mgr pointer from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is
168 * not an error code.
169 *
170 * This is the preferred entry point for FPGA programming, it does not require
171 * any contiguous kernel memory.
172 *
173 * Return: 0 on success, negative error code otherwise.
174 */
175static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr,
176 struct fpga_image_info *info,
177 struct sg_table *sgt)
178{
179 int ret;
180
181 ret = fpga_mgr_write_init_sg(mgr, info, sgt);
182 if (ret)
183 return ret;
184
185 /* Write the FPGA image to the FPGA. */
186 mgr->state = FPGA_MGR_STATE_WRITE;
187 if (mgr->mops->write_sg) {
188 ret = mgr->mops->write_sg(mgr, sgt);
189 } else {
190 struct sg_mapping_iter miter;
191
192 sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG);
193 while (sg_miter_next(&miter)) {
194 ret = mgr->mops->write(mgr, miter.addr, miter.length);
195 if (ret)
196 break;
197 }
198 sg_miter_stop(&miter);
199 }
200
201 if (ret) {
202 dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
203 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
204 return ret;
205 }
206
207 return fpga_mgr_write_complete(mgr, info);
208}
209
210static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr,
211 struct fpga_image_info *info,
212 const char *buf, size_t count)
213{
214 int ret;
215
216 ret = fpga_mgr_write_init_buf(mgr, info, buf, count);
217 if (ret)
218 return ret;
219
220 /*
221 * Write the FPGA image to the FPGA.
222 */
223 mgr->state = FPGA_MGR_STATE_WRITE;
224 ret = mgr->mops->write(mgr, buf, count);
225 if (ret) {
226 dev_err(&mgr->dev, "Error while writing image data to FPGA\n");
227 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
228 return ret;
229 }
230
231 return fpga_mgr_write_complete(mgr, info);
232}
233
234/**
235 * fpga_mgr_buf_load - load fpga from image in buffer
236 * @mgr: fpga manager
237 * @flags: flags setting fpga confuration modes
238 * @buf: buffer contain fpga image
239 * @count: byte count of buf
240 *
241 * Step the low level fpga manager through the device-specific steps of getting
242 * an FPGA ready to be configured, writing the image to it, then doing whatever
243 * post-configuration steps necessary. This code assumes the caller got the
244 * mgr pointer from of_fpga_mgr_get() and checked that it is not an error code.
245 *
246 * Return: 0 on success, negative error code otherwise.
247 */
248static int fpga_mgr_buf_load(struct fpga_manager *mgr,
249 struct fpga_image_info *info,
250 const char *buf, size_t count)
251{
252 struct page **pages;
253 struct sg_table sgt;
254 const void *p;
255 int nr_pages;
256 int index;
257 int rc;
258
259 /*
260 * This is just a fast path if the caller has already created a
261 * contiguous kernel buffer and the driver doesn't require SG, non-SG
262 * drivers will still work on the slow path.
263 */
264 if (mgr->mops->write)
265 return fpga_mgr_buf_load_mapped(mgr, info, buf, count);
266
267 /*
268 * Convert the linear kernel pointer into a sg_table of pages for use
269 * by the driver.
270 */
271 nr_pages = DIV_ROUND_UP((unsigned long)buf + count, PAGE_SIZE) -
272 (unsigned long)buf / PAGE_SIZE;
273 pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);
274 if (!pages)
275 return -ENOMEM;
276
277 p = buf - offset_in_page(buf);
278 for (index = 0; index < nr_pages; index++) {
279 if (is_vmalloc_addr(p))
280 pages[index] = vmalloc_to_page(p);
281 else
282 pages[index] = kmap_to_page((void *)p);
283 if (!pages[index]) {
284 kfree(pages);
285 return -EFAULT;
286 }
287 p += PAGE_SIZE;
288 }
289
290 /*
291 * The temporary pages list is used to code share the merging algorithm
292 * in sg_alloc_table_from_pages
293 */
294 rc = sg_alloc_table_from_pages(&sgt, pages, index, offset_in_page(buf),
295 count, GFP_KERNEL);
296 kfree(pages);
297 if (rc)
298 return rc;
299
300 rc = fpga_mgr_buf_load_sg(mgr, info, &sgt);
301 sg_free_table(&sgt);
302
303 return rc;
304}
305
306/**
307 * fpga_mgr_firmware_load - request firmware and load to fpga
308 * @mgr: fpga manager
309 * @info: fpga image specific information
310 * @image_name: name of image file on the firmware search path
311 *
312 * Request an FPGA image using the firmware class, then write out to the FPGA.
313 * Update the state before each step to provide info on what step failed if
314 * there is a failure. This code assumes the caller got the mgr pointer
315 * from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is not an error
316 * code.
317 *
318 * Return: 0 on success, negative error code otherwise.
319 */
320static int fpga_mgr_firmware_load(struct fpga_manager *mgr,
321 struct fpga_image_info *info,
322 const char *image_name)
323{
324 struct device *dev = &mgr->dev;
325 const struct firmware *fw;
326 int ret;
327
328 dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
329
330 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
331
332 ret = request_firmware(&fw, image_name, dev);
333 if (ret) {
334 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
335 dev_err(dev, "Error requesting firmware %s\n", image_name);
336 return ret;
337 }
338
339 ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size);
340
341 release_firmware(fw);
342
343 return ret;
344}
345
346int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info)
347{
348 if (info->sgt)
349 return fpga_mgr_buf_load_sg(mgr, info, info->sgt);
350 if (info->buf && info->count)
351 return fpga_mgr_buf_load(mgr, info, info->buf, info->count);
352 if (info->firmware_name)
353 return fpga_mgr_firmware_load(mgr, info, info->firmware_name);
354 return -EINVAL;
355}
356EXPORT_SYMBOL_GPL(fpga_mgr_load);
357
358static const char * const state_str[] = {
359 [FPGA_MGR_STATE_UNKNOWN] = "unknown",
360 [FPGA_MGR_STATE_POWER_OFF] = "power off",
361 [FPGA_MGR_STATE_POWER_UP] = "power up",
362 [FPGA_MGR_STATE_RESET] = "reset",
363
364 /* requesting FPGA image from firmware */
365 [FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request",
366 [FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error",
367
368 /* Preparing FPGA to receive image */
369 [FPGA_MGR_STATE_WRITE_INIT] = "write init",
370 [FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error",
371
372 /* Writing image to FPGA */
373 [FPGA_MGR_STATE_WRITE] = "write",
374 [FPGA_MGR_STATE_WRITE_ERR] = "write error",
375
376 /* Finishing configuration after image has been written */
377 [FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete",
378 [FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error",
379
380 /* FPGA reports to be in normal operating mode */
381 [FPGA_MGR_STATE_OPERATING] = "operating",
382};
383
384static ssize_t name_show(struct device *dev,
385 struct device_attribute *attr, char *buf)
386{
387 struct fpga_manager *mgr = to_fpga_manager(dev);
388
389 return sprintf(buf, "%s\n", mgr->name);
390}
391
392static ssize_t state_show(struct device *dev,
393 struct device_attribute *attr, char *buf)
394{
395 struct fpga_manager *mgr = to_fpga_manager(dev);
396
397 return sprintf(buf, "%s\n", state_str[mgr->state]);
398}
399
400static DEVICE_ATTR_RO(name);
401static DEVICE_ATTR_RO(state);
402
403static struct attribute *fpga_mgr_attrs[] = {
404 &dev_attr_name.attr,
405 &dev_attr_state.attr,
406 NULL,
407};
408ATTRIBUTE_GROUPS(fpga_mgr);
409
410static struct fpga_manager *__fpga_mgr_get(struct device *dev)
411{
412 struct fpga_manager *mgr;
413
414 mgr = to_fpga_manager(dev);
415
416 if (!try_module_get(dev->parent->driver->owner))
417 goto err_dev;
418
419 return mgr;
420
421err_dev:
422 put_device(dev);
423 return ERR_PTR(-ENODEV);
424}
425
426static int fpga_mgr_dev_match(struct device *dev, const void *data)
427{
428 return dev->parent == data;
429}
430
431/**
432 * fpga_mgr_get - get a reference to a fpga mgr
433 * @dev: parent device that fpga mgr was registered with
434 *
435 * Given a device, get a reference to a fpga mgr.
436 *
437 * Return: fpga manager struct or IS_ERR() condition containing error code.
438 */
439struct fpga_manager *fpga_mgr_get(struct device *dev)
440{
441 struct device *mgr_dev = class_find_device(fpga_mgr_class, NULL, dev,
442 fpga_mgr_dev_match);
443 if (!mgr_dev)
444 return ERR_PTR(-ENODEV);
445
446 return __fpga_mgr_get(mgr_dev);
447}
448EXPORT_SYMBOL_GPL(fpga_mgr_get);
449
450static int fpga_mgr_of_node_match(struct device *dev, const void *data)
451{
452 return dev->of_node == data;
453}
454
455/**
456 * of_fpga_mgr_get - get a reference to a fpga mgr
457 * @node: device node
458 *
459 * Given a device node, get a reference to a fpga mgr.
460 *
461 * Return: fpga manager struct or IS_ERR() condition containing error code.
462 */
463struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
464{
465 struct device *dev;
466
467 dev = class_find_device(fpga_mgr_class, NULL, node,
468 fpga_mgr_of_node_match);
469 if (!dev)
470 return ERR_PTR(-ENODEV);
471
472 return __fpga_mgr_get(dev);
473}
474EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
475
476/**
477 * fpga_mgr_put - release a reference to a fpga manager
478 * @mgr: fpga manager structure
479 */
480void fpga_mgr_put(struct fpga_manager *mgr)
481{
482 module_put(mgr->dev.parent->driver->owner);
483 put_device(&mgr->dev);
484}
485EXPORT_SYMBOL_GPL(fpga_mgr_put);
486
487/**
488 * fpga_mgr_lock - Lock FPGA manager for exclusive use
489 * @mgr: fpga manager
490 *
491 * Given a pointer to FPGA Manager (from fpga_mgr_get() or
492 * of_fpga_mgr_put()) attempt to get the mutex.
493 *
494 * Return: 0 for success or -EBUSY
495 */
496int fpga_mgr_lock(struct fpga_manager *mgr)
497{
498 if (!mutex_trylock(&mgr->ref_mutex)) {
499 dev_err(&mgr->dev, "FPGA manager is in use.\n");
500 return -EBUSY;
501 }
502
503 return 0;
504}
505EXPORT_SYMBOL_GPL(fpga_mgr_lock);
506
507/**
508 * fpga_mgr_unlock - Unlock FPGA manager
509 * @mgr: fpga manager
510 */
511void fpga_mgr_unlock(struct fpga_manager *mgr)
512{
513 mutex_unlock(&mgr->ref_mutex);
514}
515EXPORT_SYMBOL_GPL(fpga_mgr_unlock);
516
517/**
518 * fpga_mgr_register - register a low level fpga manager driver
519 * @dev: fpga manager device from pdev
520 * @name: fpga manager name
521 * @mops: pointer to structure of fpga manager ops
522 * @priv: fpga manager private data
523 *
524 * Return: 0 on success, negative error code otherwise.
525 */
526int fpga_mgr_register(struct device *dev, const char *name,
527 const struct fpga_manager_ops *mops,
528 void *priv)
529{
530 struct fpga_manager *mgr;
531 int id, ret;
532
533 if (!mops || !mops->write_complete || !mops->state ||
534 !mops->write_init || (!mops->write && !mops->write_sg) ||
535 (mops->write && mops->write_sg)) {
536 dev_err(dev, "Attempt to register without fpga_manager_ops\n");
537 return -EINVAL;
538 }
539
540 if (!name || !strlen(name)) {
541 dev_err(dev, "Attempt to register with no name!\n");
542 return -EINVAL;
543 }
544
545 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
546 if (!mgr)
547 return -ENOMEM;
548
549 id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
550 if (id < 0) {
551 ret = id;
552 goto error_kfree;
553 }
554
555 mutex_init(&mgr->ref_mutex);
556
557 mgr->name = name;
558 mgr->mops = mops;
559 mgr->priv = priv;
560
561 /*
562 * Initialize framework state by requesting low level driver read state
563 * from device. FPGA may be in reset mode or may have been programmed
564 * by bootloader or EEPROM.
565 */
566 mgr->state = mgr->mops->state(mgr);
567
568 device_initialize(&mgr->dev);
569 mgr->dev.class = fpga_mgr_class;
570 mgr->dev.groups = mops->groups;
571 mgr->dev.parent = dev;
572 mgr->dev.of_node = dev->of_node;
573 mgr->dev.id = id;
574 dev_set_drvdata(dev, mgr);
575
576 ret = dev_set_name(&mgr->dev, "fpga%d", id);
577 if (ret)
578 goto error_device;
579
580 ret = device_add(&mgr->dev);
581 if (ret)
582 goto error_device;
583
584 dev_info(&mgr->dev, "%s registered\n", mgr->name);
585
586 return 0;
587
588error_device:
589 ida_simple_remove(&fpga_mgr_ida, id);
590error_kfree:
591 kfree(mgr);
592
593 return ret;
594}
595EXPORT_SYMBOL_GPL(fpga_mgr_register);
596
597/**
598 * fpga_mgr_unregister - unregister a low level fpga manager driver
599 * @dev: fpga manager device from pdev
600 */
601void fpga_mgr_unregister(struct device *dev)
602{
603 struct fpga_manager *mgr = dev_get_drvdata(dev);
604
605 dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
606
607 /*
608 * If the low level driver provides a method for putting fpga into
609 * a desired state upon unregister, do it.
610 */
611 if (mgr->mops->fpga_remove)
612 mgr->mops->fpga_remove(mgr);
613
614 device_unregister(&mgr->dev);
615}
616EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
617
618static void fpga_mgr_dev_release(struct device *dev)
619{
620 struct fpga_manager *mgr = to_fpga_manager(dev);
621
622 ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
623 kfree(mgr);
624}
625
626static int __init fpga_mgr_class_init(void)
627{
628 pr_info("FPGA manager framework\n");
629
630 fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
631 if (IS_ERR(fpga_mgr_class))
632 return PTR_ERR(fpga_mgr_class);
633
634 fpga_mgr_class->dev_groups = fpga_mgr_groups;
635 fpga_mgr_class->dev_release = fpga_mgr_dev_release;
636
637 return 0;
638}
639
640static void __exit fpga_mgr_class_exit(void)
641{
642 class_destroy(fpga_mgr_class);
643 ida_destroy(&fpga_mgr_ida);
644}
645
646MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
647MODULE_DESCRIPTION("FPGA manager framework");
648MODULE_LICENSE("GPL v2");
649
650subsys_initcall(fpga_mgr_class_init);
651module_exit(fpga_mgr_class_exit);