Loading...
1/*
2 * Copyright (C) 2012 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundationr
8 */
9
10#include <linux/kernel.h>
11#include <linux/clk.h>
12#include <linux/err.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
15#include <linux/platform_device.h>
16#include <linux/pm_runtime.h>
17#include <linux/slab.h>
18#include <linux/workqueue.h>
19#include <linux/dma-mapping.h>
20#include <linux/dma-attrs.h>
21#include <linux/of.h>
22
23#include <drm/drmP.h>
24#include <drm/exynos_drm.h>
25#include "exynos_drm_drv.h"
26#include "exynos_drm_g2d.h"
27#include "exynos_drm_gem.h"
28#include "exynos_drm_iommu.h"
29
30#define G2D_HW_MAJOR_VER 4
31#define G2D_HW_MINOR_VER 1
32
33/* vaild register range set from user: 0x0104 ~ 0x0880 */
34#define G2D_VALID_START 0x0104
35#define G2D_VALID_END 0x0880
36
37/* general registers */
38#define G2D_SOFT_RESET 0x0000
39#define G2D_INTEN 0x0004
40#define G2D_INTC_PEND 0x000C
41#define G2D_DMA_SFR_BASE_ADDR 0x0080
42#define G2D_DMA_COMMAND 0x0084
43#define G2D_DMA_STATUS 0x008C
44#define G2D_DMA_HOLD_CMD 0x0090
45
46/* command registers */
47#define G2D_BITBLT_START 0x0100
48
49/* registers for base address */
50#define G2D_SRC_BASE_ADDR 0x0304
51#define G2D_SRC_STRIDE_REG 0x0308
52#define G2D_SRC_COLOR_MODE 0x030C
53#define G2D_SRC_LEFT_TOP 0x0310
54#define G2D_SRC_RIGHT_BOTTOM 0x0314
55#define G2D_SRC_PLANE2_BASE_ADDR 0x0318
56#define G2D_DST_BASE_ADDR 0x0404
57#define G2D_DST_STRIDE_REG 0x0408
58#define G2D_DST_COLOR_MODE 0x040C
59#define G2D_DST_LEFT_TOP 0x0410
60#define G2D_DST_RIGHT_BOTTOM 0x0414
61#define G2D_DST_PLANE2_BASE_ADDR 0x0418
62#define G2D_PAT_BASE_ADDR 0x0500
63#define G2D_MSK_BASE_ADDR 0x0520
64
65/* G2D_SOFT_RESET */
66#define G2D_SFRCLEAR (1 << 1)
67#define G2D_R (1 << 0)
68
69/* G2D_INTEN */
70#define G2D_INTEN_ACF (1 << 3)
71#define G2D_INTEN_UCF (1 << 2)
72#define G2D_INTEN_GCF (1 << 1)
73#define G2D_INTEN_SCF (1 << 0)
74
75/* G2D_INTC_PEND */
76#define G2D_INTP_ACMD_FIN (1 << 3)
77#define G2D_INTP_UCMD_FIN (1 << 2)
78#define G2D_INTP_GCMD_FIN (1 << 1)
79#define G2D_INTP_SCMD_FIN (1 << 0)
80
81/* G2D_DMA_COMMAND */
82#define G2D_DMA_HALT (1 << 2)
83#define G2D_DMA_CONTINUE (1 << 1)
84#define G2D_DMA_START (1 << 0)
85
86/* G2D_DMA_STATUS */
87#define G2D_DMA_LIST_DONE_COUNT (0xFF << 17)
88#define G2D_DMA_BITBLT_DONE_COUNT (0xFFFF << 1)
89#define G2D_DMA_DONE (1 << 0)
90#define G2D_DMA_LIST_DONE_COUNT_OFFSET 17
91
92/* G2D_DMA_HOLD_CMD */
93#define G2D_USER_HOLD (1 << 2)
94#define G2D_LIST_HOLD (1 << 1)
95#define G2D_BITBLT_HOLD (1 << 0)
96
97/* G2D_BITBLT_START */
98#define G2D_START_CASESEL (1 << 2)
99#define G2D_START_NHOLT (1 << 1)
100#define G2D_START_BITBLT (1 << 0)
101
102/* buffer color format */
103#define G2D_FMT_XRGB8888 0
104#define G2D_FMT_ARGB8888 1
105#define G2D_FMT_RGB565 2
106#define G2D_FMT_XRGB1555 3
107#define G2D_FMT_ARGB1555 4
108#define G2D_FMT_XRGB4444 5
109#define G2D_FMT_ARGB4444 6
110#define G2D_FMT_PACKED_RGB888 7
111#define G2D_FMT_A8 11
112#define G2D_FMT_L8 12
113
114/* buffer valid length */
115#define G2D_LEN_MIN 1
116#define G2D_LEN_MAX 8000
117
118#define G2D_CMDLIST_SIZE (PAGE_SIZE / 4)
119#define G2D_CMDLIST_NUM 64
120#define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
121#define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2)
122
123/* maximum buffer pool size of userptr is 64MB as default */
124#define MAX_POOL (64 * 1024 * 1024)
125
126enum {
127 BUF_TYPE_GEM = 1,
128 BUF_TYPE_USERPTR,
129};
130
131enum g2d_reg_type {
132 REG_TYPE_NONE = -1,
133 REG_TYPE_SRC,
134 REG_TYPE_SRC_PLANE2,
135 REG_TYPE_DST,
136 REG_TYPE_DST_PLANE2,
137 REG_TYPE_PAT,
138 REG_TYPE_MSK,
139 MAX_REG_TYPE_NR
140};
141
142/* cmdlist data structure */
143struct g2d_cmdlist {
144 u32 head;
145 unsigned long data[G2D_CMDLIST_DATA_NUM];
146 u32 last; /* last data offset */
147};
148
149/*
150 * A structure of buffer description
151 *
152 * @format: color format
153 * @stride: buffer stride/pitch in bytes
154 * @left_x: the x coordinates of left top corner
155 * @top_y: the y coordinates of left top corner
156 * @right_x: the x coordinates of right bottom corner
157 * @bottom_y: the y coordinates of right bottom corner
158 *
159 */
160struct g2d_buf_desc {
161 unsigned int format;
162 unsigned int stride;
163 unsigned int left_x;
164 unsigned int top_y;
165 unsigned int right_x;
166 unsigned int bottom_y;
167};
168
169/*
170 * A structure of buffer information
171 *
172 * @map_nr: manages the number of mapped buffers
173 * @reg_types: stores regitster type in the order of requested command
174 * @handles: stores buffer handle in its reg_type position
175 * @types: stores buffer type in its reg_type position
176 * @descs: stores buffer description in its reg_type position
177 *
178 */
179struct g2d_buf_info {
180 unsigned int map_nr;
181 enum g2d_reg_type reg_types[MAX_REG_TYPE_NR];
182 unsigned long handles[MAX_REG_TYPE_NR];
183 unsigned int types[MAX_REG_TYPE_NR];
184 struct g2d_buf_desc descs[MAX_REG_TYPE_NR];
185};
186
187struct drm_exynos_pending_g2d_event {
188 struct drm_pending_event base;
189 struct drm_exynos_g2d_event event;
190};
191
192struct g2d_cmdlist_userptr {
193 struct list_head list;
194 dma_addr_t dma_addr;
195 unsigned long userptr;
196 unsigned long size;
197 struct frame_vector *vec;
198 struct sg_table *sgt;
199 atomic_t refcount;
200 bool in_pool;
201 bool out_of_list;
202};
203struct g2d_cmdlist_node {
204 struct list_head list;
205 struct g2d_cmdlist *cmdlist;
206 dma_addr_t dma_addr;
207 struct g2d_buf_info buf_info;
208
209 struct drm_exynos_pending_g2d_event *event;
210};
211
212struct g2d_runqueue_node {
213 struct list_head list;
214 struct list_head run_cmdlist;
215 struct list_head event_list;
216 struct drm_file *filp;
217 pid_t pid;
218 struct completion complete;
219 int async;
220};
221
222struct g2d_data {
223 struct device *dev;
224 struct clk *gate_clk;
225 void __iomem *regs;
226 int irq;
227 struct workqueue_struct *g2d_workq;
228 struct work_struct runqueue_work;
229 struct exynos_drm_subdrv subdrv;
230 bool suspended;
231
232 /* cmdlist */
233 struct g2d_cmdlist_node *cmdlist_node;
234 struct list_head free_cmdlist;
235 struct mutex cmdlist_mutex;
236 dma_addr_t cmdlist_pool;
237 void *cmdlist_pool_virt;
238 struct dma_attrs cmdlist_dma_attrs;
239
240 /* runqueue*/
241 struct g2d_runqueue_node *runqueue_node;
242 struct list_head runqueue;
243 struct mutex runqueue_mutex;
244 struct kmem_cache *runqueue_slab;
245
246 unsigned long current_pool;
247 unsigned long max_pool;
248};
249
250static int g2d_init_cmdlist(struct g2d_data *g2d)
251{
252 struct device *dev = g2d->dev;
253 struct g2d_cmdlist_node *node = g2d->cmdlist_node;
254 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
255 int nr;
256 int ret;
257 struct g2d_buf_info *buf_info;
258
259 init_dma_attrs(&g2d->cmdlist_dma_attrs);
260 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
261
262 g2d->cmdlist_pool_virt = dma_alloc_attrs(to_dma_dev(subdrv->drm_dev),
263 G2D_CMDLIST_POOL_SIZE,
264 &g2d->cmdlist_pool, GFP_KERNEL,
265 &g2d->cmdlist_dma_attrs);
266 if (!g2d->cmdlist_pool_virt) {
267 dev_err(dev, "failed to allocate dma memory\n");
268 return -ENOMEM;
269 }
270
271 node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL);
272 if (!node) {
273 dev_err(dev, "failed to allocate memory\n");
274 ret = -ENOMEM;
275 goto err;
276 }
277
278 for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) {
279 unsigned int i;
280
281 node[nr].cmdlist =
282 g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;
283 node[nr].dma_addr =
284 g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
285
286 buf_info = &node[nr].buf_info;
287 for (i = 0; i < MAX_REG_TYPE_NR; i++)
288 buf_info->reg_types[i] = REG_TYPE_NONE;
289
290 list_add_tail(&node[nr].list, &g2d->free_cmdlist);
291 }
292
293 return 0;
294
295err:
296 dma_free_attrs(to_dma_dev(subdrv->drm_dev), G2D_CMDLIST_POOL_SIZE,
297 g2d->cmdlist_pool_virt,
298 g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
299 return ret;
300}
301
302static void g2d_fini_cmdlist(struct g2d_data *g2d)
303{
304 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
305
306 kfree(g2d->cmdlist_node);
307
308 if (g2d->cmdlist_pool_virt && g2d->cmdlist_pool) {
309 dma_free_attrs(to_dma_dev(subdrv->drm_dev),
310 G2D_CMDLIST_POOL_SIZE,
311 g2d->cmdlist_pool_virt,
312 g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
313 }
314}
315
316static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d)
317{
318 struct device *dev = g2d->dev;
319 struct g2d_cmdlist_node *node;
320
321 mutex_lock(&g2d->cmdlist_mutex);
322 if (list_empty(&g2d->free_cmdlist)) {
323 dev_err(dev, "there is no free cmdlist\n");
324 mutex_unlock(&g2d->cmdlist_mutex);
325 return NULL;
326 }
327
328 node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node,
329 list);
330 list_del_init(&node->list);
331 mutex_unlock(&g2d->cmdlist_mutex);
332
333 return node;
334}
335
336static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node)
337{
338 mutex_lock(&g2d->cmdlist_mutex);
339 list_move_tail(&node->list, &g2d->free_cmdlist);
340 mutex_unlock(&g2d->cmdlist_mutex);
341}
342
343static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv,
344 struct g2d_cmdlist_node *node)
345{
346 struct g2d_cmdlist_node *lnode;
347
348 if (list_empty(&g2d_priv->inuse_cmdlist))
349 goto add_to_list;
350
351 /* this links to base address of new cmdlist */
352 lnode = list_entry(g2d_priv->inuse_cmdlist.prev,
353 struct g2d_cmdlist_node, list);
354 lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr;
355
356add_to_list:
357 list_add_tail(&node->list, &g2d_priv->inuse_cmdlist);
358
359 if (node->event)
360 list_add_tail(&node->event->base.link, &g2d_priv->event_list);
361}
362
363static void g2d_userptr_put_dma_addr(struct drm_device *drm_dev,
364 unsigned long obj,
365 bool force)
366{
367 struct g2d_cmdlist_userptr *g2d_userptr =
368 (struct g2d_cmdlist_userptr *)obj;
369 struct page **pages;
370
371 if (!obj)
372 return;
373
374 if (force)
375 goto out;
376
377 atomic_dec(&g2d_userptr->refcount);
378
379 if (atomic_read(&g2d_userptr->refcount) > 0)
380 return;
381
382 if (g2d_userptr->in_pool)
383 return;
384
385out:
386 exynos_gem_unmap_sgt_from_dma(drm_dev, g2d_userptr->sgt,
387 DMA_BIDIRECTIONAL);
388
389 pages = frame_vector_pages(g2d_userptr->vec);
390 if (!IS_ERR(pages)) {
391 int i;
392
393 for (i = 0; i < frame_vector_count(g2d_userptr->vec); i++)
394 set_page_dirty_lock(pages[i]);
395 }
396 put_vaddr_frames(g2d_userptr->vec);
397 frame_vector_destroy(g2d_userptr->vec);
398
399 if (!g2d_userptr->out_of_list)
400 list_del_init(&g2d_userptr->list);
401
402 sg_free_table(g2d_userptr->sgt);
403 kfree(g2d_userptr->sgt);
404 kfree(g2d_userptr);
405}
406
407static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev,
408 unsigned long userptr,
409 unsigned long size,
410 struct drm_file *filp,
411 unsigned long *obj)
412{
413 struct drm_exynos_file_private *file_priv = filp->driver_priv;
414 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
415 struct g2d_cmdlist_userptr *g2d_userptr;
416 struct g2d_data *g2d;
417 struct sg_table *sgt;
418 unsigned long start, end;
419 unsigned int npages, offset;
420 int ret;
421
422 if (!size) {
423 DRM_ERROR("invalid userptr size.\n");
424 return ERR_PTR(-EINVAL);
425 }
426
427 g2d = dev_get_drvdata(g2d_priv->dev);
428
429 /* check if userptr already exists in userptr_list. */
430 list_for_each_entry(g2d_userptr, &g2d_priv->userptr_list, list) {
431 if (g2d_userptr->userptr == userptr) {
432 /*
433 * also check size because there could be same address
434 * and different size.
435 */
436 if (g2d_userptr->size == size) {
437 atomic_inc(&g2d_userptr->refcount);
438 *obj = (unsigned long)g2d_userptr;
439
440 return &g2d_userptr->dma_addr;
441 }
442
443 /*
444 * at this moment, maybe g2d dma is accessing this
445 * g2d_userptr memory region so just remove this
446 * g2d_userptr object from userptr_list not to be
447 * referred again and also except it the userptr
448 * pool to be released after the dma access completion.
449 */
450 g2d_userptr->out_of_list = true;
451 g2d_userptr->in_pool = false;
452 list_del_init(&g2d_userptr->list);
453
454 break;
455 }
456 }
457
458 g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL);
459 if (!g2d_userptr)
460 return ERR_PTR(-ENOMEM);
461
462 atomic_set(&g2d_userptr->refcount, 1);
463 g2d_userptr->size = size;
464
465 start = userptr & PAGE_MASK;
466 offset = userptr & ~PAGE_MASK;
467 end = PAGE_ALIGN(userptr + size);
468 npages = (end - start) >> PAGE_SHIFT;
469 g2d_userptr->vec = frame_vector_create(npages);
470 if (!g2d_userptr->vec) {
471 ret = -ENOMEM;
472 goto err_free;
473 }
474
475 ret = get_vaddr_frames(start, npages, true, true, g2d_userptr->vec);
476 if (ret != npages) {
477 DRM_ERROR("failed to get user pages from userptr.\n");
478 if (ret < 0)
479 goto err_destroy_framevec;
480 ret = -EFAULT;
481 goto err_put_framevec;
482 }
483 if (frame_vector_to_pages(g2d_userptr->vec) < 0) {
484 ret = -EFAULT;
485 goto err_put_framevec;
486 }
487
488 sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
489 if (!sgt) {
490 ret = -ENOMEM;
491 goto err_put_framevec;
492 }
493
494 ret = sg_alloc_table_from_pages(sgt,
495 frame_vector_pages(g2d_userptr->vec),
496 npages, offset, size, GFP_KERNEL);
497 if (ret < 0) {
498 DRM_ERROR("failed to get sgt from pages.\n");
499 goto err_free_sgt;
500 }
501
502 g2d_userptr->sgt = sgt;
503
504 ret = exynos_gem_map_sgt_with_dma(drm_dev, g2d_userptr->sgt,
505 DMA_BIDIRECTIONAL);
506 if (ret < 0) {
507 DRM_ERROR("failed to map sgt with dma region.\n");
508 goto err_sg_free_table;
509 }
510
511 g2d_userptr->dma_addr = sgt->sgl[0].dma_address;
512 g2d_userptr->userptr = userptr;
513
514 list_add_tail(&g2d_userptr->list, &g2d_priv->userptr_list);
515
516 if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) {
517 g2d->current_pool += npages << PAGE_SHIFT;
518 g2d_userptr->in_pool = true;
519 }
520
521 *obj = (unsigned long)g2d_userptr;
522
523 return &g2d_userptr->dma_addr;
524
525err_sg_free_table:
526 sg_free_table(sgt);
527
528err_free_sgt:
529 kfree(sgt);
530
531err_put_framevec:
532 put_vaddr_frames(g2d_userptr->vec);
533
534err_destroy_framevec:
535 frame_vector_destroy(g2d_userptr->vec);
536
537err_free:
538 kfree(g2d_userptr);
539
540 return ERR_PTR(ret);
541}
542
543static void g2d_userptr_free_all(struct drm_device *drm_dev,
544 struct g2d_data *g2d,
545 struct drm_file *filp)
546{
547 struct drm_exynos_file_private *file_priv = filp->driver_priv;
548 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
549 struct g2d_cmdlist_userptr *g2d_userptr, *n;
550
551 list_for_each_entry_safe(g2d_userptr, n, &g2d_priv->userptr_list, list)
552 if (g2d_userptr->in_pool)
553 g2d_userptr_put_dma_addr(drm_dev,
554 (unsigned long)g2d_userptr,
555 true);
556
557 g2d->current_pool = 0;
558}
559
560static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
561{
562 enum g2d_reg_type reg_type;
563
564 switch (reg_offset) {
565 case G2D_SRC_BASE_ADDR:
566 case G2D_SRC_STRIDE_REG:
567 case G2D_SRC_COLOR_MODE:
568 case G2D_SRC_LEFT_TOP:
569 case G2D_SRC_RIGHT_BOTTOM:
570 reg_type = REG_TYPE_SRC;
571 break;
572 case G2D_SRC_PLANE2_BASE_ADDR:
573 reg_type = REG_TYPE_SRC_PLANE2;
574 break;
575 case G2D_DST_BASE_ADDR:
576 case G2D_DST_STRIDE_REG:
577 case G2D_DST_COLOR_MODE:
578 case G2D_DST_LEFT_TOP:
579 case G2D_DST_RIGHT_BOTTOM:
580 reg_type = REG_TYPE_DST;
581 break;
582 case G2D_DST_PLANE2_BASE_ADDR:
583 reg_type = REG_TYPE_DST_PLANE2;
584 break;
585 case G2D_PAT_BASE_ADDR:
586 reg_type = REG_TYPE_PAT;
587 break;
588 case G2D_MSK_BASE_ADDR:
589 reg_type = REG_TYPE_MSK;
590 break;
591 default:
592 reg_type = REG_TYPE_NONE;
593 DRM_ERROR("Unknown register offset![%d]\n", reg_offset);
594 break;
595 }
596
597 return reg_type;
598}
599
600static unsigned long g2d_get_buf_bpp(unsigned int format)
601{
602 unsigned long bpp;
603
604 switch (format) {
605 case G2D_FMT_XRGB8888:
606 case G2D_FMT_ARGB8888:
607 bpp = 4;
608 break;
609 case G2D_FMT_RGB565:
610 case G2D_FMT_XRGB1555:
611 case G2D_FMT_ARGB1555:
612 case G2D_FMT_XRGB4444:
613 case G2D_FMT_ARGB4444:
614 bpp = 2;
615 break;
616 case G2D_FMT_PACKED_RGB888:
617 bpp = 3;
618 break;
619 default:
620 bpp = 1;
621 break;
622 }
623
624 return bpp;
625}
626
627static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc,
628 enum g2d_reg_type reg_type,
629 unsigned long size)
630{
631 int width, height;
632 unsigned long bpp, last_pos;
633
634 /*
635 * check source and destination buffers only.
636 * so the others are always valid.
637 */
638 if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST)
639 return true;
640
641 /* This check also makes sure that right_x > left_x. */
642 width = (int)buf_desc->right_x - (int)buf_desc->left_x;
643 if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) {
644 DRM_ERROR("width[%d] is out of range!\n", width);
645 return false;
646 }
647
648 /* This check also makes sure that bottom_y > top_y. */
649 height = (int)buf_desc->bottom_y - (int)buf_desc->top_y;
650 if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) {
651 DRM_ERROR("height[%d] is out of range!\n", height);
652 return false;
653 }
654
655 bpp = g2d_get_buf_bpp(buf_desc->format);
656
657 /* Compute the position of the last byte that the engine accesses. */
658 last_pos = ((unsigned long)buf_desc->bottom_y - 1) *
659 (unsigned long)buf_desc->stride +
660 (unsigned long)buf_desc->right_x * bpp - 1;
661
662 /*
663 * Since right_x > left_x and bottom_y > top_y we already know
664 * that the first_pos < last_pos (first_pos being the position
665 * of the first byte the engine accesses), it just remains to
666 * check if last_pos is smaller then the buffer size.
667 */
668
669 if (last_pos >= size) {
670 DRM_ERROR("last engine access position [%lu] "
671 "is out of range [%lu]!\n", last_pos, size);
672 return false;
673 }
674
675 return true;
676}
677
678static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
679 struct g2d_cmdlist_node *node,
680 struct drm_device *drm_dev,
681 struct drm_file *file)
682{
683 struct g2d_cmdlist *cmdlist = node->cmdlist;
684 struct g2d_buf_info *buf_info = &node->buf_info;
685 int offset;
686 int ret;
687 int i;
688
689 for (i = 0; i < buf_info->map_nr; i++) {
690 struct g2d_buf_desc *buf_desc;
691 enum g2d_reg_type reg_type;
692 int reg_pos;
693 unsigned long handle;
694 dma_addr_t *addr;
695
696 reg_pos = cmdlist->last - 2 * (i + 1);
697
698 offset = cmdlist->data[reg_pos];
699 handle = cmdlist->data[reg_pos + 1];
700
701 reg_type = g2d_get_reg_type(offset);
702 if (reg_type == REG_TYPE_NONE) {
703 ret = -EFAULT;
704 goto err;
705 }
706
707 buf_desc = &buf_info->descs[reg_type];
708
709 if (buf_info->types[reg_type] == BUF_TYPE_GEM) {
710 unsigned long size;
711
712 size = exynos_drm_gem_get_size(drm_dev, handle, file);
713 if (!size) {
714 ret = -EFAULT;
715 goto err;
716 }
717
718 if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
719 size)) {
720 ret = -EFAULT;
721 goto err;
722 }
723
724 addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
725 file);
726 if (IS_ERR(addr)) {
727 ret = -EFAULT;
728 goto err;
729 }
730 } else {
731 struct drm_exynos_g2d_userptr g2d_userptr;
732
733 if (copy_from_user(&g2d_userptr, (void __user *)handle,
734 sizeof(struct drm_exynos_g2d_userptr))) {
735 ret = -EFAULT;
736 goto err;
737 }
738
739 if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
740 g2d_userptr.size)) {
741 ret = -EFAULT;
742 goto err;
743 }
744
745 addr = g2d_userptr_get_dma_addr(drm_dev,
746 g2d_userptr.userptr,
747 g2d_userptr.size,
748 file,
749 &handle);
750 if (IS_ERR(addr)) {
751 ret = -EFAULT;
752 goto err;
753 }
754 }
755
756 cmdlist->data[reg_pos + 1] = *addr;
757 buf_info->reg_types[i] = reg_type;
758 buf_info->handles[reg_type] = handle;
759 }
760
761 return 0;
762
763err:
764 buf_info->map_nr = i;
765 return ret;
766}
767
768static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
769 struct g2d_cmdlist_node *node,
770 struct drm_file *filp)
771{
772 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
773 struct g2d_buf_info *buf_info = &node->buf_info;
774 int i;
775
776 for (i = 0; i < buf_info->map_nr; i++) {
777 struct g2d_buf_desc *buf_desc;
778 enum g2d_reg_type reg_type;
779 unsigned long handle;
780
781 reg_type = buf_info->reg_types[i];
782
783 buf_desc = &buf_info->descs[reg_type];
784 handle = buf_info->handles[reg_type];
785
786 if (buf_info->types[reg_type] == BUF_TYPE_GEM)
787 exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
788 filp);
789 else
790 g2d_userptr_put_dma_addr(subdrv->drm_dev, handle,
791 false);
792
793 buf_info->reg_types[i] = REG_TYPE_NONE;
794 buf_info->handles[reg_type] = 0;
795 buf_info->types[reg_type] = 0;
796 memset(buf_desc, 0x00, sizeof(*buf_desc));
797 }
798
799 buf_info->map_nr = 0;
800}
801
802static void g2d_dma_start(struct g2d_data *g2d,
803 struct g2d_runqueue_node *runqueue_node)
804{
805 struct g2d_cmdlist_node *node =
806 list_first_entry(&runqueue_node->run_cmdlist,
807 struct g2d_cmdlist_node, list);
808 int ret;
809
810 ret = pm_runtime_get_sync(g2d->dev);
811 if (ret < 0)
812 return;
813
814 writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR);
815 writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND);
816}
817
818static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d)
819{
820 struct g2d_runqueue_node *runqueue_node;
821
822 if (list_empty(&g2d->runqueue))
823 return NULL;
824
825 runqueue_node = list_first_entry(&g2d->runqueue,
826 struct g2d_runqueue_node, list);
827 list_del_init(&runqueue_node->list);
828 return runqueue_node;
829}
830
831static void g2d_free_runqueue_node(struct g2d_data *g2d,
832 struct g2d_runqueue_node *runqueue_node)
833{
834 struct g2d_cmdlist_node *node;
835
836 if (!runqueue_node)
837 return;
838
839 mutex_lock(&g2d->cmdlist_mutex);
840 /*
841 * commands in run_cmdlist have been completed so unmap all gem
842 * objects in each command node so that they are unreferenced.
843 */
844 list_for_each_entry(node, &runqueue_node->run_cmdlist, list)
845 g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp);
846 list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist);
847 mutex_unlock(&g2d->cmdlist_mutex);
848
849 kmem_cache_free(g2d->runqueue_slab, runqueue_node);
850}
851
852static void g2d_exec_runqueue(struct g2d_data *g2d)
853{
854 g2d->runqueue_node = g2d_get_runqueue_node(g2d);
855 if (g2d->runqueue_node)
856 g2d_dma_start(g2d, g2d->runqueue_node);
857}
858
859static void g2d_runqueue_worker(struct work_struct *work)
860{
861 struct g2d_data *g2d = container_of(work, struct g2d_data,
862 runqueue_work);
863
864 mutex_lock(&g2d->runqueue_mutex);
865 pm_runtime_put_sync(g2d->dev);
866
867 complete(&g2d->runqueue_node->complete);
868 if (g2d->runqueue_node->async)
869 g2d_free_runqueue_node(g2d, g2d->runqueue_node);
870
871 if (g2d->suspended)
872 g2d->runqueue_node = NULL;
873 else
874 g2d_exec_runqueue(g2d);
875 mutex_unlock(&g2d->runqueue_mutex);
876}
877
878static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no)
879{
880 struct drm_device *drm_dev = g2d->subdrv.drm_dev;
881 struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node;
882 struct drm_exynos_pending_g2d_event *e;
883 struct timeval now;
884
885 if (list_empty(&runqueue_node->event_list))
886 return;
887
888 e = list_first_entry(&runqueue_node->event_list,
889 struct drm_exynos_pending_g2d_event, base.link);
890
891 do_gettimeofday(&now);
892 e->event.tv_sec = now.tv_sec;
893 e->event.tv_usec = now.tv_usec;
894 e->event.cmdlist_no = cmdlist_no;
895
896 drm_send_event(drm_dev, &e->base);
897}
898
899static irqreturn_t g2d_irq_handler(int irq, void *dev_id)
900{
901 struct g2d_data *g2d = dev_id;
902 u32 pending;
903
904 pending = readl_relaxed(g2d->regs + G2D_INTC_PEND);
905 if (pending)
906 writel_relaxed(pending, g2d->regs + G2D_INTC_PEND);
907
908 if (pending & G2D_INTP_GCMD_FIN) {
909 u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS);
910
911 cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >>
912 G2D_DMA_LIST_DONE_COUNT_OFFSET;
913
914 g2d_finish_event(g2d, cmdlist_no);
915
916 writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD);
917 if (!(pending & G2D_INTP_ACMD_FIN)) {
918 writel_relaxed(G2D_DMA_CONTINUE,
919 g2d->regs + G2D_DMA_COMMAND);
920 }
921 }
922
923 if (pending & G2D_INTP_ACMD_FIN)
924 queue_work(g2d->g2d_workq, &g2d->runqueue_work);
925
926 return IRQ_HANDLED;
927}
928
929static int g2d_check_reg_offset(struct device *dev,
930 struct g2d_cmdlist_node *node,
931 int nr, bool for_addr)
932{
933 struct g2d_cmdlist *cmdlist = node->cmdlist;
934 int reg_offset;
935 int index;
936 int i;
937
938 for (i = 0; i < nr; i++) {
939 struct g2d_buf_info *buf_info = &node->buf_info;
940 struct g2d_buf_desc *buf_desc;
941 enum g2d_reg_type reg_type;
942 unsigned long value;
943
944 index = cmdlist->last - 2 * (i + 1);
945
946 reg_offset = cmdlist->data[index] & ~0xfffff000;
947 if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END)
948 goto err;
949 if (reg_offset % 4)
950 goto err;
951
952 switch (reg_offset) {
953 case G2D_SRC_BASE_ADDR:
954 case G2D_SRC_PLANE2_BASE_ADDR:
955 case G2D_DST_BASE_ADDR:
956 case G2D_DST_PLANE2_BASE_ADDR:
957 case G2D_PAT_BASE_ADDR:
958 case G2D_MSK_BASE_ADDR:
959 if (!for_addr)
960 goto err;
961
962 reg_type = g2d_get_reg_type(reg_offset);
963
964 /* check userptr buffer type. */
965 if ((cmdlist->data[index] & ~0x7fffffff) >> 31) {
966 buf_info->types[reg_type] = BUF_TYPE_USERPTR;
967 cmdlist->data[index] &= ~G2D_BUF_USERPTR;
968 } else
969 buf_info->types[reg_type] = BUF_TYPE_GEM;
970 break;
971 case G2D_SRC_STRIDE_REG:
972 case G2D_DST_STRIDE_REG:
973 if (for_addr)
974 goto err;
975
976 reg_type = g2d_get_reg_type(reg_offset);
977
978 buf_desc = &buf_info->descs[reg_type];
979 buf_desc->stride = cmdlist->data[index + 1];
980 break;
981 case G2D_SRC_COLOR_MODE:
982 case G2D_DST_COLOR_MODE:
983 if (for_addr)
984 goto err;
985
986 reg_type = g2d_get_reg_type(reg_offset);
987
988 buf_desc = &buf_info->descs[reg_type];
989 value = cmdlist->data[index + 1];
990
991 buf_desc->format = value & 0xf;
992 break;
993 case G2D_SRC_LEFT_TOP:
994 case G2D_DST_LEFT_TOP:
995 if (for_addr)
996 goto err;
997
998 reg_type = g2d_get_reg_type(reg_offset);
999
1000 buf_desc = &buf_info->descs[reg_type];
1001 value = cmdlist->data[index + 1];
1002
1003 buf_desc->left_x = value & 0x1fff;
1004 buf_desc->top_y = (value & 0x1fff0000) >> 16;
1005 break;
1006 case G2D_SRC_RIGHT_BOTTOM:
1007 case G2D_DST_RIGHT_BOTTOM:
1008 if (for_addr)
1009 goto err;
1010
1011 reg_type = g2d_get_reg_type(reg_offset);
1012
1013 buf_desc = &buf_info->descs[reg_type];
1014 value = cmdlist->data[index + 1];
1015
1016 buf_desc->right_x = value & 0x1fff;
1017 buf_desc->bottom_y = (value & 0x1fff0000) >> 16;
1018 break;
1019 default:
1020 if (for_addr)
1021 goto err;
1022 break;
1023 }
1024 }
1025
1026 return 0;
1027
1028err:
1029 dev_err(dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]);
1030 return -EINVAL;
1031}
1032
1033/* ioctl functions */
1034int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data,
1035 struct drm_file *file)
1036{
1037 struct drm_exynos_file_private *file_priv = file->driver_priv;
1038 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1039 struct device *dev;
1040 struct g2d_data *g2d;
1041 struct drm_exynos_g2d_get_ver *ver = data;
1042
1043 if (!g2d_priv)
1044 return -ENODEV;
1045
1046 dev = g2d_priv->dev;
1047 if (!dev)
1048 return -ENODEV;
1049
1050 g2d = dev_get_drvdata(dev);
1051 if (!g2d)
1052 return -EFAULT;
1053
1054 ver->major = G2D_HW_MAJOR_VER;
1055 ver->minor = G2D_HW_MINOR_VER;
1056
1057 return 0;
1058}
1059
1060int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
1061 struct drm_file *file)
1062{
1063 struct drm_exynos_file_private *file_priv = file->driver_priv;
1064 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1065 struct device *dev;
1066 struct g2d_data *g2d;
1067 struct drm_exynos_g2d_set_cmdlist *req = data;
1068 struct drm_exynos_g2d_cmd *cmd;
1069 struct drm_exynos_pending_g2d_event *e;
1070 struct g2d_cmdlist_node *node;
1071 struct g2d_cmdlist *cmdlist;
1072 int size;
1073 int ret;
1074
1075 if (!g2d_priv)
1076 return -ENODEV;
1077
1078 dev = g2d_priv->dev;
1079 if (!dev)
1080 return -ENODEV;
1081
1082 g2d = dev_get_drvdata(dev);
1083 if (!g2d)
1084 return -EFAULT;
1085
1086 node = g2d_get_cmdlist(g2d);
1087 if (!node)
1088 return -ENOMEM;
1089
1090 node->event = NULL;
1091
1092 if (req->event_type != G2D_EVENT_NOT) {
1093 e = kzalloc(sizeof(*node->event), GFP_KERNEL);
1094 if (!e) {
1095 ret = -ENOMEM;
1096 goto err;
1097 }
1098
1099 e->event.base.type = DRM_EXYNOS_G2D_EVENT;
1100 e->event.base.length = sizeof(e->event);
1101 e->event.user_data = req->user_data;
1102
1103 ret = drm_event_reserve_init(drm_dev, file, &e->base, &e->event.base);
1104 if (ret) {
1105 kfree(e);
1106 goto err;
1107 }
1108
1109 node->event = e;
1110 }
1111
1112 cmdlist = node->cmdlist;
1113
1114 cmdlist->last = 0;
1115
1116 /*
1117 * If don't clear SFR registers, the cmdlist is affected by register
1118 * values of previous cmdlist. G2D hw executes SFR clear command and
1119 * a next command at the same time then the next command is ignored and
1120 * is executed rightly from next next command, so needs a dummy command
1121 * to next command of SFR clear command.
1122 */
1123 cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET;
1124 cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR;
1125 cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
1126 cmdlist->data[cmdlist->last++] = 0;
1127
1128 /*
1129 * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
1130 * and GCF bit should be set to INTEN register if user wants
1131 * G2D interrupt event once current command list execution is
1132 * finished.
1133 * Otherwise only ACF bit should be set to INTEN register so
1134 * that one interrupt is occurred after all command lists
1135 * have been completed.
1136 */
1137 if (node->event) {
1138 cmdlist->data[cmdlist->last++] = G2D_INTEN;
1139 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF;
1140 cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
1141 cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
1142 } else {
1143 cmdlist->data[cmdlist->last++] = G2D_INTEN;
1144 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF;
1145 }
1146
1147 /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
1148 size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
1149 if (size > G2D_CMDLIST_DATA_NUM) {
1150 dev_err(dev, "cmdlist size is too big\n");
1151 ret = -EINVAL;
1152 goto err_free_event;
1153 }
1154
1155 cmd = (struct drm_exynos_g2d_cmd *)(unsigned long)req->cmd;
1156
1157 if (copy_from_user(cmdlist->data + cmdlist->last,
1158 (void __user *)cmd,
1159 sizeof(*cmd) * req->cmd_nr)) {
1160 ret = -EFAULT;
1161 goto err_free_event;
1162 }
1163 cmdlist->last += req->cmd_nr * 2;
1164
1165 ret = g2d_check_reg_offset(dev, node, req->cmd_nr, false);
1166 if (ret < 0)
1167 goto err_free_event;
1168
1169 node->buf_info.map_nr = req->cmd_buf_nr;
1170 if (req->cmd_buf_nr) {
1171 struct drm_exynos_g2d_cmd *cmd_buf;
1172
1173 cmd_buf = (struct drm_exynos_g2d_cmd *)
1174 (unsigned long)req->cmd_buf;
1175
1176 if (copy_from_user(cmdlist->data + cmdlist->last,
1177 (void __user *)cmd_buf,
1178 sizeof(*cmd_buf) * req->cmd_buf_nr)) {
1179 ret = -EFAULT;
1180 goto err_free_event;
1181 }
1182 cmdlist->last += req->cmd_buf_nr * 2;
1183
1184 ret = g2d_check_reg_offset(dev, node, req->cmd_buf_nr, true);
1185 if (ret < 0)
1186 goto err_free_event;
1187
1188 ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file);
1189 if (ret < 0)
1190 goto err_unmap;
1191 }
1192
1193 cmdlist->data[cmdlist->last++] = G2D_BITBLT_START;
1194 cmdlist->data[cmdlist->last++] = G2D_START_BITBLT;
1195
1196 /* head */
1197 cmdlist->head = cmdlist->last / 2;
1198
1199 /* tail */
1200 cmdlist->data[cmdlist->last] = 0;
1201
1202 g2d_add_cmdlist_to_inuse(g2d_priv, node);
1203
1204 return 0;
1205
1206err_unmap:
1207 g2d_unmap_cmdlist_gem(g2d, node, file);
1208err_free_event:
1209 if (node->event)
1210 drm_event_cancel_free(drm_dev, &node->event->base);
1211err:
1212 g2d_put_cmdlist(g2d, node);
1213 return ret;
1214}
1215
1216int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,
1217 struct drm_file *file)
1218{
1219 struct drm_exynos_file_private *file_priv = file->driver_priv;
1220 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1221 struct device *dev;
1222 struct g2d_data *g2d;
1223 struct drm_exynos_g2d_exec *req = data;
1224 struct g2d_runqueue_node *runqueue_node;
1225 struct list_head *run_cmdlist;
1226 struct list_head *event_list;
1227
1228 if (!g2d_priv)
1229 return -ENODEV;
1230
1231 dev = g2d_priv->dev;
1232 if (!dev)
1233 return -ENODEV;
1234
1235 g2d = dev_get_drvdata(dev);
1236 if (!g2d)
1237 return -EFAULT;
1238
1239 runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL);
1240 if (!runqueue_node) {
1241 dev_err(dev, "failed to allocate memory\n");
1242 return -ENOMEM;
1243 }
1244 run_cmdlist = &runqueue_node->run_cmdlist;
1245 event_list = &runqueue_node->event_list;
1246 INIT_LIST_HEAD(run_cmdlist);
1247 INIT_LIST_HEAD(event_list);
1248 init_completion(&runqueue_node->complete);
1249 runqueue_node->async = req->async;
1250
1251 list_splice_init(&g2d_priv->inuse_cmdlist, run_cmdlist);
1252 list_splice_init(&g2d_priv->event_list, event_list);
1253
1254 if (list_empty(run_cmdlist)) {
1255 dev_err(dev, "there is no inuse cmdlist\n");
1256 kmem_cache_free(g2d->runqueue_slab, runqueue_node);
1257 return -EPERM;
1258 }
1259
1260 mutex_lock(&g2d->runqueue_mutex);
1261 runqueue_node->pid = current->pid;
1262 runqueue_node->filp = file;
1263 list_add_tail(&runqueue_node->list, &g2d->runqueue);
1264 if (!g2d->runqueue_node)
1265 g2d_exec_runqueue(g2d);
1266 mutex_unlock(&g2d->runqueue_mutex);
1267
1268 if (runqueue_node->async)
1269 goto out;
1270
1271 wait_for_completion(&runqueue_node->complete);
1272 g2d_free_runqueue_node(g2d, runqueue_node);
1273
1274out:
1275 return 0;
1276}
1277
1278static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
1279{
1280 struct g2d_data *g2d;
1281 int ret;
1282
1283 g2d = dev_get_drvdata(dev);
1284 if (!g2d)
1285 return -EFAULT;
1286
1287 /* allocate dma-aware cmdlist buffer. */
1288 ret = g2d_init_cmdlist(g2d);
1289 if (ret < 0) {
1290 dev_err(dev, "cmdlist init failed\n");
1291 return ret;
1292 }
1293
1294 ret = drm_iommu_attach_device(drm_dev, dev);
1295 if (ret < 0) {
1296 dev_err(dev, "failed to enable iommu.\n");
1297 g2d_fini_cmdlist(g2d);
1298 }
1299
1300 return ret;
1301
1302}
1303
1304static void g2d_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
1305{
1306 drm_iommu_detach_device(drm_dev, dev);
1307}
1308
1309static int g2d_open(struct drm_device *drm_dev, struct device *dev,
1310 struct drm_file *file)
1311{
1312 struct drm_exynos_file_private *file_priv = file->driver_priv;
1313 struct exynos_drm_g2d_private *g2d_priv;
1314
1315 g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL);
1316 if (!g2d_priv)
1317 return -ENOMEM;
1318
1319 g2d_priv->dev = dev;
1320 file_priv->g2d_priv = g2d_priv;
1321
1322 INIT_LIST_HEAD(&g2d_priv->inuse_cmdlist);
1323 INIT_LIST_HEAD(&g2d_priv->event_list);
1324 INIT_LIST_HEAD(&g2d_priv->userptr_list);
1325
1326 return 0;
1327}
1328
1329static void g2d_close(struct drm_device *drm_dev, struct device *dev,
1330 struct drm_file *file)
1331{
1332 struct drm_exynos_file_private *file_priv = file->driver_priv;
1333 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1334 struct g2d_data *g2d;
1335 struct g2d_cmdlist_node *node, *n;
1336
1337 if (!dev)
1338 return;
1339
1340 g2d = dev_get_drvdata(dev);
1341 if (!g2d)
1342 return;
1343
1344 mutex_lock(&g2d->cmdlist_mutex);
1345 list_for_each_entry_safe(node, n, &g2d_priv->inuse_cmdlist, list) {
1346 /*
1347 * unmap all gem objects not completed.
1348 *
1349 * P.S. if current process was terminated forcely then
1350 * there may be some commands in inuse_cmdlist so unmap
1351 * them.
1352 */
1353 g2d_unmap_cmdlist_gem(g2d, node, file);
1354 list_move_tail(&node->list, &g2d->free_cmdlist);
1355 }
1356 mutex_unlock(&g2d->cmdlist_mutex);
1357
1358 /* release all g2d_userptr in pool. */
1359 g2d_userptr_free_all(drm_dev, g2d, file);
1360
1361 kfree(file_priv->g2d_priv);
1362}
1363
1364static int g2d_probe(struct platform_device *pdev)
1365{
1366 struct device *dev = &pdev->dev;
1367 struct resource *res;
1368 struct g2d_data *g2d;
1369 struct exynos_drm_subdrv *subdrv;
1370 int ret;
1371
1372 g2d = devm_kzalloc(dev, sizeof(*g2d), GFP_KERNEL);
1373 if (!g2d)
1374 return -ENOMEM;
1375
1376 g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab",
1377 sizeof(struct g2d_runqueue_node), 0, 0, NULL);
1378 if (!g2d->runqueue_slab)
1379 return -ENOMEM;
1380
1381 g2d->dev = dev;
1382
1383 g2d->g2d_workq = create_singlethread_workqueue("g2d");
1384 if (!g2d->g2d_workq) {
1385 dev_err(dev, "failed to create workqueue\n");
1386 ret = -EINVAL;
1387 goto err_destroy_slab;
1388 }
1389
1390 INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker);
1391 INIT_LIST_HEAD(&g2d->free_cmdlist);
1392 INIT_LIST_HEAD(&g2d->runqueue);
1393
1394 mutex_init(&g2d->cmdlist_mutex);
1395 mutex_init(&g2d->runqueue_mutex);
1396
1397 g2d->gate_clk = devm_clk_get(dev, "fimg2d");
1398 if (IS_ERR(g2d->gate_clk)) {
1399 dev_err(dev, "failed to get gate clock\n");
1400 ret = PTR_ERR(g2d->gate_clk);
1401 goto err_destroy_workqueue;
1402 }
1403
1404 pm_runtime_enable(dev);
1405
1406 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1407
1408 g2d->regs = devm_ioremap_resource(dev, res);
1409 if (IS_ERR(g2d->regs)) {
1410 ret = PTR_ERR(g2d->regs);
1411 goto err_put_clk;
1412 }
1413
1414 g2d->irq = platform_get_irq(pdev, 0);
1415 if (g2d->irq < 0) {
1416 dev_err(dev, "failed to get irq\n");
1417 ret = g2d->irq;
1418 goto err_put_clk;
1419 }
1420
1421 ret = devm_request_irq(dev, g2d->irq, g2d_irq_handler, 0,
1422 "drm_g2d", g2d);
1423 if (ret < 0) {
1424 dev_err(dev, "irq request failed\n");
1425 goto err_put_clk;
1426 }
1427
1428 g2d->max_pool = MAX_POOL;
1429
1430 platform_set_drvdata(pdev, g2d);
1431
1432 subdrv = &g2d->subdrv;
1433 subdrv->dev = dev;
1434 subdrv->probe = g2d_subdrv_probe;
1435 subdrv->remove = g2d_subdrv_remove;
1436 subdrv->open = g2d_open;
1437 subdrv->close = g2d_close;
1438
1439 ret = exynos_drm_subdrv_register(subdrv);
1440 if (ret < 0) {
1441 dev_err(dev, "failed to register drm g2d device\n");
1442 goto err_put_clk;
1443 }
1444
1445 dev_info(dev, "The exynos g2d(ver %d.%d) successfully probed\n",
1446 G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER);
1447
1448 return 0;
1449
1450err_put_clk:
1451 pm_runtime_disable(dev);
1452err_destroy_workqueue:
1453 destroy_workqueue(g2d->g2d_workq);
1454err_destroy_slab:
1455 kmem_cache_destroy(g2d->runqueue_slab);
1456 return ret;
1457}
1458
1459static int g2d_remove(struct platform_device *pdev)
1460{
1461 struct g2d_data *g2d = platform_get_drvdata(pdev);
1462
1463 cancel_work_sync(&g2d->runqueue_work);
1464 exynos_drm_subdrv_unregister(&g2d->subdrv);
1465
1466 while (g2d->runqueue_node) {
1467 g2d_free_runqueue_node(g2d, g2d->runqueue_node);
1468 g2d->runqueue_node = g2d_get_runqueue_node(g2d);
1469 }
1470
1471 pm_runtime_disable(&pdev->dev);
1472
1473 g2d_fini_cmdlist(g2d);
1474 destroy_workqueue(g2d->g2d_workq);
1475 kmem_cache_destroy(g2d->runqueue_slab);
1476
1477 return 0;
1478}
1479
1480#ifdef CONFIG_PM_SLEEP
1481static int g2d_suspend(struct device *dev)
1482{
1483 struct g2d_data *g2d = dev_get_drvdata(dev);
1484
1485 mutex_lock(&g2d->runqueue_mutex);
1486 g2d->suspended = true;
1487 mutex_unlock(&g2d->runqueue_mutex);
1488
1489 while (g2d->runqueue_node)
1490 /* FIXME: good range? */
1491 usleep_range(500, 1000);
1492
1493 flush_work(&g2d->runqueue_work);
1494
1495 return 0;
1496}
1497
1498static int g2d_resume(struct device *dev)
1499{
1500 struct g2d_data *g2d = dev_get_drvdata(dev);
1501
1502 g2d->suspended = false;
1503 g2d_exec_runqueue(g2d);
1504
1505 return 0;
1506}
1507#endif
1508
1509#ifdef CONFIG_PM
1510static int g2d_runtime_suspend(struct device *dev)
1511{
1512 struct g2d_data *g2d = dev_get_drvdata(dev);
1513
1514 clk_disable_unprepare(g2d->gate_clk);
1515
1516 return 0;
1517}
1518
1519static int g2d_runtime_resume(struct device *dev)
1520{
1521 struct g2d_data *g2d = dev_get_drvdata(dev);
1522 int ret;
1523
1524 ret = clk_prepare_enable(g2d->gate_clk);
1525 if (ret < 0)
1526 dev_warn(dev, "failed to enable clock.\n");
1527
1528 return ret;
1529}
1530#endif
1531
1532static const struct dev_pm_ops g2d_pm_ops = {
1533 SET_SYSTEM_SLEEP_PM_OPS(g2d_suspend, g2d_resume)
1534 SET_RUNTIME_PM_OPS(g2d_runtime_suspend, g2d_runtime_resume, NULL)
1535};
1536
1537static const struct of_device_id exynos_g2d_match[] = {
1538 { .compatible = "samsung,exynos5250-g2d" },
1539 { .compatible = "samsung,exynos4212-g2d" },
1540 {},
1541};
1542MODULE_DEVICE_TABLE(of, exynos_g2d_match);
1543
1544struct platform_driver g2d_driver = {
1545 .probe = g2d_probe,
1546 .remove = g2d_remove,
1547 .driver = {
1548 .name = "s5p-g2d",
1549 .owner = THIS_MODULE,
1550 .pm = &g2d_pm_ops,
1551 .of_match_table = exynos_g2d_match,
1552 },
1553};
1/*
2 * Copyright (C) 2012 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundationr
8 */
9
10#include <linux/kernel.h>
11#include <linux/clk.h>
12#include <linux/err.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
15#include <linux/platform_device.h>
16#include <linux/pm_runtime.h>
17#include <linux/slab.h>
18#include <linux/workqueue.h>
19#include <linux/dma-mapping.h>
20#include <linux/of.h>
21
22#include <drm/drmP.h>
23#include <drm/exynos_drm.h>
24#include "exynos_drm_drv.h"
25#include "exynos_drm_g2d.h"
26#include "exynos_drm_gem.h"
27#include "exynos_drm_iommu.h"
28
29#define G2D_HW_MAJOR_VER 4
30#define G2D_HW_MINOR_VER 1
31
32/* vaild register range set from user: 0x0104 ~ 0x0880 */
33#define G2D_VALID_START 0x0104
34#define G2D_VALID_END 0x0880
35
36/* general registers */
37#define G2D_SOFT_RESET 0x0000
38#define G2D_INTEN 0x0004
39#define G2D_INTC_PEND 0x000C
40#define G2D_DMA_SFR_BASE_ADDR 0x0080
41#define G2D_DMA_COMMAND 0x0084
42#define G2D_DMA_STATUS 0x008C
43#define G2D_DMA_HOLD_CMD 0x0090
44
45/* command registers */
46#define G2D_BITBLT_START 0x0100
47
48/* registers for base address */
49#define G2D_SRC_BASE_ADDR 0x0304
50#define G2D_SRC_STRIDE 0x0308
51#define G2D_SRC_COLOR_MODE 0x030C
52#define G2D_SRC_LEFT_TOP 0x0310
53#define G2D_SRC_RIGHT_BOTTOM 0x0314
54#define G2D_SRC_PLANE2_BASE_ADDR 0x0318
55#define G2D_DST_BASE_ADDR 0x0404
56#define G2D_DST_STRIDE 0x0408
57#define G2D_DST_COLOR_MODE 0x040C
58#define G2D_DST_LEFT_TOP 0x0410
59#define G2D_DST_RIGHT_BOTTOM 0x0414
60#define G2D_DST_PLANE2_BASE_ADDR 0x0418
61#define G2D_PAT_BASE_ADDR 0x0500
62#define G2D_MSK_BASE_ADDR 0x0520
63
64/* G2D_SOFT_RESET */
65#define G2D_SFRCLEAR (1 << 1)
66#define G2D_R (1 << 0)
67
68/* G2D_INTEN */
69#define G2D_INTEN_ACF (1 << 3)
70#define G2D_INTEN_UCF (1 << 2)
71#define G2D_INTEN_GCF (1 << 1)
72#define G2D_INTEN_SCF (1 << 0)
73
74/* G2D_INTC_PEND */
75#define G2D_INTP_ACMD_FIN (1 << 3)
76#define G2D_INTP_UCMD_FIN (1 << 2)
77#define G2D_INTP_GCMD_FIN (1 << 1)
78#define G2D_INTP_SCMD_FIN (1 << 0)
79
80/* G2D_DMA_COMMAND */
81#define G2D_DMA_HALT (1 << 2)
82#define G2D_DMA_CONTINUE (1 << 1)
83#define G2D_DMA_START (1 << 0)
84
85/* G2D_DMA_STATUS */
86#define G2D_DMA_LIST_DONE_COUNT (0xFF << 17)
87#define G2D_DMA_BITBLT_DONE_COUNT (0xFFFF << 1)
88#define G2D_DMA_DONE (1 << 0)
89#define G2D_DMA_LIST_DONE_COUNT_OFFSET 17
90
91/* G2D_DMA_HOLD_CMD */
92#define G2D_USER_HOLD (1 << 2)
93#define G2D_LIST_HOLD (1 << 1)
94#define G2D_BITBLT_HOLD (1 << 0)
95
96/* G2D_BITBLT_START */
97#define G2D_START_CASESEL (1 << 2)
98#define G2D_START_NHOLT (1 << 1)
99#define G2D_START_BITBLT (1 << 0)
100
101/* buffer color format */
102#define G2D_FMT_XRGB8888 0
103#define G2D_FMT_ARGB8888 1
104#define G2D_FMT_RGB565 2
105#define G2D_FMT_XRGB1555 3
106#define G2D_FMT_ARGB1555 4
107#define G2D_FMT_XRGB4444 5
108#define G2D_FMT_ARGB4444 6
109#define G2D_FMT_PACKED_RGB888 7
110#define G2D_FMT_A8 11
111#define G2D_FMT_L8 12
112
113/* buffer valid length */
114#define G2D_LEN_MIN 1
115#define G2D_LEN_MAX 8000
116
117#define G2D_CMDLIST_SIZE (PAGE_SIZE / 4)
118#define G2D_CMDLIST_NUM 64
119#define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
120#define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2)
121
122/* maximum buffer pool size of userptr is 64MB as default */
123#define MAX_POOL (64 * 1024 * 1024)
124
125enum {
126 BUF_TYPE_GEM = 1,
127 BUF_TYPE_USERPTR,
128};
129
130enum g2d_reg_type {
131 REG_TYPE_NONE = -1,
132 REG_TYPE_SRC,
133 REG_TYPE_SRC_PLANE2,
134 REG_TYPE_DST,
135 REG_TYPE_DST_PLANE2,
136 REG_TYPE_PAT,
137 REG_TYPE_MSK,
138 MAX_REG_TYPE_NR
139};
140
141enum g2d_flag_bits {
142 /*
143 * If set, suspends the runqueue worker after the currently
144 * processed node is finished.
145 */
146 G2D_BIT_SUSPEND_RUNQUEUE,
147 /*
148 * If set, indicates that the engine is currently busy.
149 */
150 G2D_BIT_ENGINE_BUSY,
151};
152
153/* cmdlist data structure */
154struct g2d_cmdlist {
155 u32 head;
156 unsigned long data[G2D_CMDLIST_DATA_NUM];
157 u32 last; /* last data offset */
158};
159
160/*
161 * A structure of buffer description
162 *
163 * @format: color format
164 * @stride: buffer stride/pitch in bytes
165 * @left_x: the x coordinates of left top corner
166 * @top_y: the y coordinates of left top corner
167 * @right_x: the x coordinates of right bottom corner
168 * @bottom_y: the y coordinates of right bottom corner
169 *
170 */
171struct g2d_buf_desc {
172 unsigned int format;
173 unsigned int stride;
174 unsigned int left_x;
175 unsigned int top_y;
176 unsigned int right_x;
177 unsigned int bottom_y;
178};
179
180/*
181 * A structure of buffer information
182 *
183 * @map_nr: manages the number of mapped buffers
184 * @reg_types: stores regitster type in the order of requested command
185 * @handles: stores buffer handle in its reg_type position
186 * @types: stores buffer type in its reg_type position
187 * @descs: stores buffer description in its reg_type position
188 *
189 */
190struct g2d_buf_info {
191 unsigned int map_nr;
192 enum g2d_reg_type reg_types[MAX_REG_TYPE_NR];
193 unsigned long handles[MAX_REG_TYPE_NR];
194 unsigned int types[MAX_REG_TYPE_NR];
195 struct g2d_buf_desc descs[MAX_REG_TYPE_NR];
196};
197
198struct drm_exynos_pending_g2d_event {
199 struct drm_pending_event base;
200 struct drm_exynos_g2d_event event;
201};
202
203struct g2d_cmdlist_userptr {
204 struct list_head list;
205 dma_addr_t dma_addr;
206 unsigned long userptr;
207 unsigned long size;
208 struct frame_vector *vec;
209 struct sg_table *sgt;
210 atomic_t refcount;
211 bool in_pool;
212 bool out_of_list;
213};
214struct g2d_cmdlist_node {
215 struct list_head list;
216 struct g2d_cmdlist *cmdlist;
217 dma_addr_t dma_addr;
218 struct g2d_buf_info buf_info;
219
220 struct drm_exynos_pending_g2d_event *event;
221};
222
223struct g2d_runqueue_node {
224 struct list_head list;
225 struct list_head run_cmdlist;
226 struct list_head event_list;
227 struct drm_file *filp;
228 pid_t pid;
229 struct completion complete;
230 int async;
231};
232
233struct g2d_data {
234 struct device *dev;
235 struct clk *gate_clk;
236 void __iomem *regs;
237 int irq;
238 struct workqueue_struct *g2d_workq;
239 struct work_struct runqueue_work;
240 struct exynos_drm_subdrv subdrv;
241 unsigned long flags;
242
243 /* cmdlist */
244 struct g2d_cmdlist_node *cmdlist_node;
245 struct list_head free_cmdlist;
246 struct mutex cmdlist_mutex;
247 dma_addr_t cmdlist_pool;
248 void *cmdlist_pool_virt;
249 unsigned long cmdlist_dma_attrs;
250
251 /* runqueue*/
252 struct g2d_runqueue_node *runqueue_node;
253 struct list_head runqueue;
254 struct mutex runqueue_mutex;
255 struct kmem_cache *runqueue_slab;
256
257 unsigned long current_pool;
258 unsigned long max_pool;
259};
260
261static inline void g2d_hw_reset(struct g2d_data *g2d)
262{
263 writel(G2D_R | G2D_SFRCLEAR, g2d->regs + G2D_SOFT_RESET);
264 clear_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags);
265}
266
267static int g2d_init_cmdlist(struct g2d_data *g2d)
268{
269 struct device *dev = g2d->dev;
270 struct g2d_cmdlist_node *node = g2d->cmdlist_node;
271 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
272 int nr;
273 int ret;
274 struct g2d_buf_info *buf_info;
275
276 g2d->cmdlist_dma_attrs = DMA_ATTR_WRITE_COMBINE;
277
278 g2d->cmdlist_pool_virt = dma_alloc_attrs(to_dma_dev(subdrv->drm_dev),
279 G2D_CMDLIST_POOL_SIZE,
280 &g2d->cmdlist_pool, GFP_KERNEL,
281 g2d->cmdlist_dma_attrs);
282 if (!g2d->cmdlist_pool_virt) {
283 dev_err(dev, "failed to allocate dma memory\n");
284 return -ENOMEM;
285 }
286
287 node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL);
288 if (!node) {
289 ret = -ENOMEM;
290 goto err;
291 }
292
293 for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) {
294 unsigned int i;
295
296 node[nr].cmdlist =
297 g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;
298 node[nr].dma_addr =
299 g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
300
301 buf_info = &node[nr].buf_info;
302 for (i = 0; i < MAX_REG_TYPE_NR; i++)
303 buf_info->reg_types[i] = REG_TYPE_NONE;
304
305 list_add_tail(&node[nr].list, &g2d->free_cmdlist);
306 }
307
308 return 0;
309
310err:
311 dma_free_attrs(to_dma_dev(subdrv->drm_dev), G2D_CMDLIST_POOL_SIZE,
312 g2d->cmdlist_pool_virt,
313 g2d->cmdlist_pool, g2d->cmdlist_dma_attrs);
314 return ret;
315}
316
317static void g2d_fini_cmdlist(struct g2d_data *g2d)
318{
319 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
320
321 kfree(g2d->cmdlist_node);
322
323 if (g2d->cmdlist_pool_virt && g2d->cmdlist_pool) {
324 dma_free_attrs(to_dma_dev(subdrv->drm_dev),
325 G2D_CMDLIST_POOL_SIZE,
326 g2d->cmdlist_pool_virt,
327 g2d->cmdlist_pool, g2d->cmdlist_dma_attrs);
328 }
329}
330
331static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d)
332{
333 struct device *dev = g2d->dev;
334 struct g2d_cmdlist_node *node;
335
336 mutex_lock(&g2d->cmdlist_mutex);
337 if (list_empty(&g2d->free_cmdlist)) {
338 dev_err(dev, "there is no free cmdlist\n");
339 mutex_unlock(&g2d->cmdlist_mutex);
340 return NULL;
341 }
342
343 node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node,
344 list);
345 list_del_init(&node->list);
346 mutex_unlock(&g2d->cmdlist_mutex);
347
348 return node;
349}
350
351static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node)
352{
353 mutex_lock(&g2d->cmdlist_mutex);
354 list_move_tail(&node->list, &g2d->free_cmdlist);
355 mutex_unlock(&g2d->cmdlist_mutex);
356}
357
358static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv,
359 struct g2d_cmdlist_node *node)
360{
361 struct g2d_cmdlist_node *lnode;
362
363 if (list_empty(&g2d_priv->inuse_cmdlist))
364 goto add_to_list;
365
366 /* this links to base address of new cmdlist */
367 lnode = list_entry(g2d_priv->inuse_cmdlist.prev,
368 struct g2d_cmdlist_node, list);
369 lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr;
370
371add_to_list:
372 list_add_tail(&node->list, &g2d_priv->inuse_cmdlist);
373
374 if (node->event)
375 list_add_tail(&node->event->base.link, &g2d_priv->event_list);
376}
377
378static void g2d_userptr_put_dma_addr(struct drm_device *drm_dev,
379 unsigned long obj,
380 bool force)
381{
382 struct g2d_cmdlist_userptr *g2d_userptr =
383 (struct g2d_cmdlist_userptr *)obj;
384 struct page **pages;
385
386 if (!obj)
387 return;
388
389 if (force)
390 goto out;
391
392 atomic_dec(&g2d_userptr->refcount);
393
394 if (atomic_read(&g2d_userptr->refcount) > 0)
395 return;
396
397 if (g2d_userptr->in_pool)
398 return;
399
400out:
401 dma_unmap_sg(to_dma_dev(drm_dev), g2d_userptr->sgt->sgl,
402 g2d_userptr->sgt->nents, DMA_BIDIRECTIONAL);
403
404 pages = frame_vector_pages(g2d_userptr->vec);
405 if (!IS_ERR(pages)) {
406 int i;
407
408 for (i = 0; i < frame_vector_count(g2d_userptr->vec); i++)
409 set_page_dirty_lock(pages[i]);
410 }
411 put_vaddr_frames(g2d_userptr->vec);
412 frame_vector_destroy(g2d_userptr->vec);
413
414 if (!g2d_userptr->out_of_list)
415 list_del_init(&g2d_userptr->list);
416
417 sg_free_table(g2d_userptr->sgt);
418 kfree(g2d_userptr->sgt);
419 kfree(g2d_userptr);
420}
421
422static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev,
423 unsigned long userptr,
424 unsigned long size,
425 struct drm_file *filp,
426 unsigned long *obj)
427{
428 struct drm_exynos_file_private *file_priv = filp->driver_priv;
429 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
430 struct g2d_cmdlist_userptr *g2d_userptr;
431 struct g2d_data *g2d;
432 struct sg_table *sgt;
433 unsigned long start, end;
434 unsigned int npages, offset;
435 int ret;
436
437 if (!size) {
438 DRM_ERROR("invalid userptr size.\n");
439 return ERR_PTR(-EINVAL);
440 }
441
442 g2d = dev_get_drvdata(g2d_priv->dev);
443
444 /* check if userptr already exists in userptr_list. */
445 list_for_each_entry(g2d_userptr, &g2d_priv->userptr_list, list) {
446 if (g2d_userptr->userptr == userptr) {
447 /*
448 * also check size because there could be same address
449 * and different size.
450 */
451 if (g2d_userptr->size == size) {
452 atomic_inc(&g2d_userptr->refcount);
453 *obj = (unsigned long)g2d_userptr;
454
455 return &g2d_userptr->dma_addr;
456 }
457
458 /*
459 * at this moment, maybe g2d dma is accessing this
460 * g2d_userptr memory region so just remove this
461 * g2d_userptr object from userptr_list not to be
462 * referred again and also except it the userptr
463 * pool to be released after the dma access completion.
464 */
465 g2d_userptr->out_of_list = true;
466 g2d_userptr->in_pool = false;
467 list_del_init(&g2d_userptr->list);
468
469 break;
470 }
471 }
472
473 g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL);
474 if (!g2d_userptr)
475 return ERR_PTR(-ENOMEM);
476
477 atomic_set(&g2d_userptr->refcount, 1);
478 g2d_userptr->size = size;
479
480 start = userptr & PAGE_MASK;
481 offset = userptr & ~PAGE_MASK;
482 end = PAGE_ALIGN(userptr + size);
483 npages = (end - start) >> PAGE_SHIFT;
484 g2d_userptr->vec = frame_vector_create(npages);
485 if (!g2d_userptr->vec) {
486 ret = -ENOMEM;
487 goto err_free;
488 }
489
490 ret = get_vaddr_frames(start, npages, FOLL_FORCE | FOLL_WRITE,
491 g2d_userptr->vec);
492 if (ret != npages) {
493 DRM_ERROR("failed to get user pages from userptr.\n");
494 if (ret < 0)
495 goto err_destroy_framevec;
496 ret = -EFAULT;
497 goto err_put_framevec;
498 }
499 if (frame_vector_to_pages(g2d_userptr->vec) < 0) {
500 ret = -EFAULT;
501 goto err_put_framevec;
502 }
503
504 sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
505 if (!sgt) {
506 ret = -ENOMEM;
507 goto err_put_framevec;
508 }
509
510 ret = sg_alloc_table_from_pages(sgt,
511 frame_vector_pages(g2d_userptr->vec),
512 npages, offset, size, GFP_KERNEL);
513 if (ret < 0) {
514 DRM_ERROR("failed to get sgt from pages.\n");
515 goto err_free_sgt;
516 }
517
518 g2d_userptr->sgt = sgt;
519
520 if (!dma_map_sg(to_dma_dev(drm_dev), sgt->sgl, sgt->nents,
521 DMA_BIDIRECTIONAL)) {
522 DRM_ERROR("failed to map sgt with dma region.\n");
523 ret = -ENOMEM;
524 goto err_sg_free_table;
525 }
526
527 g2d_userptr->dma_addr = sgt->sgl[0].dma_address;
528 g2d_userptr->userptr = userptr;
529
530 list_add_tail(&g2d_userptr->list, &g2d_priv->userptr_list);
531
532 if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) {
533 g2d->current_pool += npages << PAGE_SHIFT;
534 g2d_userptr->in_pool = true;
535 }
536
537 *obj = (unsigned long)g2d_userptr;
538
539 return &g2d_userptr->dma_addr;
540
541err_sg_free_table:
542 sg_free_table(sgt);
543
544err_free_sgt:
545 kfree(sgt);
546
547err_put_framevec:
548 put_vaddr_frames(g2d_userptr->vec);
549
550err_destroy_framevec:
551 frame_vector_destroy(g2d_userptr->vec);
552
553err_free:
554 kfree(g2d_userptr);
555
556 return ERR_PTR(ret);
557}
558
559static void g2d_userptr_free_all(struct drm_device *drm_dev,
560 struct g2d_data *g2d,
561 struct drm_file *filp)
562{
563 struct drm_exynos_file_private *file_priv = filp->driver_priv;
564 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
565 struct g2d_cmdlist_userptr *g2d_userptr, *n;
566
567 list_for_each_entry_safe(g2d_userptr, n, &g2d_priv->userptr_list, list)
568 if (g2d_userptr->in_pool)
569 g2d_userptr_put_dma_addr(drm_dev,
570 (unsigned long)g2d_userptr,
571 true);
572
573 g2d->current_pool = 0;
574}
575
576static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
577{
578 enum g2d_reg_type reg_type;
579
580 switch (reg_offset) {
581 case G2D_SRC_BASE_ADDR:
582 case G2D_SRC_STRIDE:
583 case G2D_SRC_COLOR_MODE:
584 case G2D_SRC_LEFT_TOP:
585 case G2D_SRC_RIGHT_BOTTOM:
586 reg_type = REG_TYPE_SRC;
587 break;
588 case G2D_SRC_PLANE2_BASE_ADDR:
589 reg_type = REG_TYPE_SRC_PLANE2;
590 break;
591 case G2D_DST_BASE_ADDR:
592 case G2D_DST_STRIDE:
593 case G2D_DST_COLOR_MODE:
594 case G2D_DST_LEFT_TOP:
595 case G2D_DST_RIGHT_BOTTOM:
596 reg_type = REG_TYPE_DST;
597 break;
598 case G2D_DST_PLANE2_BASE_ADDR:
599 reg_type = REG_TYPE_DST_PLANE2;
600 break;
601 case G2D_PAT_BASE_ADDR:
602 reg_type = REG_TYPE_PAT;
603 break;
604 case G2D_MSK_BASE_ADDR:
605 reg_type = REG_TYPE_MSK;
606 break;
607 default:
608 reg_type = REG_TYPE_NONE;
609 DRM_ERROR("Unknown register offset![%d]\n", reg_offset);
610 break;
611 }
612
613 return reg_type;
614}
615
616static unsigned long g2d_get_buf_bpp(unsigned int format)
617{
618 unsigned long bpp;
619
620 switch (format) {
621 case G2D_FMT_XRGB8888:
622 case G2D_FMT_ARGB8888:
623 bpp = 4;
624 break;
625 case G2D_FMT_RGB565:
626 case G2D_FMT_XRGB1555:
627 case G2D_FMT_ARGB1555:
628 case G2D_FMT_XRGB4444:
629 case G2D_FMT_ARGB4444:
630 bpp = 2;
631 break;
632 case G2D_FMT_PACKED_RGB888:
633 bpp = 3;
634 break;
635 default:
636 bpp = 1;
637 break;
638 }
639
640 return bpp;
641}
642
643static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc,
644 enum g2d_reg_type reg_type,
645 unsigned long size)
646{
647 int width, height;
648 unsigned long bpp, last_pos;
649
650 /*
651 * check source and destination buffers only.
652 * so the others are always valid.
653 */
654 if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST)
655 return true;
656
657 /* This check also makes sure that right_x > left_x. */
658 width = (int)buf_desc->right_x - (int)buf_desc->left_x;
659 if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) {
660 DRM_ERROR("width[%d] is out of range!\n", width);
661 return false;
662 }
663
664 /* This check also makes sure that bottom_y > top_y. */
665 height = (int)buf_desc->bottom_y - (int)buf_desc->top_y;
666 if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) {
667 DRM_ERROR("height[%d] is out of range!\n", height);
668 return false;
669 }
670
671 bpp = g2d_get_buf_bpp(buf_desc->format);
672
673 /* Compute the position of the last byte that the engine accesses. */
674 last_pos = ((unsigned long)buf_desc->bottom_y - 1) *
675 (unsigned long)buf_desc->stride +
676 (unsigned long)buf_desc->right_x * bpp - 1;
677
678 /*
679 * Since right_x > left_x and bottom_y > top_y we already know
680 * that the first_pos < last_pos (first_pos being the position
681 * of the first byte the engine accesses), it just remains to
682 * check if last_pos is smaller then the buffer size.
683 */
684
685 if (last_pos >= size) {
686 DRM_ERROR("last engine access position [%lu] "
687 "is out of range [%lu]!\n", last_pos, size);
688 return false;
689 }
690
691 return true;
692}
693
694static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
695 struct g2d_cmdlist_node *node,
696 struct drm_device *drm_dev,
697 struct drm_file *file)
698{
699 struct g2d_cmdlist *cmdlist = node->cmdlist;
700 struct g2d_buf_info *buf_info = &node->buf_info;
701 int offset;
702 int ret;
703 int i;
704
705 for (i = 0; i < buf_info->map_nr; i++) {
706 struct g2d_buf_desc *buf_desc;
707 enum g2d_reg_type reg_type;
708 int reg_pos;
709 unsigned long handle;
710 dma_addr_t *addr;
711
712 reg_pos = cmdlist->last - 2 * (i + 1);
713
714 offset = cmdlist->data[reg_pos];
715 handle = cmdlist->data[reg_pos + 1];
716
717 reg_type = g2d_get_reg_type(offset);
718 if (reg_type == REG_TYPE_NONE) {
719 ret = -EFAULT;
720 goto err;
721 }
722
723 buf_desc = &buf_info->descs[reg_type];
724
725 if (buf_info->types[reg_type] == BUF_TYPE_GEM) {
726 unsigned long size;
727
728 size = exynos_drm_gem_get_size(drm_dev, handle, file);
729 if (!size) {
730 ret = -EFAULT;
731 goto err;
732 }
733
734 if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
735 size)) {
736 ret = -EFAULT;
737 goto err;
738 }
739
740 addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
741 file);
742 if (IS_ERR(addr)) {
743 ret = -EFAULT;
744 goto err;
745 }
746 } else {
747 struct drm_exynos_g2d_userptr g2d_userptr;
748
749 if (copy_from_user(&g2d_userptr, (void __user *)handle,
750 sizeof(struct drm_exynos_g2d_userptr))) {
751 ret = -EFAULT;
752 goto err;
753 }
754
755 if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
756 g2d_userptr.size)) {
757 ret = -EFAULT;
758 goto err;
759 }
760
761 addr = g2d_userptr_get_dma_addr(drm_dev,
762 g2d_userptr.userptr,
763 g2d_userptr.size,
764 file,
765 &handle);
766 if (IS_ERR(addr)) {
767 ret = -EFAULT;
768 goto err;
769 }
770 }
771
772 cmdlist->data[reg_pos + 1] = *addr;
773 buf_info->reg_types[i] = reg_type;
774 buf_info->handles[reg_type] = handle;
775 }
776
777 return 0;
778
779err:
780 buf_info->map_nr = i;
781 return ret;
782}
783
784static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
785 struct g2d_cmdlist_node *node,
786 struct drm_file *filp)
787{
788 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
789 struct g2d_buf_info *buf_info = &node->buf_info;
790 int i;
791
792 for (i = 0; i < buf_info->map_nr; i++) {
793 struct g2d_buf_desc *buf_desc;
794 enum g2d_reg_type reg_type;
795 unsigned long handle;
796
797 reg_type = buf_info->reg_types[i];
798
799 buf_desc = &buf_info->descs[reg_type];
800 handle = buf_info->handles[reg_type];
801
802 if (buf_info->types[reg_type] == BUF_TYPE_GEM)
803 exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
804 filp);
805 else
806 g2d_userptr_put_dma_addr(subdrv->drm_dev, handle,
807 false);
808
809 buf_info->reg_types[i] = REG_TYPE_NONE;
810 buf_info->handles[reg_type] = 0;
811 buf_info->types[reg_type] = 0;
812 memset(buf_desc, 0x00, sizeof(*buf_desc));
813 }
814
815 buf_info->map_nr = 0;
816}
817
818static void g2d_dma_start(struct g2d_data *g2d,
819 struct g2d_runqueue_node *runqueue_node)
820{
821 struct g2d_cmdlist_node *node =
822 list_first_entry(&runqueue_node->run_cmdlist,
823 struct g2d_cmdlist_node, list);
824
825 set_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags);
826 writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR);
827 writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND);
828}
829
830static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d)
831{
832 struct g2d_runqueue_node *runqueue_node;
833
834 if (list_empty(&g2d->runqueue))
835 return NULL;
836
837 runqueue_node = list_first_entry(&g2d->runqueue,
838 struct g2d_runqueue_node, list);
839 list_del_init(&runqueue_node->list);
840 return runqueue_node;
841}
842
843static void g2d_free_runqueue_node(struct g2d_data *g2d,
844 struct g2d_runqueue_node *runqueue_node)
845{
846 struct g2d_cmdlist_node *node;
847
848 mutex_lock(&g2d->cmdlist_mutex);
849 /*
850 * commands in run_cmdlist have been completed so unmap all gem
851 * objects in each command node so that they are unreferenced.
852 */
853 list_for_each_entry(node, &runqueue_node->run_cmdlist, list)
854 g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp);
855 list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist);
856 mutex_unlock(&g2d->cmdlist_mutex);
857
858 kmem_cache_free(g2d->runqueue_slab, runqueue_node);
859}
860
861/**
862 * g2d_remove_runqueue_nodes - remove items from the list of runqueue nodes
863 * @g2d: G2D state object
864 * @file: if not zero, only remove items with this DRM file
865 *
866 * Has to be called under runqueue lock.
867 */
868static void g2d_remove_runqueue_nodes(struct g2d_data *g2d, struct drm_file* file)
869{
870 struct g2d_runqueue_node *node, *n;
871
872 if (list_empty(&g2d->runqueue))
873 return;
874
875 list_for_each_entry_safe(node, n, &g2d->runqueue, list) {
876 if (file && node->filp != file)
877 continue;
878
879 list_del_init(&node->list);
880 g2d_free_runqueue_node(g2d, node);
881 }
882}
883
884static void g2d_runqueue_worker(struct work_struct *work)
885{
886 struct g2d_data *g2d = container_of(work, struct g2d_data,
887 runqueue_work);
888 struct g2d_runqueue_node *runqueue_node;
889
890 /*
891 * The engine is busy and the completion of the current node is going
892 * to poke the runqueue worker, so nothing to do here.
893 */
894 if (test_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags))
895 return;
896
897 mutex_lock(&g2d->runqueue_mutex);
898
899 runqueue_node = g2d->runqueue_node;
900 g2d->runqueue_node = NULL;
901
902 if (runqueue_node) {
903 pm_runtime_mark_last_busy(g2d->dev);
904 pm_runtime_put_autosuspend(g2d->dev);
905
906 complete(&runqueue_node->complete);
907 if (runqueue_node->async)
908 g2d_free_runqueue_node(g2d, runqueue_node);
909 }
910
911 if (!test_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags)) {
912 g2d->runqueue_node = g2d_get_runqueue_node(g2d);
913
914 if (g2d->runqueue_node) {
915 pm_runtime_get_sync(g2d->dev);
916 g2d_dma_start(g2d, g2d->runqueue_node);
917 }
918 }
919
920 mutex_unlock(&g2d->runqueue_mutex);
921}
922
923static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no)
924{
925 struct drm_device *drm_dev = g2d->subdrv.drm_dev;
926 struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node;
927 struct drm_exynos_pending_g2d_event *e;
928 struct timespec64 now;
929
930 if (list_empty(&runqueue_node->event_list))
931 return;
932
933 e = list_first_entry(&runqueue_node->event_list,
934 struct drm_exynos_pending_g2d_event, base.link);
935
936 ktime_get_ts64(&now);
937 e->event.tv_sec = now.tv_sec;
938 e->event.tv_usec = now.tv_nsec / NSEC_PER_USEC;
939 e->event.cmdlist_no = cmdlist_no;
940
941 drm_send_event(drm_dev, &e->base);
942}
943
944static irqreturn_t g2d_irq_handler(int irq, void *dev_id)
945{
946 struct g2d_data *g2d = dev_id;
947 u32 pending;
948
949 pending = readl_relaxed(g2d->regs + G2D_INTC_PEND);
950 if (pending)
951 writel_relaxed(pending, g2d->regs + G2D_INTC_PEND);
952
953 if (pending & G2D_INTP_GCMD_FIN) {
954 u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS);
955
956 cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >>
957 G2D_DMA_LIST_DONE_COUNT_OFFSET;
958
959 g2d_finish_event(g2d, cmdlist_no);
960
961 writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD);
962 if (!(pending & G2D_INTP_ACMD_FIN)) {
963 writel_relaxed(G2D_DMA_CONTINUE,
964 g2d->regs + G2D_DMA_COMMAND);
965 }
966 }
967
968 if (pending & G2D_INTP_ACMD_FIN) {
969 clear_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags);
970 queue_work(g2d->g2d_workq, &g2d->runqueue_work);
971 }
972
973 return IRQ_HANDLED;
974}
975
976/**
977 * g2d_wait_finish - wait for the G2D engine to finish the current runqueue node
978 * @g2d: G2D state object
979 * @file: if not zero, only wait if the current runqueue node belongs
980 * to the DRM file
981 *
982 * Should the engine not become idle after a 100ms timeout, a hardware
983 * reset is issued.
984 */
985static void g2d_wait_finish(struct g2d_data *g2d, struct drm_file *file)
986{
987 struct device *dev = g2d->dev;
988
989 struct g2d_runqueue_node *runqueue_node = NULL;
990 unsigned int tries = 10;
991
992 mutex_lock(&g2d->runqueue_mutex);
993
994 /* If no node is currently processed, we have nothing to do. */
995 if (!g2d->runqueue_node)
996 goto out;
997
998 runqueue_node = g2d->runqueue_node;
999
1000 /* Check if the currently processed item belongs to us. */
1001 if (file && runqueue_node->filp != file)
1002 goto out;
1003
1004 mutex_unlock(&g2d->runqueue_mutex);
1005
1006 /* Wait for the G2D engine to finish. */
1007 while (tries-- && (g2d->runqueue_node == runqueue_node))
1008 mdelay(10);
1009
1010 mutex_lock(&g2d->runqueue_mutex);
1011
1012 if (g2d->runqueue_node != runqueue_node)
1013 goto out;
1014
1015 dev_err(dev, "wait timed out, resetting engine...\n");
1016 g2d_hw_reset(g2d);
1017
1018 /*
1019 * After the hardware reset of the engine we are going to loose
1020 * the IRQ which triggers the PM runtime put().
1021 * So do this manually here.
1022 */
1023 pm_runtime_mark_last_busy(dev);
1024 pm_runtime_put_autosuspend(dev);
1025
1026 complete(&runqueue_node->complete);
1027 if (runqueue_node->async)
1028 g2d_free_runqueue_node(g2d, runqueue_node);
1029
1030out:
1031 mutex_unlock(&g2d->runqueue_mutex);
1032}
1033
1034static int g2d_check_reg_offset(struct device *dev,
1035 struct g2d_cmdlist_node *node,
1036 int nr, bool for_addr)
1037{
1038 struct g2d_cmdlist *cmdlist = node->cmdlist;
1039 int reg_offset;
1040 int index;
1041 int i;
1042
1043 for (i = 0; i < nr; i++) {
1044 struct g2d_buf_info *buf_info = &node->buf_info;
1045 struct g2d_buf_desc *buf_desc;
1046 enum g2d_reg_type reg_type;
1047 unsigned long value;
1048
1049 index = cmdlist->last - 2 * (i + 1);
1050
1051 reg_offset = cmdlist->data[index] & ~0xfffff000;
1052 if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END)
1053 goto err;
1054 if (reg_offset % 4)
1055 goto err;
1056
1057 switch (reg_offset) {
1058 case G2D_SRC_BASE_ADDR:
1059 case G2D_SRC_PLANE2_BASE_ADDR:
1060 case G2D_DST_BASE_ADDR:
1061 case G2D_DST_PLANE2_BASE_ADDR:
1062 case G2D_PAT_BASE_ADDR:
1063 case G2D_MSK_BASE_ADDR:
1064 if (!for_addr)
1065 goto err;
1066
1067 reg_type = g2d_get_reg_type(reg_offset);
1068
1069 /* check userptr buffer type. */
1070 if ((cmdlist->data[index] & ~0x7fffffff) >> 31) {
1071 buf_info->types[reg_type] = BUF_TYPE_USERPTR;
1072 cmdlist->data[index] &= ~G2D_BUF_USERPTR;
1073 } else
1074 buf_info->types[reg_type] = BUF_TYPE_GEM;
1075 break;
1076 case G2D_SRC_STRIDE:
1077 case G2D_DST_STRIDE:
1078 if (for_addr)
1079 goto err;
1080
1081 reg_type = g2d_get_reg_type(reg_offset);
1082
1083 buf_desc = &buf_info->descs[reg_type];
1084 buf_desc->stride = cmdlist->data[index + 1];
1085 break;
1086 case G2D_SRC_COLOR_MODE:
1087 case G2D_DST_COLOR_MODE:
1088 if (for_addr)
1089 goto err;
1090
1091 reg_type = g2d_get_reg_type(reg_offset);
1092
1093 buf_desc = &buf_info->descs[reg_type];
1094 value = cmdlist->data[index + 1];
1095
1096 buf_desc->format = value & 0xf;
1097 break;
1098 case G2D_SRC_LEFT_TOP:
1099 case G2D_DST_LEFT_TOP:
1100 if (for_addr)
1101 goto err;
1102
1103 reg_type = g2d_get_reg_type(reg_offset);
1104
1105 buf_desc = &buf_info->descs[reg_type];
1106 value = cmdlist->data[index + 1];
1107
1108 buf_desc->left_x = value & 0x1fff;
1109 buf_desc->top_y = (value & 0x1fff0000) >> 16;
1110 break;
1111 case G2D_SRC_RIGHT_BOTTOM:
1112 case G2D_DST_RIGHT_BOTTOM:
1113 if (for_addr)
1114 goto err;
1115
1116 reg_type = g2d_get_reg_type(reg_offset);
1117
1118 buf_desc = &buf_info->descs[reg_type];
1119 value = cmdlist->data[index + 1];
1120
1121 buf_desc->right_x = value & 0x1fff;
1122 buf_desc->bottom_y = (value & 0x1fff0000) >> 16;
1123 break;
1124 default:
1125 if (for_addr)
1126 goto err;
1127 break;
1128 }
1129 }
1130
1131 return 0;
1132
1133err:
1134 dev_err(dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]);
1135 return -EINVAL;
1136}
1137
1138/* ioctl functions */
1139int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data,
1140 struct drm_file *file)
1141{
1142 struct drm_exynos_file_private *file_priv = file->driver_priv;
1143 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1144 struct device *dev;
1145 struct g2d_data *g2d;
1146 struct drm_exynos_g2d_get_ver *ver = data;
1147
1148 if (!g2d_priv)
1149 return -ENODEV;
1150
1151 dev = g2d_priv->dev;
1152 if (!dev)
1153 return -ENODEV;
1154
1155 g2d = dev_get_drvdata(dev);
1156 if (!g2d)
1157 return -EFAULT;
1158
1159 ver->major = G2D_HW_MAJOR_VER;
1160 ver->minor = G2D_HW_MINOR_VER;
1161
1162 return 0;
1163}
1164
1165int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
1166 struct drm_file *file)
1167{
1168 struct drm_exynos_file_private *file_priv = file->driver_priv;
1169 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1170 struct device *dev;
1171 struct g2d_data *g2d;
1172 struct drm_exynos_g2d_set_cmdlist *req = data;
1173 struct drm_exynos_g2d_cmd *cmd;
1174 struct drm_exynos_pending_g2d_event *e;
1175 struct g2d_cmdlist_node *node;
1176 struct g2d_cmdlist *cmdlist;
1177 int size;
1178 int ret;
1179
1180 if (!g2d_priv)
1181 return -ENODEV;
1182
1183 dev = g2d_priv->dev;
1184 if (!dev)
1185 return -ENODEV;
1186
1187 g2d = dev_get_drvdata(dev);
1188 if (!g2d)
1189 return -EFAULT;
1190
1191 node = g2d_get_cmdlist(g2d);
1192 if (!node)
1193 return -ENOMEM;
1194
1195 /*
1196 * To avoid an integer overflow for the later size computations, we
1197 * enforce a maximum number of submitted commands here. This limit is
1198 * sufficient for all conceivable usage cases of the G2D.
1199 */
1200 if (req->cmd_nr > G2D_CMDLIST_DATA_NUM ||
1201 req->cmd_buf_nr > G2D_CMDLIST_DATA_NUM) {
1202 dev_err(dev, "number of submitted G2D commands exceeds limit\n");
1203 return -EINVAL;
1204 }
1205
1206 node->event = NULL;
1207
1208 if (req->event_type != G2D_EVENT_NOT) {
1209 e = kzalloc(sizeof(*node->event), GFP_KERNEL);
1210 if (!e) {
1211 ret = -ENOMEM;
1212 goto err;
1213 }
1214
1215 e->event.base.type = DRM_EXYNOS_G2D_EVENT;
1216 e->event.base.length = sizeof(e->event);
1217 e->event.user_data = req->user_data;
1218
1219 ret = drm_event_reserve_init(drm_dev, file, &e->base, &e->event.base);
1220 if (ret) {
1221 kfree(e);
1222 goto err;
1223 }
1224
1225 node->event = e;
1226 }
1227
1228 cmdlist = node->cmdlist;
1229
1230 cmdlist->last = 0;
1231
1232 /*
1233 * If don't clear SFR registers, the cmdlist is affected by register
1234 * values of previous cmdlist. G2D hw executes SFR clear command and
1235 * a next command at the same time then the next command is ignored and
1236 * is executed rightly from next next command, so needs a dummy command
1237 * to next command of SFR clear command.
1238 */
1239 cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET;
1240 cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR;
1241 cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
1242 cmdlist->data[cmdlist->last++] = 0;
1243
1244 /*
1245 * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
1246 * and GCF bit should be set to INTEN register if user wants
1247 * G2D interrupt event once current command list execution is
1248 * finished.
1249 * Otherwise only ACF bit should be set to INTEN register so
1250 * that one interrupt is occurred after all command lists
1251 * have been completed.
1252 */
1253 if (node->event) {
1254 cmdlist->data[cmdlist->last++] = G2D_INTEN;
1255 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF;
1256 cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
1257 cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
1258 } else {
1259 cmdlist->data[cmdlist->last++] = G2D_INTEN;
1260 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF;
1261 }
1262
1263 /*
1264 * Check the size of cmdlist. The 2 that is added last comes from
1265 * the implicit G2D_BITBLT_START that is appended once we have
1266 * checked all the submitted commands.
1267 */
1268 size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
1269 if (size > G2D_CMDLIST_DATA_NUM) {
1270 dev_err(dev, "cmdlist size is too big\n");
1271 ret = -EINVAL;
1272 goto err_free_event;
1273 }
1274
1275 cmd = (struct drm_exynos_g2d_cmd *)(unsigned long)req->cmd;
1276
1277 if (copy_from_user(cmdlist->data + cmdlist->last,
1278 (void __user *)cmd,
1279 sizeof(*cmd) * req->cmd_nr)) {
1280 ret = -EFAULT;
1281 goto err_free_event;
1282 }
1283 cmdlist->last += req->cmd_nr * 2;
1284
1285 ret = g2d_check_reg_offset(dev, node, req->cmd_nr, false);
1286 if (ret < 0)
1287 goto err_free_event;
1288
1289 node->buf_info.map_nr = req->cmd_buf_nr;
1290 if (req->cmd_buf_nr) {
1291 struct drm_exynos_g2d_cmd *cmd_buf;
1292
1293 cmd_buf = (struct drm_exynos_g2d_cmd *)
1294 (unsigned long)req->cmd_buf;
1295
1296 if (copy_from_user(cmdlist->data + cmdlist->last,
1297 (void __user *)cmd_buf,
1298 sizeof(*cmd_buf) * req->cmd_buf_nr)) {
1299 ret = -EFAULT;
1300 goto err_free_event;
1301 }
1302 cmdlist->last += req->cmd_buf_nr * 2;
1303
1304 ret = g2d_check_reg_offset(dev, node, req->cmd_buf_nr, true);
1305 if (ret < 0)
1306 goto err_free_event;
1307
1308 ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file);
1309 if (ret < 0)
1310 goto err_unmap;
1311 }
1312
1313 cmdlist->data[cmdlist->last++] = G2D_BITBLT_START;
1314 cmdlist->data[cmdlist->last++] = G2D_START_BITBLT;
1315
1316 /* head */
1317 cmdlist->head = cmdlist->last / 2;
1318
1319 /* tail */
1320 cmdlist->data[cmdlist->last] = 0;
1321
1322 g2d_add_cmdlist_to_inuse(g2d_priv, node);
1323
1324 return 0;
1325
1326err_unmap:
1327 g2d_unmap_cmdlist_gem(g2d, node, file);
1328err_free_event:
1329 if (node->event)
1330 drm_event_cancel_free(drm_dev, &node->event->base);
1331err:
1332 g2d_put_cmdlist(g2d, node);
1333 return ret;
1334}
1335
1336int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,
1337 struct drm_file *file)
1338{
1339 struct drm_exynos_file_private *file_priv = file->driver_priv;
1340 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1341 struct device *dev;
1342 struct g2d_data *g2d;
1343 struct drm_exynos_g2d_exec *req = data;
1344 struct g2d_runqueue_node *runqueue_node;
1345 struct list_head *run_cmdlist;
1346 struct list_head *event_list;
1347
1348 if (!g2d_priv)
1349 return -ENODEV;
1350
1351 dev = g2d_priv->dev;
1352 if (!dev)
1353 return -ENODEV;
1354
1355 g2d = dev_get_drvdata(dev);
1356 if (!g2d)
1357 return -EFAULT;
1358
1359 runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL);
1360 if (!runqueue_node)
1361 return -ENOMEM;
1362
1363 run_cmdlist = &runqueue_node->run_cmdlist;
1364 event_list = &runqueue_node->event_list;
1365 INIT_LIST_HEAD(run_cmdlist);
1366 INIT_LIST_HEAD(event_list);
1367 init_completion(&runqueue_node->complete);
1368 runqueue_node->async = req->async;
1369
1370 list_splice_init(&g2d_priv->inuse_cmdlist, run_cmdlist);
1371 list_splice_init(&g2d_priv->event_list, event_list);
1372
1373 if (list_empty(run_cmdlist)) {
1374 dev_err(dev, "there is no inuse cmdlist\n");
1375 kmem_cache_free(g2d->runqueue_slab, runqueue_node);
1376 return -EPERM;
1377 }
1378
1379 mutex_lock(&g2d->runqueue_mutex);
1380 runqueue_node->pid = current->pid;
1381 runqueue_node->filp = file;
1382 list_add_tail(&runqueue_node->list, &g2d->runqueue);
1383 mutex_unlock(&g2d->runqueue_mutex);
1384
1385 /* Let the runqueue know that there is work to do. */
1386 queue_work(g2d->g2d_workq, &g2d->runqueue_work);
1387
1388 if (runqueue_node->async)
1389 goto out;
1390
1391 wait_for_completion(&runqueue_node->complete);
1392 g2d_free_runqueue_node(g2d, runqueue_node);
1393
1394out:
1395 return 0;
1396}
1397
1398static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
1399{
1400 struct g2d_data *g2d;
1401 int ret;
1402
1403 g2d = dev_get_drvdata(dev);
1404 if (!g2d)
1405 return -EFAULT;
1406
1407 /* allocate dma-aware cmdlist buffer. */
1408 ret = g2d_init_cmdlist(g2d);
1409 if (ret < 0) {
1410 dev_err(dev, "cmdlist init failed\n");
1411 return ret;
1412 }
1413
1414 ret = drm_iommu_attach_device(drm_dev, dev);
1415 if (ret < 0) {
1416 dev_err(dev, "failed to enable iommu.\n");
1417 g2d_fini_cmdlist(g2d);
1418 }
1419
1420 return ret;
1421
1422}
1423
1424static void g2d_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
1425{
1426 drm_iommu_detach_device(drm_dev, dev);
1427}
1428
1429static int g2d_open(struct drm_device *drm_dev, struct device *dev,
1430 struct drm_file *file)
1431{
1432 struct drm_exynos_file_private *file_priv = file->driver_priv;
1433 struct exynos_drm_g2d_private *g2d_priv;
1434
1435 g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL);
1436 if (!g2d_priv)
1437 return -ENOMEM;
1438
1439 g2d_priv->dev = dev;
1440 file_priv->g2d_priv = g2d_priv;
1441
1442 INIT_LIST_HEAD(&g2d_priv->inuse_cmdlist);
1443 INIT_LIST_HEAD(&g2d_priv->event_list);
1444 INIT_LIST_HEAD(&g2d_priv->userptr_list);
1445
1446 return 0;
1447}
1448
1449static void g2d_close(struct drm_device *drm_dev, struct device *dev,
1450 struct drm_file *file)
1451{
1452 struct drm_exynos_file_private *file_priv = file->driver_priv;
1453 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1454 struct g2d_data *g2d;
1455 struct g2d_cmdlist_node *node, *n;
1456
1457 if (!dev)
1458 return;
1459
1460 g2d = dev_get_drvdata(dev);
1461 if (!g2d)
1462 return;
1463
1464 /* Remove the runqueue nodes that belong to us. */
1465 mutex_lock(&g2d->runqueue_mutex);
1466 g2d_remove_runqueue_nodes(g2d, file);
1467 mutex_unlock(&g2d->runqueue_mutex);
1468
1469 /*
1470 * Wait for the runqueue worker to finish its current node.
1471 * After this the engine should no longer be accessing any
1472 * memory belonging to us.
1473 */
1474 g2d_wait_finish(g2d, file);
1475
1476 /*
1477 * Even after the engine is idle, there might still be stale cmdlists
1478 * (i.e. cmdlisst which we submitted but never executed) around, with
1479 * their corresponding GEM/userptr buffers.
1480 * Properly unmap these buffers here.
1481 */
1482 mutex_lock(&g2d->cmdlist_mutex);
1483 list_for_each_entry_safe(node, n, &g2d_priv->inuse_cmdlist, list) {
1484 g2d_unmap_cmdlist_gem(g2d, node, file);
1485 list_move_tail(&node->list, &g2d->free_cmdlist);
1486 }
1487 mutex_unlock(&g2d->cmdlist_mutex);
1488
1489 /* release all g2d_userptr in pool. */
1490 g2d_userptr_free_all(drm_dev, g2d, file);
1491
1492 kfree(file_priv->g2d_priv);
1493}
1494
1495static int g2d_probe(struct platform_device *pdev)
1496{
1497 struct device *dev = &pdev->dev;
1498 struct resource *res;
1499 struct g2d_data *g2d;
1500 struct exynos_drm_subdrv *subdrv;
1501 int ret;
1502
1503 g2d = devm_kzalloc(dev, sizeof(*g2d), GFP_KERNEL);
1504 if (!g2d)
1505 return -ENOMEM;
1506
1507 g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab",
1508 sizeof(struct g2d_runqueue_node), 0, 0, NULL);
1509 if (!g2d->runqueue_slab)
1510 return -ENOMEM;
1511
1512 g2d->dev = dev;
1513
1514 g2d->g2d_workq = create_singlethread_workqueue("g2d");
1515 if (!g2d->g2d_workq) {
1516 dev_err(dev, "failed to create workqueue\n");
1517 ret = -EINVAL;
1518 goto err_destroy_slab;
1519 }
1520
1521 INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker);
1522 INIT_LIST_HEAD(&g2d->free_cmdlist);
1523 INIT_LIST_HEAD(&g2d->runqueue);
1524
1525 mutex_init(&g2d->cmdlist_mutex);
1526 mutex_init(&g2d->runqueue_mutex);
1527
1528 g2d->gate_clk = devm_clk_get(dev, "fimg2d");
1529 if (IS_ERR(g2d->gate_clk)) {
1530 dev_err(dev, "failed to get gate clock\n");
1531 ret = PTR_ERR(g2d->gate_clk);
1532 goto err_destroy_workqueue;
1533 }
1534
1535 pm_runtime_use_autosuspend(dev);
1536 pm_runtime_set_autosuspend_delay(dev, 2000);
1537 pm_runtime_enable(dev);
1538 clear_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags);
1539 clear_bit(G2D_BIT_ENGINE_BUSY, &g2d->flags);
1540
1541 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1542
1543 g2d->regs = devm_ioremap_resource(dev, res);
1544 if (IS_ERR(g2d->regs)) {
1545 ret = PTR_ERR(g2d->regs);
1546 goto err_put_clk;
1547 }
1548
1549 g2d->irq = platform_get_irq(pdev, 0);
1550 if (g2d->irq < 0) {
1551 dev_err(dev, "failed to get irq\n");
1552 ret = g2d->irq;
1553 goto err_put_clk;
1554 }
1555
1556 ret = devm_request_irq(dev, g2d->irq, g2d_irq_handler, 0,
1557 "drm_g2d", g2d);
1558 if (ret < 0) {
1559 dev_err(dev, "irq request failed\n");
1560 goto err_put_clk;
1561 }
1562
1563 g2d->max_pool = MAX_POOL;
1564
1565 platform_set_drvdata(pdev, g2d);
1566
1567 subdrv = &g2d->subdrv;
1568 subdrv->dev = dev;
1569 subdrv->probe = g2d_subdrv_probe;
1570 subdrv->remove = g2d_subdrv_remove;
1571 subdrv->open = g2d_open;
1572 subdrv->close = g2d_close;
1573
1574 ret = exynos_drm_subdrv_register(subdrv);
1575 if (ret < 0) {
1576 dev_err(dev, "failed to register drm g2d device\n");
1577 goto err_put_clk;
1578 }
1579
1580 dev_info(dev, "The Exynos G2D (ver %d.%d) successfully probed.\n",
1581 G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER);
1582
1583 return 0;
1584
1585err_put_clk:
1586 pm_runtime_disable(dev);
1587err_destroy_workqueue:
1588 destroy_workqueue(g2d->g2d_workq);
1589err_destroy_slab:
1590 kmem_cache_destroy(g2d->runqueue_slab);
1591 return ret;
1592}
1593
1594static int g2d_remove(struct platform_device *pdev)
1595{
1596 struct g2d_data *g2d = platform_get_drvdata(pdev);
1597
1598 /* Suspend operation and wait for engine idle. */
1599 set_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags);
1600 g2d_wait_finish(g2d, NULL);
1601
1602 cancel_work_sync(&g2d->runqueue_work);
1603 exynos_drm_subdrv_unregister(&g2d->subdrv);
1604
1605 /* There should be no locking needed here. */
1606 g2d_remove_runqueue_nodes(g2d, NULL);
1607
1608 pm_runtime_dont_use_autosuspend(&pdev->dev);
1609 pm_runtime_disable(&pdev->dev);
1610
1611 g2d_fini_cmdlist(g2d);
1612 destroy_workqueue(g2d->g2d_workq);
1613 kmem_cache_destroy(g2d->runqueue_slab);
1614
1615 return 0;
1616}
1617
1618#ifdef CONFIG_PM_SLEEP
1619static int g2d_suspend(struct device *dev)
1620{
1621 struct g2d_data *g2d = dev_get_drvdata(dev);
1622
1623 /*
1624 * Suspend the runqueue worker operation and wait until the G2D
1625 * engine is idle.
1626 */
1627 set_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags);
1628 g2d_wait_finish(g2d, NULL);
1629 flush_work(&g2d->runqueue_work);
1630
1631 return 0;
1632}
1633
1634static int g2d_resume(struct device *dev)
1635{
1636 struct g2d_data *g2d = dev_get_drvdata(dev);
1637
1638 clear_bit(G2D_BIT_SUSPEND_RUNQUEUE, &g2d->flags);
1639 queue_work(g2d->g2d_workq, &g2d->runqueue_work);
1640
1641 return 0;
1642}
1643#endif
1644
1645#ifdef CONFIG_PM
1646static int g2d_runtime_suspend(struct device *dev)
1647{
1648 struct g2d_data *g2d = dev_get_drvdata(dev);
1649
1650 clk_disable_unprepare(g2d->gate_clk);
1651
1652 return 0;
1653}
1654
1655static int g2d_runtime_resume(struct device *dev)
1656{
1657 struct g2d_data *g2d = dev_get_drvdata(dev);
1658 int ret;
1659
1660 ret = clk_prepare_enable(g2d->gate_clk);
1661 if (ret < 0)
1662 dev_warn(dev, "failed to enable clock.\n");
1663
1664 return ret;
1665}
1666#endif
1667
1668static const struct dev_pm_ops g2d_pm_ops = {
1669 SET_SYSTEM_SLEEP_PM_OPS(g2d_suspend, g2d_resume)
1670 SET_RUNTIME_PM_OPS(g2d_runtime_suspend, g2d_runtime_resume, NULL)
1671};
1672
1673static const struct of_device_id exynos_g2d_match[] = {
1674 { .compatible = "samsung,exynos5250-g2d" },
1675 { .compatible = "samsung,exynos4212-g2d" },
1676 {},
1677};
1678MODULE_DEVICE_TABLE(of, exynos_g2d_match);
1679
1680struct platform_driver g2d_driver = {
1681 .probe = g2d_probe,
1682 .remove = g2d_remove,
1683 .driver = {
1684 .name = "exynos-drm-g2d",
1685 .owner = THIS_MODULE,
1686 .pm = &g2d_pm_ops,
1687 .of_match_table = exynos_g2d_match,
1688 },
1689};