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1/*
2 * Renesas USB driver
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 *
16 */
17#include <linux/delay.h>
18#include <linux/io.h>
19#include <linux/scatterlist.h>
20#include "common.h"
21#include "pipe.h"
22
23#define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo))
24#define usbhsf_is_cfifo(p, f) (usbhsf_get_cfifo(p) == f)
25
26#define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */
27
28/*
29 * packet initialize
30 */
31void usbhs_pkt_init(struct usbhs_pkt *pkt)
32{
33 INIT_LIST_HEAD(&pkt->node);
34}
35
36/*
37 * packet control function
38 */
39static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done)
40{
41 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
42 struct device *dev = usbhs_priv_to_dev(priv);
43
44 dev_err(dev, "null handler\n");
45
46 return -EINVAL;
47}
48
49static const struct usbhs_pkt_handle usbhsf_null_handler = {
50 .prepare = usbhsf_null_handle,
51 .try_run = usbhsf_null_handle,
52};
53
54void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
55 void (*done)(struct usbhs_priv *priv,
56 struct usbhs_pkt *pkt),
57 void *buf, int len, int zero, int sequence)
58{
59 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
60 struct device *dev = usbhs_priv_to_dev(priv);
61 unsigned long flags;
62
63 if (!done) {
64 dev_err(dev, "no done function\n");
65 return;
66 }
67
68 /******************** spin lock ********************/
69 usbhs_lock(priv, flags);
70
71 if (!pipe->handler) {
72 dev_err(dev, "no handler function\n");
73 pipe->handler = &usbhsf_null_handler;
74 }
75
76 list_move_tail(&pkt->node, &pipe->list);
77
78 /*
79 * each pkt must hold own handler.
80 * because handler might be changed by its situation.
81 * dma handler -> pio handler.
82 */
83 pkt->pipe = pipe;
84 pkt->buf = buf;
85 pkt->handler = pipe->handler;
86 pkt->length = len;
87 pkt->zero = zero;
88 pkt->actual = 0;
89 pkt->done = done;
90 pkt->sequence = sequence;
91
92 usbhs_unlock(priv, flags);
93 /******************** spin unlock ******************/
94}
95
96static void __usbhsf_pkt_del(struct usbhs_pkt *pkt)
97{
98 list_del_init(&pkt->node);
99}
100
101static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
102{
103 if (list_empty(&pipe->list))
104 return NULL;
105
106 return list_first_entry(&pipe->list, struct usbhs_pkt, node);
107}
108
109static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
110 struct usbhs_fifo *fifo);
111static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
112 struct usbhs_fifo *fifo);
113static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
114 struct usbhs_pkt *pkt);
115#define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1)
116#define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0)
117static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map);
118struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt)
119{
120 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
121 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
122 unsigned long flags;
123
124 /******************** spin lock ********************/
125 usbhs_lock(priv, flags);
126
127 usbhs_pipe_disable(pipe);
128
129 if (!pkt)
130 pkt = __usbhsf_pkt_get(pipe);
131
132 if (pkt) {
133 struct dma_chan *chan = NULL;
134
135 if (fifo)
136 chan = usbhsf_dma_chan_get(fifo, pkt);
137 if (chan) {
138 dmaengine_terminate_all(chan);
139 usbhsf_fifo_clear(pipe, fifo);
140 usbhsf_dma_unmap(pkt);
141 }
142
143 __usbhsf_pkt_del(pkt);
144 }
145
146 if (fifo)
147 usbhsf_fifo_unselect(pipe, fifo);
148
149 usbhs_unlock(priv, flags);
150 /******************** spin unlock ******************/
151
152 return pkt;
153}
154
155enum {
156 USBHSF_PKT_PREPARE,
157 USBHSF_PKT_TRY_RUN,
158 USBHSF_PKT_DMA_DONE,
159};
160
161static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type)
162{
163 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
164 struct usbhs_pkt *pkt;
165 struct device *dev = usbhs_priv_to_dev(priv);
166 int (*func)(struct usbhs_pkt *pkt, int *is_done);
167 unsigned long flags;
168 int ret = 0;
169 int is_done = 0;
170
171 /******************** spin lock ********************/
172 usbhs_lock(priv, flags);
173
174 pkt = __usbhsf_pkt_get(pipe);
175 if (!pkt)
176 goto __usbhs_pkt_handler_end;
177
178 switch (type) {
179 case USBHSF_PKT_PREPARE:
180 func = pkt->handler->prepare;
181 break;
182 case USBHSF_PKT_TRY_RUN:
183 func = pkt->handler->try_run;
184 break;
185 case USBHSF_PKT_DMA_DONE:
186 func = pkt->handler->dma_done;
187 break;
188 default:
189 dev_err(dev, "unknown pkt handler\n");
190 goto __usbhs_pkt_handler_end;
191 }
192
193 if (likely(func))
194 ret = func(pkt, &is_done);
195
196 if (is_done)
197 __usbhsf_pkt_del(pkt);
198
199__usbhs_pkt_handler_end:
200 usbhs_unlock(priv, flags);
201 /******************** spin unlock ******************/
202
203 if (is_done) {
204 pkt->done(priv, pkt);
205 usbhs_pkt_start(pipe);
206 }
207
208 return ret;
209}
210
211void usbhs_pkt_start(struct usbhs_pipe *pipe)
212{
213 usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE);
214}
215
216/*
217 * irq enable/disable function
218 */
219#define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e)
220#define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e)
221#define usbhsf_irq_callback_ctrl(pipe, status, enable) \
222 ({ \
223 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \
224 struct usbhs_mod *mod = usbhs_mod_get_current(priv); \
225 u16 status = (1 << usbhs_pipe_number(pipe)); \
226 if (!mod) \
227 return; \
228 if (enable) \
229 mod->status |= status; \
230 else \
231 mod->status &= ~status; \
232 usbhs_irq_callback_update(priv, mod); \
233 })
234
235static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
236{
237 /*
238 * And DCP pipe can NOT use "ready interrupt" for "send"
239 * it should use "empty" interrupt.
240 * see
241 * "Operation" - "Interrupt Function" - "BRDY Interrupt"
242 *
243 * on the other hand, normal pipe can use "ready interrupt" for "send"
244 * even though it is single/double buffer
245 */
246 if (usbhs_pipe_is_dcp(pipe))
247 usbhsf_irq_empty_ctrl(pipe, enable);
248 else
249 usbhsf_irq_ready_ctrl(pipe, enable);
250}
251
252static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
253{
254 usbhsf_irq_ready_ctrl(pipe, enable);
255}
256
257/*
258 * FIFO ctrl
259 */
260static void usbhsf_send_terminator(struct usbhs_pipe *pipe,
261 struct usbhs_fifo *fifo)
262{
263 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
264
265 usbhs_bset(priv, fifo->ctr, BVAL, BVAL);
266}
267
268static int usbhsf_fifo_barrier(struct usbhs_priv *priv,
269 struct usbhs_fifo *fifo)
270{
271 int timeout = 1024;
272
273 do {
274 /* The FIFO port is accessible */
275 if (usbhs_read(priv, fifo->ctr) & FRDY)
276 return 0;
277
278 udelay(10);
279 } while (timeout--);
280
281 return -EBUSY;
282}
283
284static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
285 struct usbhs_fifo *fifo)
286{
287 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
288
289 if (!usbhs_pipe_is_dcp(pipe))
290 usbhsf_fifo_barrier(priv, fifo);
291
292 usbhs_write(priv, fifo->ctr, BCLR);
293}
294
295static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv,
296 struct usbhs_fifo *fifo)
297{
298 return usbhs_read(priv, fifo->ctr) & DTLN_MASK;
299}
300
301static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
302 struct usbhs_fifo *fifo)
303{
304 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
305
306 usbhs_pipe_select_fifo(pipe, NULL);
307 usbhs_write(priv, fifo->sel, 0);
308}
309
310static int usbhsf_fifo_select(struct usbhs_pipe *pipe,
311 struct usbhs_fifo *fifo,
312 int write)
313{
314 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
315 struct device *dev = usbhs_priv_to_dev(priv);
316 int timeout = 1024;
317 u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */
318 u16 base = usbhs_pipe_number(pipe); /* CURPIPE */
319
320 if (usbhs_pipe_is_busy(pipe) ||
321 usbhsf_fifo_is_busy(fifo))
322 return -EBUSY;
323
324 if (usbhs_pipe_is_dcp(pipe)) {
325 base |= (1 == write) << 5; /* ISEL */
326
327 if (usbhs_mod_is_host(priv))
328 usbhs_dcp_dir_for_host(pipe, write);
329 }
330
331 /* "base" will be used below */
332 if (usbhs_get_dparam(priv, has_sudmac) && !usbhsf_is_cfifo(priv, fifo))
333 usbhs_write(priv, fifo->sel, base);
334 else
335 usbhs_write(priv, fifo->sel, base | MBW_32);
336
337 /* check ISEL and CURPIPE value */
338 while (timeout--) {
339 if (base == (mask & usbhs_read(priv, fifo->sel))) {
340 usbhs_pipe_select_fifo(pipe, fifo);
341 return 0;
342 }
343 udelay(10);
344 }
345
346 dev_err(dev, "fifo select error\n");
347
348 return -EIO;
349}
350
351/*
352 * DCP status stage
353 */
354static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done)
355{
356 struct usbhs_pipe *pipe = pkt->pipe;
357 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
358 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
359 struct device *dev = usbhs_priv_to_dev(priv);
360 int ret;
361
362 usbhs_pipe_disable(pipe);
363
364 ret = usbhsf_fifo_select(pipe, fifo, 1);
365 if (ret < 0) {
366 dev_err(dev, "%s() faile\n", __func__);
367 return ret;
368 }
369
370 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
371
372 usbhsf_fifo_clear(pipe, fifo);
373 usbhsf_send_terminator(pipe, fifo);
374
375 usbhsf_fifo_unselect(pipe, fifo);
376
377 usbhsf_tx_irq_ctrl(pipe, 1);
378 usbhs_pipe_enable(pipe);
379
380 return ret;
381}
382
383static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done)
384{
385 struct usbhs_pipe *pipe = pkt->pipe;
386 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
387 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
388 struct device *dev = usbhs_priv_to_dev(priv);
389 int ret;
390
391 usbhs_pipe_disable(pipe);
392
393 ret = usbhsf_fifo_select(pipe, fifo, 0);
394 if (ret < 0) {
395 dev_err(dev, "%s() fail\n", __func__);
396 return ret;
397 }
398
399 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
400 usbhsf_fifo_clear(pipe, fifo);
401
402 usbhsf_fifo_unselect(pipe, fifo);
403
404 usbhsf_rx_irq_ctrl(pipe, 1);
405 usbhs_pipe_enable(pipe);
406
407 return ret;
408
409}
410
411static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done)
412{
413 struct usbhs_pipe *pipe = pkt->pipe;
414
415 if (pkt->handler == &usbhs_dcp_status_stage_in_handler)
416 usbhsf_tx_irq_ctrl(pipe, 0);
417 else
418 usbhsf_rx_irq_ctrl(pipe, 0);
419
420 pkt->actual = pkt->length;
421 *is_done = 1;
422
423 return 0;
424}
425
426const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = {
427 .prepare = usbhs_dcp_dir_switch_to_write,
428 .try_run = usbhs_dcp_dir_switch_done,
429};
430
431const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = {
432 .prepare = usbhs_dcp_dir_switch_to_read,
433 .try_run = usbhs_dcp_dir_switch_done,
434};
435
436/*
437 * DCP data stage (push)
438 */
439static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done)
440{
441 struct usbhs_pipe *pipe = pkt->pipe;
442
443 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
444
445 /*
446 * change handler to PIO push
447 */
448 pkt->handler = &usbhs_fifo_pio_push_handler;
449
450 return pkt->handler->prepare(pkt, is_done);
451}
452
453const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = {
454 .prepare = usbhsf_dcp_data_stage_try_push,
455};
456
457/*
458 * DCP data stage (pop)
459 */
460static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt,
461 int *is_done)
462{
463 struct usbhs_pipe *pipe = pkt->pipe;
464 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
465 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
466
467 if (usbhs_pipe_is_busy(pipe))
468 return 0;
469
470 /*
471 * prepare pop for DCP should
472 * - change DCP direction,
473 * - clear fifo
474 * - DATA1
475 */
476 usbhs_pipe_disable(pipe);
477
478 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
479
480 usbhsf_fifo_select(pipe, fifo, 0);
481 usbhsf_fifo_clear(pipe, fifo);
482 usbhsf_fifo_unselect(pipe, fifo);
483
484 /*
485 * change handler to PIO pop
486 */
487 pkt->handler = &usbhs_fifo_pio_pop_handler;
488
489 return pkt->handler->prepare(pkt, is_done);
490}
491
492const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = {
493 .prepare = usbhsf_dcp_data_stage_prepare_pop,
494};
495
496/*
497 * PIO push handler
498 */
499static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done)
500{
501 struct usbhs_pipe *pipe = pkt->pipe;
502 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
503 struct device *dev = usbhs_priv_to_dev(priv);
504 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
505 void __iomem *addr = priv->base + fifo->port;
506 u8 *buf;
507 int maxp = usbhs_pipe_get_maxpacket(pipe);
508 int total_len;
509 int i, ret, len;
510 int is_short;
511
512 usbhs_pipe_data_sequence(pipe, pkt->sequence);
513 pkt->sequence = -1; /* -1 sequence will be ignored */
514
515 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
516
517 ret = usbhsf_fifo_select(pipe, fifo, 1);
518 if (ret < 0)
519 return 0;
520
521 ret = usbhs_pipe_is_accessible(pipe);
522 if (ret < 0) {
523 /* inaccessible pipe is not an error */
524 ret = 0;
525 goto usbhs_fifo_write_busy;
526 }
527
528 ret = usbhsf_fifo_barrier(priv, fifo);
529 if (ret < 0)
530 goto usbhs_fifo_write_busy;
531
532 buf = pkt->buf + pkt->actual;
533 len = pkt->length - pkt->actual;
534 len = min(len, maxp);
535 total_len = len;
536 is_short = total_len < maxp;
537
538 /*
539 * FIXME
540 *
541 * 32-bit access only
542 */
543 if (len >= 4 && !((unsigned long)buf & 0x03)) {
544 iowrite32_rep(addr, buf, len / 4);
545 len %= 4;
546 buf += total_len - len;
547 }
548
549 /* the rest operation */
550 for (i = 0; i < len; i++)
551 iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
552
553 /*
554 * variable update
555 */
556 pkt->actual += total_len;
557
558 if (pkt->actual < pkt->length)
559 *is_done = 0; /* there are remainder data */
560 else if (is_short)
561 *is_done = 1; /* short packet */
562 else
563 *is_done = !pkt->zero; /* send zero packet ? */
564
565 /*
566 * pipe/irq handling
567 */
568 if (is_short)
569 usbhsf_send_terminator(pipe, fifo);
570
571 usbhsf_tx_irq_ctrl(pipe, !*is_done);
572 usbhs_pipe_running(pipe, !*is_done);
573 usbhs_pipe_enable(pipe);
574
575 dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n",
576 usbhs_pipe_number(pipe),
577 pkt->length, pkt->actual, *is_done, pkt->zero);
578
579 usbhsf_fifo_unselect(pipe, fifo);
580
581 return 0;
582
583usbhs_fifo_write_busy:
584 usbhsf_fifo_unselect(pipe, fifo);
585
586 /*
587 * pipe is busy.
588 * retry in interrupt
589 */
590 usbhsf_tx_irq_ctrl(pipe, 1);
591 usbhs_pipe_running(pipe, 1);
592
593 return ret;
594}
595
596static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done)
597{
598 if (usbhs_pipe_is_running(pkt->pipe))
599 return 0;
600
601 return usbhsf_pio_try_push(pkt, is_done);
602}
603
604const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = {
605 .prepare = usbhsf_pio_prepare_push,
606 .try_run = usbhsf_pio_try_push,
607};
608
609/*
610 * PIO pop handler
611 */
612static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
613{
614 struct usbhs_pipe *pipe = pkt->pipe;
615 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
616 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
617
618 if (usbhs_pipe_is_busy(pipe))
619 return 0;
620
621 if (usbhs_pipe_is_running(pipe))
622 return 0;
623
624 /*
625 * pipe enable to prepare packet receive
626 */
627 usbhs_pipe_data_sequence(pipe, pkt->sequence);
628 pkt->sequence = -1; /* -1 sequence will be ignored */
629
630 if (usbhs_pipe_is_dcp(pipe))
631 usbhsf_fifo_clear(pipe, fifo);
632
633 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
634 usbhs_pipe_enable(pipe);
635 usbhs_pipe_running(pipe, 1);
636 usbhsf_rx_irq_ctrl(pipe, 1);
637
638 return 0;
639}
640
641static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done)
642{
643 struct usbhs_pipe *pipe = pkt->pipe;
644 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
645 struct device *dev = usbhs_priv_to_dev(priv);
646 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
647 void __iomem *addr = priv->base + fifo->port;
648 u8 *buf;
649 u32 data = 0;
650 int maxp = usbhs_pipe_get_maxpacket(pipe);
651 int rcv_len, len;
652 int i, ret;
653 int total_len = 0;
654
655 ret = usbhsf_fifo_select(pipe, fifo, 0);
656 if (ret < 0)
657 return 0;
658
659 ret = usbhsf_fifo_barrier(priv, fifo);
660 if (ret < 0)
661 goto usbhs_fifo_read_busy;
662
663 rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
664
665 buf = pkt->buf + pkt->actual;
666 len = pkt->length - pkt->actual;
667 len = min(len, rcv_len);
668 total_len = len;
669
670 /*
671 * update actual length first here to decide disable pipe.
672 * if this pipe keeps BUF status and all data were popped,
673 * then, next interrupt/token will be issued again
674 */
675 pkt->actual += total_len;
676
677 if ((pkt->actual == pkt->length) || /* receive all data */
678 (total_len < maxp)) { /* short packet */
679 *is_done = 1;
680 usbhsf_rx_irq_ctrl(pipe, 0);
681 usbhs_pipe_running(pipe, 0);
682 /*
683 * If function mode, since this controller is possible to enter
684 * Control Write status stage at this timing, this driver
685 * should not disable the pipe. If such a case happens, this
686 * controller is not able to complete the status stage.
687 */
688 if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe))
689 usbhs_pipe_disable(pipe); /* disable pipe first */
690 }
691
692 /*
693 * Buffer clear if Zero-Length packet
694 *
695 * see
696 * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function"
697 */
698 if (0 == rcv_len) {
699 pkt->zero = 1;
700 usbhsf_fifo_clear(pipe, fifo);
701 goto usbhs_fifo_read_end;
702 }
703
704 /*
705 * FIXME
706 *
707 * 32-bit access only
708 */
709 if (len >= 4 && !((unsigned long)buf & 0x03)) {
710 ioread32_rep(addr, buf, len / 4);
711 len %= 4;
712 buf += total_len - len;
713 }
714
715 /* the rest operation */
716 for (i = 0; i < len; i++) {
717 if (!(i & 0x03))
718 data = ioread32(addr);
719
720 buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
721 }
722
723usbhs_fifo_read_end:
724 dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n",
725 usbhs_pipe_number(pipe),
726 pkt->length, pkt->actual, *is_done, pkt->zero);
727
728usbhs_fifo_read_busy:
729 usbhsf_fifo_unselect(pipe, fifo);
730
731 return ret;
732}
733
734const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = {
735 .prepare = usbhsf_prepare_pop,
736 .try_run = usbhsf_pio_try_pop,
737};
738
739/*
740 * DCP ctrol statge handler
741 */
742static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done)
743{
744 usbhs_dcp_control_transfer_done(pkt->pipe);
745
746 *is_done = 1;
747
748 return 0;
749}
750
751const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = {
752 .prepare = usbhsf_ctrl_stage_end,
753 .try_run = usbhsf_ctrl_stage_end,
754};
755
756/*
757 * DMA fifo functions
758 */
759static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
760 struct usbhs_pkt *pkt)
761{
762 if (&usbhs_fifo_dma_push_handler == pkt->handler)
763 return fifo->tx_chan;
764
765 if (&usbhs_fifo_dma_pop_handler == pkt->handler)
766 return fifo->rx_chan;
767
768 return NULL;
769}
770
771static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv,
772 struct usbhs_pkt *pkt)
773{
774 struct usbhs_fifo *fifo;
775 int i;
776
777 usbhs_for_each_dfifo(priv, fifo, i) {
778 if (usbhsf_dma_chan_get(fifo, pkt) &&
779 !usbhsf_fifo_is_busy(fifo))
780 return fifo;
781 }
782
783 return NULL;
784}
785
786#define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE)
787#define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0)
788static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe,
789 struct usbhs_fifo *fifo,
790 u16 dreqe)
791{
792 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
793
794 usbhs_bset(priv, fifo->sel, DREQE, dreqe);
795}
796
797static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map)
798{
799 struct usbhs_pipe *pipe = pkt->pipe;
800 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
801 struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv);
802
803 return info->dma_map_ctrl(pkt, map);
804}
805
806static void usbhsf_dma_complete(void *arg);
807static void xfer_work(struct work_struct *work)
808{
809 struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work);
810 struct usbhs_pipe *pipe = pkt->pipe;
811 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
812 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
813 struct dma_async_tx_descriptor *desc;
814 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
815 struct device *dev = usbhs_priv_to_dev(priv);
816 enum dma_transfer_direction dir;
817
818 dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV;
819
820 desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual,
821 pkt->trans, dir,
822 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
823 if (!desc)
824 return;
825
826 desc->callback = usbhsf_dma_complete;
827 desc->callback_param = pipe;
828
829 pkt->cookie = dmaengine_submit(desc);
830 if (pkt->cookie < 0) {
831 dev_err(dev, "Failed to submit dma descriptor\n");
832 return;
833 }
834
835 dev_dbg(dev, " %s %d (%d/ %d)\n",
836 fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero);
837
838 usbhs_pipe_running(pipe, 1);
839 usbhsf_dma_start(pipe, fifo);
840 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans);
841 dma_async_issue_pending(chan);
842 usbhs_pipe_enable(pipe);
843}
844
845/*
846 * DMA push handler
847 */
848static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done)
849{
850 struct usbhs_pipe *pipe = pkt->pipe;
851 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
852 struct usbhs_fifo *fifo;
853 int len = pkt->length - pkt->actual;
854 int ret;
855 uintptr_t align_mask;
856
857 if (usbhs_pipe_is_busy(pipe))
858 return 0;
859
860 /* use PIO if packet is less than pio_dma_border or pipe is DCP */
861 if ((len < usbhs_get_dparam(priv, pio_dma_border)) ||
862 usbhs_pipe_is_dcp(pipe))
863 goto usbhsf_pio_prepare_push;
864
865 /* check data length if this driver don't use USB-DMAC */
866 if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7)
867 goto usbhsf_pio_prepare_push;
868
869 /* check buffer alignment */
870 align_mask = usbhs_get_dparam(priv, has_usb_dmac) ?
871 USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7;
872 if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask)
873 goto usbhsf_pio_prepare_push;
874
875 /* return at this time if the pipe is running */
876 if (usbhs_pipe_is_running(pipe))
877 return 0;
878
879 /* get enable DMA fifo */
880 fifo = usbhsf_get_dma_fifo(priv, pkt);
881 if (!fifo)
882 goto usbhsf_pio_prepare_push;
883
884 if (usbhsf_dma_map(pkt) < 0)
885 goto usbhsf_pio_prepare_push;
886
887 ret = usbhsf_fifo_select(pipe, fifo, 0);
888 if (ret < 0)
889 goto usbhsf_pio_prepare_push_unmap;
890
891 pkt->trans = len;
892
893 usbhsf_tx_irq_ctrl(pipe, 0);
894 INIT_WORK(&pkt->work, xfer_work);
895 schedule_work(&pkt->work);
896
897 return 0;
898
899usbhsf_pio_prepare_push_unmap:
900 usbhsf_dma_unmap(pkt);
901usbhsf_pio_prepare_push:
902 /*
903 * change handler to PIO
904 */
905 pkt->handler = &usbhs_fifo_pio_push_handler;
906
907 return pkt->handler->prepare(pkt, is_done);
908}
909
910static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done)
911{
912 struct usbhs_pipe *pipe = pkt->pipe;
913 int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe);
914
915 pkt->actual += pkt->trans;
916
917 if (pkt->actual < pkt->length)
918 *is_done = 0; /* there are remainder data */
919 else if (is_short)
920 *is_done = 1; /* short packet */
921 else
922 *is_done = !pkt->zero; /* send zero packet? */
923
924 usbhs_pipe_running(pipe, !*is_done);
925
926 usbhsf_dma_stop(pipe, pipe->fifo);
927 usbhsf_dma_unmap(pkt);
928 usbhsf_fifo_unselect(pipe, pipe->fifo);
929
930 if (!*is_done) {
931 /* change handler to PIO */
932 pkt->handler = &usbhs_fifo_pio_push_handler;
933 return pkt->handler->try_run(pkt, is_done);
934 }
935
936 return 0;
937}
938
939const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = {
940 .prepare = usbhsf_dma_prepare_push,
941 .dma_done = usbhsf_dma_push_done,
942};
943
944/*
945 * DMA pop handler
946 */
947
948static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt,
949 int *is_done)
950{
951 return usbhsf_prepare_pop(pkt, is_done);
952}
953
954static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt,
955 int *is_done)
956{
957 struct usbhs_pipe *pipe = pkt->pipe;
958 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
959 struct usbhs_fifo *fifo;
960 int ret;
961
962 if (usbhs_pipe_is_busy(pipe))
963 return 0;
964
965 /* use PIO if packet is less than pio_dma_border or pipe is DCP */
966 if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) ||
967 usbhs_pipe_is_dcp(pipe))
968 goto usbhsf_pio_prepare_pop;
969
970 fifo = usbhsf_get_dma_fifo(priv, pkt);
971 if (!fifo)
972 goto usbhsf_pio_prepare_pop;
973
974 if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1))
975 goto usbhsf_pio_prepare_pop;
976
977 usbhs_pipe_config_change_bfre(pipe, 1);
978
979 ret = usbhsf_fifo_select(pipe, fifo, 0);
980 if (ret < 0)
981 goto usbhsf_pio_prepare_pop;
982
983 if (usbhsf_dma_map(pkt) < 0)
984 goto usbhsf_pio_prepare_pop_unselect;
985
986 /* DMA */
987
988 /*
989 * usbhs_fifo_dma_pop_handler :: prepare
990 * enabled irq to come here.
991 * but it is no longer needed for DMA. disable it.
992 */
993 usbhsf_rx_irq_ctrl(pipe, 0);
994
995 pkt->trans = pkt->length;
996
997 INIT_WORK(&pkt->work, xfer_work);
998 schedule_work(&pkt->work);
999
1000 return 0;
1001
1002usbhsf_pio_prepare_pop_unselect:
1003 usbhsf_fifo_unselect(pipe, fifo);
1004usbhsf_pio_prepare_pop:
1005
1006 /*
1007 * change handler to PIO
1008 */
1009 pkt->handler = &usbhs_fifo_pio_pop_handler;
1010 usbhs_pipe_config_change_bfre(pipe, 0);
1011
1012 return pkt->handler->prepare(pkt, is_done);
1013}
1014
1015static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
1016{
1017 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1018
1019 if (usbhs_get_dparam(priv, has_usb_dmac))
1020 return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done);
1021 else
1022 return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done);
1023}
1024
1025static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
1026{
1027 struct usbhs_pipe *pipe = pkt->pipe;
1028 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1029 struct usbhs_fifo *fifo;
1030 int len, ret;
1031
1032 if (usbhs_pipe_is_busy(pipe))
1033 return 0;
1034
1035 if (usbhs_pipe_is_dcp(pipe))
1036 goto usbhsf_pio_prepare_pop;
1037
1038 /* get enable DMA fifo */
1039 fifo = usbhsf_get_dma_fifo(priv, pkt);
1040 if (!fifo)
1041 goto usbhsf_pio_prepare_pop;
1042
1043 if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
1044 goto usbhsf_pio_prepare_pop;
1045
1046 ret = usbhsf_fifo_select(pipe, fifo, 0);
1047 if (ret < 0)
1048 goto usbhsf_pio_prepare_pop;
1049
1050 /* use PIO if packet is less than pio_dma_border */
1051 len = usbhsf_fifo_rcv_len(priv, fifo);
1052 len = min(pkt->length - pkt->actual, len);
1053 if (len & 0x7) /* 8byte alignment */
1054 goto usbhsf_pio_prepare_pop_unselect;
1055
1056 if (len < usbhs_get_dparam(priv, pio_dma_border))
1057 goto usbhsf_pio_prepare_pop_unselect;
1058
1059 ret = usbhsf_fifo_barrier(priv, fifo);
1060 if (ret < 0)
1061 goto usbhsf_pio_prepare_pop_unselect;
1062
1063 if (usbhsf_dma_map(pkt) < 0)
1064 goto usbhsf_pio_prepare_pop_unselect;
1065
1066 /* DMA */
1067
1068 /*
1069 * usbhs_fifo_dma_pop_handler :: prepare
1070 * enabled irq to come here.
1071 * but it is no longer needed for DMA. disable it.
1072 */
1073 usbhsf_rx_irq_ctrl(pipe, 0);
1074
1075 pkt->trans = len;
1076
1077 INIT_WORK(&pkt->work, xfer_work);
1078 schedule_work(&pkt->work);
1079
1080 return 0;
1081
1082usbhsf_pio_prepare_pop_unselect:
1083 usbhsf_fifo_unselect(pipe, fifo);
1084usbhsf_pio_prepare_pop:
1085
1086 /*
1087 * change handler to PIO
1088 */
1089 pkt->handler = &usbhs_fifo_pio_pop_handler;
1090
1091 return pkt->handler->try_run(pkt, is_done);
1092}
1093
1094static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done)
1095{
1096 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1097
1098 BUG_ON(usbhs_get_dparam(priv, has_usb_dmac));
1099
1100 return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done);
1101}
1102
1103static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
1104{
1105 struct usbhs_pipe *pipe = pkt->pipe;
1106 int maxp = usbhs_pipe_get_maxpacket(pipe);
1107
1108 usbhsf_dma_stop(pipe, pipe->fifo);
1109 usbhsf_dma_unmap(pkt);
1110 usbhsf_fifo_unselect(pipe, pipe->fifo);
1111
1112 pkt->actual += pkt->trans;
1113
1114 if ((pkt->actual == pkt->length) || /* receive all data */
1115 (pkt->trans < maxp)) { /* short packet */
1116 *is_done = 1;
1117 usbhs_pipe_running(pipe, 0);
1118 } else {
1119 /* re-enable */
1120 usbhs_pipe_running(pipe, 0);
1121 usbhsf_prepare_pop(pkt, is_done);
1122 }
1123
1124 return 0;
1125}
1126
1127static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt,
1128 struct dma_chan *chan, int dtln)
1129{
1130 struct usbhs_pipe *pipe = pkt->pipe;
1131 struct dma_tx_state state;
1132 size_t received_size;
1133 int maxp = usbhs_pipe_get_maxpacket(pipe);
1134
1135 dmaengine_tx_status(chan, pkt->cookie, &state);
1136 received_size = pkt->length - state.residue;
1137
1138 if (dtln) {
1139 received_size -= USBHS_USB_DMAC_XFER_SIZE;
1140 received_size &= ~(maxp - 1);
1141 received_size += dtln;
1142 }
1143
1144 return received_size;
1145}
1146
1147static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt,
1148 int *is_done)
1149{
1150 struct usbhs_pipe *pipe = pkt->pipe;
1151 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1152 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
1153 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
1154 int rcv_len;
1155
1156 /*
1157 * Since the driver disables rx_irq in DMA mode, the interrupt handler
1158 * cannot the BRDYSTS. So, the function clears it here because the
1159 * driver may use PIO mode next time.
1160 */
1161 usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe));
1162
1163 rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
1164 usbhsf_fifo_clear(pipe, fifo);
1165 pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len);
1166
1167 usbhsf_dma_stop(pipe, fifo);
1168 usbhsf_dma_unmap(pkt);
1169 usbhsf_fifo_unselect(pipe, pipe->fifo);
1170
1171 /* The driver can assume the rx transaction is always "done" */
1172 *is_done = 1;
1173
1174 return 0;
1175}
1176
1177static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
1178{
1179 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1180
1181 if (usbhs_get_dparam(priv, has_usb_dmac))
1182 return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done);
1183 else
1184 return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done);
1185}
1186
1187const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = {
1188 .prepare = usbhsf_dma_prepare_pop,
1189 .try_run = usbhsf_dma_try_pop,
1190 .dma_done = usbhsf_dma_pop_done
1191};
1192
1193/*
1194 * DMA setting
1195 */
1196static bool usbhsf_dma_filter(struct dma_chan *chan, void *param)
1197{
1198 struct sh_dmae_slave *slave = param;
1199
1200 /*
1201 * FIXME
1202 *
1203 * usbhs doesn't recognize id = 0 as valid DMA
1204 */
1205 if (0 == slave->shdma_slave.slave_id)
1206 return false;
1207
1208 chan->private = slave;
1209
1210 return true;
1211}
1212
1213static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo)
1214{
1215 if (fifo->tx_chan)
1216 dma_release_channel(fifo->tx_chan);
1217 if (fifo->rx_chan)
1218 dma_release_channel(fifo->rx_chan);
1219
1220 fifo->tx_chan = NULL;
1221 fifo->rx_chan = NULL;
1222}
1223
1224static void usbhsf_dma_init_pdev(struct usbhs_fifo *fifo)
1225{
1226 dma_cap_mask_t mask;
1227
1228 dma_cap_zero(mask);
1229 dma_cap_set(DMA_SLAVE, mask);
1230 fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter,
1231 &fifo->tx_slave);
1232
1233 dma_cap_zero(mask);
1234 dma_cap_set(DMA_SLAVE, mask);
1235 fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter,
1236 &fifo->rx_slave);
1237}
1238
1239static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo,
1240 int channel)
1241{
1242 char name[16];
1243
1244 /*
1245 * To avoid complex handing for DnFIFOs, the driver uses each
1246 * DnFIFO as TX or RX direction (not bi-direction).
1247 * So, the driver uses odd channels for TX, even channels for RX.
1248 */
1249 snprintf(name, sizeof(name), "ch%d", channel);
1250 if (channel & 1) {
1251 fifo->tx_chan = dma_request_slave_channel_reason(dev, name);
1252 if (IS_ERR(fifo->tx_chan))
1253 fifo->tx_chan = NULL;
1254 } else {
1255 fifo->rx_chan = dma_request_slave_channel_reason(dev, name);
1256 if (IS_ERR(fifo->rx_chan))
1257 fifo->rx_chan = NULL;
1258 }
1259}
1260
1261static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo,
1262 int channel)
1263{
1264 struct device *dev = usbhs_priv_to_dev(priv);
1265
1266 if (dev->of_node)
1267 usbhsf_dma_init_dt(dev, fifo, channel);
1268 else
1269 usbhsf_dma_init_pdev(fifo);
1270
1271 if (fifo->tx_chan || fifo->rx_chan)
1272 dev_dbg(dev, "enable DMAEngine (%s%s%s)\n",
1273 fifo->name,
1274 fifo->tx_chan ? "[TX]" : " ",
1275 fifo->rx_chan ? "[RX]" : " ");
1276}
1277
1278/*
1279 * irq functions
1280 */
1281static int usbhsf_irq_empty(struct usbhs_priv *priv,
1282 struct usbhs_irq_state *irq_state)
1283{
1284 struct usbhs_pipe *pipe;
1285 struct device *dev = usbhs_priv_to_dev(priv);
1286 int i, ret;
1287
1288 if (!irq_state->bempsts) {
1289 dev_err(dev, "debug %s !!\n", __func__);
1290 return -EIO;
1291 }
1292
1293 dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts);
1294
1295 /*
1296 * search interrupted "pipe"
1297 * not "uep".
1298 */
1299 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
1300 if (!(irq_state->bempsts & (1 << i)))
1301 continue;
1302
1303 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
1304 if (ret < 0)
1305 dev_err(dev, "irq_empty run_error %d : %d\n", i, ret);
1306 }
1307
1308 return 0;
1309}
1310
1311static int usbhsf_irq_ready(struct usbhs_priv *priv,
1312 struct usbhs_irq_state *irq_state)
1313{
1314 struct usbhs_pipe *pipe;
1315 struct device *dev = usbhs_priv_to_dev(priv);
1316 int i, ret;
1317
1318 if (!irq_state->brdysts) {
1319 dev_err(dev, "debug %s !!\n", __func__);
1320 return -EIO;
1321 }
1322
1323 dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts);
1324
1325 /*
1326 * search interrupted "pipe"
1327 * not "uep".
1328 */
1329 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
1330 if (!(irq_state->brdysts & (1 << i)))
1331 continue;
1332
1333 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
1334 if (ret < 0)
1335 dev_err(dev, "irq_ready run_error %d : %d\n", i, ret);
1336 }
1337
1338 return 0;
1339}
1340
1341static void usbhsf_dma_complete(void *arg)
1342{
1343 struct usbhs_pipe *pipe = arg;
1344 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1345 struct device *dev = usbhs_priv_to_dev(priv);
1346 int ret;
1347
1348 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE);
1349 if (ret < 0)
1350 dev_err(dev, "dma_complete run_error %d : %d\n",
1351 usbhs_pipe_number(pipe), ret);
1352}
1353
1354void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe)
1355{
1356 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1357 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
1358
1359 /* clear DCP FIFO of transmission */
1360 if (usbhsf_fifo_select(pipe, fifo, 1) < 0)
1361 return;
1362 usbhsf_fifo_clear(pipe, fifo);
1363 usbhsf_fifo_unselect(pipe, fifo);
1364
1365 /* clear DCP FIFO of reception */
1366 if (usbhsf_fifo_select(pipe, fifo, 0) < 0)
1367 return;
1368 usbhsf_fifo_clear(pipe, fifo);
1369 usbhsf_fifo_unselect(pipe, fifo);
1370}
1371
1372/*
1373 * fifo init
1374 */
1375void usbhs_fifo_init(struct usbhs_priv *priv)
1376{
1377 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
1378 struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv);
1379 struct usbhs_fifo *dfifo;
1380 int i;
1381
1382 mod->irq_empty = usbhsf_irq_empty;
1383 mod->irq_ready = usbhsf_irq_ready;
1384 mod->irq_bempsts = 0;
1385 mod->irq_brdysts = 0;
1386
1387 cfifo->pipe = NULL;
1388 usbhs_for_each_dfifo(priv, dfifo, i)
1389 dfifo->pipe = NULL;
1390}
1391
1392void usbhs_fifo_quit(struct usbhs_priv *priv)
1393{
1394 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
1395
1396 mod->irq_empty = NULL;
1397 mod->irq_ready = NULL;
1398 mod->irq_bempsts = 0;
1399 mod->irq_brdysts = 0;
1400}
1401
1402#define __USBHS_DFIFO_INIT(priv, fifo, channel, fifo_port) \
1403do { \
1404 fifo = usbhsf_get_dnfifo(priv, channel); \
1405 fifo->name = "D"#channel"FIFO"; \
1406 fifo->port = fifo_port; \
1407 fifo->sel = D##channel##FIFOSEL; \
1408 fifo->ctr = D##channel##FIFOCTR; \
1409 fifo->tx_slave.shdma_slave.slave_id = \
1410 usbhs_get_dparam(priv, d##channel##_tx_id); \
1411 fifo->rx_slave.shdma_slave.slave_id = \
1412 usbhs_get_dparam(priv, d##channel##_rx_id); \
1413 usbhsf_dma_init(priv, fifo, channel); \
1414} while (0)
1415
1416#define USBHS_DFIFO_INIT(priv, fifo, channel) \
1417 __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO)
1418#define USBHS_DFIFO_INIT_NO_PORT(priv, fifo, channel) \
1419 __USBHS_DFIFO_INIT(priv, fifo, channel, 0)
1420
1421int usbhs_fifo_probe(struct usbhs_priv *priv)
1422{
1423 struct usbhs_fifo *fifo;
1424
1425 /* CFIFO */
1426 fifo = usbhsf_get_cfifo(priv);
1427 fifo->name = "CFIFO";
1428 fifo->port = CFIFO;
1429 fifo->sel = CFIFOSEL;
1430 fifo->ctr = CFIFOCTR;
1431
1432 /* DFIFO */
1433 USBHS_DFIFO_INIT(priv, fifo, 0);
1434 USBHS_DFIFO_INIT(priv, fifo, 1);
1435 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 2);
1436 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 3);
1437
1438 return 0;
1439}
1440
1441void usbhs_fifo_remove(struct usbhs_priv *priv)
1442{
1443 struct usbhs_fifo *fifo;
1444 int i;
1445
1446 usbhs_for_each_dfifo(priv, fifo, i)
1447 usbhsf_dma_quit(priv, fifo);
1448}
1/*
2 * Renesas USB driver
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 *
16 */
17#include <linux/delay.h>
18#include <linux/io.h>
19#include <linux/scatterlist.h>
20#include "common.h"
21#include "pipe.h"
22
23#define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo))
24#define usbhsf_is_cfifo(p, f) (usbhsf_get_cfifo(p) == f)
25
26#define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */
27
28/*
29 * packet initialize
30 */
31void usbhs_pkt_init(struct usbhs_pkt *pkt)
32{
33 INIT_LIST_HEAD(&pkt->node);
34}
35
36/*
37 * packet control function
38 */
39static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done)
40{
41 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
42 struct device *dev = usbhs_priv_to_dev(priv);
43
44 dev_err(dev, "null handler\n");
45
46 return -EINVAL;
47}
48
49static const struct usbhs_pkt_handle usbhsf_null_handler = {
50 .prepare = usbhsf_null_handle,
51 .try_run = usbhsf_null_handle,
52};
53
54void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
55 void (*done)(struct usbhs_priv *priv,
56 struct usbhs_pkt *pkt),
57 void *buf, int len, int zero, int sequence)
58{
59 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
60 struct device *dev = usbhs_priv_to_dev(priv);
61 unsigned long flags;
62
63 if (!done) {
64 dev_err(dev, "no done function\n");
65 return;
66 }
67
68 /******************** spin lock ********************/
69 usbhs_lock(priv, flags);
70
71 if (!pipe->handler) {
72 dev_err(dev, "no handler function\n");
73 pipe->handler = &usbhsf_null_handler;
74 }
75
76 list_move_tail(&pkt->node, &pipe->list);
77
78 /*
79 * each pkt must hold own handler.
80 * because handler might be changed by its situation.
81 * dma handler -> pio handler.
82 */
83 pkt->pipe = pipe;
84 pkt->buf = buf;
85 pkt->handler = pipe->handler;
86 pkt->length = len;
87 pkt->zero = zero;
88 pkt->actual = 0;
89 pkt->done = done;
90 pkt->sequence = sequence;
91
92 usbhs_unlock(priv, flags);
93 /******************** spin unlock ******************/
94}
95
96static void __usbhsf_pkt_del(struct usbhs_pkt *pkt)
97{
98 list_del_init(&pkt->node);
99}
100
101static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
102{
103 return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node);
104}
105
106static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
107 struct usbhs_fifo *fifo);
108static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
109 struct usbhs_fifo *fifo);
110static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
111 struct usbhs_pkt *pkt);
112#define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1)
113#define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0)
114static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map);
115struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt)
116{
117 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
118 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
119 unsigned long flags;
120
121 /******************** spin lock ********************/
122 usbhs_lock(priv, flags);
123
124 usbhs_pipe_disable(pipe);
125
126 if (!pkt)
127 pkt = __usbhsf_pkt_get(pipe);
128
129 if (pkt) {
130 struct dma_chan *chan = NULL;
131
132 if (fifo)
133 chan = usbhsf_dma_chan_get(fifo, pkt);
134 if (chan) {
135 dmaengine_terminate_all(chan);
136 usbhsf_fifo_clear(pipe, fifo);
137 usbhsf_dma_unmap(pkt);
138 }
139
140 __usbhsf_pkt_del(pkt);
141 }
142
143 if (fifo)
144 usbhsf_fifo_unselect(pipe, fifo);
145
146 usbhs_unlock(priv, flags);
147 /******************** spin unlock ******************/
148
149 return pkt;
150}
151
152enum {
153 USBHSF_PKT_PREPARE,
154 USBHSF_PKT_TRY_RUN,
155 USBHSF_PKT_DMA_DONE,
156};
157
158static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type)
159{
160 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
161 struct usbhs_pkt *pkt;
162 struct device *dev = usbhs_priv_to_dev(priv);
163 int (*func)(struct usbhs_pkt *pkt, int *is_done);
164 unsigned long flags;
165 int ret = 0;
166 int is_done = 0;
167
168 /******************** spin lock ********************/
169 usbhs_lock(priv, flags);
170
171 pkt = __usbhsf_pkt_get(pipe);
172 if (!pkt)
173 goto __usbhs_pkt_handler_end;
174
175 switch (type) {
176 case USBHSF_PKT_PREPARE:
177 func = pkt->handler->prepare;
178 break;
179 case USBHSF_PKT_TRY_RUN:
180 func = pkt->handler->try_run;
181 break;
182 case USBHSF_PKT_DMA_DONE:
183 func = pkt->handler->dma_done;
184 break;
185 default:
186 dev_err(dev, "unknown pkt handler\n");
187 goto __usbhs_pkt_handler_end;
188 }
189
190 if (likely(func))
191 ret = func(pkt, &is_done);
192
193 if (is_done)
194 __usbhsf_pkt_del(pkt);
195
196__usbhs_pkt_handler_end:
197 usbhs_unlock(priv, flags);
198 /******************** spin unlock ******************/
199
200 if (is_done) {
201 pkt->done(priv, pkt);
202 usbhs_pkt_start(pipe);
203 }
204
205 return ret;
206}
207
208void usbhs_pkt_start(struct usbhs_pipe *pipe)
209{
210 usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE);
211}
212
213/*
214 * irq enable/disable function
215 */
216#define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e)
217#define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e)
218#define usbhsf_irq_callback_ctrl(pipe, status, enable) \
219 ({ \
220 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \
221 struct usbhs_mod *mod = usbhs_mod_get_current(priv); \
222 u16 status = (1 << usbhs_pipe_number(pipe)); \
223 if (!mod) \
224 return; \
225 if (enable) \
226 mod->status |= status; \
227 else \
228 mod->status &= ~status; \
229 usbhs_irq_callback_update(priv, mod); \
230 })
231
232static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
233{
234 /*
235 * And DCP pipe can NOT use "ready interrupt" for "send"
236 * it should use "empty" interrupt.
237 * see
238 * "Operation" - "Interrupt Function" - "BRDY Interrupt"
239 *
240 * on the other hand, normal pipe can use "ready interrupt" for "send"
241 * even though it is single/double buffer
242 */
243 if (usbhs_pipe_is_dcp(pipe))
244 usbhsf_irq_empty_ctrl(pipe, enable);
245 else
246 usbhsf_irq_ready_ctrl(pipe, enable);
247}
248
249static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
250{
251 usbhsf_irq_ready_ctrl(pipe, enable);
252}
253
254/*
255 * FIFO ctrl
256 */
257static void usbhsf_send_terminator(struct usbhs_pipe *pipe,
258 struct usbhs_fifo *fifo)
259{
260 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
261
262 usbhs_bset(priv, fifo->ctr, BVAL, BVAL);
263}
264
265static int usbhsf_fifo_barrier(struct usbhs_priv *priv,
266 struct usbhs_fifo *fifo)
267{
268 int timeout = 1024;
269
270 do {
271 /* The FIFO port is accessible */
272 if (usbhs_read(priv, fifo->ctr) & FRDY)
273 return 0;
274
275 udelay(10);
276 } while (timeout--);
277
278 return -EBUSY;
279}
280
281static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
282 struct usbhs_fifo *fifo)
283{
284 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
285
286 if (!usbhs_pipe_is_dcp(pipe))
287 usbhsf_fifo_barrier(priv, fifo);
288
289 usbhs_write(priv, fifo->ctr, BCLR);
290}
291
292static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv,
293 struct usbhs_fifo *fifo)
294{
295 return usbhs_read(priv, fifo->ctr) & DTLN_MASK;
296}
297
298static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
299 struct usbhs_fifo *fifo)
300{
301 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
302
303 usbhs_pipe_select_fifo(pipe, NULL);
304 usbhs_write(priv, fifo->sel, 0);
305}
306
307static int usbhsf_fifo_select(struct usbhs_pipe *pipe,
308 struct usbhs_fifo *fifo,
309 int write)
310{
311 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
312 struct device *dev = usbhs_priv_to_dev(priv);
313 int timeout = 1024;
314 u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */
315 u16 base = usbhs_pipe_number(pipe); /* CURPIPE */
316
317 if (usbhs_pipe_is_busy(pipe) ||
318 usbhsf_fifo_is_busy(fifo))
319 return -EBUSY;
320
321 if (usbhs_pipe_is_dcp(pipe)) {
322 base |= (1 == write) << 5; /* ISEL */
323
324 if (usbhs_mod_is_host(priv))
325 usbhs_dcp_dir_for_host(pipe, write);
326 }
327
328 /* "base" will be used below */
329 if (usbhs_get_dparam(priv, has_sudmac) && !usbhsf_is_cfifo(priv, fifo))
330 usbhs_write(priv, fifo->sel, base);
331 else
332 usbhs_write(priv, fifo->sel, base | MBW_32);
333
334 /* check ISEL and CURPIPE value */
335 while (timeout--) {
336 if (base == (mask & usbhs_read(priv, fifo->sel))) {
337 usbhs_pipe_select_fifo(pipe, fifo);
338 return 0;
339 }
340 udelay(10);
341 }
342
343 dev_err(dev, "fifo select error\n");
344
345 return -EIO;
346}
347
348/*
349 * DCP status stage
350 */
351static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done)
352{
353 struct usbhs_pipe *pipe = pkt->pipe;
354 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
355 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
356 struct device *dev = usbhs_priv_to_dev(priv);
357 int ret;
358
359 usbhs_pipe_disable(pipe);
360
361 ret = usbhsf_fifo_select(pipe, fifo, 1);
362 if (ret < 0) {
363 dev_err(dev, "%s() faile\n", __func__);
364 return ret;
365 }
366
367 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
368
369 usbhsf_fifo_clear(pipe, fifo);
370 usbhsf_send_terminator(pipe, fifo);
371
372 usbhsf_fifo_unselect(pipe, fifo);
373
374 usbhsf_tx_irq_ctrl(pipe, 1);
375 usbhs_pipe_enable(pipe);
376
377 return ret;
378}
379
380static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done)
381{
382 struct usbhs_pipe *pipe = pkt->pipe;
383 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
384 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
385 struct device *dev = usbhs_priv_to_dev(priv);
386 int ret;
387
388 usbhs_pipe_disable(pipe);
389
390 ret = usbhsf_fifo_select(pipe, fifo, 0);
391 if (ret < 0) {
392 dev_err(dev, "%s() fail\n", __func__);
393 return ret;
394 }
395
396 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
397 usbhsf_fifo_clear(pipe, fifo);
398
399 usbhsf_fifo_unselect(pipe, fifo);
400
401 usbhsf_rx_irq_ctrl(pipe, 1);
402 usbhs_pipe_enable(pipe);
403
404 return ret;
405
406}
407
408static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done)
409{
410 struct usbhs_pipe *pipe = pkt->pipe;
411
412 if (pkt->handler == &usbhs_dcp_status_stage_in_handler)
413 usbhsf_tx_irq_ctrl(pipe, 0);
414 else
415 usbhsf_rx_irq_ctrl(pipe, 0);
416
417 pkt->actual = pkt->length;
418 *is_done = 1;
419
420 return 0;
421}
422
423const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = {
424 .prepare = usbhs_dcp_dir_switch_to_write,
425 .try_run = usbhs_dcp_dir_switch_done,
426};
427
428const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = {
429 .prepare = usbhs_dcp_dir_switch_to_read,
430 .try_run = usbhs_dcp_dir_switch_done,
431};
432
433/*
434 * DCP data stage (push)
435 */
436static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done)
437{
438 struct usbhs_pipe *pipe = pkt->pipe;
439
440 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
441
442 /*
443 * change handler to PIO push
444 */
445 pkt->handler = &usbhs_fifo_pio_push_handler;
446
447 return pkt->handler->prepare(pkt, is_done);
448}
449
450const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = {
451 .prepare = usbhsf_dcp_data_stage_try_push,
452};
453
454/*
455 * DCP data stage (pop)
456 */
457static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt,
458 int *is_done)
459{
460 struct usbhs_pipe *pipe = pkt->pipe;
461 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
462 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
463
464 if (usbhs_pipe_is_busy(pipe))
465 return 0;
466
467 /*
468 * prepare pop for DCP should
469 * - change DCP direction,
470 * - clear fifo
471 * - DATA1
472 */
473 usbhs_pipe_disable(pipe);
474
475 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
476
477 usbhsf_fifo_select(pipe, fifo, 0);
478 usbhsf_fifo_clear(pipe, fifo);
479 usbhsf_fifo_unselect(pipe, fifo);
480
481 /*
482 * change handler to PIO pop
483 */
484 pkt->handler = &usbhs_fifo_pio_pop_handler;
485
486 return pkt->handler->prepare(pkt, is_done);
487}
488
489const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = {
490 .prepare = usbhsf_dcp_data_stage_prepare_pop,
491};
492
493/*
494 * PIO push handler
495 */
496static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done)
497{
498 struct usbhs_pipe *pipe = pkt->pipe;
499 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
500 struct device *dev = usbhs_priv_to_dev(priv);
501 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
502 void __iomem *addr = priv->base + fifo->port;
503 u8 *buf;
504 int maxp = usbhs_pipe_get_maxpacket(pipe);
505 int total_len;
506 int i, ret, len;
507 int is_short;
508
509 usbhs_pipe_data_sequence(pipe, pkt->sequence);
510 pkt->sequence = -1; /* -1 sequence will be ignored */
511
512 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
513
514 ret = usbhsf_fifo_select(pipe, fifo, 1);
515 if (ret < 0)
516 return 0;
517
518 ret = usbhs_pipe_is_accessible(pipe);
519 if (ret < 0) {
520 /* inaccessible pipe is not an error */
521 ret = 0;
522 goto usbhs_fifo_write_busy;
523 }
524
525 ret = usbhsf_fifo_barrier(priv, fifo);
526 if (ret < 0)
527 goto usbhs_fifo_write_busy;
528
529 buf = pkt->buf + pkt->actual;
530 len = pkt->length - pkt->actual;
531 len = min(len, maxp);
532 total_len = len;
533 is_short = total_len < maxp;
534
535 /*
536 * FIXME
537 *
538 * 32-bit access only
539 */
540 if (len >= 4 && !((unsigned long)buf & 0x03)) {
541 iowrite32_rep(addr, buf, len / 4);
542 len %= 4;
543 buf += total_len - len;
544 }
545
546 /* the rest operation */
547 for (i = 0; i < len; i++)
548 iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
549
550 /*
551 * variable update
552 */
553 pkt->actual += total_len;
554
555 if (pkt->actual < pkt->length)
556 *is_done = 0; /* there are remainder data */
557 else if (is_short)
558 *is_done = 1; /* short packet */
559 else
560 *is_done = !pkt->zero; /* send zero packet ? */
561
562 /*
563 * pipe/irq handling
564 */
565 if (is_short)
566 usbhsf_send_terminator(pipe, fifo);
567
568 usbhsf_tx_irq_ctrl(pipe, !*is_done);
569 usbhs_pipe_running(pipe, !*is_done);
570 usbhs_pipe_enable(pipe);
571
572 dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n",
573 usbhs_pipe_number(pipe),
574 pkt->length, pkt->actual, *is_done, pkt->zero);
575
576 usbhsf_fifo_unselect(pipe, fifo);
577
578 return 0;
579
580usbhs_fifo_write_busy:
581 usbhsf_fifo_unselect(pipe, fifo);
582
583 /*
584 * pipe is busy.
585 * retry in interrupt
586 */
587 usbhsf_tx_irq_ctrl(pipe, 1);
588 usbhs_pipe_running(pipe, 1);
589
590 return ret;
591}
592
593static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done)
594{
595 if (usbhs_pipe_is_running(pkt->pipe))
596 return 0;
597
598 return usbhsf_pio_try_push(pkt, is_done);
599}
600
601const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = {
602 .prepare = usbhsf_pio_prepare_push,
603 .try_run = usbhsf_pio_try_push,
604};
605
606/*
607 * PIO pop handler
608 */
609static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
610{
611 struct usbhs_pipe *pipe = pkt->pipe;
612 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
613 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
614
615 if (usbhs_pipe_is_busy(pipe))
616 return 0;
617
618 if (usbhs_pipe_is_running(pipe))
619 return 0;
620
621 /*
622 * pipe enable to prepare packet receive
623 */
624 usbhs_pipe_data_sequence(pipe, pkt->sequence);
625 pkt->sequence = -1; /* -1 sequence will be ignored */
626
627 if (usbhs_pipe_is_dcp(pipe))
628 usbhsf_fifo_clear(pipe, fifo);
629
630 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
631 usbhs_pipe_enable(pipe);
632 usbhs_pipe_running(pipe, 1);
633 usbhsf_rx_irq_ctrl(pipe, 1);
634
635 return 0;
636}
637
638static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done)
639{
640 struct usbhs_pipe *pipe = pkt->pipe;
641 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
642 struct device *dev = usbhs_priv_to_dev(priv);
643 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
644 void __iomem *addr = priv->base + fifo->port;
645 u8 *buf;
646 u32 data = 0;
647 int maxp = usbhs_pipe_get_maxpacket(pipe);
648 int rcv_len, len;
649 int i, ret;
650 int total_len = 0;
651
652 ret = usbhsf_fifo_select(pipe, fifo, 0);
653 if (ret < 0)
654 return 0;
655
656 ret = usbhsf_fifo_barrier(priv, fifo);
657 if (ret < 0)
658 goto usbhs_fifo_read_busy;
659
660 rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
661
662 buf = pkt->buf + pkt->actual;
663 len = pkt->length - pkt->actual;
664 len = min(len, rcv_len);
665 total_len = len;
666
667 /*
668 * update actual length first here to decide disable pipe.
669 * if this pipe keeps BUF status and all data were popped,
670 * then, next interrupt/token will be issued again
671 */
672 pkt->actual += total_len;
673
674 if ((pkt->actual == pkt->length) || /* receive all data */
675 (total_len < maxp)) { /* short packet */
676 *is_done = 1;
677 usbhsf_rx_irq_ctrl(pipe, 0);
678 usbhs_pipe_running(pipe, 0);
679 /*
680 * If function mode, since this controller is possible to enter
681 * Control Write status stage at this timing, this driver
682 * should not disable the pipe. If such a case happens, this
683 * controller is not able to complete the status stage.
684 */
685 if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe))
686 usbhs_pipe_disable(pipe); /* disable pipe first */
687 }
688
689 /*
690 * Buffer clear if Zero-Length packet
691 *
692 * see
693 * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function"
694 */
695 if (0 == rcv_len) {
696 pkt->zero = 1;
697 usbhsf_fifo_clear(pipe, fifo);
698 goto usbhs_fifo_read_end;
699 }
700
701 /*
702 * FIXME
703 *
704 * 32-bit access only
705 */
706 if (len >= 4 && !((unsigned long)buf & 0x03)) {
707 ioread32_rep(addr, buf, len / 4);
708 len %= 4;
709 buf += total_len - len;
710 }
711
712 /* the rest operation */
713 for (i = 0; i < len; i++) {
714 if (!(i & 0x03))
715 data = ioread32(addr);
716
717 buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
718 }
719
720usbhs_fifo_read_end:
721 dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n",
722 usbhs_pipe_number(pipe),
723 pkt->length, pkt->actual, *is_done, pkt->zero);
724
725usbhs_fifo_read_busy:
726 usbhsf_fifo_unselect(pipe, fifo);
727
728 return ret;
729}
730
731const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = {
732 .prepare = usbhsf_prepare_pop,
733 .try_run = usbhsf_pio_try_pop,
734};
735
736/*
737 * DCP ctrol statge handler
738 */
739static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done)
740{
741 usbhs_dcp_control_transfer_done(pkt->pipe);
742
743 *is_done = 1;
744
745 return 0;
746}
747
748const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = {
749 .prepare = usbhsf_ctrl_stage_end,
750 .try_run = usbhsf_ctrl_stage_end,
751};
752
753/*
754 * DMA fifo functions
755 */
756static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
757 struct usbhs_pkt *pkt)
758{
759 if (&usbhs_fifo_dma_push_handler == pkt->handler)
760 return fifo->tx_chan;
761
762 if (&usbhs_fifo_dma_pop_handler == pkt->handler)
763 return fifo->rx_chan;
764
765 return NULL;
766}
767
768static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv,
769 struct usbhs_pkt *pkt)
770{
771 struct usbhs_fifo *fifo;
772 int i;
773
774 usbhs_for_each_dfifo(priv, fifo, i) {
775 if (usbhsf_dma_chan_get(fifo, pkt) &&
776 !usbhsf_fifo_is_busy(fifo))
777 return fifo;
778 }
779
780 return NULL;
781}
782
783#define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE)
784#define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0)
785static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe,
786 struct usbhs_fifo *fifo,
787 u16 dreqe)
788{
789 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
790
791 usbhs_bset(priv, fifo->sel, DREQE, dreqe);
792}
793
794static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map)
795{
796 struct usbhs_pipe *pipe = pkt->pipe;
797 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
798 struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv);
799 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
800 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
801
802 return info->dma_map_ctrl(chan->device->dev, pkt, map);
803}
804
805static void usbhsf_dma_complete(void *arg);
806static void xfer_work(struct work_struct *work)
807{
808 struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work);
809 struct usbhs_pipe *pipe = pkt->pipe;
810 struct usbhs_fifo *fifo;
811 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
812 struct dma_async_tx_descriptor *desc;
813 struct dma_chan *chan;
814 struct device *dev = usbhs_priv_to_dev(priv);
815 enum dma_transfer_direction dir;
816 unsigned long flags;
817
818 usbhs_lock(priv, flags);
819 fifo = usbhs_pipe_to_fifo(pipe);
820 if (!fifo)
821 goto xfer_work_end;
822
823 chan = usbhsf_dma_chan_get(fifo, pkt);
824 dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV;
825
826 desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual,
827 pkt->trans, dir,
828 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
829 if (!desc)
830 goto xfer_work_end;
831
832 desc->callback = usbhsf_dma_complete;
833 desc->callback_param = pipe;
834
835 pkt->cookie = dmaengine_submit(desc);
836 if (pkt->cookie < 0) {
837 dev_err(dev, "Failed to submit dma descriptor\n");
838 goto xfer_work_end;
839 }
840
841 dev_dbg(dev, " %s %d (%d/ %d)\n",
842 fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero);
843
844 usbhs_pipe_running(pipe, 1);
845 usbhsf_dma_start(pipe, fifo);
846 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans);
847 dma_async_issue_pending(chan);
848 usbhs_pipe_enable(pipe);
849
850xfer_work_end:
851 usbhs_unlock(priv, flags);
852}
853
854/*
855 * DMA push handler
856 */
857static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done)
858{
859 struct usbhs_pipe *pipe = pkt->pipe;
860 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
861 struct usbhs_fifo *fifo;
862 int len = pkt->length - pkt->actual;
863 int ret;
864 uintptr_t align_mask;
865
866 if (usbhs_pipe_is_busy(pipe))
867 return 0;
868
869 /* use PIO if packet is less than pio_dma_border or pipe is DCP */
870 if ((len < usbhs_get_dparam(priv, pio_dma_border)) ||
871 usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
872 goto usbhsf_pio_prepare_push;
873
874 /* check data length if this driver don't use USB-DMAC */
875 if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7)
876 goto usbhsf_pio_prepare_push;
877
878 /* check buffer alignment */
879 align_mask = usbhs_get_dparam(priv, has_usb_dmac) ?
880 USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7;
881 if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask)
882 goto usbhsf_pio_prepare_push;
883
884 /* return at this time if the pipe is running */
885 if (usbhs_pipe_is_running(pipe))
886 return 0;
887
888 /* get enable DMA fifo */
889 fifo = usbhsf_get_dma_fifo(priv, pkt);
890 if (!fifo)
891 goto usbhsf_pio_prepare_push;
892
893 ret = usbhsf_fifo_select(pipe, fifo, 0);
894 if (ret < 0)
895 goto usbhsf_pio_prepare_push;
896
897 if (usbhsf_dma_map(pkt) < 0)
898 goto usbhsf_pio_prepare_push_unselect;
899
900 pkt->trans = len;
901
902 usbhsf_tx_irq_ctrl(pipe, 0);
903 INIT_WORK(&pkt->work, xfer_work);
904 schedule_work(&pkt->work);
905
906 return 0;
907
908usbhsf_pio_prepare_push_unselect:
909 usbhsf_fifo_unselect(pipe, fifo);
910usbhsf_pio_prepare_push:
911 /*
912 * change handler to PIO
913 */
914 pkt->handler = &usbhs_fifo_pio_push_handler;
915
916 return pkt->handler->prepare(pkt, is_done);
917}
918
919static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done)
920{
921 struct usbhs_pipe *pipe = pkt->pipe;
922 int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe);
923
924 pkt->actual += pkt->trans;
925
926 if (pkt->actual < pkt->length)
927 *is_done = 0; /* there are remainder data */
928 else if (is_short)
929 *is_done = 1; /* short packet */
930 else
931 *is_done = !pkt->zero; /* send zero packet? */
932
933 usbhs_pipe_running(pipe, !*is_done);
934
935 usbhsf_dma_stop(pipe, pipe->fifo);
936 usbhsf_dma_unmap(pkt);
937 usbhsf_fifo_unselect(pipe, pipe->fifo);
938
939 if (!*is_done) {
940 /* change handler to PIO */
941 pkt->handler = &usbhs_fifo_pio_push_handler;
942 return pkt->handler->try_run(pkt, is_done);
943 }
944
945 return 0;
946}
947
948const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = {
949 .prepare = usbhsf_dma_prepare_push,
950 .dma_done = usbhsf_dma_push_done,
951};
952
953/*
954 * DMA pop handler
955 */
956
957static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt,
958 int *is_done)
959{
960 return usbhsf_prepare_pop(pkt, is_done);
961}
962
963static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt,
964 int *is_done)
965{
966 struct usbhs_pipe *pipe = pkt->pipe;
967 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
968 struct usbhs_fifo *fifo;
969 int ret;
970
971 if (usbhs_pipe_is_busy(pipe))
972 return 0;
973
974 /* use PIO if packet is less than pio_dma_border or pipe is DCP */
975 if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) ||
976 usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
977 goto usbhsf_pio_prepare_pop;
978
979 fifo = usbhsf_get_dma_fifo(priv, pkt);
980 if (!fifo)
981 goto usbhsf_pio_prepare_pop;
982
983 if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1))
984 goto usbhsf_pio_prepare_pop;
985
986 usbhs_pipe_config_change_bfre(pipe, 1);
987
988 ret = usbhsf_fifo_select(pipe, fifo, 0);
989 if (ret < 0)
990 goto usbhsf_pio_prepare_pop;
991
992 if (usbhsf_dma_map(pkt) < 0)
993 goto usbhsf_pio_prepare_pop_unselect;
994
995 /* DMA */
996
997 /*
998 * usbhs_fifo_dma_pop_handler :: prepare
999 * enabled irq to come here.
1000 * but it is no longer needed for DMA. disable it.
1001 */
1002 usbhsf_rx_irq_ctrl(pipe, 0);
1003
1004 pkt->trans = pkt->length;
1005
1006 INIT_WORK(&pkt->work, xfer_work);
1007 schedule_work(&pkt->work);
1008
1009 return 0;
1010
1011usbhsf_pio_prepare_pop_unselect:
1012 usbhsf_fifo_unselect(pipe, fifo);
1013usbhsf_pio_prepare_pop:
1014
1015 /*
1016 * change handler to PIO
1017 */
1018 pkt->handler = &usbhs_fifo_pio_pop_handler;
1019 usbhs_pipe_config_change_bfre(pipe, 0);
1020
1021 return pkt->handler->prepare(pkt, is_done);
1022}
1023
1024static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
1025{
1026 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1027
1028 if (usbhs_get_dparam(priv, has_usb_dmac))
1029 return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done);
1030 else
1031 return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done);
1032}
1033
1034static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
1035{
1036 struct usbhs_pipe *pipe = pkt->pipe;
1037 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1038 struct usbhs_fifo *fifo;
1039 int len, ret;
1040
1041 if (usbhs_pipe_is_busy(pipe))
1042 return 0;
1043
1044 if (usbhs_pipe_is_dcp(pipe))
1045 goto usbhsf_pio_prepare_pop;
1046
1047 /* get enable DMA fifo */
1048 fifo = usbhsf_get_dma_fifo(priv, pkt);
1049 if (!fifo)
1050 goto usbhsf_pio_prepare_pop;
1051
1052 if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
1053 goto usbhsf_pio_prepare_pop;
1054
1055 ret = usbhsf_fifo_select(pipe, fifo, 0);
1056 if (ret < 0)
1057 goto usbhsf_pio_prepare_pop;
1058
1059 /* use PIO if packet is less than pio_dma_border */
1060 len = usbhsf_fifo_rcv_len(priv, fifo);
1061 len = min(pkt->length - pkt->actual, len);
1062 if (len & 0x7) /* 8byte alignment */
1063 goto usbhsf_pio_prepare_pop_unselect;
1064
1065 if (len < usbhs_get_dparam(priv, pio_dma_border))
1066 goto usbhsf_pio_prepare_pop_unselect;
1067
1068 ret = usbhsf_fifo_barrier(priv, fifo);
1069 if (ret < 0)
1070 goto usbhsf_pio_prepare_pop_unselect;
1071
1072 if (usbhsf_dma_map(pkt) < 0)
1073 goto usbhsf_pio_prepare_pop_unselect;
1074
1075 /* DMA */
1076
1077 /*
1078 * usbhs_fifo_dma_pop_handler :: prepare
1079 * enabled irq to come here.
1080 * but it is no longer needed for DMA. disable it.
1081 */
1082 usbhsf_rx_irq_ctrl(pipe, 0);
1083
1084 pkt->trans = len;
1085
1086 INIT_WORK(&pkt->work, xfer_work);
1087 schedule_work(&pkt->work);
1088
1089 return 0;
1090
1091usbhsf_pio_prepare_pop_unselect:
1092 usbhsf_fifo_unselect(pipe, fifo);
1093usbhsf_pio_prepare_pop:
1094
1095 /*
1096 * change handler to PIO
1097 */
1098 pkt->handler = &usbhs_fifo_pio_pop_handler;
1099
1100 return pkt->handler->try_run(pkt, is_done);
1101}
1102
1103static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done)
1104{
1105 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1106
1107 BUG_ON(usbhs_get_dparam(priv, has_usb_dmac));
1108
1109 return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done);
1110}
1111
1112static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
1113{
1114 struct usbhs_pipe *pipe = pkt->pipe;
1115 int maxp = usbhs_pipe_get_maxpacket(pipe);
1116
1117 usbhsf_dma_stop(pipe, pipe->fifo);
1118 usbhsf_dma_unmap(pkt);
1119 usbhsf_fifo_unselect(pipe, pipe->fifo);
1120
1121 pkt->actual += pkt->trans;
1122
1123 if ((pkt->actual == pkt->length) || /* receive all data */
1124 (pkt->trans < maxp)) { /* short packet */
1125 *is_done = 1;
1126 usbhs_pipe_running(pipe, 0);
1127 } else {
1128 /* re-enable */
1129 usbhs_pipe_running(pipe, 0);
1130 usbhsf_prepare_pop(pkt, is_done);
1131 }
1132
1133 return 0;
1134}
1135
1136static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt,
1137 struct dma_chan *chan, int dtln)
1138{
1139 struct usbhs_pipe *pipe = pkt->pipe;
1140 struct dma_tx_state state;
1141 size_t received_size;
1142 int maxp = usbhs_pipe_get_maxpacket(pipe);
1143
1144 dmaengine_tx_status(chan, pkt->cookie, &state);
1145 received_size = pkt->length - state.residue;
1146
1147 if (dtln) {
1148 received_size -= USBHS_USB_DMAC_XFER_SIZE;
1149 received_size &= ~(maxp - 1);
1150 received_size += dtln;
1151 }
1152
1153 return received_size;
1154}
1155
1156static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt,
1157 int *is_done)
1158{
1159 struct usbhs_pipe *pipe = pkt->pipe;
1160 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1161 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
1162 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
1163 int rcv_len;
1164
1165 /*
1166 * Since the driver disables rx_irq in DMA mode, the interrupt handler
1167 * cannot the BRDYSTS. So, the function clears it here because the
1168 * driver may use PIO mode next time.
1169 */
1170 usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe));
1171
1172 rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
1173 usbhsf_fifo_clear(pipe, fifo);
1174 pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len);
1175
1176 usbhsf_dma_stop(pipe, fifo);
1177 usbhsf_dma_unmap(pkt);
1178 usbhsf_fifo_unselect(pipe, pipe->fifo);
1179
1180 /* The driver can assume the rx transaction is always "done" */
1181 *is_done = 1;
1182
1183 return 0;
1184}
1185
1186static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
1187{
1188 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1189
1190 if (usbhs_get_dparam(priv, has_usb_dmac))
1191 return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done);
1192 else
1193 return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done);
1194}
1195
1196const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = {
1197 .prepare = usbhsf_dma_prepare_pop,
1198 .try_run = usbhsf_dma_try_pop,
1199 .dma_done = usbhsf_dma_pop_done
1200};
1201
1202/*
1203 * DMA setting
1204 */
1205static bool usbhsf_dma_filter(struct dma_chan *chan, void *param)
1206{
1207 struct sh_dmae_slave *slave = param;
1208
1209 /*
1210 * FIXME
1211 *
1212 * usbhs doesn't recognize id = 0 as valid DMA
1213 */
1214 if (0 == slave->shdma_slave.slave_id)
1215 return false;
1216
1217 chan->private = slave;
1218
1219 return true;
1220}
1221
1222static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo)
1223{
1224 if (fifo->tx_chan)
1225 dma_release_channel(fifo->tx_chan);
1226 if (fifo->rx_chan)
1227 dma_release_channel(fifo->rx_chan);
1228
1229 fifo->tx_chan = NULL;
1230 fifo->rx_chan = NULL;
1231}
1232
1233static void usbhsf_dma_init_pdev(struct usbhs_fifo *fifo)
1234{
1235 dma_cap_mask_t mask;
1236
1237 dma_cap_zero(mask);
1238 dma_cap_set(DMA_SLAVE, mask);
1239 fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter,
1240 &fifo->tx_slave);
1241
1242 dma_cap_zero(mask);
1243 dma_cap_set(DMA_SLAVE, mask);
1244 fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter,
1245 &fifo->rx_slave);
1246}
1247
1248static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo,
1249 int channel)
1250{
1251 char name[16];
1252
1253 /*
1254 * To avoid complex handing for DnFIFOs, the driver uses each
1255 * DnFIFO as TX or RX direction (not bi-direction).
1256 * So, the driver uses odd channels for TX, even channels for RX.
1257 */
1258 snprintf(name, sizeof(name), "ch%d", channel);
1259 if (channel & 1) {
1260 fifo->tx_chan = dma_request_slave_channel_reason(dev, name);
1261 if (IS_ERR(fifo->tx_chan))
1262 fifo->tx_chan = NULL;
1263 } else {
1264 fifo->rx_chan = dma_request_slave_channel_reason(dev, name);
1265 if (IS_ERR(fifo->rx_chan))
1266 fifo->rx_chan = NULL;
1267 }
1268}
1269
1270static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo,
1271 int channel)
1272{
1273 struct device *dev = usbhs_priv_to_dev(priv);
1274
1275 if (dev->of_node)
1276 usbhsf_dma_init_dt(dev, fifo, channel);
1277 else
1278 usbhsf_dma_init_pdev(fifo);
1279
1280 if (fifo->tx_chan || fifo->rx_chan)
1281 dev_dbg(dev, "enable DMAEngine (%s%s%s)\n",
1282 fifo->name,
1283 fifo->tx_chan ? "[TX]" : " ",
1284 fifo->rx_chan ? "[RX]" : " ");
1285}
1286
1287/*
1288 * irq functions
1289 */
1290static int usbhsf_irq_empty(struct usbhs_priv *priv,
1291 struct usbhs_irq_state *irq_state)
1292{
1293 struct usbhs_pipe *pipe;
1294 struct device *dev = usbhs_priv_to_dev(priv);
1295 int i, ret;
1296
1297 if (!irq_state->bempsts) {
1298 dev_err(dev, "debug %s !!\n", __func__);
1299 return -EIO;
1300 }
1301
1302 dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts);
1303
1304 /*
1305 * search interrupted "pipe"
1306 * not "uep".
1307 */
1308 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
1309 if (!(irq_state->bempsts & (1 << i)))
1310 continue;
1311
1312 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
1313 if (ret < 0)
1314 dev_err(dev, "irq_empty run_error %d : %d\n", i, ret);
1315 }
1316
1317 return 0;
1318}
1319
1320static int usbhsf_irq_ready(struct usbhs_priv *priv,
1321 struct usbhs_irq_state *irq_state)
1322{
1323 struct usbhs_pipe *pipe;
1324 struct device *dev = usbhs_priv_to_dev(priv);
1325 int i, ret;
1326
1327 if (!irq_state->brdysts) {
1328 dev_err(dev, "debug %s !!\n", __func__);
1329 return -EIO;
1330 }
1331
1332 dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts);
1333
1334 /*
1335 * search interrupted "pipe"
1336 * not "uep".
1337 */
1338 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
1339 if (!(irq_state->brdysts & (1 << i)))
1340 continue;
1341
1342 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
1343 if (ret < 0)
1344 dev_err(dev, "irq_ready run_error %d : %d\n", i, ret);
1345 }
1346
1347 return 0;
1348}
1349
1350static void usbhsf_dma_complete(void *arg)
1351{
1352 struct usbhs_pipe *pipe = arg;
1353 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1354 struct device *dev = usbhs_priv_to_dev(priv);
1355 int ret;
1356
1357 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE);
1358 if (ret < 0)
1359 dev_err(dev, "dma_complete run_error %d : %d\n",
1360 usbhs_pipe_number(pipe), ret);
1361}
1362
1363void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe)
1364{
1365 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1366 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
1367
1368 /* clear DCP FIFO of transmission */
1369 if (usbhsf_fifo_select(pipe, fifo, 1) < 0)
1370 return;
1371 usbhsf_fifo_clear(pipe, fifo);
1372 usbhsf_fifo_unselect(pipe, fifo);
1373
1374 /* clear DCP FIFO of reception */
1375 if (usbhsf_fifo_select(pipe, fifo, 0) < 0)
1376 return;
1377 usbhsf_fifo_clear(pipe, fifo);
1378 usbhsf_fifo_unselect(pipe, fifo);
1379}
1380
1381/*
1382 * fifo init
1383 */
1384void usbhs_fifo_init(struct usbhs_priv *priv)
1385{
1386 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
1387 struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv);
1388 struct usbhs_fifo *dfifo;
1389 int i;
1390
1391 mod->irq_empty = usbhsf_irq_empty;
1392 mod->irq_ready = usbhsf_irq_ready;
1393 mod->irq_bempsts = 0;
1394 mod->irq_brdysts = 0;
1395
1396 cfifo->pipe = NULL;
1397 usbhs_for_each_dfifo(priv, dfifo, i)
1398 dfifo->pipe = NULL;
1399}
1400
1401void usbhs_fifo_quit(struct usbhs_priv *priv)
1402{
1403 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
1404
1405 mod->irq_empty = NULL;
1406 mod->irq_ready = NULL;
1407 mod->irq_bempsts = 0;
1408 mod->irq_brdysts = 0;
1409}
1410
1411#define __USBHS_DFIFO_INIT(priv, fifo, channel, fifo_port) \
1412do { \
1413 fifo = usbhsf_get_dnfifo(priv, channel); \
1414 fifo->name = "D"#channel"FIFO"; \
1415 fifo->port = fifo_port; \
1416 fifo->sel = D##channel##FIFOSEL; \
1417 fifo->ctr = D##channel##FIFOCTR; \
1418 fifo->tx_slave.shdma_slave.slave_id = \
1419 usbhs_get_dparam(priv, d##channel##_tx_id); \
1420 fifo->rx_slave.shdma_slave.slave_id = \
1421 usbhs_get_dparam(priv, d##channel##_rx_id); \
1422 usbhsf_dma_init(priv, fifo, channel); \
1423} while (0)
1424
1425#define USBHS_DFIFO_INIT(priv, fifo, channel) \
1426 __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO)
1427#define USBHS_DFIFO_INIT_NO_PORT(priv, fifo, channel) \
1428 __USBHS_DFIFO_INIT(priv, fifo, channel, 0)
1429
1430int usbhs_fifo_probe(struct usbhs_priv *priv)
1431{
1432 struct usbhs_fifo *fifo;
1433
1434 /* CFIFO */
1435 fifo = usbhsf_get_cfifo(priv);
1436 fifo->name = "CFIFO";
1437 fifo->port = CFIFO;
1438 fifo->sel = CFIFOSEL;
1439 fifo->ctr = CFIFOCTR;
1440
1441 /* DFIFO */
1442 USBHS_DFIFO_INIT(priv, fifo, 0);
1443 USBHS_DFIFO_INIT(priv, fifo, 1);
1444 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 2);
1445 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 3);
1446
1447 return 0;
1448}
1449
1450void usbhs_fifo_remove(struct usbhs_priv *priv)
1451{
1452 struct usbhs_fifo *fifo;
1453 int i;
1454
1455 usbhs_for_each_dfifo(priv, fifo, i)
1456 usbhsf_dma_quit(priv, fifo);
1457}