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1/*
2 * An rtc driver for the Dallas DS1511
3 *
4 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
5 * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Real time clock driver for the Dallas 1511 chip, which also
12 * contains a watchdog timer. There is a tiny amount of code that
13 * platform code could use to mess with the watchdog device a little
14 * bit, but not a full watchdog driver.
15 */
16
17#include <linux/bcd.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/gfp.h>
21#include <linux/delay.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/platform_device.h>
25#include <linux/io.h>
26#include <linux/module.h>
27
28#define DRV_VERSION "0.6"
29
30enum ds1511reg {
31 DS1511_SEC = 0x0,
32 DS1511_MIN = 0x1,
33 DS1511_HOUR = 0x2,
34 DS1511_DOW = 0x3,
35 DS1511_DOM = 0x4,
36 DS1511_MONTH = 0x5,
37 DS1511_YEAR = 0x6,
38 DS1511_CENTURY = 0x7,
39 DS1511_AM1_SEC = 0x8,
40 DS1511_AM2_MIN = 0x9,
41 DS1511_AM3_HOUR = 0xa,
42 DS1511_AM4_DATE = 0xb,
43 DS1511_WD_MSEC = 0xc,
44 DS1511_WD_SEC = 0xd,
45 DS1511_CONTROL_A = 0xe,
46 DS1511_CONTROL_B = 0xf,
47 DS1511_RAMADDR_LSB = 0x10,
48 DS1511_RAMDATA = 0x13
49};
50
51#define DS1511_BLF1 0x80
52#define DS1511_BLF2 0x40
53#define DS1511_PRS 0x20
54#define DS1511_PAB 0x10
55#define DS1511_TDF 0x08
56#define DS1511_KSF 0x04
57#define DS1511_WDF 0x02
58#define DS1511_IRQF 0x01
59#define DS1511_TE 0x80
60#define DS1511_CS 0x40
61#define DS1511_BME 0x20
62#define DS1511_TPE 0x10
63#define DS1511_TIE 0x08
64#define DS1511_KIE 0x04
65#define DS1511_WDE 0x02
66#define DS1511_WDS 0x01
67#define DS1511_RAM_MAX 0x100
68
69#define RTC_CMD DS1511_CONTROL_B
70#define RTC_CMD1 DS1511_CONTROL_A
71
72#define RTC_ALARM_SEC DS1511_AM1_SEC
73#define RTC_ALARM_MIN DS1511_AM2_MIN
74#define RTC_ALARM_HOUR DS1511_AM3_HOUR
75#define RTC_ALARM_DATE DS1511_AM4_DATE
76
77#define RTC_SEC DS1511_SEC
78#define RTC_MIN DS1511_MIN
79#define RTC_HOUR DS1511_HOUR
80#define RTC_DOW DS1511_DOW
81#define RTC_DOM DS1511_DOM
82#define RTC_MON DS1511_MONTH
83#define RTC_YEAR DS1511_YEAR
84#define RTC_CENTURY DS1511_CENTURY
85
86#define RTC_TIE DS1511_TIE
87#define RTC_TE DS1511_TE
88
89struct rtc_plat_data {
90 struct rtc_device *rtc;
91 void __iomem *ioaddr; /* virtual base address */
92 int irq;
93 unsigned int irqen;
94 int alrm_sec;
95 int alrm_min;
96 int alrm_hour;
97 int alrm_mday;
98 spinlock_t lock;
99};
100
101static DEFINE_SPINLOCK(ds1511_lock);
102
103static __iomem char *ds1511_base;
104static u32 reg_spacing = 1;
105
106static noinline void
107rtc_write(uint8_t val, uint32_t reg)
108{
109 writeb(val, ds1511_base + (reg * reg_spacing));
110}
111
112static inline void
113rtc_write_alarm(uint8_t val, enum ds1511reg reg)
114{
115 rtc_write((val | 0x80), reg);
116}
117
118static noinline uint8_t
119rtc_read(enum ds1511reg reg)
120{
121 return readb(ds1511_base + (reg * reg_spacing));
122}
123
124static inline void
125rtc_disable_update(void)
126{
127 rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
128}
129
130static void
131rtc_enable_update(void)
132{
133 rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
134}
135
136/*
137 * #define DS1511_WDOG_RESET_SUPPORT
138 *
139 * Uncomment this if you want to use these routines in
140 * some platform code.
141 */
142#ifdef DS1511_WDOG_RESET_SUPPORT
143/*
144 * just enough code to set the watchdog timer so that it
145 * will reboot the system
146 */
147void
148ds1511_wdog_set(unsigned long deciseconds)
149{
150 /*
151 * the wdog timer can take 99.99 seconds
152 */
153 deciseconds %= 10000;
154 /*
155 * set the wdog values in the wdog registers
156 */
157 rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
158 rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
159 /*
160 * set wdog enable and wdog 'steering' bit to issue a reset
161 */
162 rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
163}
164
165void
166ds1511_wdog_disable(void)
167{
168 /*
169 * clear wdog enable and wdog 'steering' bits
170 */
171 rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
172 /*
173 * clear the wdog counter
174 */
175 rtc_write(0, DS1511_WD_MSEC);
176 rtc_write(0, DS1511_WD_SEC);
177}
178#endif
179
180/*
181 * set the rtc chip's idea of the time.
182 * stupidly, some callers call with year unmolested;
183 * and some call with year = year - 1900. thanks.
184 */
185static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
186{
187 u8 mon, day, dow, hrs, min, sec, yrs, cen;
188 unsigned long flags;
189
190 /*
191 * won't have to change this for a while
192 */
193 if (rtc_tm->tm_year < 1900)
194 rtc_tm->tm_year += 1900;
195
196 if (rtc_tm->tm_year < 1970)
197 return -EINVAL;
198
199 yrs = rtc_tm->tm_year % 100;
200 cen = rtc_tm->tm_year / 100;
201 mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
202 day = rtc_tm->tm_mday;
203 dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
204 hrs = rtc_tm->tm_hour;
205 min = rtc_tm->tm_min;
206 sec = rtc_tm->tm_sec;
207
208 if ((mon > 12) || (day == 0))
209 return -EINVAL;
210
211 if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
212 return -EINVAL;
213
214 if ((hrs >= 24) || (min >= 60) || (sec >= 60))
215 return -EINVAL;
216
217 /*
218 * each register is a different number of valid bits
219 */
220 sec = bin2bcd(sec) & 0x7f;
221 min = bin2bcd(min) & 0x7f;
222 hrs = bin2bcd(hrs) & 0x3f;
223 day = bin2bcd(day) & 0x3f;
224 mon = bin2bcd(mon) & 0x1f;
225 yrs = bin2bcd(yrs) & 0xff;
226 cen = bin2bcd(cen) & 0xff;
227
228 spin_lock_irqsave(&ds1511_lock, flags);
229 rtc_disable_update();
230 rtc_write(cen, RTC_CENTURY);
231 rtc_write(yrs, RTC_YEAR);
232 rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
233 rtc_write(day, RTC_DOM);
234 rtc_write(hrs, RTC_HOUR);
235 rtc_write(min, RTC_MIN);
236 rtc_write(sec, RTC_SEC);
237 rtc_write(dow, RTC_DOW);
238 rtc_enable_update();
239 spin_unlock_irqrestore(&ds1511_lock, flags);
240
241 return 0;
242}
243
244static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
245{
246 unsigned int century;
247 unsigned long flags;
248
249 spin_lock_irqsave(&ds1511_lock, flags);
250 rtc_disable_update();
251
252 rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
253 rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
254 rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
255 rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
256 rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
257 rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
258 rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
259 century = rtc_read(RTC_CENTURY);
260
261 rtc_enable_update();
262 spin_unlock_irqrestore(&ds1511_lock, flags);
263
264 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
265 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
266 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
267 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
268 rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
269 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
270 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
271 century = bcd2bin(century) * 100;
272
273 /*
274 * Account for differences between how the RTC uses the values
275 * and how they are defined in a struct rtc_time;
276 */
277 century += rtc_tm->tm_year;
278 rtc_tm->tm_year = century - 1900;
279
280 rtc_tm->tm_mon--;
281
282 if (rtc_valid_tm(rtc_tm) < 0) {
283 dev_err(dev, "retrieved date/time is not valid.\n");
284 rtc_time_to_tm(0, rtc_tm);
285 }
286 return 0;
287}
288
289/*
290 * write the alarm register settings
291 *
292 * we only have the use to interrupt every second, otherwise
293 * known as the update interrupt, or the interrupt if the whole
294 * date/hours/mins/secs matches. the ds1511 has many more
295 * permutations, but the kernel doesn't.
296 */
297static void
298ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
299{
300 unsigned long flags;
301
302 spin_lock_irqsave(&pdata->lock, flags);
303 rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
304 0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
305 RTC_ALARM_DATE);
306 rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
307 0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
308 RTC_ALARM_HOUR);
309 rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
310 0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
311 RTC_ALARM_MIN);
312 rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
313 0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
314 RTC_ALARM_SEC);
315 rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
316 rtc_read(RTC_CMD1); /* clear interrupts */
317 spin_unlock_irqrestore(&pdata->lock, flags);
318}
319
320static int
321ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
322{
323 struct platform_device *pdev = to_platform_device(dev);
324 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
325
326 if (pdata->irq <= 0)
327 return -EINVAL;
328
329 pdata->alrm_mday = alrm->time.tm_mday;
330 pdata->alrm_hour = alrm->time.tm_hour;
331 pdata->alrm_min = alrm->time.tm_min;
332 pdata->alrm_sec = alrm->time.tm_sec;
333 if (alrm->enabled)
334 pdata->irqen |= RTC_AF;
335
336 ds1511_rtc_update_alarm(pdata);
337 return 0;
338}
339
340static int
341ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
342{
343 struct platform_device *pdev = to_platform_device(dev);
344 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
345
346 if (pdata->irq <= 0)
347 return -EINVAL;
348
349 alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
350 alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
351 alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
352 alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
353 alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
354 return 0;
355}
356
357static irqreturn_t
358ds1511_interrupt(int irq, void *dev_id)
359{
360 struct platform_device *pdev = dev_id;
361 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
362 unsigned long events = 0;
363
364 spin_lock(&pdata->lock);
365 /*
366 * read and clear interrupt
367 */
368 if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
369 events = RTC_IRQF;
370 if (rtc_read(RTC_ALARM_SEC) & 0x80)
371 events |= RTC_UF;
372 else
373 events |= RTC_AF;
374 rtc_update_irq(pdata->rtc, 1, events);
375 }
376 spin_unlock(&pdata->lock);
377 return events ? IRQ_HANDLED : IRQ_NONE;
378}
379
380static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
381{
382 struct platform_device *pdev = to_platform_device(dev);
383 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
384
385 if (pdata->irq <= 0)
386 return -EINVAL;
387 if (enabled)
388 pdata->irqen |= RTC_AF;
389 else
390 pdata->irqen &= ~RTC_AF;
391 ds1511_rtc_update_alarm(pdata);
392 return 0;
393}
394
395static const struct rtc_class_ops ds1511_rtc_ops = {
396 .read_time = ds1511_rtc_read_time,
397 .set_time = ds1511_rtc_set_time,
398 .read_alarm = ds1511_rtc_read_alarm,
399 .set_alarm = ds1511_rtc_set_alarm,
400 .alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
401};
402
403static ssize_t
404ds1511_nvram_read(struct file *filp, struct kobject *kobj,
405 struct bin_attribute *ba,
406 char *buf, loff_t pos, size_t size)
407{
408 ssize_t count;
409
410 rtc_write(pos, DS1511_RAMADDR_LSB);
411 for (count = 0; count < size; count++)
412 *buf++ = rtc_read(DS1511_RAMDATA);
413
414 return count;
415}
416
417static ssize_t
418ds1511_nvram_write(struct file *filp, struct kobject *kobj,
419 struct bin_attribute *bin_attr,
420 char *buf, loff_t pos, size_t size)
421{
422 ssize_t count;
423
424 rtc_write(pos, DS1511_RAMADDR_LSB);
425 for (count = 0; count < size; count++)
426 rtc_write(*buf++, DS1511_RAMDATA);
427
428 return count;
429}
430
431static struct bin_attribute ds1511_nvram_attr = {
432 .attr = {
433 .name = "nvram",
434 .mode = S_IRUGO | S_IWUSR,
435 },
436 .size = DS1511_RAM_MAX,
437 .read = ds1511_nvram_read,
438 .write = ds1511_nvram_write,
439};
440
441static int ds1511_rtc_probe(struct platform_device *pdev)
442{
443 struct resource *res;
444 struct rtc_plat_data *pdata;
445 int ret = 0;
446
447 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
448 if (!pdata)
449 return -ENOMEM;
450
451 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
452 ds1511_base = devm_ioremap_resource(&pdev->dev, res);
453 if (IS_ERR(ds1511_base))
454 return PTR_ERR(ds1511_base);
455 pdata->ioaddr = ds1511_base;
456 pdata->irq = platform_get_irq(pdev, 0);
457
458 /*
459 * turn on the clock and the crystal, etc.
460 */
461 rtc_write(DS1511_BME, RTC_CMD);
462 rtc_write(0, RTC_CMD1);
463 /*
464 * clear the wdog counter
465 */
466 rtc_write(0, DS1511_WD_MSEC);
467 rtc_write(0, DS1511_WD_SEC);
468 /*
469 * start the clock
470 */
471 rtc_enable_update();
472
473 /*
474 * check for a dying bat-tree
475 */
476 if (rtc_read(RTC_CMD1) & DS1511_BLF1)
477 dev_warn(&pdev->dev, "voltage-low detected.\n");
478
479 spin_lock_init(&pdata->lock);
480 platform_set_drvdata(pdev, pdata);
481
482 pdata->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
483 &ds1511_rtc_ops, THIS_MODULE);
484 if (IS_ERR(pdata->rtc))
485 return PTR_ERR(pdata->rtc);
486
487 /*
488 * if the platform has an interrupt in mind for this device,
489 * then by all means, set it
490 */
491 if (pdata->irq > 0) {
492 rtc_read(RTC_CMD1);
493 if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
494 IRQF_SHARED, pdev->name, pdev) < 0) {
495
496 dev_warn(&pdev->dev, "interrupt not available.\n");
497 pdata->irq = 0;
498 }
499 }
500
501 ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
502 if (ret)
503 dev_err(&pdev->dev, "Unable to create sysfs entry: %s\n",
504 ds1511_nvram_attr.attr.name);
505
506 return 0;
507}
508
509static int ds1511_rtc_remove(struct platform_device *pdev)
510{
511 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
512
513 sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
514 if (pdata->irq > 0) {
515 /*
516 * disable the alarm interrupt
517 */
518 rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD);
519 rtc_read(RTC_CMD1);
520 }
521 return 0;
522}
523
524/* work with hotplug and coldplug */
525MODULE_ALIAS("platform:ds1511");
526
527static struct platform_driver ds1511_rtc_driver = {
528 .probe = ds1511_rtc_probe,
529 .remove = ds1511_rtc_remove,
530 .driver = {
531 .name = "ds1511",
532 },
533};
534
535module_platform_driver(ds1511_rtc_driver);
536
537MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
538MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
539MODULE_LICENSE("GPL");
540MODULE_VERSION(DRV_VERSION);
1/*
2 * An rtc driver for the Dallas DS1511
3 *
4 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
5 * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Real time clock driver for the Dallas 1511 chip, which also
12 * contains a watchdog timer. There is a tiny amount of code that
13 * platform code could use to mess with the watchdog device a little
14 * bit, but not a full watchdog driver.
15 */
16
17#include <linux/bcd.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/gfp.h>
21#include <linux/delay.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/platform_device.h>
25#include <linux/io.h>
26#include <linux/module.h>
27
28enum ds1511reg {
29 DS1511_SEC = 0x0,
30 DS1511_MIN = 0x1,
31 DS1511_HOUR = 0x2,
32 DS1511_DOW = 0x3,
33 DS1511_DOM = 0x4,
34 DS1511_MONTH = 0x5,
35 DS1511_YEAR = 0x6,
36 DS1511_CENTURY = 0x7,
37 DS1511_AM1_SEC = 0x8,
38 DS1511_AM2_MIN = 0x9,
39 DS1511_AM3_HOUR = 0xa,
40 DS1511_AM4_DATE = 0xb,
41 DS1511_WD_MSEC = 0xc,
42 DS1511_WD_SEC = 0xd,
43 DS1511_CONTROL_A = 0xe,
44 DS1511_CONTROL_B = 0xf,
45 DS1511_RAMADDR_LSB = 0x10,
46 DS1511_RAMDATA = 0x13
47};
48
49#define DS1511_BLF1 0x80
50#define DS1511_BLF2 0x40
51#define DS1511_PRS 0x20
52#define DS1511_PAB 0x10
53#define DS1511_TDF 0x08
54#define DS1511_KSF 0x04
55#define DS1511_WDF 0x02
56#define DS1511_IRQF 0x01
57#define DS1511_TE 0x80
58#define DS1511_CS 0x40
59#define DS1511_BME 0x20
60#define DS1511_TPE 0x10
61#define DS1511_TIE 0x08
62#define DS1511_KIE 0x04
63#define DS1511_WDE 0x02
64#define DS1511_WDS 0x01
65#define DS1511_RAM_MAX 0x100
66
67#define RTC_CMD DS1511_CONTROL_B
68#define RTC_CMD1 DS1511_CONTROL_A
69
70#define RTC_ALARM_SEC DS1511_AM1_SEC
71#define RTC_ALARM_MIN DS1511_AM2_MIN
72#define RTC_ALARM_HOUR DS1511_AM3_HOUR
73#define RTC_ALARM_DATE DS1511_AM4_DATE
74
75#define RTC_SEC DS1511_SEC
76#define RTC_MIN DS1511_MIN
77#define RTC_HOUR DS1511_HOUR
78#define RTC_DOW DS1511_DOW
79#define RTC_DOM DS1511_DOM
80#define RTC_MON DS1511_MONTH
81#define RTC_YEAR DS1511_YEAR
82#define RTC_CENTURY DS1511_CENTURY
83
84#define RTC_TIE DS1511_TIE
85#define RTC_TE DS1511_TE
86
87struct rtc_plat_data {
88 struct rtc_device *rtc;
89 void __iomem *ioaddr; /* virtual base address */
90 int irq;
91 unsigned int irqen;
92 int alrm_sec;
93 int alrm_min;
94 int alrm_hour;
95 int alrm_mday;
96 spinlock_t lock;
97};
98
99static DEFINE_SPINLOCK(ds1511_lock);
100
101static __iomem char *ds1511_base;
102static u32 reg_spacing = 1;
103
104static noinline void
105rtc_write(uint8_t val, uint32_t reg)
106{
107 writeb(val, ds1511_base + (reg * reg_spacing));
108}
109
110static inline void
111rtc_write_alarm(uint8_t val, enum ds1511reg reg)
112{
113 rtc_write((val | 0x80), reg);
114}
115
116static noinline uint8_t
117rtc_read(enum ds1511reg reg)
118{
119 return readb(ds1511_base + (reg * reg_spacing));
120}
121
122static inline void
123rtc_disable_update(void)
124{
125 rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
126}
127
128static void
129rtc_enable_update(void)
130{
131 rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
132}
133
134/*
135 * #define DS1511_WDOG_RESET_SUPPORT
136 *
137 * Uncomment this if you want to use these routines in
138 * some platform code.
139 */
140#ifdef DS1511_WDOG_RESET_SUPPORT
141/*
142 * just enough code to set the watchdog timer so that it
143 * will reboot the system
144 */
145void
146ds1511_wdog_set(unsigned long deciseconds)
147{
148 /*
149 * the wdog timer can take 99.99 seconds
150 */
151 deciseconds %= 10000;
152 /*
153 * set the wdog values in the wdog registers
154 */
155 rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
156 rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
157 /*
158 * set wdog enable and wdog 'steering' bit to issue a reset
159 */
160 rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
161}
162
163void
164ds1511_wdog_disable(void)
165{
166 /*
167 * clear wdog enable and wdog 'steering' bits
168 */
169 rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
170 /*
171 * clear the wdog counter
172 */
173 rtc_write(0, DS1511_WD_MSEC);
174 rtc_write(0, DS1511_WD_SEC);
175}
176#endif
177
178/*
179 * set the rtc chip's idea of the time.
180 * stupidly, some callers call with year unmolested;
181 * and some call with year = year - 1900. thanks.
182 */
183static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
184{
185 u8 mon, day, dow, hrs, min, sec, yrs, cen;
186 unsigned long flags;
187
188 /*
189 * won't have to change this for a while
190 */
191 if (rtc_tm->tm_year < 1900)
192 rtc_tm->tm_year += 1900;
193
194 if (rtc_tm->tm_year < 1970)
195 return -EINVAL;
196
197 yrs = rtc_tm->tm_year % 100;
198 cen = rtc_tm->tm_year / 100;
199 mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
200 day = rtc_tm->tm_mday;
201 dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
202 hrs = rtc_tm->tm_hour;
203 min = rtc_tm->tm_min;
204 sec = rtc_tm->tm_sec;
205
206 if ((mon > 12) || (day == 0))
207 return -EINVAL;
208
209 if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
210 return -EINVAL;
211
212 if ((hrs >= 24) || (min >= 60) || (sec >= 60))
213 return -EINVAL;
214
215 /*
216 * each register is a different number of valid bits
217 */
218 sec = bin2bcd(sec) & 0x7f;
219 min = bin2bcd(min) & 0x7f;
220 hrs = bin2bcd(hrs) & 0x3f;
221 day = bin2bcd(day) & 0x3f;
222 mon = bin2bcd(mon) & 0x1f;
223 yrs = bin2bcd(yrs) & 0xff;
224 cen = bin2bcd(cen) & 0xff;
225
226 spin_lock_irqsave(&ds1511_lock, flags);
227 rtc_disable_update();
228 rtc_write(cen, RTC_CENTURY);
229 rtc_write(yrs, RTC_YEAR);
230 rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
231 rtc_write(day, RTC_DOM);
232 rtc_write(hrs, RTC_HOUR);
233 rtc_write(min, RTC_MIN);
234 rtc_write(sec, RTC_SEC);
235 rtc_write(dow, RTC_DOW);
236 rtc_enable_update();
237 spin_unlock_irqrestore(&ds1511_lock, flags);
238
239 return 0;
240}
241
242static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
243{
244 unsigned int century;
245 unsigned long flags;
246
247 spin_lock_irqsave(&ds1511_lock, flags);
248 rtc_disable_update();
249
250 rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
251 rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
252 rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
253 rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
254 rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
255 rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
256 rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
257 century = rtc_read(RTC_CENTURY);
258
259 rtc_enable_update();
260 spin_unlock_irqrestore(&ds1511_lock, flags);
261
262 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
263 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
264 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
265 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
266 rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
267 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
268 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
269 century = bcd2bin(century) * 100;
270
271 /*
272 * Account for differences between how the RTC uses the values
273 * and how they are defined in a struct rtc_time;
274 */
275 century += rtc_tm->tm_year;
276 rtc_tm->tm_year = century - 1900;
277
278 rtc_tm->tm_mon--;
279
280 if (rtc_valid_tm(rtc_tm) < 0) {
281 dev_err(dev, "retrieved date/time is not valid.\n");
282 rtc_time_to_tm(0, rtc_tm);
283 }
284 return 0;
285}
286
287/*
288 * write the alarm register settings
289 *
290 * we only have the use to interrupt every second, otherwise
291 * known as the update interrupt, or the interrupt if the whole
292 * date/hours/mins/secs matches. the ds1511 has many more
293 * permutations, but the kernel doesn't.
294 */
295static void
296ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
297{
298 unsigned long flags;
299
300 spin_lock_irqsave(&pdata->lock, flags);
301 rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
302 0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
303 RTC_ALARM_DATE);
304 rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
305 0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
306 RTC_ALARM_HOUR);
307 rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
308 0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
309 RTC_ALARM_MIN);
310 rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
311 0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
312 RTC_ALARM_SEC);
313 rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
314 rtc_read(RTC_CMD1); /* clear interrupts */
315 spin_unlock_irqrestore(&pdata->lock, flags);
316}
317
318static int
319ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
320{
321 struct platform_device *pdev = to_platform_device(dev);
322 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
323
324 if (pdata->irq <= 0)
325 return -EINVAL;
326
327 pdata->alrm_mday = alrm->time.tm_mday;
328 pdata->alrm_hour = alrm->time.tm_hour;
329 pdata->alrm_min = alrm->time.tm_min;
330 pdata->alrm_sec = alrm->time.tm_sec;
331 if (alrm->enabled)
332 pdata->irqen |= RTC_AF;
333
334 ds1511_rtc_update_alarm(pdata);
335 return 0;
336}
337
338static int
339ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
340{
341 struct platform_device *pdev = to_platform_device(dev);
342 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
343
344 if (pdata->irq <= 0)
345 return -EINVAL;
346
347 alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
348 alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
349 alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
350 alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
351 alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
352 return 0;
353}
354
355static irqreturn_t
356ds1511_interrupt(int irq, void *dev_id)
357{
358 struct platform_device *pdev = dev_id;
359 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
360 unsigned long events = 0;
361
362 spin_lock(&pdata->lock);
363 /*
364 * read and clear interrupt
365 */
366 if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
367 events = RTC_IRQF;
368 if (rtc_read(RTC_ALARM_SEC) & 0x80)
369 events |= RTC_UF;
370 else
371 events |= RTC_AF;
372 rtc_update_irq(pdata->rtc, 1, events);
373 }
374 spin_unlock(&pdata->lock);
375 return events ? IRQ_HANDLED : IRQ_NONE;
376}
377
378static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
379{
380 struct platform_device *pdev = to_platform_device(dev);
381 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
382
383 if (pdata->irq <= 0)
384 return -EINVAL;
385 if (enabled)
386 pdata->irqen |= RTC_AF;
387 else
388 pdata->irqen &= ~RTC_AF;
389 ds1511_rtc_update_alarm(pdata);
390 return 0;
391}
392
393static const struct rtc_class_ops ds1511_rtc_ops = {
394 .read_time = ds1511_rtc_read_time,
395 .set_time = ds1511_rtc_set_time,
396 .read_alarm = ds1511_rtc_read_alarm,
397 .set_alarm = ds1511_rtc_set_alarm,
398 .alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
399};
400
401static ssize_t
402ds1511_nvram_read(struct file *filp, struct kobject *kobj,
403 struct bin_attribute *ba,
404 char *buf, loff_t pos, size_t size)
405{
406 ssize_t count;
407
408 rtc_write(pos, DS1511_RAMADDR_LSB);
409 for (count = 0; count < size; count++)
410 *buf++ = rtc_read(DS1511_RAMDATA);
411
412 return count;
413}
414
415static ssize_t
416ds1511_nvram_write(struct file *filp, struct kobject *kobj,
417 struct bin_attribute *bin_attr,
418 char *buf, loff_t pos, size_t size)
419{
420 ssize_t count;
421
422 rtc_write(pos, DS1511_RAMADDR_LSB);
423 for (count = 0; count < size; count++)
424 rtc_write(*buf++, DS1511_RAMDATA);
425
426 return count;
427}
428
429static struct bin_attribute ds1511_nvram_attr = {
430 .attr = {
431 .name = "nvram",
432 .mode = S_IRUGO | S_IWUSR,
433 },
434 .size = DS1511_RAM_MAX,
435 .read = ds1511_nvram_read,
436 .write = ds1511_nvram_write,
437};
438
439static int ds1511_rtc_probe(struct platform_device *pdev)
440{
441 struct resource *res;
442 struct rtc_plat_data *pdata;
443 int ret = 0;
444
445 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
446 if (!pdata)
447 return -ENOMEM;
448
449 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
450 ds1511_base = devm_ioremap_resource(&pdev->dev, res);
451 if (IS_ERR(ds1511_base))
452 return PTR_ERR(ds1511_base);
453 pdata->ioaddr = ds1511_base;
454 pdata->irq = platform_get_irq(pdev, 0);
455
456 /*
457 * turn on the clock and the crystal, etc.
458 */
459 rtc_write(DS1511_BME, RTC_CMD);
460 rtc_write(0, RTC_CMD1);
461 /*
462 * clear the wdog counter
463 */
464 rtc_write(0, DS1511_WD_MSEC);
465 rtc_write(0, DS1511_WD_SEC);
466 /*
467 * start the clock
468 */
469 rtc_enable_update();
470
471 /*
472 * check for a dying bat-tree
473 */
474 if (rtc_read(RTC_CMD1) & DS1511_BLF1)
475 dev_warn(&pdev->dev, "voltage-low detected.\n");
476
477 spin_lock_init(&pdata->lock);
478 platform_set_drvdata(pdev, pdata);
479
480 pdata->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
481 &ds1511_rtc_ops, THIS_MODULE);
482 if (IS_ERR(pdata->rtc))
483 return PTR_ERR(pdata->rtc);
484
485 /*
486 * if the platform has an interrupt in mind for this device,
487 * then by all means, set it
488 */
489 if (pdata->irq > 0) {
490 rtc_read(RTC_CMD1);
491 if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
492 IRQF_SHARED, pdev->name, pdev) < 0) {
493
494 dev_warn(&pdev->dev, "interrupt not available.\n");
495 pdata->irq = 0;
496 }
497 }
498
499 ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
500 if (ret)
501 dev_err(&pdev->dev, "Unable to create sysfs entry: %s\n",
502 ds1511_nvram_attr.attr.name);
503
504 return 0;
505}
506
507static int ds1511_rtc_remove(struct platform_device *pdev)
508{
509 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
510
511 sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
512 if (pdata->irq > 0) {
513 /*
514 * disable the alarm interrupt
515 */
516 rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD);
517 rtc_read(RTC_CMD1);
518 }
519 return 0;
520}
521
522/* work with hotplug and coldplug */
523MODULE_ALIAS("platform:ds1511");
524
525static struct platform_driver ds1511_rtc_driver = {
526 .probe = ds1511_rtc_probe,
527 .remove = ds1511_rtc_remove,
528 .driver = {
529 .name = "ds1511",
530 },
531};
532
533module_platform_driver(ds1511_rtc_driver);
534
535MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
536MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
537MODULE_LICENSE("GPL");