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1/*
2 * Freescale i.MX6UL touchscreen controller driver
3 *
4 * Copyright (C) 2015 Freescale Semiconductor, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/errno.h>
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/gpio/consumer.h>
15#include <linux/input.h>
16#include <linux/slab.h>
17#include <linux/completion.h>
18#include <linux/delay.h>
19#include <linux/of.h>
20#include <linux/interrupt.h>
21#include <linux/platform_device.h>
22#include <linux/clk.h>
23#include <linux/io.h>
24
25/* ADC configuration registers field define */
26#define ADC_AIEN (0x1 << 7)
27#define ADC_CONV_DISABLE 0x1F
28#define ADC_CAL (0x1 << 7)
29#define ADC_CALF 0x2
30#define ADC_12BIT_MODE (0x2 << 2)
31#define ADC_IPG_CLK 0x00
32#define ADC_CLK_DIV_8 (0x03 << 5)
33#define ADC_SHORT_SAMPLE_MODE (0x0 << 4)
34#define ADC_HARDWARE_TRIGGER (0x1 << 13)
35#define SELECT_CHANNEL_4 0x04
36#define SELECT_CHANNEL_1 0x01
37#define DISABLE_CONVERSION_INT (0x0 << 7)
38
39/* ADC registers */
40#define REG_ADC_HC0 0x00
41#define REG_ADC_HC1 0x04
42#define REG_ADC_HC2 0x08
43#define REG_ADC_HC3 0x0C
44#define REG_ADC_HC4 0x10
45#define REG_ADC_HS 0x14
46#define REG_ADC_R0 0x18
47#define REG_ADC_CFG 0x2C
48#define REG_ADC_GC 0x30
49#define REG_ADC_GS 0x34
50
51#define ADC_TIMEOUT msecs_to_jiffies(100)
52
53/* TSC registers */
54#define REG_TSC_BASIC_SETING 0x00
55#define REG_TSC_PRE_CHARGE_TIME 0x10
56#define REG_TSC_FLOW_CONTROL 0x20
57#define REG_TSC_MEASURE_VALUE 0x30
58#define REG_TSC_INT_EN 0x40
59#define REG_TSC_INT_SIG_EN 0x50
60#define REG_TSC_INT_STATUS 0x60
61#define REG_TSC_DEBUG_MODE 0x70
62#define REG_TSC_DEBUG_MODE2 0x80
63
64/* TSC configuration registers field define */
65#define DETECT_4_WIRE_MODE (0x0 << 4)
66#define AUTO_MEASURE 0x1
67#define MEASURE_SIGNAL 0x1
68#define DETECT_SIGNAL (0x1 << 4)
69#define VALID_SIGNAL (0x1 << 8)
70#define MEASURE_INT_EN 0x1
71#define MEASURE_SIG_EN 0x1
72#define VALID_SIG_EN (0x1 << 8)
73#define DE_GLITCH_2 (0x2 << 29)
74#define START_SENSE (0x1 << 12)
75#define TSC_DISABLE (0x1 << 16)
76#define DETECT_MODE 0x2
77
78struct imx6ul_tsc {
79 struct device *dev;
80 struct input_dev *input;
81 void __iomem *tsc_regs;
82 void __iomem *adc_regs;
83 struct clk *tsc_clk;
84 struct clk *adc_clk;
85 struct gpio_desc *xnur_gpio;
86
87 int measure_delay_time;
88 int pre_charge_time;
89
90 struct completion completion;
91};
92
93/*
94 * TSC module need ADC to get the measure value. So
95 * before config TSC, we should initialize ADC module.
96 */
97static int imx6ul_adc_init(struct imx6ul_tsc *tsc)
98{
99 int adc_hc = 0;
100 int adc_gc;
101 int adc_gs;
102 int adc_cfg;
103 int timeout;
104
105 reinit_completion(&tsc->completion);
106
107 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
108 adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK;
109 adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE;
110 adc_cfg &= ~ADC_HARDWARE_TRIGGER;
111 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
112
113 /* enable calibration interrupt */
114 adc_hc |= ADC_AIEN;
115 adc_hc |= ADC_CONV_DISABLE;
116 writel(adc_hc, tsc->adc_regs + REG_ADC_HC0);
117
118 /* start ADC calibration */
119 adc_gc = readl(tsc->adc_regs + REG_ADC_GC);
120 adc_gc |= ADC_CAL;
121 writel(adc_gc, tsc->adc_regs + REG_ADC_GC);
122
123 timeout = wait_for_completion_timeout
124 (&tsc->completion, ADC_TIMEOUT);
125 if (timeout == 0) {
126 dev_err(tsc->dev, "Timeout for adc calibration\n");
127 return -ETIMEDOUT;
128 }
129
130 adc_gs = readl(tsc->adc_regs + REG_ADC_GS);
131 if (adc_gs & ADC_CALF) {
132 dev_err(tsc->dev, "ADC calibration failed\n");
133 return -EINVAL;
134 }
135
136 /* TSC need the ADC work in hardware trigger */
137 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
138 adc_cfg |= ADC_HARDWARE_TRIGGER;
139 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
140
141 return 0;
142}
143
144/*
145 * This is a TSC workaround. Currently TSC misconnect two
146 * ADC channels, this function remap channel configure for
147 * hardware trigger.
148 */
149static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc)
150{
151 int adc_hc0, adc_hc1, adc_hc2, adc_hc3, adc_hc4;
152
153 adc_hc0 = DISABLE_CONVERSION_INT;
154 writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0);
155
156 adc_hc1 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_4;
157 writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1);
158
159 adc_hc2 = DISABLE_CONVERSION_INT;
160 writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2);
161
162 adc_hc3 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_1;
163 writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3);
164
165 adc_hc4 = DISABLE_CONVERSION_INT;
166 writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4);
167}
168
169/*
170 * TSC setting, confige the pre-charge time and measure delay time.
171 * different touch screen may need different pre-charge time and
172 * measure delay time.
173 */
174static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
175{
176 int basic_setting = 0;
177 int start;
178
179 basic_setting |= tsc->measure_delay_time << 8;
180 basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE;
181 writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING);
182
183 writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
184
185 writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME);
186 writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN);
187 writel(MEASURE_SIG_EN | VALID_SIG_EN,
188 tsc->tsc_regs + REG_TSC_INT_SIG_EN);
189
190 /* start sense detection */
191 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
192 start |= START_SENSE;
193 start &= ~TSC_DISABLE;
194 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
195}
196
197static int imx6ul_tsc_init(struct imx6ul_tsc *tsc)
198{
199 int err;
200
201 err = imx6ul_adc_init(tsc);
202 if (err)
203 return err;
204 imx6ul_tsc_channel_config(tsc);
205 imx6ul_tsc_set(tsc);
206
207 return 0;
208}
209
210static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc)
211{
212 int tsc_flow;
213 int adc_cfg;
214
215 /* TSC controller enters to idle status */
216 tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
217 tsc_flow |= TSC_DISABLE;
218 writel(tsc_flow, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
219
220 /* ADC controller enters to stop mode */
221 adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0);
222 adc_cfg |= ADC_CONV_DISABLE;
223 writel(adc_cfg, tsc->adc_regs + REG_ADC_HC0);
224}
225
226/* Delay some time (max 2ms), wait the pre-charge done. */
227static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc)
228{
229 unsigned long timeout = jiffies + msecs_to_jiffies(2);
230 int state_machine;
231 int debug_mode2;
232
233 do {
234 if (time_after(jiffies, timeout))
235 return false;
236
237 usleep_range(200, 400);
238 debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
239 state_machine = (debug_mode2 >> 20) & 0x7;
240 } while (state_machine != DETECT_MODE);
241
242 usleep_range(200, 400);
243 return true;
244}
245
246static irqreturn_t tsc_irq_fn(int irq, void *dev_id)
247{
248 struct imx6ul_tsc *tsc = dev_id;
249 int status;
250 int value;
251 int x, y;
252 int start;
253
254 status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS);
255
256 /* write 1 to clear the bit measure-signal */
257 writel(MEASURE_SIGNAL | DETECT_SIGNAL,
258 tsc->tsc_regs + REG_TSC_INT_STATUS);
259
260 /* It's a HW self-clean bit. Set this bit and start sense detection */
261 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
262 start |= START_SENSE;
263 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
264
265 if (status & MEASURE_SIGNAL) {
266 value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE);
267 x = (value >> 16) & 0x0fff;
268 y = value & 0x0fff;
269
270 /*
271 * In detect mode, we can get the xnur gpio value,
272 * otherwise assume contact is stiull active.
273 */
274 if (!tsc_wait_detect_mode(tsc) ||
275 gpiod_get_value_cansleep(tsc->xnur_gpio)) {
276 input_report_key(tsc->input, BTN_TOUCH, 1);
277 input_report_abs(tsc->input, ABS_X, x);
278 input_report_abs(tsc->input, ABS_Y, y);
279 } else {
280 input_report_key(tsc->input, BTN_TOUCH, 0);
281 }
282
283 input_sync(tsc->input);
284 }
285
286 return IRQ_HANDLED;
287}
288
289static irqreturn_t adc_irq_fn(int irq, void *dev_id)
290{
291 struct imx6ul_tsc *tsc = dev_id;
292 int coco;
293 int value;
294
295 coco = readl(tsc->adc_regs + REG_ADC_HS);
296 if (coco & 0x01) {
297 value = readl(tsc->adc_regs + REG_ADC_R0);
298 complete(&tsc->completion);
299 }
300
301 return IRQ_HANDLED;
302}
303
304static int imx6ul_tsc_open(struct input_dev *input_dev)
305{
306 struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
307 int err;
308
309 err = clk_prepare_enable(tsc->adc_clk);
310 if (err) {
311 dev_err(tsc->dev,
312 "Could not prepare or enable the adc clock: %d\n",
313 err);
314 return err;
315 }
316
317 err = clk_prepare_enable(tsc->tsc_clk);
318 if (err) {
319 dev_err(tsc->dev,
320 "Could not prepare or enable the tsc clock: %d\n",
321 err);
322 clk_disable_unprepare(tsc->adc_clk);
323 return err;
324 }
325
326 return imx6ul_tsc_init(tsc);
327}
328
329static void imx6ul_tsc_close(struct input_dev *input_dev)
330{
331 struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
332
333 imx6ul_tsc_disable(tsc);
334
335 clk_disable_unprepare(tsc->tsc_clk);
336 clk_disable_unprepare(tsc->adc_clk);
337}
338
339static int imx6ul_tsc_probe(struct platform_device *pdev)
340{
341 struct device_node *np = pdev->dev.of_node;
342 struct imx6ul_tsc *tsc;
343 struct input_dev *input_dev;
344 struct resource *tsc_mem;
345 struct resource *adc_mem;
346 int err;
347 int tsc_irq;
348 int adc_irq;
349
350 tsc = devm_kzalloc(&pdev->dev, sizeof(*tsc), GFP_KERNEL);
351 if (!tsc)
352 return -ENOMEM;
353
354 input_dev = devm_input_allocate_device(&pdev->dev);
355 if (!input_dev)
356 return -ENOMEM;
357
358 input_dev->name = "iMX6UL Touchscreen Controller";
359 input_dev->id.bustype = BUS_HOST;
360
361 input_dev->open = imx6ul_tsc_open;
362 input_dev->close = imx6ul_tsc_close;
363
364 input_set_capability(input_dev, EV_KEY, BTN_TOUCH);
365 input_set_abs_params(input_dev, ABS_X, 0, 0xFFF, 0, 0);
366 input_set_abs_params(input_dev, ABS_Y, 0, 0xFFF, 0, 0);
367
368 input_set_drvdata(input_dev, tsc);
369
370 tsc->dev = &pdev->dev;
371 tsc->input = input_dev;
372 init_completion(&tsc->completion);
373
374 tsc->xnur_gpio = devm_gpiod_get(&pdev->dev, "xnur", GPIOD_IN);
375 if (IS_ERR(tsc->xnur_gpio)) {
376 err = PTR_ERR(tsc->xnur_gpio);
377 dev_err(&pdev->dev,
378 "failed to request GPIO tsc_X- (xnur): %d\n", err);
379 return err;
380 }
381
382 tsc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
383 tsc->tsc_regs = devm_ioremap_resource(&pdev->dev, tsc_mem);
384 if (IS_ERR(tsc->tsc_regs)) {
385 err = PTR_ERR(tsc->tsc_regs);
386 dev_err(&pdev->dev, "failed to remap tsc memory: %d\n", err);
387 return err;
388 }
389
390 adc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
391 tsc->adc_regs = devm_ioremap_resource(&pdev->dev, adc_mem);
392 if (IS_ERR(tsc->adc_regs)) {
393 err = PTR_ERR(tsc->adc_regs);
394 dev_err(&pdev->dev, "failed to remap adc memory: %d\n", err);
395 return err;
396 }
397
398 tsc->tsc_clk = devm_clk_get(&pdev->dev, "tsc");
399 if (IS_ERR(tsc->tsc_clk)) {
400 err = PTR_ERR(tsc->tsc_clk);
401 dev_err(&pdev->dev, "failed getting tsc clock: %d\n", err);
402 return err;
403 }
404
405 tsc->adc_clk = devm_clk_get(&pdev->dev, "adc");
406 if (IS_ERR(tsc->adc_clk)) {
407 err = PTR_ERR(tsc->adc_clk);
408 dev_err(&pdev->dev, "failed getting adc clock: %d\n", err);
409 return err;
410 }
411
412 tsc_irq = platform_get_irq(pdev, 0);
413 if (tsc_irq < 0) {
414 dev_err(&pdev->dev, "no tsc irq resource?\n");
415 return tsc_irq;
416 }
417
418 adc_irq = platform_get_irq(pdev, 1);
419 if (adc_irq < 0) {
420 dev_err(&pdev->dev, "no adc irq resource?\n");
421 return adc_irq;
422 }
423
424 err = devm_request_threaded_irq(tsc->dev, tsc_irq,
425 NULL, tsc_irq_fn, IRQF_ONESHOT,
426 dev_name(&pdev->dev), tsc);
427 if (err) {
428 dev_err(&pdev->dev,
429 "failed requesting tsc irq %d: %d\n",
430 tsc_irq, err);
431 return err;
432 }
433
434 err = devm_request_irq(tsc->dev, adc_irq, adc_irq_fn, 0,
435 dev_name(&pdev->dev), tsc);
436 if (err) {
437 dev_err(&pdev->dev,
438 "failed requesting adc irq %d: %d\n",
439 adc_irq, err);
440 return err;
441 }
442
443 err = of_property_read_u32(np, "measure-delay-time",
444 &tsc->measure_delay_time);
445 if (err)
446 tsc->measure_delay_time = 0xffff;
447
448 err = of_property_read_u32(np, "pre-charge-time",
449 &tsc->pre_charge_time);
450 if (err)
451 tsc->pre_charge_time = 0xfff;
452
453 err = input_register_device(tsc->input);
454 if (err) {
455 dev_err(&pdev->dev,
456 "failed to register input device: %d\n", err);
457 return err;
458 }
459
460 platform_set_drvdata(pdev, tsc);
461 return 0;
462}
463
464static int __maybe_unused imx6ul_tsc_suspend(struct device *dev)
465{
466 struct platform_device *pdev = to_platform_device(dev);
467 struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
468 struct input_dev *input_dev = tsc->input;
469
470 mutex_lock(&input_dev->mutex);
471
472 if (input_dev->users) {
473 imx6ul_tsc_disable(tsc);
474
475 clk_disable_unprepare(tsc->tsc_clk);
476 clk_disable_unprepare(tsc->adc_clk);
477 }
478
479 mutex_unlock(&input_dev->mutex);
480
481 return 0;
482}
483
484static int __maybe_unused imx6ul_tsc_resume(struct device *dev)
485{
486 struct platform_device *pdev = to_platform_device(dev);
487 struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
488 struct input_dev *input_dev = tsc->input;
489 int retval = 0;
490
491 mutex_lock(&input_dev->mutex);
492
493 if (input_dev->users) {
494 retval = clk_prepare_enable(tsc->adc_clk);
495 if (retval)
496 goto out;
497
498 retval = clk_prepare_enable(tsc->tsc_clk);
499 if (retval) {
500 clk_disable_unprepare(tsc->adc_clk);
501 goto out;
502 }
503
504 retval = imx6ul_tsc_init(tsc);
505 }
506
507out:
508 mutex_unlock(&input_dev->mutex);
509 return retval;
510}
511
512static SIMPLE_DEV_PM_OPS(imx6ul_tsc_pm_ops,
513 imx6ul_tsc_suspend, imx6ul_tsc_resume);
514
515static const struct of_device_id imx6ul_tsc_match[] = {
516 { .compatible = "fsl,imx6ul-tsc", },
517 { /* sentinel */ }
518};
519MODULE_DEVICE_TABLE(of, imx6ul_tsc_match);
520
521static struct platform_driver imx6ul_tsc_driver = {
522 .driver = {
523 .name = "imx6ul-tsc",
524 .of_match_table = imx6ul_tsc_match,
525 .pm = &imx6ul_tsc_pm_ops,
526 },
527 .probe = imx6ul_tsc_probe,
528};
529module_platform_driver(imx6ul_tsc_driver);
530
531MODULE_AUTHOR("Haibo Chen <haibo.chen@freescale.com>");
532MODULE_DESCRIPTION("Freescale i.MX6UL Touchscreen controller driver");
533MODULE_LICENSE("GPL v2");
1/*
2 * Freescale i.MX6UL touchscreen controller driver
3 *
4 * Copyright (C) 2015 Freescale Semiconductor, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/errno.h>
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/gpio/consumer.h>
15#include <linux/input.h>
16#include <linux/slab.h>
17#include <linux/completion.h>
18#include <linux/delay.h>
19#include <linux/of.h>
20#include <linux/interrupt.h>
21#include <linux/platform_device.h>
22#include <linux/clk.h>
23#include <linux/io.h>
24#include <linux/log2.h>
25
26/* ADC configuration registers field define */
27#define ADC_AIEN (0x1 << 7)
28#define ADC_CONV_DISABLE 0x1F
29#define ADC_AVGE (0x1 << 5)
30#define ADC_CAL (0x1 << 7)
31#define ADC_CALF 0x2
32#define ADC_12BIT_MODE (0x2 << 2)
33#define ADC_CONV_MODE_MASK (0x3 << 2)
34#define ADC_IPG_CLK 0x00
35#define ADC_INPUT_CLK_MASK 0x3
36#define ADC_CLK_DIV_8 (0x03 << 5)
37#define ADC_CLK_DIV_MASK (0x3 << 5)
38#define ADC_SHORT_SAMPLE_MODE (0x0 << 4)
39#define ADC_SAMPLE_MODE_MASK (0x1 << 4)
40#define ADC_HARDWARE_TRIGGER (0x1 << 13)
41#define ADC_AVGS_SHIFT 14
42#define ADC_AVGS_MASK (0x3 << 14)
43#define SELECT_CHANNEL_4 0x04
44#define SELECT_CHANNEL_1 0x01
45#define DISABLE_CONVERSION_INT (0x0 << 7)
46
47/* ADC registers */
48#define REG_ADC_HC0 0x00
49#define REG_ADC_HC1 0x04
50#define REG_ADC_HC2 0x08
51#define REG_ADC_HC3 0x0C
52#define REG_ADC_HC4 0x10
53#define REG_ADC_HS 0x14
54#define REG_ADC_R0 0x18
55#define REG_ADC_CFG 0x2C
56#define REG_ADC_GC 0x30
57#define REG_ADC_GS 0x34
58
59#define ADC_TIMEOUT msecs_to_jiffies(100)
60
61/* TSC registers */
62#define REG_TSC_BASIC_SETING 0x00
63#define REG_TSC_PRE_CHARGE_TIME 0x10
64#define REG_TSC_FLOW_CONTROL 0x20
65#define REG_TSC_MEASURE_VALUE 0x30
66#define REG_TSC_INT_EN 0x40
67#define REG_TSC_INT_SIG_EN 0x50
68#define REG_TSC_INT_STATUS 0x60
69#define REG_TSC_DEBUG_MODE 0x70
70#define REG_TSC_DEBUG_MODE2 0x80
71
72/* TSC configuration registers field define */
73#define DETECT_4_WIRE_MODE (0x0 << 4)
74#define AUTO_MEASURE 0x1
75#define MEASURE_SIGNAL 0x1
76#define DETECT_SIGNAL (0x1 << 4)
77#define VALID_SIGNAL (0x1 << 8)
78#define MEASURE_INT_EN 0x1
79#define MEASURE_SIG_EN 0x1
80#define VALID_SIG_EN (0x1 << 8)
81#define DE_GLITCH_2 (0x2 << 29)
82#define START_SENSE (0x1 << 12)
83#define TSC_DISABLE (0x1 << 16)
84#define DETECT_MODE 0x2
85
86struct imx6ul_tsc {
87 struct device *dev;
88 struct input_dev *input;
89 void __iomem *tsc_regs;
90 void __iomem *adc_regs;
91 struct clk *tsc_clk;
92 struct clk *adc_clk;
93 struct gpio_desc *xnur_gpio;
94
95 u32 measure_delay_time;
96 u32 pre_charge_time;
97 bool average_enable;
98 u32 average_select;
99
100 struct completion completion;
101};
102
103/*
104 * TSC module need ADC to get the measure value. So
105 * before config TSC, we should initialize ADC module.
106 */
107static int imx6ul_adc_init(struct imx6ul_tsc *tsc)
108{
109 u32 adc_hc = 0;
110 u32 adc_gc;
111 u32 adc_gs;
112 u32 adc_cfg;
113 unsigned long timeout;
114
115 reinit_completion(&tsc->completion);
116
117 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
118 adc_cfg &= ~(ADC_CONV_MODE_MASK | ADC_INPUT_CLK_MASK);
119 adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK;
120 adc_cfg &= ~(ADC_CLK_DIV_MASK | ADC_SAMPLE_MODE_MASK);
121 adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE;
122 if (tsc->average_enable) {
123 adc_cfg &= ~ADC_AVGS_MASK;
124 adc_cfg |= (tsc->average_select) << ADC_AVGS_SHIFT;
125 }
126 adc_cfg &= ~ADC_HARDWARE_TRIGGER;
127 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
128
129 /* enable calibration interrupt */
130 adc_hc |= ADC_AIEN;
131 adc_hc |= ADC_CONV_DISABLE;
132 writel(adc_hc, tsc->adc_regs + REG_ADC_HC0);
133
134 /* start ADC calibration */
135 adc_gc = readl(tsc->adc_regs + REG_ADC_GC);
136 adc_gc |= ADC_CAL;
137 if (tsc->average_enable)
138 adc_gc |= ADC_AVGE;
139 writel(adc_gc, tsc->adc_regs + REG_ADC_GC);
140
141 timeout = wait_for_completion_timeout
142 (&tsc->completion, ADC_TIMEOUT);
143 if (timeout == 0) {
144 dev_err(tsc->dev, "Timeout for adc calibration\n");
145 return -ETIMEDOUT;
146 }
147
148 adc_gs = readl(tsc->adc_regs + REG_ADC_GS);
149 if (adc_gs & ADC_CALF) {
150 dev_err(tsc->dev, "ADC calibration failed\n");
151 return -EINVAL;
152 }
153
154 /* TSC need the ADC work in hardware trigger */
155 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
156 adc_cfg |= ADC_HARDWARE_TRIGGER;
157 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
158
159 return 0;
160}
161
162/*
163 * This is a TSC workaround. Currently TSC misconnect two
164 * ADC channels, this function remap channel configure for
165 * hardware trigger.
166 */
167static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc)
168{
169 u32 adc_hc0, adc_hc1, adc_hc2, adc_hc3, adc_hc4;
170
171 adc_hc0 = DISABLE_CONVERSION_INT;
172 writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0);
173
174 adc_hc1 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_4;
175 writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1);
176
177 adc_hc2 = DISABLE_CONVERSION_INT;
178 writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2);
179
180 adc_hc3 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_1;
181 writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3);
182
183 adc_hc4 = DISABLE_CONVERSION_INT;
184 writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4);
185}
186
187/*
188 * TSC setting, confige the pre-charge time and measure delay time.
189 * different touch screen may need different pre-charge time and
190 * measure delay time.
191 */
192static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
193{
194 u32 basic_setting = 0;
195 u32 start;
196
197 basic_setting |= tsc->measure_delay_time << 8;
198 basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE;
199 writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING);
200
201 writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
202
203 writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME);
204 writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN);
205 writel(MEASURE_SIG_EN | VALID_SIG_EN,
206 tsc->tsc_regs + REG_TSC_INT_SIG_EN);
207
208 /* start sense detection */
209 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
210 start |= START_SENSE;
211 start &= ~TSC_DISABLE;
212 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
213}
214
215static int imx6ul_tsc_init(struct imx6ul_tsc *tsc)
216{
217 int err;
218
219 err = imx6ul_adc_init(tsc);
220 if (err)
221 return err;
222 imx6ul_tsc_channel_config(tsc);
223 imx6ul_tsc_set(tsc);
224
225 return 0;
226}
227
228static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc)
229{
230 u32 tsc_flow;
231 u32 adc_cfg;
232
233 /* TSC controller enters to idle status */
234 tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
235 tsc_flow |= TSC_DISABLE;
236 writel(tsc_flow, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
237
238 /* ADC controller enters to stop mode */
239 adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0);
240 adc_cfg |= ADC_CONV_DISABLE;
241 writel(adc_cfg, tsc->adc_regs + REG_ADC_HC0);
242}
243
244/* Delay some time (max 2ms), wait the pre-charge done. */
245static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc)
246{
247 unsigned long timeout = jiffies + msecs_to_jiffies(2);
248 u32 state_machine;
249 u32 debug_mode2;
250
251 do {
252 if (time_after(jiffies, timeout))
253 return false;
254
255 usleep_range(200, 400);
256 debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
257 state_machine = (debug_mode2 >> 20) & 0x7;
258 } while (state_machine != DETECT_MODE);
259
260 usleep_range(200, 400);
261 return true;
262}
263
264static irqreturn_t tsc_irq_fn(int irq, void *dev_id)
265{
266 struct imx6ul_tsc *tsc = dev_id;
267 u32 status;
268 u32 value;
269 u32 x, y;
270 u32 start;
271
272 status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS);
273
274 /* write 1 to clear the bit measure-signal */
275 writel(MEASURE_SIGNAL | DETECT_SIGNAL,
276 tsc->tsc_regs + REG_TSC_INT_STATUS);
277
278 /* It's a HW self-clean bit. Set this bit and start sense detection */
279 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
280 start |= START_SENSE;
281 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
282
283 if (status & MEASURE_SIGNAL) {
284 value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE);
285 x = (value >> 16) & 0x0fff;
286 y = value & 0x0fff;
287
288 /*
289 * In detect mode, we can get the xnur gpio value,
290 * otherwise assume contact is stiull active.
291 */
292 if (!tsc_wait_detect_mode(tsc) ||
293 gpiod_get_value_cansleep(tsc->xnur_gpio)) {
294 input_report_key(tsc->input, BTN_TOUCH, 1);
295 input_report_abs(tsc->input, ABS_X, x);
296 input_report_abs(tsc->input, ABS_Y, y);
297 } else {
298 input_report_key(tsc->input, BTN_TOUCH, 0);
299 }
300
301 input_sync(tsc->input);
302 }
303
304 return IRQ_HANDLED;
305}
306
307static irqreturn_t adc_irq_fn(int irq, void *dev_id)
308{
309 struct imx6ul_tsc *tsc = dev_id;
310 u32 coco;
311 u32 value;
312
313 coco = readl(tsc->adc_regs + REG_ADC_HS);
314 if (coco & 0x01) {
315 value = readl(tsc->adc_regs + REG_ADC_R0);
316 complete(&tsc->completion);
317 }
318
319 return IRQ_HANDLED;
320}
321
322static int imx6ul_tsc_open(struct input_dev *input_dev)
323{
324 struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
325 int err;
326
327 err = clk_prepare_enable(tsc->adc_clk);
328 if (err) {
329 dev_err(tsc->dev,
330 "Could not prepare or enable the adc clock: %d\n",
331 err);
332 return err;
333 }
334
335 err = clk_prepare_enable(tsc->tsc_clk);
336 if (err) {
337 dev_err(tsc->dev,
338 "Could not prepare or enable the tsc clock: %d\n",
339 err);
340 clk_disable_unprepare(tsc->adc_clk);
341 return err;
342 }
343
344 return imx6ul_tsc_init(tsc);
345}
346
347static void imx6ul_tsc_close(struct input_dev *input_dev)
348{
349 struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
350
351 imx6ul_tsc_disable(tsc);
352
353 clk_disable_unprepare(tsc->tsc_clk);
354 clk_disable_unprepare(tsc->adc_clk);
355}
356
357static int imx6ul_tsc_probe(struct platform_device *pdev)
358{
359 struct device_node *np = pdev->dev.of_node;
360 struct imx6ul_tsc *tsc;
361 struct input_dev *input_dev;
362 struct resource *tsc_mem;
363 struct resource *adc_mem;
364 int err;
365 int tsc_irq;
366 int adc_irq;
367 u32 average_samples;
368
369 tsc = devm_kzalloc(&pdev->dev, sizeof(*tsc), GFP_KERNEL);
370 if (!tsc)
371 return -ENOMEM;
372
373 input_dev = devm_input_allocate_device(&pdev->dev);
374 if (!input_dev)
375 return -ENOMEM;
376
377 input_dev->name = "iMX6UL Touchscreen Controller";
378 input_dev->id.bustype = BUS_HOST;
379
380 input_dev->open = imx6ul_tsc_open;
381 input_dev->close = imx6ul_tsc_close;
382
383 input_set_capability(input_dev, EV_KEY, BTN_TOUCH);
384 input_set_abs_params(input_dev, ABS_X, 0, 0xFFF, 0, 0);
385 input_set_abs_params(input_dev, ABS_Y, 0, 0xFFF, 0, 0);
386
387 input_set_drvdata(input_dev, tsc);
388
389 tsc->dev = &pdev->dev;
390 tsc->input = input_dev;
391 init_completion(&tsc->completion);
392
393 tsc->xnur_gpio = devm_gpiod_get(&pdev->dev, "xnur", GPIOD_IN);
394 if (IS_ERR(tsc->xnur_gpio)) {
395 err = PTR_ERR(tsc->xnur_gpio);
396 dev_err(&pdev->dev,
397 "failed to request GPIO tsc_X- (xnur): %d\n", err);
398 return err;
399 }
400
401 tsc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
402 tsc->tsc_regs = devm_ioremap_resource(&pdev->dev, tsc_mem);
403 if (IS_ERR(tsc->tsc_regs)) {
404 err = PTR_ERR(tsc->tsc_regs);
405 dev_err(&pdev->dev, "failed to remap tsc memory: %d\n", err);
406 return err;
407 }
408
409 adc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
410 tsc->adc_regs = devm_ioremap_resource(&pdev->dev, adc_mem);
411 if (IS_ERR(tsc->adc_regs)) {
412 err = PTR_ERR(tsc->adc_regs);
413 dev_err(&pdev->dev, "failed to remap adc memory: %d\n", err);
414 return err;
415 }
416
417 tsc->tsc_clk = devm_clk_get(&pdev->dev, "tsc");
418 if (IS_ERR(tsc->tsc_clk)) {
419 err = PTR_ERR(tsc->tsc_clk);
420 dev_err(&pdev->dev, "failed getting tsc clock: %d\n", err);
421 return err;
422 }
423
424 tsc->adc_clk = devm_clk_get(&pdev->dev, "adc");
425 if (IS_ERR(tsc->adc_clk)) {
426 err = PTR_ERR(tsc->adc_clk);
427 dev_err(&pdev->dev, "failed getting adc clock: %d\n", err);
428 return err;
429 }
430
431 tsc_irq = platform_get_irq(pdev, 0);
432 if (tsc_irq < 0) {
433 dev_err(&pdev->dev, "no tsc irq resource?\n");
434 return tsc_irq;
435 }
436
437 adc_irq = platform_get_irq(pdev, 1);
438 if (adc_irq < 0) {
439 dev_err(&pdev->dev, "no adc irq resource?\n");
440 return adc_irq;
441 }
442
443 err = devm_request_threaded_irq(tsc->dev, tsc_irq,
444 NULL, tsc_irq_fn, IRQF_ONESHOT,
445 dev_name(&pdev->dev), tsc);
446 if (err) {
447 dev_err(&pdev->dev,
448 "failed requesting tsc irq %d: %d\n",
449 tsc_irq, err);
450 return err;
451 }
452
453 err = devm_request_irq(tsc->dev, adc_irq, adc_irq_fn, 0,
454 dev_name(&pdev->dev), tsc);
455 if (err) {
456 dev_err(&pdev->dev,
457 "failed requesting adc irq %d: %d\n",
458 adc_irq, err);
459 return err;
460 }
461
462 err = of_property_read_u32(np, "measure-delay-time",
463 &tsc->measure_delay_time);
464 if (err)
465 tsc->measure_delay_time = 0xffff;
466
467 err = of_property_read_u32(np, "pre-charge-time",
468 &tsc->pre_charge_time);
469 if (err)
470 tsc->pre_charge_time = 0xfff;
471
472 err = of_property_read_u32(np, "touchscreen-average-samples",
473 &average_samples);
474 if (err)
475 average_samples = 1;
476
477 switch (average_samples) {
478 case 1:
479 tsc->average_enable = false;
480 tsc->average_select = 0; /* value unused; initialize anyway */
481 break;
482 case 4:
483 case 8:
484 case 16:
485 case 32:
486 tsc->average_enable = true;
487 tsc->average_select = ilog2(average_samples) - 2;
488 break;
489 default:
490 dev_err(&pdev->dev,
491 "touchscreen-average-samples (%u) must be 1, 4, 8, 16 or 32\n",
492 average_samples);
493 return -EINVAL;
494 }
495
496 err = input_register_device(tsc->input);
497 if (err) {
498 dev_err(&pdev->dev,
499 "failed to register input device: %d\n", err);
500 return err;
501 }
502
503 platform_set_drvdata(pdev, tsc);
504 return 0;
505}
506
507static int __maybe_unused imx6ul_tsc_suspend(struct device *dev)
508{
509 struct platform_device *pdev = to_platform_device(dev);
510 struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
511 struct input_dev *input_dev = tsc->input;
512
513 mutex_lock(&input_dev->mutex);
514
515 if (input_dev->users) {
516 imx6ul_tsc_disable(tsc);
517
518 clk_disable_unprepare(tsc->tsc_clk);
519 clk_disable_unprepare(tsc->adc_clk);
520 }
521
522 mutex_unlock(&input_dev->mutex);
523
524 return 0;
525}
526
527static int __maybe_unused imx6ul_tsc_resume(struct device *dev)
528{
529 struct platform_device *pdev = to_platform_device(dev);
530 struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
531 struct input_dev *input_dev = tsc->input;
532 int retval = 0;
533
534 mutex_lock(&input_dev->mutex);
535
536 if (input_dev->users) {
537 retval = clk_prepare_enable(tsc->adc_clk);
538 if (retval)
539 goto out;
540
541 retval = clk_prepare_enable(tsc->tsc_clk);
542 if (retval) {
543 clk_disable_unprepare(tsc->adc_clk);
544 goto out;
545 }
546
547 retval = imx6ul_tsc_init(tsc);
548 }
549
550out:
551 mutex_unlock(&input_dev->mutex);
552 return retval;
553}
554
555static SIMPLE_DEV_PM_OPS(imx6ul_tsc_pm_ops,
556 imx6ul_tsc_suspend, imx6ul_tsc_resume);
557
558static const struct of_device_id imx6ul_tsc_match[] = {
559 { .compatible = "fsl,imx6ul-tsc", },
560 { /* sentinel */ }
561};
562MODULE_DEVICE_TABLE(of, imx6ul_tsc_match);
563
564static struct platform_driver imx6ul_tsc_driver = {
565 .driver = {
566 .name = "imx6ul-tsc",
567 .of_match_table = imx6ul_tsc_match,
568 .pm = &imx6ul_tsc_pm_ops,
569 },
570 .probe = imx6ul_tsc_probe,
571};
572module_platform_driver(imx6ul_tsc_driver);
573
574MODULE_AUTHOR("Haibo Chen <haibo.chen@freescale.com>");
575MODULE_DESCRIPTION("Freescale i.MX6UL Touchscreen controller driver");
576MODULE_LICENSE("GPL v2");