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1/*
2 * Analog Devices ADV7511 HDMI transmitter driver
3 *
4 * Copyright 2012 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#ifndef __DRM_I2C_ADV7511_H__
10#define __DRM_I2C_ADV7511_H__
11
12#include <linux/hdmi.h>
13
14#define ADV7511_REG_CHIP_REVISION 0x00
15#define ADV7511_REG_N0 0x01
16#define ADV7511_REG_N1 0x02
17#define ADV7511_REG_N2 0x03
18#define ADV7511_REG_SPDIF_FREQ 0x04
19#define ADV7511_REG_CTS_AUTOMATIC1 0x05
20#define ADV7511_REG_CTS_AUTOMATIC2 0x06
21#define ADV7511_REG_CTS_MANUAL0 0x07
22#define ADV7511_REG_CTS_MANUAL1 0x08
23#define ADV7511_REG_CTS_MANUAL2 0x09
24#define ADV7511_REG_AUDIO_SOURCE 0x0a
25#define ADV7511_REG_AUDIO_CONFIG 0x0b
26#define ADV7511_REG_I2S_CONFIG 0x0c
27#define ADV7511_REG_I2S_WIDTH 0x0d
28#define ADV7511_REG_AUDIO_SUB_SRC0 0x0e
29#define ADV7511_REG_AUDIO_SUB_SRC1 0x0f
30#define ADV7511_REG_AUDIO_SUB_SRC2 0x10
31#define ADV7511_REG_AUDIO_SUB_SRC3 0x11
32#define ADV7511_REG_AUDIO_CFG1 0x12
33#define ADV7511_REG_AUDIO_CFG2 0x13
34#define ADV7511_REG_AUDIO_CFG3 0x14
35#define ADV7511_REG_I2C_FREQ_ID_CFG 0x15
36#define ADV7511_REG_VIDEO_INPUT_CFG1 0x16
37#define ADV7511_REG_CSC_UPPER(x) (0x18 + (x) * 2)
38#define ADV7511_REG_CSC_LOWER(x) (0x19 + (x) * 2)
39#define ADV7511_REG_SYNC_DECODER(x) (0x30 + (x))
40#define ADV7511_REG_DE_GENERATOR (0x35 + (x))
41#define ADV7511_REG_PIXEL_REPETITION 0x3b
42#define ADV7511_REG_VIC_MANUAL 0x3c
43#define ADV7511_REG_VIC_SEND 0x3d
44#define ADV7511_REG_VIC_DETECTED 0x3e
45#define ADV7511_REG_AUX_VIC_DETECTED 0x3f
46#define ADV7511_REG_PACKET_ENABLE0 0x40
47#define ADV7511_REG_POWER 0x41
48#define ADV7511_REG_STATUS 0x42
49#define ADV7511_REG_EDID_I2C_ADDR 0x43
50#define ADV7511_REG_PACKET_ENABLE1 0x44
51#define ADV7511_REG_PACKET_I2C_ADDR 0x45
52#define ADV7511_REG_DSD_ENABLE 0x46
53#define ADV7511_REG_VIDEO_INPUT_CFG2 0x48
54#define ADV7511_REG_INFOFRAME_UPDATE 0x4a
55#define ADV7511_REG_GC(x) (0x4b + (x)) /* 0x4b - 0x51 */
56#define ADV7511_REG_AVI_INFOFRAME_VERSION 0x52
57#define ADV7511_REG_AVI_INFOFRAME_LENGTH 0x53
58#define ADV7511_REG_AVI_INFOFRAME_CHECKSUM 0x54
59#define ADV7511_REG_AVI_INFOFRAME(x) (0x55 + (x)) /* 0x55 - 0x6f */
60#define ADV7511_REG_AUDIO_INFOFRAME_VERSION 0x70
61#define ADV7511_REG_AUDIO_INFOFRAME_LENGTH 0x71
62#define ADV7511_REG_AUDIO_INFOFRAME_CHECKSUM 0x72
63#define ADV7511_REG_AUDIO_INFOFRAME(x) (0x73 + (x)) /* 0x73 - 0x7c */
64#define ADV7511_REG_INT_ENABLE(x) (0x94 + (x))
65#define ADV7511_REG_INT(x) (0x96 + (x))
66#define ADV7511_REG_INPUT_CLK_DIV 0x9d
67#define ADV7511_REG_PLL_STATUS 0x9e
68#define ADV7511_REG_HDMI_POWER 0xa1
69#define ADV7511_REG_HDCP_HDMI_CFG 0xaf
70#define ADV7511_REG_AN(x) (0xb0 + (x)) /* 0xb0 - 0xb7 */
71#define ADV7511_REG_HDCP_STATUS 0xb8
72#define ADV7511_REG_BCAPS 0xbe
73#define ADV7511_REG_BKSV(x) (0xc0 + (x)) /* 0xc0 - 0xc3 */
74#define ADV7511_REG_EDID_SEGMENT 0xc4
75#define ADV7511_REG_DDC_STATUS 0xc8
76#define ADV7511_REG_EDID_READ_CTRL 0xc9
77#define ADV7511_REG_BSTATUS(x) (0xca + (x)) /* 0xca - 0xcb */
78#define ADV7511_REG_TIMING_GEN_SEQ 0xd0
79#define ADV7511_REG_POWER2 0xd6
80#define ADV7511_REG_HSYNC_PLACEMENT_MSB 0xfa
81
82#define ADV7511_REG_SYNC_ADJUSTMENT(x) (0xd7 + (x)) /* 0xd7 - 0xdc */
83#define ADV7511_REG_TMDS_CLOCK_INV 0xde
84#define ADV7511_REG_ARC_CTRL 0xdf
85#define ADV7511_REG_CEC_I2C_ADDR 0xe1
86#define ADV7511_REG_CEC_CTRL 0xe2
87#define ADV7511_REG_CHIP_ID_HIGH 0xf5
88#define ADV7511_REG_CHIP_ID_LOW 0xf6
89
90#define ADV7511_CSC_ENABLE BIT(7)
91#define ADV7511_CSC_UPDATE_MODE BIT(5)
92
93#define ADV7511_INT0_HPD BIT(7)
94#define ADV7511_INT0_VSYNC BIT(5)
95#define ADV7511_INT0_AUDIO_FIFO_FULL BIT(4)
96#define ADV7511_INT0_EDID_READY BIT(2)
97#define ADV7511_INT0_HDCP_AUTHENTICATED BIT(1)
98
99#define ADV7511_INT1_DDC_ERROR BIT(7)
100#define ADV7511_INT1_BKSV BIT(6)
101#define ADV7511_INT1_CEC_TX_READY BIT(5)
102#define ADV7511_INT1_CEC_TX_ARBIT_LOST BIT(4)
103#define ADV7511_INT1_CEC_TX_RETRY_TIMEOUT BIT(3)
104#define ADV7511_INT1_CEC_RX_READY3 BIT(2)
105#define ADV7511_INT1_CEC_RX_READY2 BIT(1)
106#define ADV7511_INT1_CEC_RX_READY1 BIT(0)
107
108#define ADV7511_ARC_CTRL_POWER_DOWN BIT(0)
109
110#define ADV7511_CEC_CTRL_POWER_DOWN BIT(0)
111
112#define ADV7511_POWER_POWER_DOWN BIT(6)
113
114#define ADV7511_HDMI_CFG_MODE_MASK 0x2
115#define ADV7511_HDMI_CFG_MODE_DVI 0x0
116#define ADV7511_HDMI_CFG_MODE_HDMI 0x2
117
118#define ADV7511_AUDIO_SELECT_I2C 0x0
119#define ADV7511_AUDIO_SELECT_SPDIF 0x1
120#define ADV7511_AUDIO_SELECT_DSD 0x2
121#define ADV7511_AUDIO_SELECT_HBR 0x3
122#define ADV7511_AUDIO_SELECT_DST 0x4
123
124#define ADV7511_I2S_SAMPLE_LEN_16 0x2
125#define ADV7511_I2S_SAMPLE_LEN_20 0x3
126#define ADV7511_I2S_SAMPLE_LEN_18 0x4
127#define ADV7511_I2S_SAMPLE_LEN_22 0x5
128#define ADV7511_I2S_SAMPLE_LEN_19 0x8
129#define ADV7511_I2S_SAMPLE_LEN_23 0x9
130#define ADV7511_I2S_SAMPLE_LEN_24 0xb
131#define ADV7511_I2S_SAMPLE_LEN_17 0xc
132#define ADV7511_I2S_SAMPLE_LEN_21 0xd
133
134#define ADV7511_SAMPLE_FREQ_44100 0x0
135#define ADV7511_SAMPLE_FREQ_48000 0x2
136#define ADV7511_SAMPLE_FREQ_32000 0x3
137#define ADV7511_SAMPLE_FREQ_88200 0x8
138#define ADV7511_SAMPLE_FREQ_96000 0xa
139#define ADV7511_SAMPLE_FREQ_176400 0xc
140#define ADV7511_SAMPLE_FREQ_192000 0xe
141
142#define ADV7511_STATUS_POWER_DOWN_POLARITY BIT(7)
143#define ADV7511_STATUS_HPD BIT(6)
144#define ADV7511_STATUS_MONITOR_SENSE BIT(5)
145#define ADV7511_STATUS_I2S_32BIT_MODE BIT(3)
146
147#define ADV7511_PACKET_ENABLE_N_CTS BIT(8+6)
148#define ADV7511_PACKET_ENABLE_AUDIO_SAMPLE BIT(8+5)
149#define ADV7511_PACKET_ENABLE_AVI_INFOFRAME BIT(8+4)
150#define ADV7511_PACKET_ENABLE_AUDIO_INFOFRAME BIT(8+3)
151#define ADV7511_PACKET_ENABLE_GC BIT(7)
152#define ADV7511_PACKET_ENABLE_SPD BIT(6)
153#define ADV7511_PACKET_ENABLE_MPEG BIT(5)
154#define ADV7511_PACKET_ENABLE_ACP BIT(4)
155#define ADV7511_PACKET_ENABLE_ISRC BIT(3)
156#define ADV7511_PACKET_ENABLE_GM BIT(2)
157#define ADV7511_PACKET_ENABLE_SPARE2 BIT(1)
158#define ADV7511_PACKET_ENABLE_SPARE1 BIT(0)
159
160#define ADV7511_REG_POWER2_HPD_SRC_MASK 0xc0
161#define ADV7511_REG_POWER2_HPD_SRC_BOTH 0x00
162#define ADV7511_REG_POWER2_HPD_SRC_HPD 0x40
163#define ADV7511_REG_POWER2_HPD_SRC_CEC 0x80
164#define ADV7511_REG_POWER2_HPD_SRC_NONE 0xc0
165#define ADV7511_REG_POWER2_TDMS_ENABLE BIT(4)
166#define ADV7511_REG_POWER2_GATE_INPUT_CLK BIT(0)
167
168#define ADV7511_LOW_REFRESH_RATE_NONE 0x0
169#define ADV7511_LOW_REFRESH_RATE_24HZ 0x1
170#define ADV7511_LOW_REFRESH_RATE_25HZ 0x2
171#define ADV7511_LOW_REFRESH_RATE_30HZ 0x3
172
173#define ADV7511_AUDIO_CFG3_LEN_MASK 0x0f
174#define ADV7511_I2C_FREQ_ID_CFG_RATE_MASK 0xf0
175
176#define ADV7511_AUDIO_SOURCE_I2S 0
177#define ADV7511_AUDIO_SOURCE_SPDIF 1
178
179#define ADV7511_I2S_FORMAT_I2S 0
180#define ADV7511_I2S_FORMAT_RIGHT_J 1
181#define ADV7511_I2S_FORMAT_LEFT_J 2
182
183#define ADV7511_PACKET(p, x) ((p) * 0x20 + (x))
184#define ADV7511_PACKET_SDP(x) ADV7511_PACKET(0, x)
185#define ADV7511_PACKET_MPEG(x) ADV7511_PACKET(1, x)
186#define ADV7511_PACKET_ACP(x) ADV7511_PACKET(2, x)
187#define ADV7511_PACKET_ISRC1(x) ADV7511_PACKET(3, x)
188#define ADV7511_PACKET_ISRC2(x) ADV7511_PACKET(4, x)
189#define ADV7511_PACKET_GM(x) ADV7511_PACKET(5, x)
190#define ADV7511_PACKET_SPARE(x) ADV7511_PACKET(6, x)
191
192enum adv7511_input_clock {
193 ADV7511_INPUT_CLOCK_1X,
194 ADV7511_INPUT_CLOCK_2X,
195 ADV7511_INPUT_CLOCK_DDR,
196};
197
198enum adv7511_input_justification {
199 ADV7511_INPUT_JUSTIFICATION_EVENLY = 0,
200 ADV7511_INPUT_JUSTIFICATION_RIGHT = 1,
201 ADV7511_INPUT_JUSTIFICATION_LEFT = 2,
202};
203
204enum adv7511_input_sync_pulse {
205 ADV7511_INPUT_SYNC_PULSE_DE = 0,
206 ADV7511_INPUT_SYNC_PULSE_HSYNC = 1,
207 ADV7511_INPUT_SYNC_PULSE_VSYNC = 2,
208 ADV7511_INPUT_SYNC_PULSE_NONE = 3,
209};
210
211/**
212 * enum adv7511_sync_polarity - Polarity for the input sync signals
213 * @ADV7511_SYNC_POLARITY_PASSTHROUGH: Sync polarity matches that of
214 * the currently configured mode.
215 * @ADV7511_SYNC_POLARITY_LOW: Sync polarity is low
216 * @ADV7511_SYNC_POLARITY_HIGH: Sync polarity is high
217 *
218 * If the polarity is set to either LOW or HIGH the driver will configure the
219 * ADV7511 to internally invert the sync signal if required to match the sync
220 * polarity setting for the currently selected output mode.
221 *
222 * If the polarity is set to PASSTHROUGH, the ADV7511 will route the signal
223 * unchanged. This is used when the upstream graphics core already generates
224 * the sync signals with the correct polarity.
225 */
226enum adv7511_sync_polarity {
227 ADV7511_SYNC_POLARITY_PASSTHROUGH,
228 ADV7511_SYNC_POLARITY_LOW,
229 ADV7511_SYNC_POLARITY_HIGH,
230};
231
232/**
233 * struct adv7511_link_config - Describes adv7511 hardware configuration
234 * @input_color_depth: Number of bits per color component (8, 10 or 12)
235 * @input_colorspace: The input colorspace (RGB, YUV444, YUV422)
236 * @input_clock: The input video clock style (1x, 2x, DDR)
237 * @input_style: The input component arrangement variant
238 * @input_justification: Video input format bit justification
239 * @clock_delay: Clock delay for the input clock (in ps)
240 * @embedded_sync: Video input uses BT.656-style embedded sync
241 * @sync_pulse: Select the sync pulse
242 * @vsync_polarity: vsync input signal configuration
243 * @hsync_polarity: hsync input signal configuration
244 */
245struct adv7511_link_config {
246 unsigned int input_color_depth;
247 enum hdmi_colorspace input_colorspace;
248 enum adv7511_input_clock input_clock;
249 unsigned int input_style;
250 enum adv7511_input_justification input_justification;
251
252 int clock_delay;
253
254 bool embedded_sync;
255 enum adv7511_input_sync_pulse sync_pulse;
256 enum adv7511_sync_polarity vsync_polarity;
257 enum adv7511_sync_polarity hsync_polarity;
258};
259
260/**
261 * enum adv7511_csc_scaling - Scaling factor for the ADV7511 CSC
262 * @ADV7511_CSC_SCALING_1: CSC results are not scaled
263 * @ADV7511_CSC_SCALING_2: CSC results are scaled by a factor of two
264 * @ADV7511_CSC_SCALING_4: CSC results are scalled by a factor of four
265 */
266enum adv7511_csc_scaling {
267 ADV7511_CSC_SCALING_1 = 0,
268 ADV7511_CSC_SCALING_2 = 1,
269 ADV7511_CSC_SCALING_4 = 2,
270};
271
272/**
273 * struct adv7511_video_config - Describes adv7511 hardware configuration
274 * @csc_enable: Whether to enable color space conversion
275 * @csc_scaling_factor: Color space conversion scaling factor
276 * @csc_coefficents: Color space conversion coefficents
277 * @hdmi_mode: Whether to use HDMI or DVI output mode
278 * @avi_infoframe: HDMI infoframe
279 */
280struct adv7511_video_config {
281 bool csc_enable;
282 enum adv7511_csc_scaling csc_scaling_factor;
283 const uint16_t *csc_coefficents;
284
285 bool hdmi_mode;
286 struct hdmi_avi_infoframe avi_infoframe;
287};
288
289#endif /* __DRM_I2C_ADV7511_H__ */