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v4.6
  1/*
  2 * FPGA Manager Core
  3 *
  4 *  Copyright (C) 2013-2015 Altera Corporation
  5 *
  6 * With code from the mailing list:
  7 * Copyright (C) 2013 Xilinx, Inc.
  8 *
  9 * This program is free software; you can redistribute it and/or modify it
 10 * under the terms and conditions of the GNU General Public License,
 11 * version 2, as published by the Free Software Foundation.
 12 *
 13 * This program is distributed in the hope it will be useful, but WITHOUT
 14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 15 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 16 * more details.
 17 *
 18 * You should have received a copy of the GNU General Public License along with
 19 * this program.  If not, see <http://www.gnu.org/licenses/>.
 20 */
 21#include <linux/firmware.h>
 22#include <linux/fpga/fpga-mgr.h>
 23#include <linux/idr.h>
 24#include <linux/module.h>
 25#include <linux/of.h>
 26#include <linux/mutex.h>
 27#include <linux/slab.h>
 28
 29static DEFINE_IDA(fpga_mgr_ida);
 30static struct class *fpga_mgr_class;
 31
 32/**
 33 * fpga_mgr_buf_load - load fpga from image in buffer
 34 * @mgr:	fpga manager
 35 * @flags:	flags setting fpga confuration modes
 36 * @buf:	buffer contain fpga image
 37 * @count:	byte count of buf
 38 *
 39 * Step the low level fpga manager through the device-specific steps of getting
 40 * an FPGA ready to be configured, writing the image to it, then doing whatever
 41 * post-configuration steps necessary.  This code assumes the caller got the
 42 * mgr pointer from of_fpga_mgr_get() and checked that it is not an error code.
 
 43 *
 44 * Return: 0 on success, negative error code otherwise.
 45 */
 46int fpga_mgr_buf_load(struct fpga_manager *mgr, u32 flags, const char *buf,
 47		      size_t count)
 48{
 49	struct device *dev = &mgr->dev;
 50	int ret;
 51
 52	/*
 53	 * Call the low level driver's write_init function.  This will do the
 54	 * device-specific things to get the FPGA into the state where it is
 55	 * ready to receive an FPGA image.
 
 56	 */
 57	mgr->state = FPGA_MGR_STATE_WRITE_INIT;
 58	ret = mgr->mops->write_init(mgr, flags, buf, count);
 
 59	if (ret) {
 60		dev_err(dev, "Error preparing FPGA for writing\n");
 61		mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
 62		return ret;
 63	}
 64
 65	/*
 66	 * Write the FPGA image to the FPGA.
 67	 */
 68	mgr->state = FPGA_MGR_STATE_WRITE;
 69	ret = mgr->mops->write(mgr, buf, count);
 70	if (ret) {
 71		dev_err(dev, "Error while writing image data to FPGA\n");
 72		mgr->state = FPGA_MGR_STATE_WRITE_ERR;
 73		return ret;
 74	}
 75
 76	/*
 77	 * After all the FPGA image has been written, do the device specific
 78	 * steps to finish and set the FPGA into operating mode.
 79	 */
 80	mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
 81	ret = mgr->mops->write_complete(mgr, flags);
 82	if (ret) {
 83		dev_err(dev, "Error after writing image data to FPGA\n");
 84		mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
 85		return ret;
 86	}
 87	mgr->state = FPGA_MGR_STATE_OPERATING;
 88
 89	return 0;
 90}
 91EXPORT_SYMBOL_GPL(fpga_mgr_buf_load);
 92
 93/**
 94 * fpga_mgr_firmware_load - request firmware and load to fpga
 95 * @mgr:	fpga manager
 96 * @flags:	flags setting fpga confuration modes
 97 * @image_name:	name of image file on the firmware search path
 98 *
 99 * Request an FPGA image using the firmware class, then write out to the FPGA.
100 * Update the state before each step to provide info on what step failed if
101 * there is a failure.  This code assumes the caller got the mgr pointer
102 * from of_fpga_mgr_get() and checked that it is not an error code.
 
103 *
104 * Return: 0 on success, negative error code otherwise.
105 */
106int fpga_mgr_firmware_load(struct fpga_manager *mgr, u32 flags,
 
107			   const char *image_name)
108{
109	struct device *dev = &mgr->dev;
110	const struct firmware *fw;
111	int ret;
112
113	dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
114
115	mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
116
117	ret = request_firmware(&fw, image_name, dev);
118	if (ret) {
119		mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
120		dev_err(dev, "Error requesting firmware %s\n", image_name);
121		return ret;
122	}
123
124	ret = fpga_mgr_buf_load(mgr, flags, fw->data, fw->size);
125
126	release_firmware(fw);
127
128	return ret;
129}
130EXPORT_SYMBOL_GPL(fpga_mgr_firmware_load);
131
132static const char * const state_str[] = {
133	[FPGA_MGR_STATE_UNKNOWN] =		"unknown",
134	[FPGA_MGR_STATE_POWER_OFF] =		"power off",
135	[FPGA_MGR_STATE_POWER_UP] =		"power up",
136	[FPGA_MGR_STATE_RESET] =		"reset",
137
138	/* requesting FPGA image from firmware */
139	[FPGA_MGR_STATE_FIRMWARE_REQ] =		"firmware request",
140	[FPGA_MGR_STATE_FIRMWARE_REQ_ERR] =	"firmware request error",
141
142	/* Preparing FPGA to receive image */
143	[FPGA_MGR_STATE_WRITE_INIT] =		"write init",
144	[FPGA_MGR_STATE_WRITE_INIT_ERR] =	"write init error",
145
146	/* Writing image to FPGA */
147	[FPGA_MGR_STATE_WRITE] =		"write",
148	[FPGA_MGR_STATE_WRITE_ERR] =		"write error",
149
150	/* Finishing configuration after image has been written */
151	[FPGA_MGR_STATE_WRITE_COMPLETE] =	"write complete",
152	[FPGA_MGR_STATE_WRITE_COMPLETE_ERR] =	"write complete error",
153
154	/* FPGA reports to be in normal operating mode */
155	[FPGA_MGR_STATE_OPERATING] =		"operating",
156};
157
158static ssize_t name_show(struct device *dev,
159			 struct device_attribute *attr, char *buf)
160{
161	struct fpga_manager *mgr = to_fpga_manager(dev);
162
163	return sprintf(buf, "%s\n", mgr->name);
164}
165
166static ssize_t state_show(struct device *dev,
167			  struct device_attribute *attr, char *buf)
168{
169	struct fpga_manager *mgr = to_fpga_manager(dev);
170
171	return sprintf(buf, "%s\n", state_str[mgr->state]);
172}
173
174static DEVICE_ATTR_RO(name);
175static DEVICE_ATTR_RO(state);
176
177static struct attribute *fpga_mgr_attrs[] = {
178	&dev_attr_name.attr,
179	&dev_attr_state.attr,
180	NULL,
181};
182ATTRIBUTE_GROUPS(fpga_mgr);
183
184static int fpga_mgr_of_node_match(struct device *dev, const void *data)
185{
186	return dev->of_node == data;
187}
188
189/**
190 * of_fpga_mgr_get - get an exclusive reference to a fpga mgr
191 * @node:	device node
192 *
193 * Given a device node, get an exclusive reference to a fpga mgr.
194 *
195 * Return: fpga manager struct or IS_ERR() condition containing error code.
196 */
197struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
198{
199	struct fpga_manager *mgr;
200	struct device *dev;
201	int ret = -ENODEV;
202
203	dev = class_find_device(fpga_mgr_class, NULL, node,
204				fpga_mgr_of_node_match);
205	if (!dev)
206		return ERR_PTR(-ENODEV);
207
208	mgr = to_fpga_manager(dev);
209	if (!mgr)
210		goto err_dev;
211
212	/* Get exclusive use of fpga manager */
213	if (!mutex_trylock(&mgr->ref_mutex)) {
214		ret = -EBUSY;
215		goto err_dev;
216	}
217
218	if (!try_module_get(dev->parent->driver->owner))
219		goto err_ll_mod;
220
221	return mgr;
222
223err_ll_mod:
224	mutex_unlock(&mgr->ref_mutex);
225err_dev:
226	put_device(dev);
227	return ERR_PTR(ret);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
228}
229EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
230
231/**
232 * fpga_mgr_put - release a reference to a fpga manager
233 * @mgr:	fpga manager structure
234 */
235void fpga_mgr_put(struct fpga_manager *mgr)
236{
237	module_put(mgr->dev.parent->driver->owner);
238	mutex_unlock(&mgr->ref_mutex);
239	put_device(&mgr->dev);
240}
241EXPORT_SYMBOL_GPL(fpga_mgr_put);
242
243/**
244 * fpga_mgr_register - register a low level fpga manager driver
245 * @dev:	fpga manager device from pdev
246 * @name:	fpga manager name
247 * @mops:	pointer to structure of fpga manager ops
248 * @priv:	fpga manager private data
249 *
250 * Return: 0 on success, negative error code otherwise.
251 */
252int fpga_mgr_register(struct device *dev, const char *name,
253		      const struct fpga_manager_ops *mops,
254		      void *priv)
255{
256	struct fpga_manager *mgr;
257	int id, ret;
258
259	if (!mops || !mops->write_init || !mops->write ||
260	    !mops->write_complete || !mops->state) {
261		dev_err(dev, "Attempt to register without fpga_manager_ops\n");
262		return -EINVAL;
263	}
264
265	if (!name || !strlen(name)) {
266		dev_err(dev, "Attempt to register with no name!\n");
267		return -EINVAL;
268	}
269
270	mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
271	if (!mgr)
272		return -ENOMEM;
273
274	id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
275	if (id < 0) {
276		ret = id;
277		goto error_kfree;
278	}
279
280	mutex_init(&mgr->ref_mutex);
281
282	mgr->name = name;
283	mgr->mops = mops;
284	mgr->priv = priv;
285
286	/*
287	 * Initialize framework state by requesting low level driver read state
288	 * from device.  FPGA may be in reset mode or may have been programmed
289	 * by bootloader or EEPROM.
290	 */
291	mgr->state = mgr->mops->state(mgr);
292
293	device_initialize(&mgr->dev);
294	mgr->dev.class = fpga_mgr_class;
295	mgr->dev.parent = dev;
296	mgr->dev.of_node = dev->of_node;
297	mgr->dev.id = id;
298	dev_set_drvdata(dev, mgr);
299
300	ret = dev_set_name(&mgr->dev, "fpga%d", id);
301	if (ret)
302		goto error_device;
303
304	ret = device_add(&mgr->dev);
305	if (ret)
306		goto error_device;
307
308	dev_info(&mgr->dev, "%s registered\n", mgr->name);
309
310	return 0;
311
312error_device:
313	ida_simple_remove(&fpga_mgr_ida, id);
314error_kfree:
315	kfree(mgr);
316
317	return ret;
318}
319EXPORT_SYMBOL_GPL(fpga_mgr_register);
320
321/**
322 * fpga_mgr_unregister - unregister a low level fpga manager driver
323 * @dev:	fpga manager device from pdev
324 */
325void fpga_mgr_unregister(struct device *dev)
326{
327	struct fpga_manager *mgr = dev_get_drvdata(dev);
328
329	dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
330
331	/*
332	 * If the low level driver provides a method for putting fpga into
333	 * a desired state upon unregister, do it.
334	 */
335	if (mgr->mops->fpga_remove)
336		mgr->mops->fpga_remove(mgr);
337
338	device_unregister(&mgr->dev);
339}
340EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
341
342static void fpga_mgr_dev_release(struct device *dev)
343{
344	struct fpga_manager *mgr = to_fpga_manager(dev);
345
346	ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
347	kfree(mgr);
348}
349
350static int __init fpga_mgr_class_init(void)
351{
352	pr_info("FPGA manager framework\n");
353
354	fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
355	if (IS_ERR(fpga_mgr_class))
356		return PTR_ERR(fpga_mgr_class);
357
358	fpga_mgr_class->dev_groups = fpga_mgr_groups;
359	fpga_mgr_class->dev_release = fpga_mgr_dev_release;
360
361	return 0;
362}
363
364static void __exit fpga_mgr_class_exit(void)
365{
366	class_destroy(fpga_mgr_class);
367	ida_destroy(&fpga_mgr_ida);
368}
369
370MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
371MODULE_DESCRIPTION("FPGA manager framework");
372MODULE_LICENSE("GPL v2");
373
374subsys_initcall(fpga_mgr_class_init);
375module_exit(fpga_mgr_class_exit);
v4.10.11
  1/*
  2 * FPGA Manager Core
  3 *
  4 *  Copyright (C) 2013-2015 Altera Corporation
  5 *
  6 * With code from the mailing list:
  7 * Copyright (C) 2013 Xilinx, Inc.
  8 *
  9 * This program is free software; you can redistribute it and/or modify it
 10 * under the terms and conditions of the GNU General Public License,
 11 * version 2, as published by the Free Software Foundation.
 12 *
 13 * This program is distributed in the hope it will be useful, but WITHOUT
 14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 15 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 16 * more details.
 17 *
 18 * You should have received a copy of the GNU General Public License along with
 19 * this program.  If not, see <http://www.gnu.org/licenses/>.
 20 */
 21#include <linux/firmware.h>
 22#include <linux/fpga/fpga-mgr.h>
 23#include <linux/idr.h>
 24#include <linux/module.h>
 25#include <linux/of.h>
 26#include <linux/mutex.h>
 27#include <linux/slab.h>
 28
 29static DEFINE_IDA(fpga_mgr_ida);
 30static struct class *fpga_mgr_class;
 31
 32/**
 33 * fpga_mgr_buf_load - load fpga from image in buffer
 34 * @mgr:	fpga manager
 35 * @info:	fpga image specific information
 36 * @buf:	buffer contain fpga image
 37 * @count:	byte count of buf
 38 *
 39 * Step the low level fpga manager through the device-specific steps of getting
 40 * an FPGA ready to be configured, writing the image to it, then doing whatever
 41 * post-configuration steps necessary.  This code assumes the caller got the
 42 * mgr pointer from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is
 43 * not an error code.
 44 *
 45 * Return: 0 on success, negative error code otherwise.
 46 */
 47int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
 48		      const char *buf, size_t count)
 49{
 50	struct device *dev = &mgr->dev;
 51	int ret;
 52
 53	/*
 54	 * Call the low level driver's write_init function.  This will do the
 55	 * device-specific things to get the FPGA into the state where it is
 56	 * ready to receive an FPGA image. The low level driver only gets to
 57	 * see the first initial_header_size bytes in the buffer.
 58	 */
 59	mgr->state = FPGA_MGR_STATE_WRITE_INIT;
 60	ret = mgr->mops->write_init(mgr, info, buf,
 61				    min(mgr->mops->initial_header_size, count));
 62	if (ret) {
 63		dev_err(dev, "Error preparing FPGA for writing\n");
 64		mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
 65		return ret;
 66	}
 67
 68	/*
 69	 * Write the FPGA image to the FPGA.
 70	 */
 71	mgr->state = FPGA_MGR_STATE_WRITE;
 72	ret = mgr->mops->write(mgr, buf, count);
 73	if (ret) {
 74		dev_err(dev, "Error while writing image data to FPGA\n");
 75		mgr->state = FPGA_MGR_STATE_WRITE_ERR;
 76		return ret;
 77	}
 78
 79	/*
 80	 * After all the FPGA image has been written, do the device specific
 81	 * steps to finish and set the FPGA into operating mode.
 82	 */
 83	mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
 84	ret = mgr->mops->write_complete(mgr, info);
 85	if (ret) {
 86		dev_err(dev, "Error after writing image data to FPGA\n");
 87		mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
 88		return ret;
 89	}
 90	mgr->state = FPGA_MGR_STATE_OPERATING;
 91
 92	return 0;
 93}
 94EXPORT_SYMBOL_GPL(fpga_mgr_buf_load);
 95
 96/**
 97 * fpga_mgr_firmware_load - request firmware and load to fpga
 98 * @mgr:	fpga manager
 99 * @info:	fpga image specific information
100 * @image_name:	name of image file on the firmware search path
101 *
102 * Request an FPGA image using the firmware class, then write out to the FPGA.
103 * Update the state before each step to provide info on what step failed if
104 * there is a failure.  This code assumes the caller got the mgr pointer
105 * from of_fpga_mgr_get() or fpga_mgr_get() and checked that it is not an error
106 * code.
107 *
108 * Return: 0 on success, negative error code otherwise.
109 */
110int fpga_mgr_firmware_load(struct fpga_manager *mgr,
111			   struct fpga_image_info *info,
112			   const char *image_name)
113{
114	struct device *dev = &mgr->dev;
115	const struct firmware *fw;
116	int ret;
117
118	dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
119
120	mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
121
122	ret = request_firmware(&fw, image_name, dev);
123	if (ret) {
124		mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
125		dev_err(dev, "Error requesting firmware %s\n", image_name);
126		return ret;
127	}
128
129	ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size);
130
131	release_firmware(fw);
132
133	return ret;
134}
135EXPORT_SYMBOL_GPL(fpga_mgr_firmware_load);
136
137static const char * const state_str[] = {
138	[FPGA_MGR_STATE_UNKNOWN] =		"unknown",
139	[FPGA_MGR_STATE_POWER_OFF] =		"power off",
140	[FPGA_MGR_STATE_POWER_UP] =		"power up",
141	[FPGA_MGR_STATE_RESET] =		"reset",
142
143	/* requesting FPGA image from firmware */
144	[FPGA_MGR_STATE_FIRMWARE_REQ] =		"firmware request",
145	[FPGA_MGR_STATE_FIRMWARE_REQ_ERR] =	"firmware request error",
146
147	/* Preparing FPGA to receive image */
148	[FPGA_MGR_STATE_WRITE_INIT] =		"write init",
149	[FPGA_MGR_STATE_WRITE_INIT_ERR] =	"write init error",
150
151	/* Writing image to FPGA */
152	[FPGA_MGR_STATE_WRITE] =		"write",
153	[FPGA_MGR_STATE_WRITE_ERR] =		"write error",
154
155	/* Finishing configuration after image has been written */
156	[FPGA_MGR_STATE_WRITE_COMPLETE] =	"write complete",
157	[FPGA_MGR_STATE_WRITE_COMPLETE_ERR] =	"write complete error",
158
159	/* FPGA reports to be in normal operating mode */
160	[FPGA_MGR_STATE_OPERATING] =		"operating",
161};
162
163static ssize_t name_show(struct device *dev,
164			 struct device_attribute *attr, char *buf)
165{
166	struct fpga_manager *mgr = to_fpga_manager(dev);
167
168	return sprintf(buf, "%s\n", mgr->name);
169}
170
171static ssize_t state_show(struct device *dev,
172			  struct device_attribute *attr, char *buf)
173{
174	struct fpga_manager *mgr = to_fpga_manager(dev);
175
176	return sprintf(buf, "%s\n", state_str[mgr->state]);
177}
178
179static DEVICE_ATTR_RO(name);
180static DEVICE_ATTR_RO(state);
181
182static struct attribute *fpga_mgr_attrs[] = {
183	&dev_attr_name.attr,
184	&dev_attr_state.attr,
185	NULL,
186};
187ATTRIBUTE_GROUPS(fpga_mgr);
188
189struct fpga_manager *__fpga_mgr_get(struct device *dev)
 
 
 
 
 
 
 
 
 
 
 
 
 
190{
191	struct fpga_manager *mgr;
 
192	int ret = -ENODEV;
193
 
 
 
 
 
194	mgr = to_fpga_manager(dev);
195	if (!mgr)
196		goto err_dev;
197
198	/* Get exclusive use of fpga manager */
199	if (!mutex_trylock(&mgr->ref_mutex)) {
200		ret = -EBUSY;
201		goto err_dev;
202	}
203
204	if (!try_module_get(dev->parent->driver->owner))
205		goto err_ll_mod;
206
207	return mgr;
208
209err_ll_mod:
210	mutex_unlock(&mgr->ref_mutex);
211err_dev:
212	put_device(dev);
213	return ERR_PTR(ret);
214}
215
216static int fpga_mgr_dev_match(struct device *dev, const void *data)
217{
218	return dev->parent == data;
219}
220
221/**
222 * fpga_mgr_get - get an exclusive reference to a fpga mgr
223 * @dev:	parent device that fpga mgr was registered with
224 *
225 * Given a device, get an exclusive reference to a fpga mgr.
226 *
227 * Return: fpga manager struct or IS_ERR() condition containing error code.
228 */
229struct fpga_manager *fpga_mgr_get(struct device *dev)
230{
231	struct device *mgr_dev = class_find_device(fpga_mgr_class, NULL, dev,
232						   fpga_mgr_dev_match);
233	if (!mgr_dev)
234		return ERR_PTR(-ENODEV);
235
236	return __fpga_mgr_get(mgr_dev);
237}
238EXPORT_SYMBOL_GPL(fpga_mgr_get);
239
240static int fpga_mgr_of_node_match(struct device *dev, const void *data)
241{
242	return dev->of_node == data;
243}
244
245/**
246 * of_fpga_mgr_get - get an exclusive reference to a fpga mgr
247 * @node:	device node
248 *
249 * Given a device node, get an exclusive reference to a fpga mgr.
250 *
251 * Return: fpga manager struct or IS_ERR() condition containing error code.
252 */
253struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
254{
255	struct device *dev;
256
257	dev = class_find_device(fpga_mgr_class, NULL, node,
258				fpga_mgr_of_node_match);
259	if (!dev)
260		return ERR_PTR(-ENODEV);
261
262	return __fpga_mgr_get(dev);
263}
264EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
265
266/**
267 * fpga_mgr_put - release a reference to a fpga manager
268 * @mgr:	fpga manager structure
269 */
270void fpga_mgr_put(struct fpga_manager *mgr)
271{
272	module_put(mgr->dev.parent->driver->owner);
273	mutex_unlock(&mgr->ref_mutex);
274	put_device(&mgr->dev);
275}
276EXPORT_SYMBOL_GPL(fpga_mgr_put);
277
278/**
279 * fpga_mgr_register - register a low level fpga manager driver
280 * @dev:	fpga manager device from pdev
281 * @name:	fpga manager name
282 * @mops:	pointer to structure of fpga manager ops
283 * @priv:	fpga manager private data
284 *
285 * Return: 0 on success, negative error code otherwise.
286 */
287int fpga_mgr_register(struct device *dev, const char *name,
288		      const struct fpga_manager_ops *mops,
289		      void *priv)
290{
291	struct fpga_manager *mgr;
292	int id, ret;
293
294	if (!mops || !mops->write_init || !mops->write ||
295	    !mops->write_complete || !mops->state) {
296		dev_err(dev, "Attempt to register without fpga_manager_ops\n");
297		return -EINVAL;
298	}
299
300	if (!name || !strlen(name)) {
301		dev_err(dev, "Attempt to register with no name!\n");
302		return -EINVAL;
303	}
304
305	mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
306	if (!mgr)
307		return -ENOMEM;
308
309	id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
310	if (id < 0) {
311		ret = id;
312		goto error_kfree;
313	}
314
315	mutex_init(&mgr->ref_mutex);
316
317	mgr->name = name;
318	mgr->mops = mops;
319	mgr->priv = priv;
320
321	/*
322	 * Initialize framework state by requesting low level driver read state
323	 * from device.  FPGA may be in reset mode or may have been programmed
324	 * by bootloader or EEPROM.
325	 */
326	mgr->state = mgr->mops->state(mgr);
327
328	device_initialize(&mgr->dev);
329	mgr->dev.class = fpga_mgr_class;
330	mgr->dev.parent = dev;
331	mgr->dev.of_node = dev->of_node;
332	mgr->dev.id = id;
333	dev_set_drvdata(dev, mgr);
334
335	ret = dev_set_name(&mgr->dev, "fpga%d", id);
336	if (ret)
337		goto error_device;
338
339	ret = device_add(&mgr->dev);
340	if (ret)
341		goto error_device;
342
343	dev_info(&mgr->dev, "%s registered\n", mgr->name);
344
345	return 0;
346
347error_device:
348	ida_simple_remove(&fpga_mgr_ida, id);
349error_kfree:
350	kfree(mgr);
351
352	return ret;
353}
354EXPORT_SYMBOL_GPL(fpga_mgr_register);
355
356/**
357 * fpga_mgr_unregister - unregister a low level fpga manager driver
358 * @dev:	fpga manager device from pdev
359 */
360void fpga_mgr_unregister(struct device *dev)
361{
362	struct fpga_manager *mgr = dev_get_drvdata(dev);
363
364	dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
365
366	/*
367	 * If the low level driver provides a method for putting fpga into
368	 * a desired state upon unregister, do it.
369	 */
370	if (mgr->mops->fpga_remove)
371		mgr->mops->fpga_remove(mgr);
372
373	device_unregister(&mgr->dev);
374}
375EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
376
377static void fpga_mgr_dev_release(struct device *dev)
378{
379	struct fpga_manager *mgr = to_fpga_manager(dev);
380
381	ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
382	kfree(mgr);
383}
384
385static int __init fpga_mgr_class_init(void)
386{
387	pr_info("FPGA manager framework\n");
388
389	fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
390	if (IS_ERR(fpga_mgr_class))
391		return PTR_ERR(fpga_mgr_class);
392
393	fpga_mgr_class->dev_groups = fpga_mgr_groups;
394	fpga_mgr_class->dev_release = fpga_mgr_dev_release;
395
396	return 0;
397}
398
399static void __exit fpga_mgr_class_exit(void)
400{
401	class_destroy(fpga_mgr_class);
402	ida_destroy(&fpga_mgr_ida);
403}
404
405MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
406MODULE_DESCRIPTION("FPGA manager framework");
407MODULE_LICENSE("GPL v2");
408
409subsys_initcall(fpga_mgr_class_init);
410module_exit(fpga_mgr_class_exit);