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1/*
2 * Copyright (C) 2013 Altera Corporation
3 * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
4 *
5 * Based on cpuinfo.c from microblaze
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 *
20 */
21
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/delay.h>
25#include <linux/seq_file.h>
26#include <linux/string.h>
27#include <linux/of.h>
28#include <asm/cpuinfo.h>
29
30struct cpuinfo cpuinfo;
31
32#define err_cpu(x) \
33 pr_err("ERROR: Nios II " x " different for kernel and DTS\n")
34
35static inline u32 fcpu(struct device_node *cpu, const char *n)
36{
37 u32 val = 0;
38
39 of_property_read_u32(cpu, n, &val);
40
41 return val;
42}
43
44static inline u32 fcpu_has(struct device_node *cpu, const char *n)
45{
46 return of_get_property(cpu, n, NULL) ? 1 : 0;
47}
48
49void __init setup_cpuinfo(void)
50{
51 struct device_node *cpu;
52 const char *str;
53 int len;
54
55 cpu = of_find_node_by_type(NULL, "cpu");
56 if (!cpu)
57 panic("%s: No CPU found in devicetree!\n", __func__);
58
59 if (!fcpu_has(cpu, "altr,has-initda"))
60 panic("initda instruction is unimplemented. Please update your "
61 "hardware system to have more than 4-byte line data "
62 "cache\n");
63
64 cpuinfo.cpu_clock_freq = fcpu(cpu, "clock-frequency");
65
66 str = of_get_property(cpu, "altr,implementation", &len);
67 if (str)
68 strlcpy(cpuinfo.cpu_impl, str, sizeof(cpuinfo.cpu_impl));
69 else
70 strcpy(cpuinfo.cpu_impl, "<unknown>");
71
72 cpuinfo.has_div = fcpu_has(cpu, "altr,has-div");
73 cpuinfo.has_mul = fcpu_has(cpu, "altr,has-mul");
74 cpuinfo.has_mulx = fcpu_has(cpu, "altr,has-mulx");
75 cpuinfo.mmu = fcpu_has(cpu, "altr,has-mmu");
76
77 if (IS_ENABLED(CONFIG_NIOS2_HW_DIV_SUPPORT) && !cpuinfo.has_div)
78 err_cpu("DIV");
79
80 if (IS_ENABLED(CONFIG_NIOS2_HW_MUL_SUPPORT) && !cpuinfo.has_mul)
81 err_cpu("MUL");
82
83 if (IS_ENABLED(CONFIG_NIOS2_HW_MULX_SUPPORT) && !cpuinfo.has_mulx)
84 err_cpu("MULX");
85
86 cpuinfo.tlb_num_ways = fcpu(cpu, "altr,tlb-num-ways");
87 if (!cpuinfo.tlb_num_ways)
88 panic("altr,tlb-num-ways can't be 0. Please check your hardware "
89 "system\n");
90 cpuinfo.icache_line_size = fcpu(cpu, "icache-line-size");
91 cpuinfo.icache_size = fcpu(cpu, "icache-size");
92 if (CONFIG_NIOS2_ICACHE_SIZE != cpuinfo.icache_size)
93 pr_warn("Warning: icache size configuration mismatch "
94 "(0x%x vs 0x%x) of CONFIG_NIOS2_ICACHE_SIZE vs "
95 "device tree icache-size\n",
96 CONFIG_NIOS2_ICACHE_SIZE, cpuinfo.icache_size);
97
98 cpuinfo.dcache_line_size = fcpu(cpu, "dcache-line-size");
99 if (CONFIG_NIOS2_DCACHE_LINE_SIZE != cpuinfo.dcache_line_size)
100 pr_warn("Warning: dcache line size configuration mismatch "
101 "(0x%x vs 0x%x) of CONFIG_NIOS2_DCACHE_LINE_SIZE vs "
102 "device tree dcache-line-size\n",
103 CONFIG_NIOS2_DCACHE_LINE_SIZE, cpuinfo.dcache_line_size);
104 cpuinfo.dcache_size = fcpu(cpu, "dcache-size");
105 if (CONFIG_NIOS2_DCACHE_SIZE != cpuinfo.dcache_size)
106 pr_warn("Warning: dcache size configuration mismatch "
107 "(0x%x vs 0x%x) of CONFIG_NIOS2_DCACHE_SIZE vs "
108 "device tree dcache-size\n",
109 CONFIG_NIOS2_DCACHE_SIZE, cpuinfo.dcache_size);
110
111 cpuinfo.tlb_pid_num_bits = fcpu(cpu, "altr,pid-num-bits");
112 cpuinfo.tlb_num_ways_log2 = ilog2(cpuinfo.tlb_num_ways);
113 cpuinfo.tlb_num_entries = fcpu(cpu, "altr,tlb-num-entries");
114 cpuinfo.tlb_num_lines = cpuinfo.tlb_num_entries / cpuinfo.tlb_num_ways;
115 cpuinfo.tlb_ptr_sz = fcpu(cpu, "altr,tlb-ptr-sz");
116
117 cpuinfo.reset_addr = fcpu(cpu, "altr,reset-addr");
118 cpuinfo.exception_addr = fcpu(cpu, "altr,exception-addr");
119 cpuinfo.fast_tlb_miss_exc_addr = fcpu(cpu, "altr,fast-tlb-miss-addr");
120}
121
122#ifdef CONFIG_PROC_FS
123
124/*
125 * Get CPU information for use by the procfs.
126 */
127static int show_cpuinfo(struct seq_file *m, void *v)
128{
129 const u32 clockfreq = cpuinfo.cpu_clock_freq;
130
131 seq_printf(m,
132 "CPU:\t\tNios II/%s\n"
133 "MMU:\t\t%s\n"
134 "FPU:\t\tnone\n"
135 "Clocking:\t%u.%02u MHz\n"
136 "BogoMips:\t%lu.%02lu\n"
137 "Calibration:\t%lu loops\n",
138 cpuinfo.cpu_impl,
139 cpuinfo.mmu ? "present" : "none",
140 clockfreq / 1000000, (clockfreq / 100000) % 10,
141 (loops_per_jiffy * HZ) / 500000,
142 ((loops_per_jiffy * HZ) / 5000) % 100,
143 (loops_per_jiffy * HZ));
144
145 seq_printf(m,
146 "HW:\n"
147 " MUL:\t\t%s\n"
148 " MULX:\t\t%s\n"
149 " DIV:\t\t%s\n",
150 cpuinfo.has_mul ? "yes" : "no",
151 cpuinfo.has_mulx ? "yes" : "no",
152 cpuinfo.has_div ? "yes" : "no");
153
154 seq_printf(m,
155 "Icache:\t\t%ukB, line length: %u\n",
156 cpuinfo.icache_size >> 10,
157 cpuinfo.icache_line_size);
158
159 seq_printf(m,
160 "Dcache:\t\t%ukB, line length: %u\n",
161 cpuinfo.dcache_size >> 10,
162 cpuinfo.dcache_line_size);
163
164 seq_printf(m,
165 "TLB:\t\t%u ways, %u entries, %u PID bits\n",
166 cpuinfo.tlb_num_ways,
167 cpuinfo.tlb_num_entries,
168 cpuinfo.tlb_pid_num_bits);
169
170 return 0;
171}
172
173static void *cpuinfo_start(struct seq_file *m, loff_t *pos)
174{
175 unsigned long i = *pos;
176
177 return i < num_possible_cpus() ? (void *) (i + 1) : NULL;
178}
179
180static void *cpuinfo_next(struct seq_file *m, void *v, loff_t *pos)
181{
182 ++*pos;
183 return cpuinfo_start(m, pos);
184}
185
186static void cpuinfo_stop(struct seq_file *m, void *v)
187{
188}
189
190const struct seq_operations cpuinfo_op = {
191 .start = cpuinfo_start,
192 .next = cpuinfo_next,
193 .stop = cpuinfo_stop,
194 .show = show_cpuinfo
195};
196
197#endif /* CONFIG_PROC_FS */
1/*
2 * Copyright (C) 2013 Altera Corporation
3 * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
4 *
5 * Based on cpuinfo.c from microblaze
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 *
20 */
21
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/delay.h>
25#include <linux/seq_file.h>
26#include <linux/string.h>
27#include <linux/of.h>
28#include <asm/cpuinfo.h>
29
30struct cpuinfo cpuinfo;
31
32#define err_cpu(x) \
33 pr_err("ERROR: Nios II " x " different for kernel and DTS\n")
34
35static inline u32 fcpu(struct device_node *cpu, const char *n)
36{
37 u32 val = 0;
38
39 of_property_read_u32(cpu, n, &val);
40
41 return val;
42}
43
44void __init setup_cpuinfo(void)
45{
46 struct device_node *cpu;
47 const char *str;
48 int len;
49
50 cpu = of_find_node_by_type(NULL, "cpu");
51 if (!cpu)
52 panic("%s: No CPU found in devicetree!\n", __func__);
53
54 if (!of_property_read_bool(cpu, "altr,has-initda"))
55 panic("initda instruction is unimplemented. Please update your "
56 "hardware system to have more than 4-byte line data "
57 "cache\n");
58
59 cpuinfo.cpu_clock_freq = fcpu(cpu, "clock-frequency");
60
61 str = of_get_property(cpu, "altr,implementation", &len);
62 if (str)
63 strlcpy(cpuinfo.cpu_impl, str, sizeof(cpuinfo.cpu_impl));
64 else
65 strcpy(cpuinfo.cpu_impl, "<unknown>");
66
67 cpuinfo.has_div = of_property_read_bool(cpu, "altr,has-div");
68 cpuinfo.has_mul = of_property_read_bool(cpu, "altr,has-mul");
69 cpuinfo.has_mulx = of_property_read_bool(cpu, "altr,has-mulx");
70 cpuinfo.mmu = of_property_read_bool(cpu, "altr,has-mmu");
71
72 if (IS_ENABLED(CONFIG_NIOS2_HW_DIV_SUPPORT) && !cpuinfo.has_div)
73 err_cpu("DIV");
74
75 if (IS_ENABLED(CONFIG_NIOS2_HW_MUL_SUPPORT) && !cpuinfo.has_mul)
76 err_cpu("MUL");
77
78 if (IS_ENABLED(CONFIG_NIOS2_HW_MULX_SUPPORT) && !cpuinfo.has_mulx)
79 err_cpu("MULX");
80
81 cpuinfo.tlb_num_ways = fcpu(cpu, "altr,tlb-num-ways");
82 if (!cpuinfo.tlb_num_ways)
83 panic("altr,tlb-num-ways can't be 0. Please check your hardware "
84 "system\n");
85 cpuinfo.icache_line_size = fcpu(cpu, "icache-line-size");
86 cpuinfo.icache_size = fcpu(cpu, "icache-size");
87 if (CONFIG_NIOS2_ICACHE_SIZE != cpuinfo.icache_size)
88 pr_warn("Warning: icache size configuration mismatch "
89 "(0x%x vs 0x%x) of CONFIG_NIOS2_ICACHE_SIZE vs "
90 "device tree icache-size\n",
91 CONFIG_NIOS2_ICACHE_SIZE, cpuinfo.icache_size);
92
93 cpuinfo.dcache_line_size = fcpu(cpu, "dcache-line-size");
94 if (CONFIG_NIOS2_DCACHE_LINE_SIZE != cpuinfo.dcache_line_size)
95 pr_warn("Warning: dcache line size configuration mismatch "
96 "(0x%x vs 0x%x) of CONFIG_NIOS2_DCACHE_LINE_SIZE vs "
97 "device tree dcache-line-size\n",
98 CONFIG_NIOS2_DCACHE_LINE_SIZE, cpuinfo.dcache_line_size);
99 cpuinfo.dcache_size = fcpu(cpu, "dcache-size");
100 if (CONFIG_NIOS2_DCACHE_SIZE != cpuinfo.dcache_size)
101 pr_warn("Warning: dcache size configuration mismatch "
102 "(0x%x vs 0x%x) of CONFIG_NIOS2_DCACHE_SIZE vs "
103 "device tree dcache-size\n",
104 CONFIG_NIOS2_DCACHE_SIZE, cpuinfo.dcache_size);
105
106 cpuinfo.tlb_pid_num_bits = fcpu(cpu, "altr,pid-num-bits");
107 cpuinfo.tlb_num_ways_log2 = ilog2(cpuinfo.tlb_num_ways);
108 cpuinfo.tlb_num_entries = fcpu(cpu, "altr,tlb-num-entries");
109 cpuinfo.tlb_num_lines = cpuinfo.tlb_num_entries / cpuinfo.tlb_num_ways;
110 cpuinfo.tlb_ptr_sz = fcpu(cpu, "altr,tlb-ptr-sz");
111
112 cpuinfo.reset_addr = fcpu(cpu, "altr,reset-addr");
113 cpuinfo.exception_addr = fcpu(cpu, "altr,exception-addr");
114 cpuinfo.fast_tlb_miss_exc_addr = fcpu(cpu, "altr,fast-tlb-miss-addr");
115}
116
117#ifdef CONFIG_PROC_FS
118
119/*
120 * Get CPU information for use by the procfs.
121 */
122static int show_cpuinfo(struct seq_file *m, void *v)
123{
124 const u32 clockfreq = cpuinfo.cpu_clock_freq;
125
126 seq_printf(m,
127 "CPU:\t\tNios II/%s\n"
128 "MMU:\t\t%s\n"
129 "FPU:\t\tnone\n"
130 "Clocking:\t%u.%02u MHz\n"
131 "BogoMips:\t%lu.%02lu\n"
132 "Calibration:\t%lu loops\n",
133 cpuinfo.cpu_impl,
134 cpuinfo.mmu ? "present" : "none",
135 clockfreq / 1000000, (clockfreq / 100000) % 10,
136 (loops_per_jiffy * HZ) / 500000,
137 ((loops_per_jiffy * HZ) / 5000) % 100,
138 (loops_per_jiffy * HZ));
139
140 seq_printf(m,
141 "HW:\n"
142 " MUL:\t\t%s\n"
143 " MULX:\t\t%s\n"
144 " DIV:\t\t%s\n",
145 cpuinfo.has_mul ? "yes" : "no",
146 cpuinfo.has_mulx ? "yes" : "no",
147 cpuinfo.has_div ? "yes" : "no");
148
149 seq_printf(m,
150 "Icache:\t\t%ukB, line length: %u\n",
151 cpuinfo.icache_size >> 10,
152 cpuinfo.icache_line_size);
153
154 seq_printf(m,
155 "Dcache:\t\t%ukB, line length: %u\n",
156 cpuinfo.dcache_size >> 10,
157 cpuinfo.dcache_line_size);
158
159 seq_printf(m,
160 "TLB:\t\t%u ways, %u entries, %u PID bits\n",
161 cpuinfo.tlb_num_ways,
162 cpuinfo.tlb_num_entries,
163 cpuinfo.tlb_pid_num_bits);
164
165 return 0;
166}
167
168static void *cpuinfo_start(struct seq_file *m, loff_t *pos)
169{
170 unsigned long i = *pos;
171
172 return i < num_possible_cpus() ? (void *) (i + 1) : NULL;
173}
174
175static void *cpuinfo_next(struct seq_file *m, void *v, loff_t *pos)
176{
177 ++*pos;
178 return cpuinfo_start(m, pos);
179}
180
181static void cpuinfo_stop(struct seq_file *m, void *v)
182{
183}
184
185const struct seq_operations cpuinfo_op = {
186 .start = cpuinfo_start,
187 .next = cpuinfo_next,
188 .stop = cpuinfo_stop,
189 .show = show_cpuinfo
190};
191
192#endif /* CONFIG_PROC_FS */