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1/*
2 * This program is free software; you can distribute it and/or modify it
3 * under the terms of the GNU General Public License (Version 2) as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope it will be useful, but WITHOUT
7 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
9 * for more details.
10 *
11 * You should have received a copy of the GNU General Public License along
12 * with this program; if not, write to the Free Software Foundation, Inc.,
13 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
14 *
15 * Further private data for which no space exists in mips_fpu_struct.
16 * This should be subsumed into the mips_fpu_struct structure as
17 * defined in processor.h as soon as the absurd wired absolute assembler
18 * offsets become dynamic at compile time.
19 *
20 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
21 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
22 */
23#ifndef _ASM_FPU_EMULATOR_H
24#define _ASM_FPU_EMULATOR_H
25
26#include <linux/sched.h>
27#include <asm/break.h>
28#include <asm/thread_info.h>
29#include <asm/inst.h>
30#include <asm/local.h>
31#include <asm/processor.h>
32
33#ifdef CONFIG_DEBUG_FS
34
35struct mips_fpu_emulator_stats {
36 unsigned long emulated;
37 unsigned long loads;
38 unsigned long stores;
39 unsigned long cp1ops;
40 unsigned long cp1xops;
41 unsigned long errors;
42 unsigned long ieee754_inexact;
43 unsigned long ieee754_underflow;
44 unsigned long ieee754_overflow;
45 unsigned long ieee754_zerodiv;
46 unsigned long ieee754_invalidop;
47 unsigned long ds_emul;
48};
49
50DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
51
52#define MIPS_FPU_EMU_INC_STATS(M) \
53do { \
54 preempt_disable(); \
55 __this_cpu_inc(fpuemustats.M); \
56 preempt_enable(); \
57} while (0)
58
59#else
60#define MIPS_FPU_EMU_INC_STATS(M) do { } while (0)
61#endif /* CONFIG_DEBUG_FS */
62
63extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
64 unsigned long cpc);
65extern int do_dsemulret(struct pt_regs *xcp);
66extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
67 struct mips_fpu_struct *ctx, int has_fpu,
68 void *__user *fault_addr);
69int process_fpemu_return(int sig, void __user *fault_addr,
70 unsigned long fcr31);
71int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
72 unsigned long *contpc);
73
74/*
75 * Instruction inserted following the badinst to further tag the sequence
76 */
77#define BD_COOKIE 0x0000bd36 /* tne $0, $0 with baggage */
78
79/*
80 * Break instruction with special math emu break code set
81 */
82#define BREAK_MATH(micromips) (((micromips) ? 0x7 : 0xd) | (BRK_MEMU << 16))
83
84#define SIGNALLING_NAN 0x7ff800007ff80000LL
85
86static inline void fpu_emulator_init_fpu(void)
87{
88 struct task_struct *t = current;
89 int i;
90
91 for (i = 0; i < 32; i++)
92 set_fpr64(&t->thread.fpu.fpr[i], 0, SIGNALLING_NAN);
93}
94
95#endif /* _ASM_FPU_EMULATOR_H */
1/*
2 * This program is free software; you can distribute it and/or modify it
3 * under the terms of the GNU General Public License (Version 2) as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope it will be useful, but WITHOUT
7 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
9 * for more details.
10 *
11 * You should have received a copy of the GNU General Public License along
12 * with this program; if not, write to the Free Software Foundation, Inc.,
13 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
14 *
15 * Further private data for which no space exists in mips_fpu_struct.
16 * This should be subsumed into the mips_fpu_struct structure as
17 * defined in processor.h as soon as the absurd wired absolute assembler
18 * offsets become dynamic at compile time.
19 *
20 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
21 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
22 */
23#ifndef _ASM_FPU_EMULATOR_H
24#define _ASM_FPU_EMULATOR_H
25
26#include <linux/sched.h>
27#include <asm/dsemul.h>
28#include <asm/thread_info.h>
29#include <asm/inst.h>
30#include <asm/local.h>
31#include <asm/processor.h>
32
33#ifdef CONFIG_DEBUG_FS
34
35struct mips_fpu_emulator_stats {
36 unsigned long emulated;
37 unsigned long loads;
38 unsigned long stores;
39 unsigned long cp1ops;
40 unsigned long cp1xops;
41 unsigned long errors;
42 unsigned long ieee754_inexact;
43 unsigned long ieee754_underflow;
44 unsigned long ieee754_overflow;
45 unsigned long ieee754_zerodiv;
46 unsigned long ieee754_invalidop;
47 unsigned long ds_emul;
48};
49
50DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
51
52#define MIPS_FPU_EMU_INC_STATS(M) \
53do { \
54 preempt_disable(); \
55 __this_cpu_inc(fpuemustats.M); \
56 preempt_enable(); \
57} while (0)
58
59#else
60#define MIPS_FPU_EMU_INC_STATS(M) do { } while (0)
61#endif /* CONFIG_DEBUG_FS */
62
63extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
64 struct mips_fpu_struct *ctx, int has_fpu,
65 void *__user *fault_addr);
66void force_fcr31_sig(unsigned long fcr31, void __user *fault_addr,
67 struct task_struct *tsk);
68int process_fpemu_return(int sig, void __user *fault_addr,
69 unsigned long fcr31);
70int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
71 unsigned long *contpc);
72int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
73 unsigned long *contpc);
74
75#define SIGNALLING_NAN 0x7ff800007ff80000LL
76
77static inline void fpu_emulator_init_fpu(void)
78{
79 struct task_struct *t = current;
80 int i;
81
82 for (i = 0; i < 32; i++)
83 set_fpr64(&t->thread.fpu.fpr[i], 0, SIGNALLING_NAN);
84}
85
86/*
87 * Mask the FCSR Cause bits according to the Enable bits, observing
88 * that Unimplemented is always enabled.
89 */
90static inline unsigned long mask_fcr31_x(unsigned long fcr31)
91{
92 return fcr31 & (FPU_CSR_UNI_X |
93 ((fcr31 & FPU_CSR_ALL_E) <<
94 (ffs(FPU_CSR_ALL_X) - ffs(FPU_CSR_ALL_E))));
95}
96
97#endif /* _ASM_FPU_EMULATOR_H */