1/*
   2 * SL811HS HCD (Host Controller Driver) for USB.
   3 *
   4 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
   5 * Copyright (C) 2004-2005 David Brownell
   6 *
   7 * Periodic scheduling is based on Roman's OHCI code
   8 * 	Copyright (C) 1999 Roman Weissgaerber
   9 *
  10 * The SL811HS controller handles host side USB (like the SL11H, but with
  11 * another register set and SOF generation) as well as peripheral side USB
  12 * (like the SL811S).  This driver version doesn't implement the Gadget API
  13 * for the peripheral role; or OTG (that'd need much external circuitry).
  14 *
  15 * For documentation, see the SL811HS spec and the "SL811HS Embedded Host"
  16 * document (providing significant pieces missing from that spec); plus
  17 * the SL811S spec if you want peripheral side info.
  18 */
  19
  20/*
  21 * Status:  Passed basic stress testing, works with hubs, mice, keyboards,
  22 * and usb-storage.
  23 *
  24 * TODO:
  25 * - usb suspend/resume triggered by sl811
  26 * - various issues noted in the code
  27 * - performance work; use both register banks; ...
  28 * - use urb->iso_frame_desc[] with ISO transfers
  29 */
  30
  31#undef	VERBOSE
  32#undef	PACKET_TRACE
  33
  34#include <linux/module.h>
  35#include <linux/moduleparam.h>
  36#include <linux/kernel.h>
  37#include <linux/delay.h>
  38#include <linux/ioport.h>
  39#include <linux/sched.h>
  40#include <linux/slab.h>
  41#include <linux/errno.h>
 
  42#include <linux/timer.h>
  43#include <linux/list.h>
  44#include <linux/interrupt.h>
  45#include <linux/usb.h>
  46#include <linux/usb/sl811.h>
  47#include <linux/usb/hcd.h>
  48#include <linux/platform_device.h>
  49#include <linux/prefetch.h>
  50#include <linux/debugfs.h>
  51#include <linux/seq_file.h>
  52
  53#include <asm/io.h>
  54#include <asm/irq.h>
  55#include <asm/byteorder.h>
  56#include <asm/unaligned.h>
  57
  58#include "sl811.h"
  59
  60
  61MODULE_DESCRIPTION("SL811HS USB Host Controller Driver");
  62MODULE_LICENSE("GPL");
  63MODULE_ALIAS("platform:sl811-hcd");
  64
  65#define DRIVER_VERSION	"19 May 2005"
  66
 
 
 
 
 
  67/* for now, use only one transfer register bank */
  68#undef	USE_B
  69
  70// #define	QUIRK2
  71#define	QUIRK3
  72
  73static const char hcd_name[] = "sl811-hcd";
  74
  75/*-------------------------------------------------------------------------*/
  76
  77static void port_power(struct sl811 *sl811, int is_on)
  78{
  79	struct usb_hcd	*hcd = sl811_to_hcd(sl811);
  80
  81	/* hub is inactive unless the port is powered */
  82	if (is_on) {
  83		if (sl811->port1 & USB_PORT_STAT_POWER)
  84			return;
  85
  86		sl811->port1 = USB_PORT_STAT_POWER;
  87		sl811->irq_enable = SL11H_INTMASK_INSRMV;
  88	} else {
  89		sl811->port1 = 0;
  90		sl811->irq_enable = 0;
  91		hcd->state = HC_STATE_HALT;
  92	}
  93	sl811->ctrl1 = 0;
  94	sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
  95	sl811_write(sl811, SL11H_IRQ_STATUS, ~0);
  96
  97	if (sl811->board && sl811->board->port_power) {
  98		/* switch VBUS, at 500mA unless hub power budget gets set */
  99		dev_dbg(hcd->self.controller, "power %s\n",
 100			is_on ? "on" : "off");
 101		sl811->board->port_power(hcd->self.controller, is_on);
 102	}
 103
 104	/* reset as thoroughly as we can */
 105	if (sl811->board && sl811->board->reset)
 106		sl811->board->reset(hcd->self.controller);
 107	else {
 108		sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0);
 109		mdelay(20);
 110	}
 111
 112	sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
 113	sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
 114	sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT);
 115	sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
 116
 117	// if !is_on, put into lowpower mode now
 118}
 119
 120/*-------------------------------------------------------------------------*/
 121
 122/* This is a PIO-only HCD.  Queueing appends URBs to the endpoint's queue,
 123 * and may start I/O.  Endpoint queues are scanned during completion irq
 124 * handlers (one per packet: ACK, NAK, faults, etc) and urb cancellation.
 125 *
 126 * Using an external DMA engine to copy a packet at a time could work,
 127 * though setup/teardown costs may be too big to make it worthwhile.
 128 */
 129
 130/* SETUP starts a new control request.  Devices are not allowed to
 131 * STALL or NAK these; they must cancel any pending control requests.
 132 */
 133static void setup_packet(
 134	struct sl811		*sl811,
 135	struct sl811h_ep	*ep,
 136	struct urb		*urb,
 137	u8			bank,
 138	u8			control
 139)
 140{
 141	u8			addr;
 142	u8			len;
 143	void __iomem		*data_reg;
 144
 145	addr = SL811HS_PACKET_BUF(bank == 0);
 146	len = sizeof(struct usb_ctrlrequest);
 147	data_reg = sl811->data_reg;
 148	sl811_write_buf(sl811, addr, urb->setup_packet, len);
 149
 150	/* autoincrementing */
 151	sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
 152	writeb(len, data_reg);
 153	writeb(SL_SETUP /* | ep->epnum */, data_reg);
 154	writeb(usb_pipedevice(urb->pipe), data_reg);
 155
 156	/* always OUT/data0 */
 157	sl811_write(sl811, bank + SL11H_HOSTCTLREG,
 158			control | SL11H_HCTLMASK_OUT);
 159	ep->length = 0;
 160	PACKET("SETUP qh%p\n", ep);
 161}
 162
 163/* STATUS finishes control requests, often after IN or OUT data packets */
 164static void status_packet(
 165	struct sl811		*sl811,
 166	struct sl811h_ep	*ep,
 167	struct urb		*urb,
 168	u8			bank,
 169	u8			control
 170)
 171{
 172	int			do_out;
 173	void __iomem		*data_reg;
 174
 175	do_out = urb->transfer_buffer_length && usb_pipein(urb->pipe);
 176	data_reg = sl811->data_reg;
 177
 178	/* autoincrementing */
 179	sl811_write(sl811, bank + SL11H_BUFADDRREG, 0);
 180	writeb(0, data_reg);
 181	writeb((do_out ? SL_OUT : SL_IN) /* | ep->epnum */, data_reg);
 182	writeb(usb_pipedevice(urb->pipe), data_reg);
 183
 184	/* always data1; sometimes IN */
 185	control |= SL11H_HCTLMASK_TOGGLE;
 186	if (do_out)
 187		control |= SL11H_HCTLMASK_OUT;
 188	sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
 189	ep->length = 0;
 190	PACKET("STATUS%s/%s qh%p\n", ep->nak_count ? "/retry" : "",
 191			do_out ? "out" : "in", ep);
 192}
 193
 194/* IN packets can be used with any type of endpoint. here we just
 195 * start the transfer, data from the peripheral may arrive later.
 196 * urb->iso_frame_desc is currently ignored here...
 197 */
 198static void in_packet(
 199	struct sl811		*sl811,
 200	struct sl811h_ep	*ep,
 201	struct urb		*urb,
 202	u8			bank,
 203	u8			control
 204)
 205{
 206	u8			addr;
 207	u8			len;
 208	void __iomem		*data_reg;
 209
 210	/* avoid losing data on overflow */
 211	len = ep->maxpacket;
 212	addr = SL811HS_PACKET_BUF(bank == 0);
 213	if (!(control & SL11H_HCTLMASK_ISOCH)
 214			&& usb_gettoggle(urb->dev, ep->epnum, 0))
 215		control |= SL11H_HCTLMASK_TOGGLE;
 216	data_reg = sl811->data_reg;
 217
 218	/* autoincrementing */
 219	sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
 220	writeb(len, data_reg);
 221	writeb(SL_IN | ep->epnum, data_reg);
 222	writeb(usb_pipedevice(urb->pipe), data_reg);
 223
 224	sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
 225	ep->length = min_t(u32, len,
 226			urb->transfer_buffer_length - urb->actual_length);
 227	PACKET("IN%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
 228			!!usb_gettoggle(urb->dev, ep->epnum, 0), ep, len);
 229}
 230
 231/* OUT packets can be used with any type of endpoint.
 232 * urb->iso_frame_desc is currently ignored here...
 233 */
 234static void out_packet(
 235	struct sl811		*sl811,
 236	struct sl811h_ep	*ep,
 237	struct urb		*urb,
 238	u8			bank,
 239	u8			control
 240)
 241{
 242	void			*buf;
 243	u8			addr;
 244	u8			len;
 245	void __iomem		*data_reg;
 246
 247	buf = urb->transfer_buffer + urb->actual_length;
 248	prefetch(buf);
 249
 250	len = min_t(u32, ep->maxpacket,
 251			urb->transfer_buffer_length - urb->actual_length);
 252
 253	if (!(control & SL11H_HCTLMASK_ISOCH)
 254			&& usb_gettoggle(urb->dev, ep->epnum, 1))
 255		control |= SL11H_HCTLMASK_TOGGLE;
 256	addr = SL811HS_PACKET_BUF(bank == 0);
 257	data_reg = sl811->data_reg;
 258
 259	sl811_write_buf(sl811, addr, buf, len);
 260
 261	/* autoincrementing */
 262	sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
 263	writeb(len, data_reg);
 264	writeb(SL_OUT | ep->epnum, data_reg);
 265	writeb(usb_pipedevice(urb->pipe), data_reg);
 266
 267	sl811_write(sl811, bank + SL11H_HOSTCTLREG,
 268			control | SL11H_HCTLMASK_OUT);
 269	ep->length = len;
 270	PACKET("OUT%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
 271			!!usb_gettoggle(urb->dev, ep->epnum, 1), ep, len);
 272}
 273
 274/*-------------------------------------------------------------------------*/
 275
 276/* caller updates on-chip enables later */
 277
 278static inline void sofirq_on(struct sl811 *sl811)
 279{
 280	if (sl811->irq_enable & SL11H_INTMASK_SOFINTR)
 281		return;
 282	dev_dbg(sl811_to_hcd(sl811)->self.controller, "sof irq on\n");
 283	sl811->irq_enable |= SL11H_INTMASK_SOFINTR;
 284}
 285
 286static inline void sofirq_off(struct sl811 *sl811)
 287{
 288	if (!(sl811->irq_enable & SL11H_INTMASK_SOFINTR))
 289		return;
 290	dev_dbg(sl811_to_hcd(sl811)->self.controller, "sof irq off\n");
 291	sl811->irq_enable &= ~SL11H_INTMASK_SOFINTR;
 292}
 293
 294/*-------------------------------------------------------------------------*/
 295
 296/* pick the next endpoint for a transaction, and issue it.
 297 * frames start with periodic transfers (after whatever is pending
 298 * from the previous frame), and the rest of the time is async
 299 * transfers, scheduled round-robin.
 300 */
 301static struct sl811h_ep	*start(struct sl811 *sl811, u8 bank)
 302{
 303	struct sl811h_ep	*ep;
 304	struct urb		*urb;
 305	int			fclock;
 306	u8			control;
 307
 308	/* use endpoint at schedule head */
 309	if (sl811->next_periodic) {
 310		ep = sl811->next_periodic;
 311		sl811->next_periodic = ep->next;
 312	} else {
 313		if (sl811->next_async)
 314			ep = sl811->next_async;
 315		else if (!list_empty(&sl811->async))
 316			ep = container_of(sl811->async.next,
 317					struct sl811h_ep, schedule);
 318		else {
 319			/* could set up the first fullspeed periodic
 320			 * transfer for the next frame ...
 321			 */
 322			return NULL;
 323		}
 324
 325#ifdef USE_B
 326		if ((bank && sl811->active_b == ep) || sl811->active_a == ep)
 327			return NULL;
 328#endif
 329
 330		if (ep->schedule.next == &sl811->async)
 331			sl811->next_async = NULL;
 332		else
 333			sl811->next_async = container_of(ep->schedule.next,
 334					struct sl811h_ep, schedule);
 335	}
 336
 337	if (unlikely(list_empty(&ep->hep->urb_list))) {
 338		dev_dbg(sl811_to_hcd(sl811)->self.controller,
 339			"empty %p queue?\n", ep);
 340		return NULL;
 341	}
 342
 343	urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
 344	control = ep->defctrl;
 345
 346	/* if this frame doesn't have enough time left to transfer this
 347	 * packet, wait till the next frame.  too-simple algorithm...
 348	 */
 349	fclock = sl811_read(sl811, SL11H_SOFTMRREG) << 6;
 350	fclock -= 100;		/* setup takes not much time */
 351	if (urb->dev->speed == USB_SPEED_LOW) {
 352		if (control & SL11H_HCTLMASK_PREAMBLE) {
 353			/* also note erratum 1: some hubs won't work */
 354			fclock -= 800;
 355		}
 356		fclock -= ep->maxpacket << 8;
 357
 358		/* erratum 2: AFTERSOF only works for fullspeed */
 359		if (fclock < 0) {
 360			if (ep->period)
 361				sl811->stat_overrun++;
 362			sofirq_on(sl811);
 363			return NULL;
 364		}
 365	} else {
 366		fclock -= 12000 / 19;	/* 19 64byte packets/msec */
 367		if (fclock < 0) {
 368			if (ep->period)
 369				sl811->stat_overrun++;
 370			control |= SL11H_HCTLMASK_AFTERSOF;
 371
 372		/* throttle bulk/control irq noise */
 373		} else if (ep->nak_count)
 374			control |= SL11H_HCTLMASK_AFTERSOF;
 375	}
 376
 377
 378	switch (ep->nextpid) {
 379	case USB_PID_IN:
 380		in_packet(sl811, ep, urb, bank, control);
 381		break;
 382	case USB_PID_OUT:
 383		out_packet(sl811, ep, urb, bank, control);
 384		break;
 385	case USB_PID_SETUP:
 386		setup_packet(sl811, ep, urb, bank, control);
 387		break;
 388	case USB_PID_ACK:		/* for control status */
 389		status_packet(sl811, ep, urb, bank, control);
 390		break;
 391	default:
 392		dev_dbg(sl811_to_hcd(sl811)->self.controller,
 393			"bad ep%p pid %02x\n", ep, ep->nextpid);
 394		ep = NULL;
 395	}
 396	return ep;
 397}
 398
 399#define MIN_JIFFIES	((msecs_to_jiffies(2) > 1) ? msecs_to_jiffies(2) : 2)
 400
 401static inline void start_transfer(struct sl811 *sl811)
 402{
 403	if (sl811->port1 & USB_PORT_STAT_SUSPEND)
 404		return;
 405	if (sl811->active_a == NULL) {
 406		sl811->active_a = start(sl811, SL811_EP_A(SL811_HOST_BUF));
 407		if (sl811->active_a != NULL)
 408			sl811->jiffies_a = jiffies + MIN_JIFFIES;
 409	}
 410#ifdef USE_B
 411	if (sl811->active_b == NULL) {
 412		sl811->active_b = start(sl811, SL811_EP_B(SL811_HOST_BUF));
 413		if (sl811->active_b != NULL)
 414			sl811->jiffies_b = jiffies + MIN_JIFFIES;
 415	}
 416#endif
 417}
 418
 419static void finish_request(
 420	struct sl811		*sl811,
 421	struct sl811h_ep	*ep,
 422	struct urb		*urb,
 423	int			status
 424) __releases(sl811->lock) __acquires(sl811->lock)
 425{
 426	unsigned		i;
 427
 428	if (usb_pipecontrol(urb->pipe))
 429		ep->nextpid = USB_PID_SETUP;
 430
 431	usb_hcd_unlink_urb_from_ep(sl811_to_hcd(sl811), urb);
 432	spin_unlock(&sl811->lock);
 433	usb_hcd_giveback_urb(sl811_to_hcd(sl811), urb, status);
 434	spin_lock(&sl811->lock);
 435
 436	/* leave active endpoints in the schedule */
 437	if (!list_empty(&ep->hep->urb_list))
 438		return;
 439
 440	/* async deschedule? */
 441	if (!list_empty(&ep->schedule)) {
 442		list_del_init(&ep->schedule);
 443		if (ep == sl811->next_async)
 444			sl811->next_async = NULL;
 445		return;
 446	}
 447
 448	/* periodic deschedule */
 449	dev_dbg(sl811_to_hcd(sl811)->self.controller,
 450		"deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
 451	for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
 452		struct sl811h_ep	*temp;
 453		struct sl811h_ep	**prev = &sl811->periodic[i];
 454
 455		while (*prev && ((temp = *prev) != ep))
 456			prev = &temp->next;
 457		if (*prev)
 458			*prev = ep->next;
 459		sl811->load[i] -= ep->load;
 460	}
 461	ep->branch = PERIODIC_SIZE;
 462	sl811->periodic_count--;
 463	sl811_to_hcd(sl811)->self.bandwidth_allocated
 464		-= ep->load / ep->period;
 465	if (ep == sl811->next_periodic)
 466		sl811->next_periodic = ep->next;
 467
 468	/* we might turn SOFs back on again for the async schedule */
 469	if (sl811->periodic_count == 0)
 470		sofirq_off(sl811);
 471}
 472
 473static void
 474done(struct sl811 *sl811, struct sl811h_ep *ep, u8 bank)
 475{
 476	u8			status;
 477	struct urb		*urb;
 478	int			urbstat = -EINPROGRESS;
 479
 480	if (unlikely(!ep))
 481		return;
 482
 483	status = sl811_read(sl811, bank + SL11H_PKTSTATREG);
 484
 485	urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
 486
 487	/* we can safely ignore NAKs */
 488	if (status & SL11H_STATMASK_NAK) {
 489		// PACKET("...NAK_%02x qh%p\n", bank, ep);
 490		if (!ep->period)
 491			ep->nak_count++;
 492		ep->error_count = 0;
 493
 494	/* ACK advances transfer, toggle, and maybe queue */
 495	} else if (status & SL11H_STATMASK_ACK) {
 496		struct usb_device	*udev = urb->dev;
 497		int			len;
 498		unsigned char		*buf;
 499
 500		/* urb->iso_frame_desc is currently ignored here... */
 501
 502		ep->nak_count = ep->error_count = 0;
 503		switch (ep->nextpid) {
 504		case USB_PID_OUT:
 505			// PACKET("...ACK/out_%02x qh%p\n", bank, ep);
 506			urb->actual_length += ep->length;
 507			usb_dotoggle(udev, ep->epnum, 1);
 508			if (urb->actual_length
 509					== urb->transfer_buffer_length) {
 510				if (usb_pipecontrol(urb->pipe))
 511					ep->nextpid = USB_PID_ACK;
 512
 513				/* some bulk protocols terminate OUT transfers
 514				 * by a short packet, using ZLPs not padding.
 515				 */
 516				else if (ep->length < ep->maxpacket
 517						|| !(urb->transfer_flags
 518							& URB_ZERO_PACKET))
 519					urbstat = 0;
 520			}
 521			break;
 522		case USB_PID_IN:
 523			// PACKET("...ACK/in_%02x qh%p\n", bank, ep);
 524			buf = urb->transfer_buffer + urb->actual_length;
 525			prefetchw(buf);
 526			len = ep->maxpacket - sl811_read(sl811,
 527						bank + SL11H_XFERCNTREG);
 528			if (len > ep->length) {
 529				len = ep->length;
 530				urbstat = -EOVERFLOW;
 531			}
 532			urb->actual_length += len;
 533			sl811_read_buf(sl811, SL811HS_PACKET_BUF(bank == 0),
 534					buf, len);
 535			usb_dotoggle(udev, ep->epnum, 0);
 536			if (urbstat == -EINPROGRESS &&
 537					(len < ep->maxpacket ||
 538						urb->actual_length ==
 539						urb->transfer_buffer_length)) {
 540				if (usb_pipecontrol(urb->pipe))
 541					ep->nextpid = USB_PID_ACK;
 542				else
 543					urbstat = 0;
 544			}
 545			break;
 546		case USB_PID_SETUP:
 547			// PACKET("...ACK/setup_%02x qh%p\n", bank, ep);
 548			if (urb->transfer_buffer_length == urb->actual_length)
 549				ep->nextpid = USB_PID_ACK;
 550			else if (usb_pipeout(urb->pipe)) {
 551				usb_settoggle(udev, 0, 1, 1);
 552				ep->nextpid = USB_PID_OUT;
 553			} else {
 554				usb_settoggle(udev, 0, 0, 1);
 555				ep->nextpid = USB_PID_IN;
 556			}
 557			break;
 558		case USB_PID_ACK:
 559			// PACKET("...ACK/status_%02x qh%p\n", bank, ep);
 560			urbstat = 0;
 561			break;
 562		}
 563
 564	/* STALL stops all transfers */
 565	} else if (status & SL11H_STATMASK_STALL) {
 566		PACKET("...STALL_%02x qh%p\n", bank, ep);
 567		ep->nak_count = ep->error_count = 0;
 568		urbstat = -EPIPE;
 569
 570	/* error? retry, until "3 strikes" */
 571	} else if (++ep->error_count >= 3) {
 572		if (status & SL11H_STATMASK_TMOUT)
 573			urbstat = -ETIME;
 574		else if (status & SL11H_STATMASK_OVF)
 575			urbstat = -EOVERFLOW;
 576		else
 577			urbstat = -EPROTO;
 578		ep->error_count = 0;
 579		PACKET("...3STRIKES_%02x %02x qh%p stat %d\n",
 580				bank, status, ep, urbstat);
 581	}
 582
 583	if (urbstat != -EINPROGRESS || urb->unlinked)
 584		finish_request(sl811, ep, urb, urbstat);
 585}
 586
 587static inline u8 checkdone(struct sl811 *sl811)
 588{
 589	u8	ctl;
 590	u8	irqstat = 0;
 591
 592	if (sl811->active_a && time_before_eq(sl811->jiffies_a, jiffies)) {
 593		ctl = sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG));
 594		if (ctl & SL11H_HCTLMASK_ARM)
 595			sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
 596		dev_dbg(sl811_to_hcd(sl811)->self.controller,
 597			"%s DONE_A: ctrl %02x sts %02x\n",
 598			(ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
 599			ctl,
 600			sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
 601		irqstat |= SL11H_INTMASK_DONE_A;
 602	}
 603#ifdef	USE_B
 604	if (sl811->active_b && time_before_eq(sl811->jiffies_b, jiffies)) {
 605		ctl = sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG));
 606		if (ctl & SL11H_HCTLMASK_ARM)
 607			sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
 608		dev_dbg(sl811_to_hcd(sl811)->self.controller,
 609			"%s DONE_B: ctrl %02x sts %02x\n",
 610			(ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
 611			ctl,
 612			sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
 613		irqstat |= SL11H_INTMASK_DONE_A;
 614	}
 615#endif
 616	return irqstat;
 617}
 618
 619static irqreturn_t sl811h_irq(struct usb_hcd *hcd)
 620{
 621	struct sl811	*sl811 = hcd_to_sl811(hcd);
 622	u8		irqstat;
 623	irqreturn_t	ret = IRQ_NONE;
 624	unsigned	retries = 5;
 625
 626	spin_lock(&sl811->lock);
 627
 628retry:
 629	irqstat = sl811_read(sl811, SL11H_IRQ_STATUS) & ~SL11H_INTMASK_DP;
 630	if (irqstat) {
 631		sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
 632		irqstat &= sl811->irq_enable;
 633	}
 634
 635#ifdef	QUIRK2
 636	/* this may no longer be necessary ... */
 637	if (irqstat == 0) {
 638		irqstat = checkdone(sl811);
 639		if (irqstat)
 640			sl811->stat_lost++;
 641	}
 642#endif
 643
 644	/* USB packets, not necessarily handled in the order they're
 645	 * issued ... that's fine if they're different endpoints.
 646	 */
 647	if (irqstat & SL11H_INTMASK_DONE_A) {
 648		done(sl811, sl811->active_a, SL811_EP_A(SL811_HOST_BUF));
 649		sl811->active_a = NULL;
 650		sl811->stat_a++;
 651	}
 652#ifdef USE_B
 653	if (irqstat & SL11H_INTMASK_DONE_B) {
 654		done(sl811, sl811->active_b, SL811_EP_B(SL811_HOST_BUF));
 655		sl811->active_b = NULL;
 656		sl811->stat_b++;
 657	}
 658#endif
 659	if (irqstat & SL11H_INTMASK_SOFINTR) {
 660		unsigned index;
 661
 662		index = sl811->frame++ % (PERIODIC_SIZE - 1);
 663		sl811->stat_sof++;
 664
 665		/* be graceful about almost-inevitable periodic schedule
 666		 * overruns:  continue the previous frame's transfers iff
 667		 * this one has nothing scheduled.
 668		 */
 669		if (sl811->next_periodic) {
 670			// dev_err(hcd->self.controller, "overrun to slot %d\n", index);
 671			sl811->stat_overrun++;
 672		}
 673		if (sl811->periodic[index])
 674			sl811->next_periodic = sl811->periodic[index];
 675	}
 676
 677	/* hub_wq manages debouncing and wakeup */
 678	if (irqstat & SL11H_INTMASK_INSRMV) {
 679		sl811->stat_insrmv++;
 680
 681		/* most stats are reset for each VBUS session */
 682		sl811->stat_wake = 0;
 683		sl811->stat_sof = 0;
 684		sl811->stat_a = 0;
 685		sl811->stat_b = 0;
 686		sl811->stat_lost = 0;
 687
 688		sl811->ctrl1 = 0;
 689		sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
 690
 691		sl811->irq_enable = SL11H_INTMASK_INSRMV;
 692		sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
 693
 694		/* usbcore nukes other pending transactions on disconnect */
 695		if (sl811->active_a) {
 696			sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
 697			finish_request(sl811, sl811->active_a,
 698				container_of(sl811->active_a
 699						->hep->urb_list.next,
 700					struct urb, urb_list),
 701				-ESHUTDOWN);
 702			sl811->active_a = NULL;
 703		}
 704#ifdef	USE_B
 705		if (sl811->active_b) {
 706			sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
 707			finish_request(sl811, sl811->active_b,
 708				container_of(sl811->active_b
 709						->hep->urb_list.next,
 710					struct urb, urb_list),
 711				NULL, -ESHUTDOWN);
 712			sl811->active_b = NULL;
 713		}
 714#endif
 715
 716		/* port status seems weird until after reset, so
 717		 * force the reset and make hub_wq clean up later.
 718		 */
 719		if (irqstat & SL11H_INTMASK_RD)
 720			sl811->port1 &= ~USB_PORT_STAT_CONNECTION;
 721		else
 722			sl811->port1 |= USB_PORT_STAT_CONNECTION;
 723
 724		sl811->port1 |= USB_PORT_STAT_C_CONNECTION << 16;
 725
 726	} else if (irqstat & SL11H_INTMASK_RD) {
 727		if (sl811->port1 & USB_PORT_STAT_SUSPEND) {
 728			dev_dbg(hcd->self.controller, "wakeup\n");
 729			sl811->port1 |= USB_PORT_STAT_C_SUSPEND << 16;
 730			sl811->stat_wake++;
 731		} else
 732			irqstat &= ~SL11H_INTMASK_RD;
 733	}
 734
 735	if (irqstat) {
 736		if (sl811->port1 & USB_PORT_STAT_ENABLE)
 737			start_transfer(sl811);
 738		ret = IRQ_HANDLED;
 739		if (retries--)
 740			goto retry;
 741	}
 742
 743	if (sl811->periodic_count == 0 && list_empty(&sl811->async))
 744		sofirq_off(sl811);
 745	sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
 746
 747	spin_unlock(&sl811->lock);
 748
 749	return ret;
 750}
 751
 752/*-------------------------------------------------------------------------*/
 753
 754/* usb 1.1 says max 90% of a frame is available for periodic transfers.
 755 * this driver doesn't promise that much since it's got to handle an
 756 * IRQ per packet; irq handling latencies also use up that time.
 757 *
 758 * NOTE:  the periodic schedule is a sparse tree, with the load for
 759 * each branch minimized.  see fig 3.5 in the OHCI spec for example.
 760 */
 761#define	MAX_PERIODIC_LOAD	500	/* out of 1000 usec */
 762
 763static int balance(struct sl811 *sl811, u16 period, u16 load)
 764{
 765	int	i, branch = -ENOSPC;
 766
 767	/* search for the least loaded schedule branch of that period
 768	 * which has enough bandwidth left unreserved.
 769	 */
 770	for (i = 0; i < period ; i++) {
 771		if (branch < 0 || sl811->load[branch] > sl811->load[i]) {
 772			int	j;
 773
 774			for (j = i; j < PERIODIC_SIZE; j += period) {
 775				if ((sl811->load[j] + load)
 776						> MAX_PERIODIC_LOAD)
 777					break;
 778			}
 779			if (j < PERIODIC_SIZE)
 780				continue;
 781			branch = i;
 782		}
 783	}
 784	return branch;
 785}
 786
 787/*-------------------------------------------------------------------------*/
 788
 789static int sl811h_urb_enqueue(
 790	struct usb_hcd		*hcd,
 791	struct urb		*urb,
 792	gfp_t			mem_flags
 793) {
 794	struct sl811		*sl811 = hcd_to_sl811(hcd);
 795	struct usb_device	*udev = urb->dev;
 796	unsigned int		pipe = urb->pipe;
 797	int			is_out = !usb_pipein(pipe);
 798	int			type = usb_pipetype(pipe);
 799	int			epnum = usb_pipeendpoint(pipe);
 800	struct sl811h_ep	*ep = NULL;
 801	unsigned long		flags;
 802	int			i;
 803	int			retval;
 804	struct usb_host_endpoint	*hep = urb->ep;
 805
 806#ifndef CONFIG_USB_SL811_HCD_ISO
 807	if (type == PIPE_ISOCHRONOUS)
 808		return -ENOSPC;
 809#endif
 810
 811	/* avoid all allocations within spinlocks */
 812	if (!hep->hcpriv) {
 813		ep = kzalloc(sizeof *ep, mem_flags);
 814		if (ep == NULL)
 815			return -ENOMEM;
 816	}
 817
 818	spin_lock_irqsave(&sl811->lock, flags);
 819
 820	/* don't submit to a dead or disabled port */
 821	if (!(sl811->port1 & USB_PORT_STAT_ENABLE)
 822			|| !HC_IS_RUNNING(hcd->state)) {
 823		retval = -ENODEV;
 824		kfree(ep);
 825		goto fail_not_linked;
 826	}
 827	retval = usb_hcd_link_urb_to_ep(hcd, urb);
 828	if (retval) {
 829		kfree(ep);
 830		goto fail_not_linked;
 831	}
 832
 833	if (hep->hcpriv) {
 834		kfree(ep);
 835		ep = hep->hcpriv;
 836	} else if (!ep) {
 837		retval = -ENOMEM;
 838		goto fail;
 839
 840	} else {
 841		INIT_LIST_HEAD(&ep->schedule);
 842		ep->udev = udev;
 843		ep->epnum = epnum;
 844		ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
 845		ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE;
 846		usb_settoggle(udev, epnum, is_out, 0);
 847
 848		if (type == PIPE_CONTROL)
 849			ep->nextpid = USB_PID_SETUP;
 850		else if (is_out)
 851			ep->nextpid = USB_PID_OUT;
 852		else
 853			ep->nextpid = USB_PID_IN;
 854
 855		if (ep->maxpacket > H_MAXPACKET) {
 856			/* iso packets up to 240 bytes could work... */
 857			dev_dbg(hcd->self.controller,
 858				"dev %d ep%d maxpacket %d\n", udev->devnum,
 859				epnum, ep->maxpacket);
 860			retval = -EINVAL;
 861			kfree(ep);
 862			goto fail;
 863		}
 864
 865		if (udev->speed == USB_SPEED_LOW) {
 866			/* send preamble for external hub? */
 867			if (!(sl811->ctrl1 & SL11H_CTL1MASK_LSPD))
 868				ep->defctrl |= SL11H_HCTLMASK_PREAMBLE;
 869		}
 870		switch (type) {
 871		case PIPE_ISOCHRONOUS:
 872		case PIPE_INTERRUPT:
 873			if (urb->interval > PERIODIC_SIZE)
 874				urb->interval = PERIODIC_SIZE;
 875			ep->period = urb->interval;
 876			ep->branch = PERIODIC_SIZE;
 877			if (type == PIPE_ISOCHRONOUS)
 878				ep->defctrl |= SL11H_HCTLMASK_ISOCH;
 879			ep->load = usb_calc_bus_time(udev->speed, !is_out,
 880				(type == PIPE_ISOCHRONOUS),
 881				usb_maxpacket(udev, pipe, is_out))
 882					/ 1000;
 883			break;
 884		}
 885
 886		ep->hep = hep;
 887		hep->hcpriv = ep;
 888	}
 889
 890	/* maybe put endpoint into schedule */
 891	switch (type) {
 892	case PIPE_CONTROL:
 893	case PIPE_BULK:
 894		if (list_empty(&ep->schedule))
 895			list_add_tail(&ep->schedule, &sl811->async);
 896		break;
 897	case PIPE_ISOCHRONOUS:
 898	case PIPE_INTERRUPT:
 899		urb->interval = ep->period;
 900		if (ep->branch < PERIODIC_SIZE) {
 901			/* NOTE:  the phase is correct here, but the value
 902			 * needs offsetting by the transfer queue depth.
 903			 * All current drivers ignore start_frame, so this
 904			 * is unlikely to ever matter...
 905			 */
 906			urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
 907						+ ep->branch;
 908			break;
 909		}
 910
 911		retval = balance(sl811, ep->period, ep->load);
 912		if (retval < 0)
 913			goto fail;
 914		ep->branch = retval;
 915		retval = 0;
 916		urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
 917					+ ep->branch;
 918
 919		/* sort each schedule branch by period (slow before fast)
 920		 * to share the faster parts of the tree without needing
 921		 * dummy/placeholder nodes
 922		 */
 923		dev_dbg(hcd->self.controller, "schedule qh%d/%p branch %d\n",
 924			ep->period, ep, ep->branch);
 925		for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
 926			struct sl811h_ep	**prev = &sl811->periodic[i];
 927			struct sl811h_ep	*here = *prev;
 928
 929			while (here && ep != here) {
 930				if (ep->period > here->period)
 931					break;
 932				prev = &here->next;
 933				here = *prev;
 934			}
 935			if (ep != here) {
 936				ep->next = here;
 937				*prev = ep;
 938			}
 939			sl811->load[i] += ep->load;
 940		}
 941		sl811->periodic_count++;
 942		hcd->self.bandwidth_allocated += ep->load / ep->period;
 943		sofirq_on(sl811);
 944	}
 945
 946	urb->hcpriv = hep;
 947	start_transfer(sl811);
 948	sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
 949fail:
 950	if (retval)
 951		usb_hcd_unlink_urb_from_ep(hcd, urb);
 952fail_not_linked:
 953	spin_unlock_irqrestore(&sl811->lock, flags);
 954	return retval;
 955}
 956
 957static int sl811h_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 958{
 959	struct sl811		*sl811 = hcd_to_sl811(hcd);
 960	struct usb_host_endpoint *hep;
 961	unsigned long		flags;
 962	struct sl811h_ep	*ep;
 963	int			retval;
 964
 965	spin_lock_irqsave(&sl811->lock, flags);
 966	retval = usb_hcd_check_unlink_urb(hcd, urb, status);
 967	if (retval)
 968		goto fail;
 969
 970	hep = urb->hcpriv;
 971	ep = hep->hcpriv;
 972	if (ep) {
 973		/* finish right away if this urb can't be active ...
 974		 * note that some drivers wrongly expect delays
 975		 */
 976		if (ep->hep->urb_list.next != &urb->urb_list) {
 977			/* not front of queue?  never active */
 978
 979		/* for active transfers, we expect an IRQ */
 980		} else if (sl811->active_a == ep) {
 981			if (time_before_eq(sl811->jiffies_a, jiffies)) {
 982				/* happens a lot with lowspeed?? */
 983				dev_dbg(hcd->self.controller,
 984					"giveup on DONE_A: ctrl %02x sts %02x\n",
 985					sl811_read(sl811,
 986						SL811_EP_A(SL11H_HOSTCTLREG)),
 987					sl811_read(sl811,
 988						SL811_EP_A(SL11H_PKTSTATREG)));
 989				sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
 990						0);
 991				sl811->active_a = NULL;
 992			} else
 993				urb = NULL;
 994#ifdef	USE_B
 995		} else if (sl811->active_b == ep) {
 996			if (time_before_eq(sl811->jiffies_a, jiffies)) {
 997				/* happens a lot with lowspeed?? */
 998				dev_dbg(hcd->self.controller,
 999					"giveup on DONE_B: ctrl %02x sts %02x\n",
1000					sl811_read(sl811,
1001						SL811_EP_B(SL11H_HOSTCTLREG)),
1002					sl811_read(sl811,
1003						SL811_EP_B(SL11H_PKTSTATREG)));
1004				sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG),
1005						0);
1006				sl811->active_b = NULL;
1007			} else
1008				urb = NULL;
1009#endif
1010		} else {
1011			/* front of queue for inactive endpoint */
1012		}
1013
1014		if (urb)
1015			finish_request(sl811, ep, urb, 0);
1016		else
1017			dev_dbg(sl811_to_hcd(sl811)->self.controller,
1018				"dequeue, urb %p active %s; wait4irq\n", urb,
1019				(sl811->active_a == ep) ? "A" : "B");
1020	} else
1021		retval = -EINVAL;
1022 fail:
1023	spin_unlock_irqrestore(&sl811->lock, flags);
1024	return retval;
1025}
1026
1027static void
1028sl811h_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep)
1029{
1030	struct sl811h_ep	*ep = hep->hcpriv;
1031
1032	if (!ep)
1033		return;
1034
1035	/* assume we'd just wait for the irq */
1036	if (!list_empty(&hep->urb_list))
1037		msleep(3);
1038	if (!list_empty(&hep->urb_list))
1039		dev_warn(hcd->self.controller, "ep %p not empty?\n", ep);
1040
1041	kfree(ep);
1042	hep->hcpriv = NULL;
1043}
1044
1045static int
1046sl811h_get_frame(struct usb_hcd *hcd)
1047{
1048	struct sl811 *sl811 = hcd_to_sl811(hcd);
1049
1050	/* wrong except while periodic transfers are scheduled;
1051	 * never matches the on-the-wire frame;
1052	 * subject to overruns.
1053	 */
1054	return sl811->frame;
1055}
1056
1057
1058/*-------------------------------------------------------------------------*/
1059
1060/* the virtual root hub timer IRQ checks for hub status */
1061static int
1062sl811h_hub_status_data(struct usb_hcd *hcd, char *buf)
1063{
1064	struct sl811 *sl811 = hcd_to_sl811(hcd);
1065#ifdef	QUIRK3
1066	unsigned long flags;
1067
1068	/* non-SMP HACK: use root hub timer as i/o watchdog
1069	 * this seems essential when SOF IRQs aren't in use...
1070	 */
1071	local_irq_save(flags);
1072	if (!timer_pending(&sl811->timer)) {
1073		if (sl811h_irq( /* ~0, */ hcd) != IRQ_NONE)
1074			sl811->stat_lost++;
1075	}
1076	local_irq_restore(flags);
1077#endif
1078
1079	if (!(sl811->port1 & (0xffff << 16)))
1080		return 0;
1081
1082	/* tell hub_wq port 1 changed */
1083	*buf = (1 << 1);
1084	return 1;
1085}
1086
1087static void
1088sl811h_hub_descriptor (
1089	struct sl811			*sl811,
1090	struct usb_hub_descriptor	*desc
1091) {
1092	u16		temp = 0;
1093
1094	desc->bDescriptorType = USB_DT_HUB;
1095	desc->bHubContrCurrent = 0;
1096
1097	desc->bNbrPorts = 1;
1098	desc->bDescLength = 9;
1099
1100	/* per-port power switching (gang of one!), or none */
1101	desc->bPwrOn2PwrGood = 0;
1102	if (sl811->board && sl811->board->port_power) {
1103		desc->bPwrOn2PwrGood = sl811->board->potpg;
1104		if (!desc->bPwrOn2PwrGood)
1105			desc->bPwrOn2PwrGood = 10;
1106		temp = HUB_CHAR_INDV_PORT_LPSM;
1107	} else
1108		temp = HUB_CHAR_NO_LPSM;
1109
1110	/* no overcurrent errors detection/handling */
1111	temp |= HUB_CHAR_NO_OCPM;
1112
1113	desc->wHubCharacteristics = cpu_to_le16(temp);
1114
1115	/* ports removable, and legacy PortPwrCtrlMask */
1116	desc->u.hs.DeviceRemovable[0] = 0 << 1;
1117	desc->u.hs.DeviceRemovable[1] = ~0;
1118}
1119
1120static void
1121sl811h_timer(unsigned long _sl811)
1122{
1123	struct sl811 	*sl811 = (void *) _sl811;
1124	unsigned long	flags;
1125	u8		irqstat;
1126	u8		signaling = sl811->ctrl1 & SL11H_CTL1MASK_FORCE;
1127	const u32	mask = USB_PORT_STAT_CONNECTION
1128				| USB_PORT_STAT_ENABLE
1129				| USB_PORT_STAT_LOW_SPEED;
1130
1131	spin_lock_irqsave(&sl811->lock, flags);
1132
1133	/* stop special signaling */
1134	sl811->ctrl1 &= ~SL11H_CTL1MASK_FORCE;
1135	sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1136	udelay(3);
1137
1138	irqstat = sl811_read(sl811, SL11H_IRQ_STATUS);
1139
1140	switch (signaling) {
1141	case SL11H_CTL1MASK_SE0:
1142		dev_dbg(sl811_to_hcd(sl811)->self.controller, "end reset\n");
1143		sl811->port1 = (USB_PORT_STAT_C_RESET << 16)
1144				 | USB_PORT_STAT_POWER;
1145		sl811->ctrl1 = 0;
1146		/* don't wrongly ack RD */
1147		if (irqstat & SL11H_INTMASK_INSRMV)
1148			irqstat &= ~SL11H_INTMASK_RD;
1149		break;
1150	case SL11H_CTL1MASK_K:
1151		dev_dbg(sl811_to_hcd(sl811)->self.controller, "end resume\n");
1152		sl811->port1 &= ~USB_PORT_STAT_SUSPEND;
1153		break;
1154	default:
1155		dev_dbg(sl811_to_hcd(sl811)->self.controller,
1156			"odd timer signaling: %02x\n", signaling);
1157		break;
1158	}
1159	sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
1160
1161	if (irqstat & SL11H_INTMASK_RD) {
1162		/* usbcore nukes all pending transactions on disconnect */
1163		if (sl811->port1 & USB_PORT_STAT_CONNECTION)
1164			sl811->port1 |= (USB_PORT_STAT_C_CONNECTION << 16)
1165					| (USB_PORT_STAT_C_ENABLE << 16);
1166		sl811->port1 &= ~mask;
1167		sl811->irq_enable = SL11H_INTMASK_INSRMV;
1168	} else {
1169		sl811->port1 |= mask;
1170		if (irqstat & SL11H_INTMASK_DP)
1171			sl811->port1 &= ~USB_PORT_STAT_LOW_SPEED;
1172		sl811->irq_enable = SL11H_INTMASK_INSRMV | SL11H_INTMASK_RD;
1173	}
1174
1175	if (sl811->port1 & USB_PORT_STAT_CONNECTION) {
1176		u8	ctrl2 = SL811HS_CTL2_INIT;
1177
1178		sl811->irq_enable |= SL11H_INTMASK_DONE_A;
1179#ifdef USE_B
1180		sl811->irq_enable |= SL11H_INTMASK_DONE_B;
1181#endif
1182		if (sl811->port1 & USB_PORT_STAT_LOW_SPEED) {
1183			sl811->ctrl1 |= SL11H_CTL1MASK_LSPD;
1184			ctrl2 |= SL811HS_CTL2MASK_DSWAP;
1185		}
1186
1187		/* start SOFs flowing, kickstarting with A registers */
1188		sl811->ctrl1 |= SL11H_CTL1MASK_SOF_ENA;
1189		sl811_write(sl811, SL11H_SOFLOWREG, 0xe0);
1190		sl811_write(sl811, SL811HS_CTLREG2, ctrl2);
1191
1192		/* autoincrementing */
1193		sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0);
1194		writeb(SL_SOF, sl811->data_reg);
1195		writeb(0, sl811->data_reg);
1196		sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
1197				SL11H_HCTLMASK_ARM);
1198
1199		/* hub_wq provides debounce delay */
1200	} else {
1201		sl811->ctrl1 = 0;
1202	}
1203	sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1204
1205	/* reenable irqs */
1206	sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
1207	spin_unlock_irqrestore(&sl811->lock, flags);
1208}
1209
1210static int
1211sl811h_hub_control(
1212	struct usb_hcd	*hcd,
1213	u16		typeReq,
1214	u16		wValue,
1215	u16		wIndex,
1216	char		*buf,
1217	u16		wLength
1218) {
1219	struct sl811	*sl811 = hcd_to_sl811(hcd);
1220	int		retval = 0;
1221	unsigned long	flags;
1222
1223	spin_lock_irqsave(&sl811->lock, flags);
1224
1225	switch (typeReq) {
1226	case ClearHubFeature:
1227	case SetHubFeature:
1228		switch (wValue) {
1229		case C_HUB_OVER_CURRENT:
1230		case C_HUB_LOCAL_POWER:
1231			break;
1232		default:
1233			goto error;
1234		}
1235		break;
1236	case ClearPortFeature:
1237		if (wIndex != 1 || wLength != 0)
1238			goto error;
1239
1240		switch (wValue) {
1241		case USB_PORT_FEAT_ENABLE:
1242			sl811->port1 &= USB_PORT_STAT_POWER;
1243			sl811->ctrl1 = 0;
1244			sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1245			sl811->irq_enable = SL11H_INTMASK_INSRMV;
1246			sl811_write(sl811, SL11H_IRQ_ENABLE,
1247						sl811->irq_enable);
1248			break;
1249		case USB_PORT_FEAT_SUSPEND:
1250			if (!(sl811->port1 & USB_PORT_STAT_SUSPEND))
1251				break;
1252
1253			/* 20 msec of resume/K signaling, other irqs blocked */
1254			dev_dbg(hcd->self.controller, "start resume...\n");
1255			sl811->irq_enable = 0;
1256			sl811_write(sl811, SL11H_IRQ_ENABLE,
1257						sl811->irq_enable);
1258			sl811->ctrl1 |= SL11H_CTL1MASK_K;
1259			sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1260
1261			mod_timer(&sl811->timer, jiffies
1262					+ msecs_to_jiffies(USB_RESUME_TIMEOUT));
1263			break;
1264		case USB_PORT_FEAT_POWER:
1265			port_power(sl811, 0);
1266			break;
1267		case USB_PORT_FEAT_C_ENABLE:
1268		case USB_PORT_FEAT_C_SUSPEND:
1269		case USB_PORT_FEAT_C_CONNECTION:
1270		case USB_PORT_FEAT_C_OVER_CURRENT:
1271		case USB_PORT_FEAT_C_RESET:
1272			break;
1273		default:
1274			goto error;
1275		}
1276		sl811->port1 &= ~(1 << wValue);
1277		break;
1278	case GetHubDescriptor:
1279		sl811h_hub_descriptor(sl811, (struct usb_hub_descriptor *) buf);
1280		break;
1281	case GetHubStatus:
1282		put_unaligned_le32(0, buf);
1283		break;
1284	case GetPortStatus:
1285		if (wIndex != 1)
1286			goto error;
1287		put_unaligned_le32(sl811->port1, buf);
1288
1289#ifndef	VERBOSE
1290	if (*(u16*)(buf+2))	/* only if wPortChange is interesting */
1291#endif
1292		dev_dbg(hcd->self.controller, "GetPortStatus %08x\n",
1293			sl811->port1);
1294		break;
1295	case SetPortFeature:
1296		if (wIndex != 1 || wLength != 0)
1297			goto error;
1298		switch (wValue) {
1299		case USB_PORT_FEAT_SUSPEND:
1300			if (sl811->port1 & USB_PORT_STAT_RESET)
1301				goto error;
1302			if (!(sl811->port1 & USB_PORT_STAT_ENABLE))
1303				goto error;
1304
1305			dev_dbg(hcd->self.controller,"suspend...\n");
1306			sl811->ctrl1 &= ~SL11H_CTL1MASK_SOF_ENA;
1307			sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1308			break;
1309		case USB_PORT_FEAT_POWER:
1310			port_power(sl811, 1);
1311			break;
1312		case USB_PORT_FEAT_RESET:
1313			if (sl811->port1 & USB_PORT_STAT_SUSPEND)
1314				goto error;
1315			if (!(sl811->port1 & USB_PORT_STAT_POWER))
1316				break;
1317
1318			/* 50 msec of reset/SE0 signaling, irqs blocked */
1319			sl811->irq_enable = 0;
1320			sl811_write(sl811, SL11H_IRQ_ENABLE,
1321						sl811->irq_enable);
1322			sl811->ctrl1 = SL11H_CTL1MASK_SE0;
1323			sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1324			sl811->port1 |= USB_PORT_STAT_RESET;
1325			mod_timer(&sl811->timer, jiffies
1326					+ msecs_to_jiffies(50));
1327			break;
1328		default:
1329			goto error;
1330		}
1331		sl811->port1 |= 1 << wValue;
1332		break;
1333
1334	default:
1335error:
1336		/* "protocol stall" on error */
1337		retval = -EPIPE;
1338	}
1339
1340	spin_unlock_irqrestore(&sl811->lock, flags);
1341	return retval;
1342}
1343
1344#ifdef	CONFIG_PM
1345
1346static int
1347sl811h_bus_suspend(struct usb_hcd *hcd)
1348{
1349	// SOFs off
1350	dev_dbg(hcd->self.controller, "%s\n", __func__);
1351	return 0;
1352}
1353
1354static int
1355sl811h_bus_resume(struct usb_hcd *hcd)
1356{
1357	// SOFs on
1358	dev_dbg(hcd->self.controller, "%s\n", __func__);
1359	return 0;
1360}
1361
1362#else
1363
1364#define	sl811h_bus_suspend	NULL
1365#define	sl811h_bus_resume	NULL
1366
1367#endif
1368
1369
1370/*-------------------------------------------------------------------------*/
1371
 
 
 
 
 
 
 
 
 
 
1372static void dump_irq(struct seq_file *s, char *label, u8 mask)
1373{
1374	seq_printf(s, "%s %02x%s%s%s%s%s%s\n", label, mask,
1375		(mask & SL11H_INTMASK_DONE_A) ? " done_a" : "",
1376		(mask & SL11H_INTMASK_DONE_B) ? " done_b" : "",
1377		(mask & SL11H_INTMASK_SOFINTR) ? " sof" : "",
1378		(mask & SL11H_INTMASK_INSRMV) ? " ins/rmv" : "",
1379		(mask & SL11H_INTMASK_RD) ? " rd" : "",
1380		(mask & SL11H_INTMASK_DP) ? " dp" : "");
1381}
1382
1383static int sl811h_show(struct seq_file *s, void *unused)
1384{
1385	struct sl811		*sl811 = s->private;
1386	struct sl811h_ep	*ep;
1387	unsigned		i;
1388
1389	seq_printf(s, "%s\n%s version %s\nportstatus[1] = %08x\n",
1390		sl811_to_hcd(sl811)->product_desc,
1391		hcd_name, DRIVER_VERSION,
1392		sl811->port1);
1393
1394	seq_printf(s, "insert/remove: %ld\n", sl811->stat_insrmv);
1395	seq_printf(s, "current session:  done_a %ld done_b %ld "
1396			"wake %ld sof %ld overrun %ld lost %ld\n\n",
1397		sl811->stat_a, sl811->stat_b,
1398		sl811->stat_wake, sl811->stat_sof,
1399		sl811->stat_overrun, sl811->stat_lost);
1400
1401	spin_lock_irq(&sl811->lock);
1402
1403	if (sl811->ctrl1 & SL11H_CTL1MASK_SUSPEND)
1404		seq_printf(s, "(suspended)\n\n");
1405	else {
1406		u8	t = sl811_read(sl811, SL11H_CTLREG1);
1407
1408		seq_printf(s, "ctrl1 %02x%s%s%s%s\n", t,
1409			(t & SL11H_CTL1MASK_SOF_ENA) ? " sofgen" : "",
1410			({char *s; switch (t & SL11H_CTL1MASK_FORCE) {
1411			case SL11H_CTL1MASK_NORMAL: s = ""; break;
1412			case SL11H_CTL1MASK_SE0: s = " se0/reset"; break;
1413			case SL11H_CTL1MASK_K: s = " k/resume"; break;
1414			default: s = "j"; break;
1415			} s; }),
1416			(t & SL11H_CTL1MASK_LSPD) ? " lowspeed" : "",
1417			(t & SL11H_CTL1MASK_SUSPEND) ? " suspend" : "");
1418
1419		dump_irq(s, "irq_enable",
1420				sl811_read(sl811, SL11H_IRQ_ENABLE));
1421		dump_irq(s, "irq_status",
1422				sl811_read(sl811, SL11H_IRQ_STATUS));
1423		seq_printf(s, "frame clocks remaining:  %d\n",
1424				sl811_read(sl811, SL11H_SOFTMRREG) << 6);
1425	}
1426
1427	seq_printf(s, "A: qh%p ctl %02x sts %02x\n", sl811->active_a,
1428		sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)),
1429		sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
1430	seq_printf(s, "B: qh%p ctl %02x sts %02x\n", sl811->active_b,
1431		sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)),
1432		sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
1433	seq_printf(s, "\n");
1434	list_for_each_entry (ep, &sl811->async, schedule) {
1435		struct urb		*urb;
1436
1437		seq_printf(s, "%s%sqh%p, ep%d%s, maxpacket %d"
1438					" nak %d err %d\n",
1439			(ep == sl811->active_a) ? "(A) " : "",
1440			(ep == sl811->active_b) ? "(B) " : "",
1441			ep, ep->epnum,
1442			({ char *s; switch (ep->nextpid) {
1443			case USB_PID_IN: s = "in"; break;
1444			case USB_PID_OUT: s = "out"; break;
1445			case USB_PID_SETUP: s = "setup"; break;
1446			case USB_PID_ACK: s = "status"; break;
1447			default: s = "?"; break;
1448			} s;}),
1449			ep->maxpacket,
1450			ep->nak_count, ep->error_count);
1451		list_for_each_entry (urb, &ep->hep->urb_list, urb_list) {
1452			seq_printf(s, "  urb%p, %d/%d\n", urb,
1453				urb->actual_length,
1454				urb->transfer_buffer_length);
1455		}
1456	}
1457	if (!list_empty(&sl811->async))
1458		seq_printf(s, "\n");
1459
1460	seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE);
1461
1462	for (i = 0; i < PERIODIC_SIZE; i++) {
1463		ep = sl811->periodic[i];
1464		if (!ep)
1465			continue;
1466		seq_printf(s, "%2d [%3d]:\n", i, sl811->load[i]);
1467
1468		/* DUMB: prints shared entries multiple times */
1469		do {
1470			seq_printf(s,
1471				"   %s%sqh%d/%p (%sdev%d ep%d%s max %d) "
1472					"err %d\n",
1473				(ep == sl811->active_a) ? "(A) " : "",
1474				(ep == sl811->active_b) ? "(B) " : "",
1475				ep->period, ep,
1476				(ep->udev->speed == USB_SPEED_FULL)
1477					? "" : "ls ",
1478				ep->udev->devnum, ep->epnum,
1479				(ep->epnum == 0) ? ""
1480					: ((ep->nextpid == USB_PID_IN)
1481						? "in"
1482						: "out"),
1483				ep->maxpacket, ep->error_count);
1484			ep = ep->next;
1485		} while (ep);
1486	}
1487
1488	spin_unlock_irq(&sl811->lock);
1489	seq_printf(s, "\n");
1490
1491	return 0;
1492}
1493
1494static int sl811h_open(struct inode *inode, struct file *file)
1495{
1496	return single_open(file, sl811h_show, inode->i_private);
1497}
1498
1499static const struct file_operations debug_ops = {
1500	.open		= sl811h_open,
1501	.read		= seq_read,
1502	.llseek		= seq_lseek,
1503	.release	= single_release,
1504};
1505
1506/* expect just one sl811 per system */
 
 
1507static void create_debug_file(struct sl811 *sl811)
1508{
1509	sl811->debug_file = debugfs_create_file("sl811h", S_IRUGO,
1510						usb_debug_root, sl811,
1511						&debug_ops);
1512}
1513
1514static void remove_debug_file(struct sl811 *sl811)
1515{
1516	debugfs_remove(sl811->debug_file);
 
1517}
1518
 
 
1519/*-------------------------------------------------------------------------*/
1520
1521static void
1522sl811h_stop(struct usb_hcd *hcd)
1523{
1524	struct sl811	*sl811 = hcd_to_sl811(hcd);
1525	unsigned long	flags;
1526
1527	del_timer_sync(&hcd->rh_timer);
1528
1529	spin_lock_irqsave(&sl811->lock, flags);
1530	port_power(sl811, 0);
1531	spin_unlock_irqrestore(&sl811->lock, flags);
1532}
1533
1534static int
1535sl811h_start(struct usb_hcd *hcd)
1536{
1537	struct sl811		*sl811 = hcd_to_sl811(hcd);
1538
1539	/* chip has been reset, VBUS power is off */
1540	hcd->state = HC_STATE_RUNNING;
1541
1542	if (sl811->board) {
1543		if (!device_can_wakeup(hcd->self.controller))
1544			device_init_wakeup(hcd->self.controller,
1545				sl811->board->can_wakeup);
1546		hcd->power_budget = sl811->board->power * 2;
1547	}
1548
1549	/* enable power and interrupts */
1550	port_power(sl811, 1);
1551
1552	return 0;
1553}
1554
1555/*-------------------------------------------------------------------------*/
1556
1557static struct hc_driver sl811h_hc_driver = {
1558	.description =		hcd_name,
1559	.hcd_priv_size =	sizeof(struct sl811),
1560
1561	/*
1562	 * generic hardware linkage
1563	 */
1564	.irq =			sl811h_irq,
1565	.flags =		HCD_USB11 | HCD_MEMORY,
1566
1567	/* Basic lifecycle operations */
1568	.start =		sl811h_start,
1569	.stop =			sl811h_stop,
1570
1571	/*
1572	 * managing i/o requests and associated device resources
1573	 */
1574	.urb_enqueue =		sl811h_urb_enqueue,
1575	.urb_dequeue =		sl811h_urb_dequeue,
1576	.endpoint_disable =	sl811h_endpoint_disable,
1577
1578	/*
1579	 * periodic schedule support
1580	 */
1581	.get_frame_number =	sl811h_get_frame,
1582
1583	/*
1584	 * root hub support
1585	 */
1586	.hub_status_data =	sl811h_hub_status_data,
1587	.hub_control =		sl811h_hub_control,
1588	.bus_suspend =		sl811h_bus_suspend,
1589	.bus_resume =		sl811h_bus_resume,
1590};
1591
1592/*-------------------------------------------------------------------------*/
1593
1594static int
1595sl811h_remove(struct platform_device *dev)
1596{
1597	struct usb_hcd		*hcd = platform_get_drvdata(dev);
1598	struct sl811		*sl811 = hcd_to_sl811(hcd);
1599	struct resource		*res;
1600
1601	remove_debug_file(sl811);
1602	usb_remove_hcd(hcd);
1603
1604	/* some platforms may use IORESOURCE_IO */
1605	res = platform_get_resource(dev, IORESOURCE_MEM, 1);
1606	if (res)
1607		iounmap(sl811->data_reg);
1608
1609	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1610	if (res)
1611		iounmap(sl811->addr_reg);
1612
1613	usb_put_hcd(hcd);
1614	return 0;
1615}
1616
1617static int
1618sl811h_probe(struct platform_device *dev)
1619{
1620	struct usb_hcd		*hcd;
1621	struct sl811		*sl811;
1622	struct resource		*addr, *data, *ires;
1623	int			irq;
1624	void __iomem		*addr_reg;
1625	void __iomem		*data_reg;
1626	int			retval;
1627	u8			tmp, ioaddr = 0;
1628	unsigned long		irqflags;
1629
1630	if (usb_disabled())
1631		return -ENODEV;
1632
1633	/* basic sanity checks first.  board-specific init logic should
1634	 * have initialized these three resources and probably board
1635	 * specific platform_data.  we don't probe for IRQs, and do only
1636	 * minimal sanity checking.
1637	 */
1638	ires = platform_get_resource(dev, IORESOURCE_IRQ, 0);
1639	if (dev->num_resources < 3 || !ires)
1640		return -ENODEV;
1641
1642	irq = ires->start;
1643	irqflags = ires->flags & IRQF_TRIGGER_MASK;
1644
1645	/* refuse to confuse usbcore */
1646	if (dev->dev.dma_mask) {
1647		dev_dbg(&dev->dev, "no we won't dma\n");
1648		return -EINVAL;
1649	}
1650
1651	/* the chip may be wired for either kind of addressing */
1652	addr = platform_get_resource(dev, IORESOURCE_MEM, 0);
1653	data = platform_get_resource(dev, IORESOURCE_MEM, 1);
1654	retval = -EBUSY;
1655	if (!addr || !data) {
1656		addr = platform_get_resource(dev, IORESOURCE_IO, 0);
1657		data = platform_get_resource(dev, IORESOURCE_IO, 1);
1658		if (!addr || !data)
1659			return -ENODEV;
1660		ioaddr = 1;
1661		/*
1662		 * NOTE: 64-bit resource->start is getting truncated
1663		 * to avoid compiler warning, assuming that ->start
1664		 * is always 32-bit for this case
1665		 */
1666		addr_reg = (void __iomem *) (unsigned long) addr->start;
1667		data_reg = (void __iomem *) (unsigned long) data->start;
1668	} else {
1669		addr_reg = ioremap(addr->start, 1);
1670		if (addr_reg == NULL) {
1671			retval = -ENOMEM;
1672			goto err2;
1673		}
1674
1675		data_reg = ioremap(data->start, 1);
1676		if (data_reg == NULL) {
1677			retval = -ENOMEM;
1678			goto err4;
1679		}
1680	}
1681
1682	/* allocate and initialize hcd */
1683	hcd = usb_create_hcd(&sl811h_hc_driver, &dev->dev, dev_name(&dev->dev));
1684	if (!hcd) {
1685		retval = -ENOMEM;
1686		goto err5;
1687	}
1688	hcd->rsrc_start = addr->start;
1689	sl811 = hcd_to_sl811(hcd);
1690
1691	spin_lock_init(&sl811->lock);
1692	INIT_LIST_HEAD(&sl811->async);
1693	sl811->board = dev_get_platdata(&dev->dev);
1694	setup_timer(&sl811->timer, sl811h_timer, (unsigned long)sl811);
 
 
1695	sl811->addr_reg = addr_reg;
1696	sl811->data_reg = data_reg;
1697
1698	spin_lock_irq(&sl811->lock);
1699	port_power(sl811, 0);
1700	spin_unlock_irq(&sl811->lock);
1701	msleep(200);
1702
1703	tmp = sl811_read(sl811, SL11H_HWREVREG);
1704	switch (tmp >> 4) {
1705	case 1:
1706		hcd->product_desc = "SL811HS v1.2";
1707		break;
1708	case 2:
1709		hcd->product_desc = "SL811HS v1.5";
1710		break;
1711	default:
1712		/* reject case 0, SL11S is less functional */
1713		dev_dbg(&dev->dev, "chiprev %02x\n", tmp);
1714		retval = -ENXIO;
1715		goto err6;
1716	}
1717
1718	/* The chip's IRQ is level triggered, active high.  A requirement
1719	 * for platform device setup is to cope with things like signal
1720	 * inverters (e.g. CF is active low) or working only with edge
1721	 * triggers (e.g. most ARM CPUs).  Initial driver stress testing
1722	 * was on a system with single edge triggering, so most sorts of
1723	 * triggering arrangement should work.
1724	 *
1725	 * Use resource IRQ flags if set by platform device setup.
1726	 */
1727	irqflags |= IRQF_SHARED;
1728	retval = usb_add_hcd(hcd, irq, irqflags);
1729	if (retval != 0)
1730		goto err6;
1731
1732	device_wakeup_enable(hcd->self.controller);
1733
1734	create_debug_file(sl811);
1735	return retval;
1736
1737 err6:
1738	usb_put_hcd(hcd);
1739 err5:
1740	if (!ioaddr)
1741		iounmap(data_reg);
1742 err4:
1743	if (!ioaddr)
1744		iounmap(addr_reg);
1745 err2:
1746	dev_dbg(&dev->dev, "init error, %d\n", retval);
1747	return retval;
1748}
1749
1750#ifdef	CONFIG_PM
1751
1752/* for this device there's no useful distinction between the controller
1753 * and its root hub.
 
1754 */
1755
1756static int
1757sl811h_suspend(struct platform_device *dev, pm_message_t state)
1758{
1759	struct usb_hcd	*hcd = platform_get_drvdata(dev);
1760	struct sl811	*sl811 = hcd_to_sl811(hcd);
1761	int		retval = 0;
1762
1763	switch (state.event) {
1764	case PM_EVENT_FREEZE:
1765		retval = sl811h_bus_suspend(hcd);
1766		break;
1767	case PM_EVENT_SUSPEND:
1768	case PM_EVENT_HIBERNATE:
1769	case PM_EVENT_PRETHAW:		/* explicitly discard hw state */
1770		port_power(sl811, 0);
1771		break;
1772	}
1773	return retval;
1774}
1775
1776static int
1777sl811h_resume(struct platform_device *dev)
1778{
1779	struct usb_hcd	*hcd = platform_get_drvdata(dev);
1780	struct sl811	*sl811 = hcd_to_sl811(hcd);
1781
1782	/* with no "check to see if VBUS is still powered" board hook,
1783	 * let's assume it'd only be powered to enable remote wakeup.
1784	 */
1785	if (!sl811->port1 || !device_can_wakeup(&hcd->self.root_hub->dev)) {
1786		sl811->port1 = 0;
1787		port_power(sl811, 1);
1788		usb_root_hub_lost_power(hcd->self.root_hub);
1789		return 0;
1790	}
1791
1792	return sl811h_bus_resume(hcd);
1793}
1794
1795#else
1796
1797#define	sl811h_suspend	NULL
1798#define	sl811h_resume	NULL
1799
1800#endif
1801
1802
1803/* this driver is exported so sl811_cs can depend on it */
1804struct platform_driver sl811h_driver = {
1805	.probe =	sl811h_probe,
1806	.remove =	sl811h_remove,
1807
1808	.suspend =	sl811h_suspend,
1809	.resume =	sl811h_resume,
1810	.driver = {
1811		.name =	(char *) hcd_name,
 
1812	},
1813};
1814EXPORT_SYMBOL(sl811h_driver);
1815
1816module_platform_driver(sl811h_driver);