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1/*
2 * Driver for Atmel AC97C
3 *
4 * Copyright (C) 2005-2009 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation.
9 */
10#include <linux/clk.h>
11#include <linux/delay.h>
12#include <linux/bitmap.h>
13#include <linux/device.h>
14#include <linux/dmaengine.h>
15#include <linux/dma-mapping.h>
16#include <linux/atmel_pdc.h>
17#include <linux/init.h>
18#include <linux/interrupt.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <linux/mutex.h>
22#include <linux/gpio.h>
23#include <linux/types.h>
24#include <linux/io.h>
25#include <linux/of.h>
26#include <linux/of_gpio.h>
27#include <linux/of_device.h>
28
29#include <sound/core.h>
30#include <sound/initval.h>
31#include <sound/pcm.h>
32#include <sound/pcm_params.h>
33#include <sound/ac97_codec.h>
34#include <sound/atmel-ac97c.h>
35#include <sound/memalloc.h>
36
37#include <linux/platform_data/dma-dw.h>
38#include <linux/dma/dw.h>
39
40#ifdef CONFIG_AVR32
41#include <mach/cpu.h>
42#else
43#define cpu_is_at32ap7000() 0
44#endif
45
46#include "ac97c.h"
47
48enum {
49 DMA_TX_READY = 0,
50 DMA_RX_READY,
51 DMA_TX_CHAN_PRESENT,
52 DMA_RX_CHAN_PRESENT,
53};
54
55/* Serialize access to opened variable */
56static DEFINE_MUTEX(opened_mutex);
57
58struct atmel_ac97c_dma {
59 struct dma_chan *rx_chan;
60 struct dma_chan *tx_chan;
61};
62
63struct atmel_ac97c {
64 struct clk *pclk;
65 struct platform_device *pdev;
66 struct atmel_ac97c_dma dma;
67
68 struct snd_pcm_substream *playback_substream;
69 struct snd_pcm_substream *capture_substream;
70 struct snd_card *card;
71 struct snd_pcm *pcm;
72 struct snd_ac97 *ac97;
73 struct snd_ac97_bus *ac97_bus;
74
75 u64 cur_format;
76 unsigned int cur_rate;
77 unsigned long flags;
78 int playback_period, capture_period;
79 /* Serialize access to opened variable */
80 spinlock_t lock;
81 void __iomem *regs;
82 int irq;
83 int opened;
84 int reset_pin;
85};
86
87#define get_chip(card) ((struct atmel_ac97c *)(card)->private_data)
88
89#define ac97c_writel(chip, reg, val) \
90 __raw_writel((val), (chip)->regs + AC97C_##reg)
91#define ac97c_readl(chip, reg) \
92 __raw_readl((chip)->regs + AC97C_##reg)
93
94/* This function is called by the DMA driver. */
95static void atmel_ac97c_dma_playback_period_done(void *arg)
96{
97 struct atmel_ac97c *chip = arg;
98 snd_pcm_period_elapsed(chip->playback_substream);
99}
100
101static void atmel_ac97c_dma_capture_period_done(void *arg)
102{
103 struct atmel_ac97c *chip = arg;
104 snd_pcm_period_elapsed(chip->capture_substream);
105}
106
107static int atmel_ac97c_prepare_dma(struct atmel_ac97c *chip,
108 struct snd_pcm_substream *substream,
109 enum dma_transfer_direction direction)
110{
111 struct dma_chan *chan;
112 struct dw_cyclic_desc *cdesc;
113 struct snd_pcm_runtime *runtime = substream->runtime;
114 unsigned long buffer_len, period_len;
115
116 /*
117 * We don't do DMA on "complex" transfers, i.e. with
118 * non-halfword-aligned buffers or lengths.
119 */
120 if (runtime->dma_addr & 1 || runtime->buffer_size & 1) {
121 dev_dbg(&chip->pdev->dev, "too complex transfer\n");
122 return -EINVAL;
123 }
124
125 if (direction == DMA_MEM_TO_DEV)
126 chan = chip->dma.tx_chan;
127 else
128 chan = chip->dma.rx_chan;
129
130 buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
131 period_len = frames_to_bytes(runtime, runtime->period_size);
132
133 cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len,
134 period_len, direction);
135 if (IS_ERR(cdesc)) {
136 dev_dbg(&chip->pdev->dev, "could not prepare cyclic DMA\n");
137 return PTR_ERR(cdesc);
138 }
139
140 if (direction == DMA_MEM_TO_DEV) {
141 cdesc->period_callback = atmel_ac97c_dma_playback_period_done;
142 set_bit(DMA_TX_READY, &chip->flags);
143 } else {
144 cdesc->period_callback = atmel_ac97c_dma_capture_period_done;
145 set_bit(DMA_RX_READY, &chip->flags);
146 }
147
148 cdesc->period_callback_param = chip;
149
150 return 0;
151}
152
153static struct snd_pcm_hardware atmel_ac97c_hw = {
154 .info = (SNDRV_PCM_INFO_MMAP
155 | SNDRV_PCM_INFO_MMAP_VALID
156 | SNDRV_PCM_INFO_INTERLEAVED
157 | SNDRV_PCM_INFO_BLOCK_TRANSFER
158 | SNDRV_PCM_INFO_JOINT_DUPLEX
159 | SNDRV_PCM_INFO_RESUME
160 | SNDRV_PCM_INFO_PAUSE),
161 .formats = (SNDRV_PCM_FMTBIT_S16_BE
162 | SNDRV_PCM_FMTBIT_S16_LE),
163 .rates = (SNDRV_PCM_RATE_CONTINUOUS),
164 .rate_min = 4000,
165 .rate_max = 48000,
166 .channels_min = 1,
167 .channels_max = 2,
168 .buffer_bytes_max = 2 * 2 * 64 * 2048,
169 .period_bytes_min = 4096,
170 .period_bytes_max = 4096,
171 .periods_min = 6,
172 .periods_max = 64,
173};
174
175static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream)
176{
177 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
178 struct snd_pcm_runtime *runtime = substream->runtime;
179
180 mutex_lock(&opened_mutex);
181 chip->opened++;
182 runtime->hw = atmel_ac97c_hw;
183 if (chip->cur_rate) {
184 runtime->hw.rate_min = chip->cur_rate;
185 runtime->hw.rate_max = chip->cur_rate;
186 }
187 if (chip->cur_format)
188 runtime->hw.formats = pcm_format_to_bits(chip->cur_format);
189 mutex_unlock(&opened_mutex);
190 chip->playback_substream = substream;
191 return 0;
192}
193
194static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream)
195{
196 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
197 struct snd_pcm_runtime *runtime = substream->runtime;
198
199 mutex_lock(&opened_mutex);
200 chip->opened++;
201 runtime->hw = atmel_ac97c_hw;
202 if (chip->cur_rate) {
203 runtime->hw.rate_min = chip->cur_rate;
204 runtime->hw.rate_max = chip->cur_rate;
205 }
206 if (chip->cur_format)
207 runtime->hw.formats = pcm_format_to_bits(chip->cur_format);
208 mutex_unlock(&opened_mutex);
209 chip->capture_substream = substream;
210 return 0;
211}
212
213static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream)
214{
215 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
216
217 mutex_lock(&opened_mutex);
218 chip->opened--;
219 if (!chip->opened) {
220 chip->cur_rate = 0;
221 chip->cur_format = 0;
222 }
223 mutex_unlock(&opened_mutex);
224
225 chip->playback_substream = NULL;
226
227 return 0;
228}
229
230static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream)
231{
232 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
233
234 mutex_lock(&opened_mutex);
235 chip->opened--;
236 if (!chip->opened) {
237 chip->cur_rate = 0;
238 chip->cur_format = 0;
239 }
240 mutex_unlock(&opened_mutex);
241
242 chip->capture_substream = NULL;
243
244 return 0;
245}
246
247static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream,
248 struct snd_pcm_hw_params *hw_params)
249{
250 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
251 int retval;
252
253 retval = snd_pcm_lib_malloc_pages(substream,
254 params_buffer_bytes(hw_params));
255 if (retval < 0)
256 return retval;
257 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
258 if (cpu_is_at32ap7000()) {
259 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
260 if (retval == 1)
261 if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
262 dw_dma_cyclic_free(chip->dma.tx_chan);
263 }
264 /* Set restrictions to params. */
265 mutex_lock(&opened_mutex);
266 chip->cur_rate = params_rate(hw_params);
267 chip->cur_format = params_format(hw_params);
268 mutex_unlock(&opened_mutex);
269
270 return retval;
271}
272
273static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream,
274 struct snd_pcm_hw_params *hw_params)
275{
276 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
277 int retval;
278
279 retval = snd_pcm_lib_malloc_pages(substream,
280 params_buffer_bytes(hw_params));
281 if (retval < 0)
282 return retval;
283 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
284 if (cpu_is_at32ap7000() && retval == 1)
285 if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
286 dw_dma_cyclic_free(chip->dma.rx_chan);
287
288 /* Set restrictions to params. */
289 mutex_lock(&opened_mutex);
290 chip->cur_rate = params_rate(hw_params);
291 chip->cur_format = params_format(hw_params);
292 mutex_unlock(&opened_mutex);
293
294 return retval;
295}
296
297static int atmel_ac97c_playback_hw_free(struct snd_pcm_substream *substream)
298{
299 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
300 if (cpu_is_at32ap7000()) {
301 if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
302 dw_dma_cyclic_free(chip->dma.tx_chan);
303 }
304 return snd_pcm_lib_free_pages(substream);
305}
306
307static int atmel_ac97c_capture_hw_free(struct snd_pcm_substream *substream)
308{
309 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
310 if (cpu_is_at32ap7000()) {
311 if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
312 dw_dma_cyclic_free(chip->dma.rx_chan);
313 }
314 return snd_pcm_lib_free_pages(substream);
315}
316
317static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream)
318{
319 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
320 struct snd_pcm_runtime *runtime = substream->runtime;
321 int block_size = frames_to_bytes(runtime, runtime->period_size);
322 unsigned long word = ac97c_readl(chip, OCA);
323 int retval;
324
325 chip->playback_period = 0;
326 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
327
328 /* assign channels to AC97C channel A */
329 switch (runtime->channels) {
330 case 1:
331 word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
332 break;
333 case 2:
334 word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
335 | AC97C_CH_ASSIGN(PCM_RIGHT, A);
336 break;
337 default:
338 /* TODO: support more than two channels */
339 return -EINVAL;
340 }
341 ac97c_writel(chip, OCA, word);
342
343 /* configure sample format and size */
344 word = ac97c_readl(chip, CAMR);
345 if (chip->opened <= 1)
346 word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
347 else
348 word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
349
350 switch (runtime->format) {
351 case SNDRV_PCM_FORMAT_S16_LE:
352 if (cpu_is_at32ap7000())
353 word |= AC97C_CMR_CEM_LITTLE;
354 break;
355 case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
356 word &= ~(AC97C_CMR_CEM_LITTLE);
357 break;
358 default:
359 word = ac97c_readl(chip, OCA);
360 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
361 ac97c_writel(chip, OCA, word);
362 return -EINVAL;
363 }
364
365 /* Enable underrun interrupt on channel A */
366 word |= AC97C_CSR_UNRUN;
367
368 ac97c_writel(chip, CAMR, word);
369
370 /* Enable channel A event interrupt */
371 word = ac97c_readl(chip, IMR);
372 word |= AC97C_SR_CAEVT;
373 ac97c_writel(chip, IER, word);
374
375 /* set variable rate if needed */
376 if (runtime->rate != 48000) {
377 word = ac97c_readl(chip, MR);
378 word |= AC97C_MR_VRA;
379 ac97c_writel(chip, MR, word);
380 } else {
381 word = ac97c_readl(chip, MR);
382 word &= ~(AC97C_MR_VRA);
383 ac97c_writel(chip, MR, word);
384 }
385
386 retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
387 runtime->rate);
388 if (retval)
389 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
390 runtime->rate);
391
392 if (cpu_is_at32ap7000()) {
393 if (!test_bit(DMA_TX_READY, &chip->flags))
394 retval = atmel_ac97c_prepare_dma(chip, substream,
395 DMA_MEM_TO_DEV);
396 } else {
397 /* Initialize and start the PDC */
398 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR);
399 writel(block_size / 2, chip->regs + ATMEL_PDC_TCR);
400 writel(runtime->dma_addr + block_size,
401 chip->regs + ATMEL_PDC_TNPR);
402 writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR);
403 }
404
405 return retval;
406}
407
408static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream)
409{
410 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
411 struct snd_pcm_runtime *runtime = substream->runtime;
412 int block_size = frames_to_bytes(runtime, runtime->period_size);
413 unsigned long word = ac97c_readl(chip, ICA);
414 int retval;
415
416 chip->capture_period = 0;
417 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
418
419 /* assign channels to AC97C channel A */
420 switch (runtime->channels) {
421 case 1:
422 word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
423 break;
424 case 2:
425 word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
426 | AC97C_CH_ASSIGN(PCM_RIGHT, A);
427 break;
428 default:
429 /* TODO: support more than two channels */
430 return -EINVAL;
431 }
432 ac97c_writel(chip, ICA, word);
433
434 /* configure sample format and size */
435 word = ac97c_readl(chip, CAMR);
436 if (chip->opened <= 1)
437 word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
438 else
439 word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
440
441 switch (runtime->format) {
442 case SNDRV_PCM_FORMAT_S16_LE:
443 if (cpu_is_at32ap7000())
444 word |= AC97C_CMR_CEM_LITTLE;
445 break;
446 case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
447 word &= ~(AC97C_CMR_CEM_LITTLE);
448 break;
449 default:
450 word = ac97c_readl(chip, ICA);
451 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
452 ac97c_writel(chip, ICA, word);
453 return -EINVAL;
454 }
455
456 /* Enable overrun interrupt on channel A */
457 word |= AC97C_CSR_OVRUN;
458
459 ac97c_writel(chip, CAMR, word);
460
461 /* Enable channel A event interrupt */
462 word = ac97c_readl(chip, IMR);
463 word |= AC97C_SR_CAEVT;
464 ac97c_writel(chip, IER, word);
465
466 /* set variable rate if needed */
467 if (runtime->rate != 48000) {
468 word = ac97c_readl(chip, MR);
469 word |= AC97C_MR_VRA;
470 ac97c_writel(chip, MR, word);
471 } else {
472 word = ac97c_readl(chip, MR);
473 word &= ~(AC97C_MR_VRA);
474 ac97c_writel(chip, MR, word);
475 }
476
477 retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE,
478 runtime->rate);
479 if (retval)
480 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
481 runtime->rate);
482
483 if (cpu_is_at32ap7000()) {
484 if (!test_bit(DMA_RX_READY, &chip->flags))
485 retval = atmel_ac97c_prepare_dma(chip, substream,
486 DMA_DEV_TO_MEM);
487 } else {
488 /* Initialize and start the PDC */
489 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR);
490 writel(block_size / 2, chip->regs + ATMEL_PDC_RCR);
491 writel(runtime->dma_addr + block_size,
492 chip->regs + ATMEL_PDC_RNPR);
493 writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR);
494 }
495
496 return retval;
497}
498
499static int
500atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd)
501{
502 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
503 unsigned long camr, ptcr = 0;
504 int retval = 0;
505
506 camr = ac97c_readl(chip, CAMR);
507
508 switch (cmd) {
509 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
510 case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
511 case SNDRV_PCM_TRIGGER_START:
512 if (cpu_is_at32ap7000()) {
513 retval = dw_dma_cyclic_start(chip->dma.tx_chan);
514 if (retval)
515 goto out;
516 } else {
517 ptcr = ATMEL_PDC_TXTEN;
518 }
519 camr |= AC97C_CMR_CENA | AC97C_CSR_ENDTX;
520 break;
521 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
522 case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
523 case SNDRV_PCM_TRIGGER_STOP:
524 if (cpu_is_at32ap7000())
525 dw_dma_cyclic_stop(chip->dma.tx_chan);
526 else
527 ptcr |= ATMEL_PDC_TXTDIS;
528 if (chip->opened <= 1)
529 camr &= ~AC97C_CMR_CENA;
530 break;
531 default:
532 retval = -EINVAL;
533 goto out;
534 }
535
536 ac97c_writel(chip, CAMR, camr);
537 if (!cpu_is_at32ap7000())
538 writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
539out:
540 return retval;
541}
542
543static int
544atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd)
545{
546 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
547 unsigned long camr, ptcr = 0;
548 int retval = 0;
549
550 camr = ac97c_readl(chip, CAMR);
551 ptcr = readl(chip->regs + ATMEL_PDC_PTSR);
552
553 switch (cmd) {
554 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
555 case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
556 case SNDRV_PCM_TRIGGER_START:
557 if (cpu_is_at32ap7000()) {
558 retval = dw_dma_cyclic_start(chip->dma.rx_chan);
559 if (retval)
560 goto out;
561 } else {
562 ptcr = ATMEL_PDC_RXTEN;
563 }
564 camr |= AC97C_CMR_CENA | AC97C_CSR_ENDRX;
565 break;
566 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
567 case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
568 case SNDRV_PCM_TRIGGER_STOP:
569 if (cpu_is_at32ap7000())
570 dw_dma_cyclic_stop(chip->dma.rx_chan);
571 else
572 ptcr |= (ATMEL_PDC_RXTDIS);
573 if (chip->opened <= 1)
574 camr &= ~AC97C_CMR_CENA;
575 break;
576 default:
577 retval = -EINVAL;
578 break;
579 }
580
581 ac97c_writel(chip, CAMR, camr);
582 if (!cpu_is_at32ap7000())
583 writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
584out:
585 return retval;
586}
587
588static snd_pcm_uframes_t
589atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream)
590{
591 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
592 struct snd_pcm_runtime *runtime = substream->runtime;
593 snd_pcm_uframes_t frames;
594 unsigned long bytes;
595
596 if (cpu_is_at32ap7000())
597 bytes = dw_dma_get_src_addr(chip->dma.tx_chan);
598 else
599 bytes = readl(chip->regs + ATMEL_PDC_TPR);
600 bytes -= runtime->dma_addr;
601
602 frames = bytes_to_frames(runtime, bytes);
603 if (frames >= runtime->buffer_size)
604 frames -= runtime->buffer_size;
605 return frames;
606}
607
608static snd_pcm_uframes_t
609atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream)
610{
611 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
612 struct snd_pcm_runtime *runtime = substream->runtime;
613 snd_pcm_uframes_t frames;
614 unsigned long bytes;
615
616 if (cpu_is_at32ap7000())
617 bytes = dw_dma_get_dst_addr(chip->dma.rx_chan);
618 else
619 bytes = readl(chip->regs + ATMEL_PDC_RPR);
620 bytes -= runtime->dma_addr;
621
622 frames = bytes_to_frames(runtime, bytes);
623 if (frames >= runtime->buffer_size)
624 frames -= runtime->buffer_size;
625 return frames;
626}
627
628static struct snd_pcm_ops atmel_ac97_playback_ops = {
629 .open = atmel_ac97c_playback_open,
630 .close = atmel_ac97c_playback_close,
631 .ioctl = snd_pcm_lib_ioctl,
632 .hw_params = atmel_ac97c_playback_hw_params,
633 .hw_free = atmel_ac97c_playback_hw_free,
634 .prepare = atmel_ac97c_playback_prepare,
635 .trigger = atmel_ac97c_playback_trigger,
636 .pointer = atmel_ac97c_playback_pointer,
637};
638
639static struct snd_pcm_ops atmel_ac97_capture_ops = {
640 .open = atmel_ac97c_capture_open,
641 .close = atmel_ac97c_capture_close,
642 .ioctl = snd_pcm_lib_ioctl,
643 .hw_params = atmel_ac97c_capture_hw_params,
644 .hw_free = atmel_ac97c_capture_hw_free,
645 .prepare = atmel_ac97c_capture_prepare,
646 .trigger = atmel_ac97c_capture_trigger,
647 .pointer = atmel_ac97c_capture_pointer,
648};
649
650static irqreturn_t atmel_ac97c_interrupt(int irq, void *dev)
651{
652 struct atmel_ac97c *chip = (struct atmel_ac97c *)dev;
653 irqreturn_t retval = IRQ_NONE;
654 u32 sr = ac97c_readl(chip, SR);
655 u32 casr = ac97c_readl(chip, CASR);
656 u32 cosr = ac97c_readl(chip, COSR);
657 u32 camr = ac97c_readl(chip, CAMR);
658
659 if (sr & AC97C_SR_CAEVT) {
660 struct snd_pcm_runtime *runtime;
661 int offset, next_period, block_size;
662 dev_dbg(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n",
663 casr & AC97C_CSR_OVRUN ? " OVRUN" : "",
664 casr & AC97C_CSR_RXRDY ? " RXRDY" : "",
665 casr & AC97C_CSR_UNRUN ? " UNRUN" : "",
666 casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
667 casr & AC97C_CSR_TXRDY ? " TXRDY" : "",
668 !casr ? " NONE" : "");
669 if (!cpu_is_at32ap7000()) {
670 if ((casr & camr) & AC97C_CSR_ENDTX) {
671 runtime = chip->playback_substream->runtime;
672 block_size = frames_to_bytes(runtime,
673 runtime->period_size);
674 chip->playback_period++;
675
676 if (chip->playback_period == runtime->periods)
677 chip->playback_period = 0;
678 next_period = chip->playback_period + 1;
679 if (next_period == runtime->periods)
680 next_period = 0;
681
682 offset = block_size * next_period;
683
684 writel(runtime->dma_addr + offset,
685 chip->regs + ATMEL_PDC_TNPR);
686 writel(block_size / 2,
687 chip->regs + ATMEL_PDC_TNCR);
688
689 snd_pcm_period_elapsed(
690 chip->playback_substream);
691 }
692 if ((casr & camr) & AC97C_CSR_ENDRX) {
693 runtime = chip->capture_substream->runtime;
694 block_size = frames_to_bytes(runtime,
695 runtime->period_size);
696 chip->capture_period++;
697
698 if (chip->capture_period == runtime->periods)
699 chip->capture_period = 0;
700 next_period = chip->capture_period + 1;
701 if (next_period == runtime->periods)
702 next_period = 0;
703
704 offset = block_size * next_period;
705
706 writel(runtime->dma_addr + offset,
707 chip->regs + ATMEL_PDC_RNPR);
708 writel(block_size / 2,
709 chip->regs + ATMEL_PDC_RNCR);
710 snd_pcm_period_elapsed(chip->capture_substream);
711 }
712 }
713 retval = IRQ_HANDLED;
714 }
715
716 if (sr & AC97C_SR_COEVT) {
717 dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n",
718 cosr & AC97C_CSR_OVRUN ? " OVRUN" : "",
719 cosr & AC97C_CSR_RXRDY ? " RXRDY" : "",
720 cosr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
721 cosr & AC97C_CSR_TXRDY ? " TXRDY" : "",
722 !cosr ? " NONE" : "");
723 retval = IRQ_HANDLED;
724 }
725
726 if (retval == IRQ_NONE) {
727 dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x "
728 "casr 0x%08x cosr 0x%08x\n", sr, casr, cosr);
729 }
730
731 return retval;
732}
733
734static struct ac97_pcm at91_ac97_pcm_defs[] = {
735 /* Playback */
736 {
737 .exclusive = 1,
738 .r = { {
739 .slots = ((1 << AC97_SLOT_PCM_LEFT)
740 | (1 << AC97_SLOT_PCM_RIGHT)),
741 } },
742 },
743 /* PCM in */
744 {
745 .stream = 1,
746 .exclusive = 1,
747 .r = { {
748 .slots = ((1 << AC97_SLOT_PCM_LEFT)
749 | (1 << AC97_SLOT_PCM_RIGHT)),
750 } }
751 },
752 /* Mic in */
753 {
754 .stream = 1,
755 .exclusive = 1,
756 .r = { {
757 .slots = (1<<AC97_SLOT_MIC),
758 } }
759 },
760};
761
762static int atmel_ac97c_pcm_new(struct atmel_ac97c *chip)
763{
764 struct snd_pcm *pcm;
765 struct snd_pcm_hardware hw = atmel_ac97c_hw;
766 int capture, playback, retval, err;
767
768 capture = test_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
769 playback = test_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
770
771 if (!cpu_is_at32ap7000()) {
772 err = snd_ac97_pcm_assign(chip->ac97_bus,
773 ARRAY_SIZE(at91_ac97_pcm_defs),
774 at91_ac97_pcm_defs);
775 if (err)
776 return err;
777 }
778 retval = snd_pcm_new(chip->card, chip->card->shortname,
779 0, playback, capture, &pcm);
780 if (retval)
781 return retval;
782
783 if (capture)
784 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
785 &atmel_ac97_capture_ops);
786 if (playback)
787 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
788 &atmel_ac97_playback_ops);
789
790 retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
791 &chip->pdev->dev, hw.periods_min * hw.period_bytes_min,
792 hw.buffer_bytes_max);
793 if (retval)
794 return retval;
795
796 pcm->private_data = chip;
797 pcm->info_flags = 0;
798 strcpy(pcm->name, chip->card->shortname);
799 chip->pcm = pcm;
800
801 return 0;
802}
803
804static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip)
805{
806 struct snd_ac97_template template;
807 memset(&template, 0, sizeof(template));
808 template.private_data = chip;
809 return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
810}
811
812static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg,
813 unsigned short val)
814{
815 struct atmel_ac97c *chip = get_chip(ac97);
816 unsigned long word;
817 int timeout = 40;
818
819 word = (reg & 0x7f) << 16 | val;
820
821 do {
822 if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
823 ac97c_writel(chip, COTHR, word);
824 return;
825 }
826 udelay(1);
827 } while (--timeout);
828
829 dev_dbg(&chip->pdev->dev, "codec write timeout\n");
830}
831
832static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97,
833 unsigned short reg)
834{
835 struct atmel_ac97c *chip = get_chip(ac97);
836 unsigned long word;
837 int timeout = 40;
838 int write = 10;
839
840 word = (0x80 | (reg & 0x7f)) << 16;
841
842 if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
843 ac97c_readl(chip, CORHR);
844
845retry_write:
846 timeout = 40;
847
848 do {
849 if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
850 ac97c_writel(chip, COTHR, word);
851 goto read_reg;
852 }
853 udelay(10);
854 } while (--timeout);
855
856 if (!--write)
857 goto timed_out;
858 goto retry_write;
859
860read_reg:
861 do {
862 if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
863 unsigned short val = ac97c_readl(chip, CORHR);
864 return val;
865 }
866 udelay(10);
867 } while (--timeout);
868
869 if (!--write)
870 goto timed_out;
871 goto retry_write;
872
873timed_out:
874 dev_dbg(&chip->pdev->dev, "codec read timeout\n");
875 return 0xffff;
876}
877
878static bool filter(struct dma_chan *chan, void *slave)
879{
880 struct dw_dma_slave *dws = slave;
881
882 if (dws->dma_dev == chan->device->dev) {
883 chan->private = dws;
884 return true;
885 } else
886 return false;
887}
888
889static void atmel_ac97c_reset(struct atmel_ac97c *chip)
890{
891 ac97c_writel(chip, MR, 0);
892 ac97c_writel(chip, MR, AC97C_MR_ENA);
893 ac97c_writel(chip, CAMR, 0);
894 ac97c_writel(chip, COMR, 0);
895
896 if (gpio_is_valid(chip->reset_pin)) {
897 gpio_set_value(chip->reset_pin, 0);
898 /* AC97 v2.2 specifications says minimum 1 us. */
899 udelay(2);
900 gpio_set_value(chip->reset_pin, 1);
901 } else {
902 ac97c_writel(chip, MR, AC97C_MR_WRST | AC97C_MR_ENA);
903 udelay(2);
904 ac97c_writel(chip, MR, AC97C_MR_ENA);
905 }
906}
907
908#ifdef CONFIG_OF
909static const struct of_device_id atmel_ac97c_dt_ids[] = {
910 { .compatible = "atmel,at91sam9263-ac97c", },
911 { }
912};
913MODULE_DEVICE_TABLE(of, atmel_ac97c_dt_ids);
914
915static struct ac97c_platform_data *atmel_ac97c_probe_dt(struct device *dev)
916{
917 struct ac97c_platform_data *pdata;
918 struct device_node *node = dev->of_node;
919
920 if (!node) {
921 dev_err(dev, "Device does not have associated DT data\n");
922 return ERR_PTR(-EINVAL);
923 }
924
925 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
926 if (!pdata)
927 return ERR_PTR(-ENOMEM);
928
929 pdata->reset_pin = of_get_named_gpio(dev->of_node, "ac97-gpios", 2);
930
931 return pdata;
932}
933#else
934static struct ac97c_platform_data *atmel_ac97c_probe_dt(struct device *dev)
935{
936 dev_err(dev, "no platform data defined\n");
937 return ERR_PTR(-ENXIO);
938}
939#endif
940
941static int atmel_ac97c_probe(struct platform_device *pdev)
942{
943 struct snd_card *card;
944 struct atmel_ac97c *chip;
945 struct resource *regs;
946 struct ac97c_platform_data *pdata;
947 struct clk *pclk;
948 static struct snd_ac97_bus_ops ops = {
949 .write = atmel_ac97c_write,
950 .read = atmel_ac97c_read,
951 };
952 int retval;
953 int irq;
954
955 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
956 if (!regs) {
957 dev_dbg(&pdev->dev, "no memory resource\n");
958 return -ENXIO;
959 }
960
961 pdata = dev_get_platdata(&pdev->dev);
962 if (!pdata) {
963 pdata = atmel_ac97c_probe_dt(&pdev->dev);
964 if (IS_ERR(pdata))
965 return PTR_ERR(pdata);
966 }
967
968 irq = platform_get_irq(pdev, 0);
969 if (irq < 0) {
970 dev_dbg(&pdev->dev, "could not get irq\n");
971 return -ENXIO;
972 }
973
974 if (cpu_is_at32ap7000()) {
975 pclk = clk_get(&pdev->dev, "pclk");
976 } else {
977 pclk = clk_get(&pdev->dev, "ac97_clk");
978 }
979
980 if (IS_ERR(pclk)) {
981 dev_dbg(&pdev->dev, "no peripheral clock\n");
982 return PTR_ERR(pclk);
983 }
984 clk_prepare_enable(pclk);
985
986 retval = snd_card_new(&pdev->dev, SNDRV_DEFAULT_IDX1,
987 SNDRV_DEFAULT_STR1, THIS_MODULE,
988 sizeof(struct atmel_ac97c), &card);
989 if (retval) {
990 dev_dbg(&pdev->dev, "could not create sound card device\n");
991 goto err_snd_card_new;
992 }
993
994 chip = get_chip(card);
995
996 retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip);
997 if (retval) {
998 dev_dbg(&pdev->dev, "unable to request irq %d\n", irq);
999 goto err_request_irq;
1000 }
1001 chip->irq = irq;
1002
1003 spin_lock_init(&chip->lock);
1004
1005 strcpy(card->driver, "Atmel AC97C");
1006 strcpy(card->shortname, "Atmel AC97C");
1007 sprintf(card->longname, "Atmel AC97 controller");
1008
1009 chip->card = card;
1010 chip->pclk = pclk;
1011 chip->pdev = pdev;
1012 chip->regs = ioremap(regs->start, resource_size(regs));
1013
1014 if (!chip->regs) {
1015 dev_dbg(&pdev->dev, "could not remap register memory\n");
1016 retval = -ENOMEM;
1017 goto err_ioremap;
1018 }
1019
1020 if (gpio_is_valid(pdata->reset_pin)) {
1021 if (gpio_request(pdata->reset_pin, "reset_pin")) {
1022 dev_dbg(&pdev->dev, "reset pin not available\n");
1023 chip->reset_pin = -ENODEV;
1024 } else {
1025 gpio_direction_output(pdata->reset_pin, 1);
1026 chip->reset_pin = pdata->reset_pin;
1027 }
1028 } else {
1029 chip->reset_pin = -EINVAL;
1030 }
1031
1032 atmel_ac97c_reset(chip);
1033
1034 /* Enable overrun interrupt from codec channel */
1035 ac97c_writel(chip, COMR, AC97C_CSR_OVRUN);
1036 ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT);
1037
1038 retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
1039 if (retval) {
1040 dev_dbg(&pdev->dev, "could not register on ac97 bus\n");
1041 goto err_ac97_bus;
1042 }
1043
1044 retval = atmel_ac97c_mixer_new(chip);
1045 if (retval) {
1046 dev_dbg(&pdev->dev, "could not register ac97 mixer\n");
1047 goto err_ac97_bus;
1048 }
1049
1050 if (cpu_is_at32ap7000()) {
1051 if (pdata->rx_dws.dma_dev) {
1052 dma_cap_mask_t mask;
1053
1054 dma_cap_zero(mask);
1055 dma_cap_set(DMA_SLAVE, mask);
1056
1057 chip->dma.rx_chan = dma_request_channel(mask, filter,
1058 &pdata->rx_dws);
1059 if (chip->dma.rx_chan) {
1060 struct dma_slave_config dma_conf = {
1061 .src_addr = regs->start + AC97C_CARHR +
1062 2,
1063 .src_addr_width =
1064 DMA_SLAVE_BUSWIDTH_2_BYTES,
1065 .src_maxburst = 1,
1066 .dst_maxburst = 1,
1067 .direction = DMA_DEV_TO_MEM,
1068 .device_fc = false,
1069 };
1070
1071 dmaengine_slave_config(chip->dma.rx_chan,
1072 &dma_conf);
1073 }
1074
1075 dev_info(&chip->pdev->dev, "using %s for DMA RX\n",
1076 dev_name(&chip->dma.rx_chan->dev->device));
1077 set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1078 }
1079
1080 if (pdata->tx_dws.dma_dev) {
1081 dma_cap_mask_t mask;
1082
1083 dma_cap_zero(mask);
1084 dma_cap_set(DMA_SLAVE, mask);
1085
1086 chip->dma.tx_chan = dma_request_channel(mask, filter,
1087 &pdata->tx_dws);
1088 if (chip->dma.tx_chan) {
1089 struct dma_slave_config dma_conf = {
1090 .dst_addr = regs->start + AC97C_CATHR +
1091 2,
1092 .dst_addr_width =
1093 DMA_SLAVE_BUSWIDTH_2_BYTES,
1094 .src_maxburst = 1,
1095 .dst_maxburst = 1,
1096 .direction = DMA_MEM_TO_DEV,
1097 .device_fc = false,
1098 };
1099
1100 dmaengine_slave_config(chip->dma.tx_chan,
1101 &dma_conf);
1102 }
1103
1104 dev_info(&chip->pdev->dev, "using %s for DMA TX\n",
1105 dev_name(&chip->dma.tx_chan->dev->device));
1106 set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1107 }
1108
1109 if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) &&
1110 !test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) {
1111 dev_dbg(&pdev->dev, "DMA not available\n");
1112 retval = -ENODEV;
1113 goto err_dma;
1114 }
1115 } else {
1116 /* Just pretend that we have DMA channel(for at91 i is actually
1117 * the PDC) */
1118 set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1119 set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1120 }
1121
1122 retval = atmel_ac97c_pcm_new(chip);
1123 if (retval) {
1124 dev_dbg(&pdev->dev, "could not register ac97 pcm device\n");
1125 goto err_dma;
1126 }
1127
1128 retval = snd_card_register(card);
1129 if (retval) {
1130 dev_dbg(&pdev->dev, "could not register sound card\n");
1131 goto err_dma;
1132 }
1133
1134 platform_set_drvdata(pdev, card);
1135
1136 dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n",
1137 chip->regs, irq);
1138
1139 return 0;
1140
1141err_dma:
1142 if (cpu_is_at32ap7000()) {
1143 if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
1144 dma_release_channel(chip->dma.rx_chan);
1145 if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
1146 dma_release_channel(chip->dma.tx_chan);
1147 clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1148 clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1149 chip->dma.rx_chan = NULL;
1150 chip->dma.tx_chan = NULL;
1151 }
1152err_ac97_bus:
1153 if (gpio_is_valid(chip->reset_pin))
1154 gpio_free(chip->reset_pin);
1155
1156 iounmap(chip->regs);
1157err_ioremap:
1158 free_irq(irq, chip);
1159err_request_irq:
1160 snd_card_free(card);
1161err_snd_card_new:
1162 clk_disable_unprepare(pclk);
1163 clk_put(pclk);
1164 return retval;
1165}
1166
1167#ifdef CONFIG_PM_SLEEP
1168static int atmel_ac97c_suspend(struct device *pdev)
1169{
1170 struct snd_card *card = dev_get_drvdata(pdev);
1171 struct atmel_ac97c *chip = card->private_data;
1172
1173 if (cpu_is_at32ap7000()) {
1174 if (test_bit(DMA_RX_READY, &chip->flags))
1175 dw_dma_cyclic_stop(chip->dma.rx_chan);
1176 if (test_bit(DMA_TX_READY, &chip->flags))
1177 dw_dma_cyclic_stop(chip->dma.tx_chan);
1178 }
1179 clk_disable_unprepare(chip->pclk);
1180
1181 return 0;
1182}
1183
1184static int atmel_ac97c_resume(struct device *pdev)
1185{
1186 struct snd_card *card = dev_get_drvdata(pdev);
1187 struct atmel_ac97c *chip = card->private_data;
1188
1189 clk_prepare_enable(chip->pclk);
1190 if (cpu_is_at32ap7000()) {
1191 if (test_bit(DMA_RX_READY, &chip->flags))
1192 dw_dma_cyclic_start(chip->dma.rx_chan);
1193 if (test_bit(DMA_TX_READY, &chip->flags))
1194 dw_dma_cyclic_start(chip->dma.tx_chan);
1195 }
1196 return 0;
1197}
1198
1199static SIMPLE_DEV_PM_OPS(atmel_ac97c_pm, atmel_ac97c_suspend, atmel_ac97c_resume);
1200#define ATMEL_AC97C_PM_OPS &atmel_ac97c_pm
1201#else
1202#define ATMEL_AC97C_PM_OPS NULL
1203#endif
1204
1205static int atmel_ac97c_remove(struct platform_device *pdev)
1206{
1207 struct snd_card *card = platform_get_drvdata(pdev);
1208 struct atmel_ac97c *chip = get_chip(card);
1209
1210 if (gpio_is_valid(chip->reset_pin))
1211 gpio_free(chip->reset_pin);
1212
1213 ac97c_writel(chip, CAMR, 0);
1214 ac97c_writel(chip, COMR, 0);
1215 ac97c_writel(chip, MR, 0);
1216
1217 clk_disable_unprepare(chip->pclk);
1218 clk_put(chip->pclk);
1219 iounmap(chip->regs);
1220 free_irq(chip->irq, chip);
1221
1222 if (cpu_is_at32ap7000()) {
1223 if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
1224 dma_release_channel(chip->dma.rx_chan);
1225 if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
1226 dma_release_channel(chip->dma.tx_chan);
1227 clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1228 clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1229 chip->dma.rx_chan = NULL;
1230 chip->dma.tx_chan = NULL;
1231 }
1232
1233 snd_card_free(card);
1234
1235 return 0;
1236}
1237
1238static struct platform_driver atmel_ac97c_driver = {
1239 .probe = atmel_ac97c_probe,
1240 .remove = atmel_ac97c_remove,
1241 .driver = {
1242 .name = "atmel_ac97c",
1243 .pm = ATMEL_AC97C_PM_OPS,
1244 .of_match_table = of_match_ptr(atmel_ac97c_dt_ids),
1245 },
1246};
1247module_platform_driver(atmel_ac97c_driver);
1248
1249MODULE_LICENSE("GPL");
1250MODULE_DESCRIPTION("Driver for Atmel AC97 controller");
1251MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");
1/*
2 * Driver for Atmel AC97C
3 *
4 * Copyright (C) 2005-2009 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation.
9 */
10#include <linux/clk.h>
11#include <linux/delay.h>
12#include <linux/bitmap.h>
13#include <linux/device.h>
14#include <linux/dmaengine.h>
15#include <linux/dma-mapping.h>
16#include <linux/atmel_pdc.h>
17#include <linux/init.h>
18#include <linux/interrupt.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <linux/mutex.h>
22#include <linux/gpio.h>
23#include <linux/types.h>
24#include <linux/io.h>
25
26#include <sound/core.h>
27#include <sound/initval.h>
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/ac97_codec.h>
31#include <sound/atmel-ac97c.h>
32#include <sound/memalloc.h>
33
34#include <linux/dw_dmac.h>
35
36#include <mach/cpu.h>
37#include <mach/gpio.h>
38
39#ifdef CONFIG_ARCH_AT91
40#include <mach/hardware.h>
41#endif
42
43#include "ac97c.h"
44
45enum {
46 DMA_TX_READY = 0,
47 DMA_RX_READY,
48 DMA_TX_CHAN_PRESENT,
49 DMA_RX_CHAN_PRESENT,
50};
51
52/* Serialize access to opened variable */
53static DEFINE_MUTEX(opened_mutex);
54
55struct atmel_ac97c_dma {
56 struct dma_chan *rx_chan;
57 struct dma_chan *tx_chan;
58};
59
60struct atmel_ac97c {
61 struct clk *pclk;
62 struct platform_device *pdev;
63 struct atmel_ac97c_dma dma;
64
65 struct snd_pcm_substream *playback_substream;
66 struct snd_pcm_substream *capture_substream;
67 struct snd_card *card;
68 struct snd_pcm *pcm;
69 struct snd_ac97 *ac97;
70 struct snd_ac97_bus *ac97_bus;
71
72 u64 cur_format;
73 unsigned int cur_rate;
74 unsigned long flags;
75 int playback_period, capture_period;
76 /* Serialize access to opened variable */
77 spinlock_t lock;
78 void __iomem *regs;
79 int irq;
80 int opened;
81 int reset_pin;
82};
83
84#define get_chip(card) ((struct atmel_ac97c *)(card)->private_data)
85
86#define ac97c_writel(chip, reg, val) \
87 __raw_writel((val), (chip)->regs + AC97C_##reg)
88#define ac97c_readl(chip, reg) \
89 __raw_readl((chip)->regs + AC97C_##reg)
90
91/* This function is called by the DMA driver. */
92static void atmel_ac97c_dma_playback_period_done(void *arg)
93{
94 struct atmel_ac97c *chip = arg;
95 snd_pcm_period_elapsed(chip->playback_substream);
96}
97
98static void atmel_ac97c_dma_capture_period_done(void *arg)
99{
100 struct atmel_ac97c *chip = arg;
101 snd_pcm_period_elapsed(chip->capture_substream);
102}
103
104static int atmel_ac97c_prepare_dma(struct atmel_ac97c *chip,
105 struct snd_pcm_substream *substream,
106 enum dma_transfer_direction direction)
107{
108 struct dma_chan *chan;
109 struct dw_cyclic_desc *cdesc;
110 struct snd_pcm_runtime *runtime = substream->runtime;
111 unsigned long buffer_len, period_len;
112
113 /*
114 * We don't do DMA on "complex" transfers, i.e. with
115 * non-halfword-aligned buffers or lengths.
116 */
117 if (runtime->dma_addr & 1 || runtime->buffer_size & 1) {
118 dev_dbg(&chip->pdev->dev, "too complex transfer\n");
119 return -EINVAL;
120 }
121
122 if (direction == DMA_MEM_TO_DEV)
123 chan = chip->dma.tx_chan;
124 else
125 chan = chip->dma.rx_chan;
126
127 buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
128 period_len = frames_to_bytes(runtime, runtime->period_size);
129
130 cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len,
131 period_len, direction);
132 if (IS_ERR(cdesc)) {
133 dev_dbg(&chip->pdev->dev, "could not prepare cyclic DMA\n");
134 return PTR_ERR(cdesc);
135 }
136
137 if (direction == DMA_MEM_TO_DEV) {
138 cdesc->period_callback = atmel_ac97c_dma_playback_period_done;
139 set_bit(DMA_TX_READY, &chip->flags);
140 } else {
141 cdesc->period_callback = atmel_ac97c_dma_capture_period_done;
142 set_bit(DMA_RX_READY, &chip->flags);
143 }
144
145 cdesc->period_callback_param = chip;
146
147 return 0;
148}
149
150static struct snd_pcm_hardware atmel_ac97c_hw = {
151 .info = (SNDRV_PCM_INFO_MMAP
152 | SNDRV_PCM_INFO_MMAP_VALID
153 | SNDRV_PCM_INFO_INTERLEAVED
154 | SNDRV_PCM_INFO_BLOCK_TRANSFER
155 | SNDRV_PCM_INFO_JOINT_DUPLEX
156 | SNDRV_PCM_INFO_RESUME
157 | SNDRV_PCM_INFO_PAUSE),
158 .formats = (SNDRV_PCM_FMTBIT_S16_BE
159 | SNDRV_PCM_FMTBIT_S16_LE),
160 .rates = (SNDRV_PCM_RATE_CONTINUOUS),
161 .rate_min = 4000,
162 .rate_max = 48000,
163 .channels_min = 1,
164 .channels_max = 2,
165 .buffer_bytes_max = 2 * 2 * 64 * 2048,
166 .period_bytes_min = 4096,
167 .period_bytes_max = 4096,
168 .periods_min = 6,
169 .periods_max = 64,
170};
171
172static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream)
173{
174 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
175 struct snd_pcm_runtime *runtime = substream->runtime;
176
177 mutex_lock(&opened_mutex);
178 chip->opened++;
179 runtime->hw = atmel_ac97c_hw;
180 if (chip->cur_rate) {
181 runtime->hw.rate_min = chip->cur_rate;
182 runtime->hw.rate_max = chip->cur_rate;
183 }
184 if (chip->cur_format)
185 runtime->hw.formats = (1ULL << chip->cur_format);
186 mutex_unlock(&opened_mutex);
187 chip->playback_substream = substream;
188 return 0;
189}
190
191static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream)
192{
193 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
194 struct snd_pcm_runtime *runtime = substream->runtime;
195
196 mutex_lock(&opened_mutex);
197 chip->opened++;
198 runtime->hw = atmel_ac97c_hw;
199 if (chip->cur_rate) {
200 runtime->hw.rate_min = chip->cur_rate;
201 runtime->hw.rate_max = chip->cur_rate;
202 }
203 if (chip->cur_format)
204 runtime->hw.formats = (1ULL << chip->cur_format);
205 mutex_unlock(&opened_mutex);
206 chip->capture_substream = substream;
207 return 0;
208}
209
210static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream)
211{
212 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
213
214 mutex_lock(&opened_mutex);
215 chip->opened--;
216 if (!chip->opened) {
217 chip->cur_rate = 0;
218 chip->cur_format = 0;
219 }
220 mutex_unlock(&opened_mutex);
221
222 chip->playback_substream = NULL;
223
224 return 0;
225}
226
227static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream)
228{
229 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
230
231 mutex_lock(&opened_mutex);
232 chip->opened--;
233 if (!chip->opened) {
234 chip->cur_rate = 0;
235 chip->cur_format = 0;
236 }
237 mutex_unlock(&opened_mutex);
238
239 chip->capture_substream = NULL;
240
241 return 0;
242}
243
244static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream,
245 struct snd_pcm_hw_params *hw_params)
246{
247 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
248 int retval;
249
250 retval = snd_pcm_lib_malloc_pages(substream,
251 params_buffer_bytes(hw_params));
252 if (retval < 0)
253 return retval;
254 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
255 if (cpu_is_at32ap7000()) {
256 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
257 if (retval == 1)
258 if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
259 dw_dma_cyclic_free(chip->dma.tx_chan);
260 }
261 /* Set restrictions to params. */
262 mutex_lock(&opened_mutex);
263 chip->cur_rate = params_rate(hw_params);
264 chip->cur_format = params_format(hw_params);
265 mutex_unlock(&opened_mutex);
266
267 return retval;
268}
269
270static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream,
271 struct snd_pcm_hw_params *hw_params)
272{
273 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
274 int retval;
275
276 retval = snd_pcm_lib_malloc_pages(substream,
277 params_buffer_bytes(hw_params));
278 if (retval < 0)
279 return retval;
280 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
281 if (cpu_is_at32ap7000()) {
282 if (retval < 0)
283 return retval;
284 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
285 if (retval == 1)
286 if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
287 dw_dma_cyclic_free(chip->dma.rx_chan);
288 }
289
290 /* Set restrictions to params. */
291 mutex_lock(&opened_mutex);
292 chip->cur_rate = params_rate(hw_params);
293 chip->cur_format = params_format(hw_params);
294 mutex_unlock(&opened_mutex);
295
296 return retval;
297}
298
299static int atmel_ac97c_playback_hw_free(struct snd_pcm_substream *substream)
300{
301 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
302 if (cpu_is_at32ap7000()) {
303 if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
304 dw_dma_cyclic_free(chip->dma.tx_chan);
305 }
306 return snd_pcm_lib_free_pages(substream);
307}
308
309static int atmel_ac97c_capture_hw_free(struct snd_pcm_substream *substream)
310{
311 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
312 if (cpu_is_at32ap7000()) {
313 if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
314 dw_dma_cyclic_free(chip->dma.rx_chan);
315 }
316 return snd_pcm_lib_free_pages(substream);
317}
318
319static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream)
320{
321 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
322 struct snd_pcm_runtime *runtime = substream->runtime;
323 int block_size = frames_to_bytes(runtime, runtime->period_size);
324 unsigned long word = ac97c_readl(chip, OCA);
325 int retval;
326
327 chip->playback_period = 0;
328 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
329
330 /* assign channels to AC97C channel A */
331 switch (runtime->channels) {
332 case 1:
333 word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
334 break;
335 case 2:
336 word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
337 | AC97C_CH_ASSIGN(PCM_RIGHT, A);
338 break;
339 default:
340 /* TODO: support more than two channels */
341 return -EINVAL;
342 }
343 ac97c_writel(chip, OCA, word);
344
345 /* configure sample format and size */
346 word = ac97c_readl(chip, CAMR);
347 if (chip->opened <= 1)
348 word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
349 else
350 word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
351
352 switch (runtime->format) {
353 case SNDRV_PCM_FORMAT_S16_LE:
354 if (cpu_is_at32ap7000())
355 word |= AC97C_CMR_CEM_LITTLE;
356 break;
357 case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
358 word &= ~(AC97C_CMR_CEM_LITTLE);
359 break;
360 default:
361 word = ac97c_readl(chip, OCA);
362 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
363 ac97c_writel(chip, OCA, word);
364 return -EINVAL;
365 }
366
367 /* Enable underrun interrupt on channel A */
368 word |= AC97C_CSR_UNRUN;
369
370 ac97c_writel(chip, CAMR, word);
371
372 /* Enable channel A event interrupt */
373 word = ac97c_readl(chip, IMR);
374 word |= AC97C_SR_CAEVT;
375 ac97c_writel(chip, IER, word);
376
377 /* set variable rate if needed */
378 if (runtime->rate != 48000) {
379 word = ac97c_readl(chip, MR);
380 word |= AC97C_MR_VRA;
381 ac97c_writel(chip, MR, word);
382 } else {
383 word = ac97c_readl(chip, MR);
384 word &= ~(AC97C_MR_VRA);
385 ac97c_writel(chip, MR, word);
386 }
387
388 retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
389 runtime->rate);
390 if (retval)
391 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
392 runtime->rate);
393
394 if (cpu_is_at32ap7000()) {
395 if (!test_bit(DMA_TX_READY, &chip->flags))
396 retval = atmel_ac97c_prepare_dma(chip, substream,
397 DMA_MEM_TO_DEV);
398 } else {
399 /* Initialize and start the PDC */
400 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR);
401 writel(block_size / 2, chip->regs + ATMEL_PDC_TCR);
402 writel(runtime->dma_addr + block_size,
403 chip->regs + ATMEL_PDC_TNPR);
404 writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR);
405 }
406
407 return retval;
408}
409
410static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream)
411{
412 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
413 struct snd_pcm_runtime *runtime = substream->runtime;
414 int block_size = frames_to_bytes(runtime, runtime->period_size);
415 unsigned long word = ac97c_readl(chip, ICA);
416 int retval;
417
418 chip->capture_period = 0;
419 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
420
421 /* assign channels to AC97C channel A */
422 switch (runtime->channels) {
423 case 1:
424 word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
425 break;
426 case 2:
427 word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
428 | AC97C_CH_ASSIGN(PCM_RIGHT, A);
429 break;
430 default:
431 /* TODO: support more than two channels */
432 return -EINVAL;
433 }
434 ac97c_writel(chip, ICA, word);
435
436 /* configure sample format and size */
437 word = ac97c_readl(chip, CAMR);
438 if (chip->opened <= 1)
439 word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
440 else
441 word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
442
443 switch (runtime->format) {
444 case SNDRV_PCM_FORMAT_S16_LE:
445 if (cpu_is_at32ap7000())
446 word |= AC97C_CMR_CEM_LITTLE;
447 break;
448 case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
449 word &= ~(AC97C_CMR_CEM_LITTLE);
450 break;
451 default:
452 word = ac97c_readl(chip, ICA);
453 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
454 ac97c_writel(chip, ICA, word);
455 return -EINVAL;
456 }
457
458 /* Enable overrun interrupt on channel A */
459 word |= AC97C_CSR_OVRUN;
460
461 ac97c_writel(chip, CAMR, word);
462
463 /* Enable channel A event interrupt */
464 word = ac97c_readl(chip, IMR);
465 word |= AC97C_SR_CAEVT;
466 ac97c_writel(chip, IER, word);
467
468 /* set variable rate if needed */
469 if (runtime->rate != 48000) {
470 word = ac97c_readl(chip, MR);
471 word |= AC97C_MR_VRA;
472 ac97c_writel(chip, MR, word);
473 } else {
474 word = ac97c_readl(chip, MR);
475 word &= ~(AC97C_MR_VRA);
476 ac97c_writel(chip, MR, word);
477 }
478
479 retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE,
480 runtime->rate);
481 if (retval)
482 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
483 runtime->rate);
484
485 if (cpu_is_at32ap7000()) {
486 if (!test_bit(DMA_RX_READY, &chip->flags))
487 retval = atmel_ac97c_prepare_dma(chip, substream,
488 DMA_DEV_TO_MEM);
489 } else {
490 /* Initialize and start the PDC */
491 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR);
492 writel(block_size / 2, chip->regs + ATMEL_PDC_RCR);
493 writel(runtime->dma_addr + block_size,
494 chip->regs + ATMEL_PDC_RNPR);
495 writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR);
496 }
497
498 return retval;
499}
500
501static int
502atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd)
503{
504 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
505 unsigned long camr, ptcr = 0;
506 int retval = 0;
507
508 camr = ac97c_readl(chip, CAMR);
509
510 switch (cmd) {
511 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
512 case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
513 case SNDRV_PCM_TRIGGER_START:
514 if (cpu_is_at32ap7000()) {
515 retval = dw_dma_cyclic_start(chip->dma.tx_chan);
516 if (retval)
517 goto out;
518 } else {
519 ptcr = ATMEL_PDC_TXTEN;
520 }
521 camr |= AC97C_CMR_CENA | AC97C_CSR_ENDTX;
522 break;
523 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
524 case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
525 case SNDRV_PCM_TRIGGER_STOP:
526 if (cpu_is_at32ap7000())
527 dw_dma_cyclic_stop(chip->dma.tx_chan);
528 else
529 ptcr |= ATMEL_PDC_TXTDIS;
530 if (chip->opened <= 1)
531 camr &= ~AC97C_CMR_CENA;
532 break;
533 default:
534 retval = -EINVAL;
535 goto out;
536 }
537
538 ac97c_writel(chip, CAMR, camr);
539 if (!cpu_is_at32ap7000())
540 writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
541out:
542 return retval;
543}
544
545static int
546atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd)
547{
548 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
549 unsigned long camr, ptcr = 0;
550 int retval = 0;
551
552 camr = ac97c_readl(chip, CAMR);
553 ptcr = readl(chip->regs + ATMEL_PDC_PTSR);
554
555 switch (cmd) {
556 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
557 case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
558 case SNDRV_PCM_TRIGGER_START:
559 if (cpu_is_at32ap7000()) {
560 retval = dw_dma_cyclic_start(chip->dma.rx_chan);
561 if (retval)
562 goto out;
563 } else {
564 ptcr = ATMEL_PDC_RXTEN;
565 }
566 camr |= AC97C_CMR_CENA | AC97C_CSR_ENDRX;
567 break;
568 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
569 case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
570 case SNDRV_PCM_TRIGGER_STOP:
571 if (cpu_is_at32ap7000())
572 dw_dma_cyclic_stop(chip->dma.rx_chan);
573 else
574 ptcr |= (ATMEL_PDC_RXTDIS);
575 if (chip->opened <= 1)
576 camr &= ~AC97C_CMR_CENA;
577 break;
578 default:
579 retval = -EINVAL;
580 break;
581 }
582
583 ac97c_writel(chip, CAMR, camr);
584 if (!cpu_is_at32ap7000())
585 writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
586out:
587 return retval;
588}
589
590static snd_pcm_uframes_t
591atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream)
592{
593 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
594 struct snd_pcm_runtime *runtime = substream->runtime;
595 snd_pcm_uframes_t frames;
596 unsigned long bytes;
597
598 if (cpu_is_at32ap7000())
599 bytes = dw_dma_get_src_addr(chip->dma.tx_chan);
600 else
601 bytes = readl(chip->regs + ATMEL_PDC_TPR);
602 bytes -= runtime->dma_addr;
603
604 frames = bytes_to_frames(runtime, bytes);
605 if (frames >= runtime->buffer_size)
606 frames -= runtime->buffer_size;
607 return frames;
608}
609
610static snd_pcm_uframes_t
611atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream)
612{
613 struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
614 struct snd_pcm_runtime *runtime = substream->runtime;
615 snd_pcm_uframes_t frames;
616 unsigned long bytes;
617
618 if (cpu_is_at32ap7000())
619 bytes = dw_dma_get_dst_addr(chip->dma.rx_chan);
620 else
621 bytes = readl(chip->regs + ATMEL_PDC_RPR);
622 bytes -= runtime->dma_addr;
623
624 frames = bytes_to_frames(runtime, bytes);
625 if (frames >= runtime->buffer_size)
626 frames -= runtime->buffer_size;
627 return frames;
628}
629
630static struct snd_pcm_ops atmel_ac97_playback_ops = {
631 .open = atmel_ac97c_playback_open,
632 .close = atmel_ac97c_playback_close,
633 .ioctl = snd_pcm_lib_ioctl,
634 .hw_params = atmel_ac97c_playback_hw_params,
635 .hw_free = atmel_ac97c_playback_hw_free,
636 .prepare = atmel_ac97c_playback_prepare,
637 .trigger = atmel_ac97c_playback_trigger,
638 .pointer = atmel_ac97c_playback_pointer,
639};
640
641static struct snd_pcm_ops atmel_ac97_capture_ops = {
642 .open = atmel_ac97c_capture_open,
643 .close = atmel_ac97c_capture_close,
644 .ioctl = snd_pcm_lib_ioctl,
645 .hw_params = atmel_ac97c_capture_hw_params,
646 .hw_free = atmel_ac97c_capture_hw_free,
647 .prepare = atmel_ac97c_capture_prepare,
648 .trigger = atmel_ac97c_capture_trigger,
649 .pointer = atmel_ac97c_capture_pointer,
650};
651
652static irqreturn_t atmel_ac97c_interrupt(int irq, void *dev)
653{
654 struct atmel_ac97c *chip = (struct atmel_ac97c *)dev;
655 irqreturn_t retval = IRQ_NONE;
656 u32 sr = ac97c_readl(chip, SR);
657 u32 casr = ac97c_readl(chip, CASR);
658 u32 cosr = ac97c_readl(chip, COSR);
659 u32 camr = ac97c_readl(chip, CAMR);
660
661 if (sr & AC97C_SR_CAEVT) {
662 struct snd_pcm_runtime *runtime;
663 int offset, next_period, block_size;
664 dev_dbg(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n",
665 casr & AC97C_CSR_OVRUN ? " OVRUN" : "",
666 casr & AC97C_CSR_RXRDY ? " RXRDY" : "",
667 casr & AC97C_CSR_UNRUN ? " UNRUN" : "",
668 casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
669 casr & AC97C_CSR_TXRDY ? " TXRDY" : "",
670 !casr ? " NONE" : "");
671 if (!cpu_is_at32ap7000()) {
672 if ((casr & camr) & AC97C_CSR_ENDTX) {
673 runtime = chip->playback_substream->runtime;
674 block_size = frames_to_bytes(runtime,
675 runtime->period_size);
676 chip->playback_period++;
677
678 if (chip->playback_period == runtime->periods)
679 chip->playback_period = 0;
680 next_period = chip->playback_period + 1;
681 if (next_period == runtime->periods)
682 next_period = 0;
683
684 offset = block_size * next_period;
685
686 writel(runtime->dma_addr + offset,
687 chip->regs + ATMEL_PDC_TNPR);
688 writel(block_size / 2,
689 chip->regs + ATMEL_PDC_TNCR);
690
691 snd_pcm_period_elapsed(
692 chip->playback_substream);
693 }
694 if ((casr & camr) & AC97C_CSR_ENDRX) {
695 runtime = chip->capture_substream->runtime;
696 block_size = frames_to_bytes(runtime,
697 runtime->period_size);
698 chip->capture_period++;
699
700 if (chip->capture_period == runtime->periods)
701 chip->capture_period = 0;
702 next_period = chip->capture_period + 1;
703 if (next_period == runtime->periods)
704 next_period = 0;
705
706 offset = block_size * next_period;
707
708 writel(runtime->dma_addr + offset,
709 chip->regs + ATMEL_PDC_RNPR);
710 writel(block_size / 2,
711 chip->regs + ATMEL_PDC_RNCR);
712 snd_pcm_period_elapsed(chip->capture_substream);
713 }
714 }
715 retval = IRQ_HANDLED;
716 }
717
718 if (sr & AC97C_SR_COEVT) {
719 dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n",
720 cosr & AC97C_CSR_OVRUN ? " OVRUN" : "",
721 cosr & AC97C_CSR_RXRDY ? " RXRDY" : "",
722 cosr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
723 cosr & AC97C_CSR_TXRDY ? " TXRDY" : "",
724 !cosr ? " NONE" : "");
725 retval = IRQ_HANDLED;
726 }
727
728 if (retval == IRQ_NONE) {
729 dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x "
730 "casr 0x%08x cosr 0x%08x\n", sr, casr, cosr);
731 }
732
733 return retval;
734}
735
736static struct ac97_pcm at91_ac97_pcm_defs[] __devinitdata = {
737 /* Playback */
738 {
739 .exclusive = 1,
740 .r = { {
741 .slots = ((1 << AC97_SLOT_PCM_LEFT)
742 | (1 << AC97_SLOT_PCM_RIGHT)),
743 } },
744 },
745 /* PCM in */
746 {
747 .stream = 1,
748 .exclusive = 1,
749 .r = { {
750 .slots = ((1 << AC97_SLOT_PCM_LEFT)
751 | (1 << AC97_SLOT_PCM_RIGHT)),
752 } }
753 },
754 /* Mic in */
755 {
756 .stream = 1,
757 .exclusive = 1,
758 .r = { {
759 .slots = (1<<AC97_SLOT_MIC),
760 } }
761 },
762};
763
764static int __devinit atmel_ac97c_pcm_new(struct atmel_ac97c *chip)
765{
766 struct snd_pcm *pcm;
767 struct snd_pcm_hardware hw = atmel_ac97c_hw;
768 int capture, playback, retval, err;
769
770 capture = test_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
771 playback = test_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
772
773 if (!cpu_is_at32ap7000()) {
774 err = snd_ac97_pcm_assign(chip->ac97_bus,
775 ARRAY_SIZE(at91_ac97_pcm_defs),
776 at91_ac97_pcm_defs);
777 if (err)
778 return err;
779 }
780 retval = snd_pcm_new(chip->card, chip->card->shortname,
781 chip->pdev->id, playback, capture, &pcm);
782 if (retval)
783 return retval;
784
785 if (capture)
786 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
787 &atmel_ac97_capture_ops);
788 if (playback)
789 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
790 &atmel_ac97_playback_ops);
791
792 retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
793 &chip->pdev->dev, hw.periods_min * hw.period_bytes_min,
794 hw.buffer_bytes_max);
795 if (retval)
796 return retval;
797
798 pcm->private_data = chip;
799 pcm->info_flags = 0;
800 strcpy(pcm->name, chip->card->shortname);
801 chip->pcm = pcm;
802
803 return 0;
804}
805
806static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip)
807{
808 struct snd_ac97_template template;
809 memset(&template, 0, sizeof(template));
810 template.private_data = chip;
811 return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
812}
813
814static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg,
815 unsigned short val)
816{
817 struct atmel_ac97c *chip = get_chip(ac97);
818 unsigned long word;
819 int timeout = 40;
820
821 word = (reg & 0x7f) << 16 | val;
822
823 do {
824 if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
825 ac97c_writel(chip, COTHR, word);
826 return;
827 }
828 udelay(1);
829 } while (--timeout);
830
831 dev_dbg(&chip->pdev->dev, "codec write timeout\n");
832}
833
834static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97,
835 unsigned short reg)
836{
837 struct atmel_ac97c *chip = get_chip(ac97);
838 unsigned long word;
839 int timeout = 40;
840 int write = 10;
841
842 word = (0x80 | (reg & 0x7f)) << 16;
843
844 if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
845 ac97c_readl(chip, CORHR);
846
847retry_write:
848 timeout = 40;
849
850 do {
851 if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
852 ac97c_writel(chip, COTHR, word);
853 goto read_reg;
854 }
855 udelay(10);
856 } while (--timeout);
857
858 if (!--write)
859 goto timed_out;
860 goto retry_write;
861
862read_reg:
863 do {
864 if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
865 unsigned short val = ac97c_readl(chip, CORHR);
866 return val;
867 }
868 udelay(10);
869 } while (--timeout);
870
871 if (!--write)
872 goto timed_out;
873 goto retry_write;
874
875timed_out:
876 dev_dbg(&chip->pdev->dev, "codec read timeout\n");
877 return 0xffff;
878}
879
880static bool filter(struct dma_chan *chan, void *slave)
881{
882 struct dw_dma_slave *dws = slave;
883
884 if (dws->dma_dev == chan->device->dev) {
885 chan->private = dws;
886 return true;
887 } else
888 return false;
889}
890
891static void atmel_ac97c_reset(struct atmel_ac97c *chip)
892{
893 ac97c_writel(chip, MR, 0);
894 ac97c_writel(chip, MR, AC97C_MR_ENA);
895 ac97c_writel(chip, CAMR, 0);
896 ac97c_writel(chip, COMR, 0);
897
898 if (gpio_is_valid(chip->reset_pin)) {
899 gpio_set_value(chip->reset_pin, 0);
900 /* AC97 v2.2 specifications says minimum 1 us. */
901 udelay(2);
902 gpio_set_value(chip->reset_pin, 1);
903 } else {
904 ac97c_writel(chip, MR, AC97C_MR_WRST | AC97C_MR_ENA);
905 udelay(2);
906 ac97c_writel(chip, MR, AC97C_MR_ENA);
907 }
908}
909
910static int __devinit atmel_ac97c_probe(struct platform_device *pdev)
911{
912 struct snd_card *card;
913 struct atmel_ac97c *chip;
914 struct resource *regs;
915 struct ac97c_platform_data *pdata;
916 struct clk *pclk;
917 static struct snd_ac97_bus_ops ops = {
918 .write = atmel_ac97c_write,
919 .read = atmel_ac97c_read,
920 };
921 int retval;
922 int irq;
923
924 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
925 if (!regs) {
926 dev_dbg(&pdev->dev, "no memory resource\n");
927 return -ENXIO;
928 }
929
930 pdata = pdev->dev.platform_data;
931 if (!pdata) {
932 dev_dbg(&pdev->dev, "no platform data\n");
933 return -ENXIO;
934 }
935
936 irq = platform_get_irq(pdev, 0);
937 if (irq < 0) {
938 dev_dbg(&pdev->dev, "could not get irq\n");
939 return -ENXIO;
940 }
941
942 if (cpu_is_at32ap7000()) {
943 pclk = clk_get(&pdev->dev, "pclk");
944 } else {
945 pclk = clk_get(&pdev->dev, "ac97_clk");
946 }
947
948 if (IS_ERR(pclk)) {
949 dev_dbg(&pdev->dev, "no peripheral clock\n");
950 return PTR_ERR(pclk);
951 }
952 clk_enable(pclk);
953
954 retval = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
955 THIS_MODULE, sizeof(struct atmel_ac97c), &card);
956 if (retval) {
957 dev_dbg(&pdev->dev, "could not create sound card device\n");
958 goto err_snd_card_new;
959 }
960
961 chip = get_chip(card);
962
963 retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip);
964 if (retval) {
965 dev_dbg(&pdev->dev, "unable to request irq %d\n", irq);
966 goto err_request_irq;
967 }
968 chip->irq = irq;
969
970 spin_lock_init(&chip->lock);
971
972 strcpy(card->driver, "Atmel AC97C");
973 strcpy(card->shortname, "Atmel AC97C");
974 sprintf(card->longname, "Atmel AC97 controller");
975
976 chip->card = card;
977 chip->pclk = pclk;
978 chip->pdev = pdev;
979 chip->regs = ioremap(regs->start, resource_size(regs));
980
981 if (!chip->regs) {
982 dev_dbg(&pdev->dev, "could not remap register memory\n");
983 goto err_ioremap;
984 }
985
986 if (gpio_is_valid(pdata->reset_pin)) {
987 if (gpio_request(pdata->reset_pin, "reset_pin")) {
988 dev_dbg(&pdev->dev, "reset pin not available\n");
989 chip->reset_pin = -ENODEV;
990 } else {
991 gpio_direction_output(pdata->reset_pin, 1);
992 chip->reset_pin = pdata->reset_pin;
993 }
994 } else {
995 chip->reset_pin = -EINVAL;
996 }
997
998 snd_card_set_dev(card, &pdev->dev);
999
1000 atmel_ac97c_reset(chip);
1001
1002 /* Enable overrun interrupt from codec channel */
1003 ac97c_writel(chip, COMR, AC97C_CSR_OVRUN);
1004 ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT);
1005
1006 retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
1007 if (retval) {
1008 dev_dbg(&pdev->dev, "could not register on ac97 bus\n");
1009 goto err_ac97_bus;
1010 }
1011
1012 retval = atmel_ac97c_mixer_new(chip);
1013 if (retval) {
1014 dev_dbg(&pdev->dev, "could not register ac97 mixer\n");
1015 goto err_ac97_bus;
1016 }
1017
1018 if (cpu_is_at32ap7000()) {
1019 if (pdata->rx_dws.dma_dev) {
1020 dma_cap_mask_t mask;
1021
1022 dma_cap_zero(mask);
1023 dma_cap_set(DMA_SLAVE, mask);
1024
1025 chip->dma.rx_chan = dma_request_channel(mask, filter,
1026 &pdata->rx_dws);
1027 if (chip->dma.rx_chan) {
1028 struct dma_slave_config dma_conf = {
1029 .src_addr = regs->start + AC97C_CARHR +
1030 2,
1031 .src_addr_width =
1032 DMA_SLAVE_BUSWIDTH_2_BYTES,
1033 .src_maxburst = 1,
1034 .dst_maxburst = 1,
1035 .direction = DMA_DEV_TO_MEM,
1036 .device_fc = false,
1037 };
1038
1039 dmaengine_slave_config(chip->dma.rx_chan,
1040 &dma_conf);
1041 }
1042
1043 dev_info(&chip->pdev->dev, "using %s for DMA RX\n",
1044 dev_name(&chip->dma.rx_chan->dev->device));
1045 set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1046 }
1047
1048 if (pdata->tx_dws.dma_dev) {
1049 dma_cap_mask_t mask;
1050
1051 dma_cap_zero(mask);
1052 dma_cap_set(DMA_SLAVE, mask);
1053
1054 chip->dma.tx_chan = dma_request_channel(mask, filter,
1055 &pdata->tx_dws);
1056 if (chip->dma.tx_chan) {
1057 struct dma_slave_config dma_conf = {
1058 .dst_addr = regs->start + AC97C_CATHR +
1059 2,
1060 .dst_addr_width =
1061 DMA_SLAVE_BUSWIDTH_2_BYTES,
1062 .src_maxburst = 1,
1063 .dst_maxburst = 1,
1064 .direction = DMA_MEM_TO_DEV,
1065 .device_fc = false,
1066 };
1067
1068 dmaengine_slave_config(chip->dma.tx_chan,
1069 &dma_conf);
1070 }
1071
1072 dev_info(&chip->pdev->dev, "using %s for DMA TX\n",
1073 dev_name(&chip->dma.tx_chan->dev->device));
1074 set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1075 }
1076
1077 if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) &&
1078 !test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) {
1079 dev_dbg(&pdev->dev, "DMA not available\n");
1080 retval = -ENODEV;
1081 goto err_dma;
1082 }
1083 } else {
1084 /* Just pretend that we have DMA channel(for at91 i is actually
1085 * the PDC) */
1086 set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1087 set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1088 }
1089
1090 retval = atmel_ac97c_pcm_new(chip);
1091 if (retval) {
1092 dev_dbg(&pdev->dev, "could not register ac97 pcm device\n");
1093 goto err_dma;
1094 }
1095
1096 retval = snd_card_register(card);
1097 if (retval) {
1098 dev_dbg(&pdev->dev, "could not register sound card\n");
1099 goto err_dma;
1100 }
1101
1102 platform_set_drvdata(pdev, card);
1103
1104 dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n",
1105 chip->regs, irq);
1106
1107 return 0;
1108
1109err_dma:
1110 if (cpu_is_at32ap7000()) {
1111 if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
1112 dma_release_channel(chip->dma.rx_chan);
1113 if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
1114 dma_release_channel(chip->dma.tx_chan);
1115 clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1116 clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1117 chip->dma.rx_chan = NULL;
1118 chip->dma.tx_chan = NULL;
1119 }
1120err_ac97_bus:
1121 snd_card_set_dev(card, NULL);
1122
1123 if (gpio_is_valid(chip->reset_pin))
1124 gpio_free(chip->reset_pin);
1125
1126 iounmap(chip->regs);
1127err_ioremap:
1128 free_irq(irq, chip);
1129err_request_irq:
1130 snd_card_free(card);
1131err_snd_card_new:
1132 clk_disable(pclk);
1133 clk_put(pclk);
1134 return retval;
1135}
1136
1137#ifdef CONFIG_PM
1138static int atmel_ac97c_suspend(struct platform_device *pdev, pm_message_t msg)
1139{
1140 struct snd_card *card = platform_get_drvdata(pdev);
1141 struct atmel_ac97c *chip = card->private_data;
1142
1143 if (cpu_is_at32ap7000()) {
1144 if (test_bit(DMA_RX_READY, &chip->flags))
1145 dw_dma_cyclic_stop(chip->dma.rx_chan);
1146 if (test_bit(DMA_TX_READY, &chip->flags))
1147 dw_dma_cyclic_stop(chip->dma.tx_chan);
1148 }
1149 clk_disable(chip->pclk);
1150
1151 return 0;
1152}
1153
1154static int atmel_ac97c_resume(struct platform_device *pdev)
1155{
1156 struct snd_card *card = platform_get_drvdata(pdev);
1157 struct atmel_ac97c *chip = card->private_data;
1158
1159 clk_enable(chip->pclk);
1160 if (cpu_is_at32ap7000()) {
1161 if (test_bit(DMA_RX_READY, &chip->flags))
1162 dw_dma_cyclic_start(chip->dma.rx_chan);
1163 if (test_bit(DMA_TX_READY, &chip->flags))
1164 dw_dma_cyclic_start(chip->dma.tx_chan);
1165 }
1166 return 0;
1167}
1168#else
1169#define atmel_ac97c_suspend NULL
1170#define atmel_ac97c_resume NULL
1171#endif
1172
1173static int __devexit atmel_ac97c_remove(struct platform_device *pdev)
1174{
1175 struct snd_card *card = platform_get_drvdata(pdev);
1176 struct atmel_ac97c *chip = get_chip(card);
1177
1178 if (gpio_is_valid(chip->reset_pin))
1179 gpio_free(chip->reset_pin);
1180
1181 ac97c_writel(chip, CAMR, 0);
1182 ac97c_writel(chip, COMR, 0);
1183 ac97c_writel(chip, MR, 0);
1184
1185 clk_disable(chip->pclk);
1186 clk_put(chip->pclk);
1187 iounmap(chip->regs);
1188 free_irq(chip->irq, chip);
1189
1190 if (cpu_is_at32ap7000()) {
1191 if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
1192 dma_release_channel(chip->dma.rx_chan);
1193 if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
1194 dma_release_channel(chip->dma.tx_chan);
1195 clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1196 clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1197 chip->dma.rx_chan = NULL;
1198 chip->dma.tx_chan = NULL;
1199 }
1200
1201 snd_card_set_dev(card, NULL);
1202 snd_card_free(card);
1203
1204 platform_set_drvdata(pdev, NULL);
1205
1206 return 0;
1207}
1208
1209static struct platform_driver atmel_ac97c_driver = {
1210 .remove = __devexit_p(atmel_ac97c_remove),
1211 .driver = {
1212 .name = "atmel_ac97c",
1213 },
1214 .suspend = atmel_ac97c_suspend,
1215 .resume = atmel_ac97c_resume,
1216};
1217
1218static int __init atmel_ac97c_init(void)
1219{
1220 return platform_driver_probe(&atmel_ac97c_driver,
1221 atmel_ac97c_probe);
1222}
1223module_init(atmel_ac97c_init);
1224
1225static void __exit atmel_ac97c_exit(void)
1226{
1227 platform_driver_unregister(&atmel_ac97c_driver);
1228}
1229module_exit(atmel_ac97c_exit);
1230
1231MODULE_LICENSE("GPL");
1232MODULE_DESCRIPTION("Driver for Atmel AC97 controller");
1233MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");