Loading...
1/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
32#include <drm/drmP.h>
33#include <drm/radeon_drm.h>
34#include "radeon_drv.h"
35
36#include <drm/drm_pciids.h>
37#include <linux/apple-gmux.h>
38#include <linux/console.h>
39#include <linux/module.h>
40#include <linux/pm_runtime.h>
41#include <linux/vgaarb.h>
42#include <linux/vga_switcheroo.h>
43#include <drm/drm_gem.h>
44
45#include "drm_crtc_helper.h"
46#include "radeon_kfd.h"
47
48/*
49 * KMS wrapper.
50 * - 2.0.0 - initial interface
51 * - 2.1.0 - add square tiling interface
52 * - 2.2.0 - add r6xx/r7xx const buffer support
53 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
54 * - 2.4.0 - add crtc id query
55 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
56 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
57 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
58 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
59 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
60 * 2.10.0 - fusion 2D tiling
61 * 2.11.0 - backend map, initial compute support for the CS checker
62 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
63 * 2.13.0 - virtual memory support, streamout
64 * 2.14.0 - add evergreen tiling informations
65 * 2.15.0 - add max_pipes query
66 * 2.16.0 - fix evergreen 2D tiled surface calculation
67 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
68 * 2.18.0 - r600-eg: allow "invalid" DB formats
69 * 2.19.0 - r600-eg: MSAA textures
70 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
71 * 2.21.0 - r600-r700: FMASK and CMASK
72 * 2.22.0 - r600 only: RESOLVE_BOX allowed
73 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
74 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
75 * 2.25.0 - eg+: new info request for num SE and num SH
76 * 2.26.0 - r600-eg: fix htile size computation
77 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
78 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
79 * 2.29.0 - R500 FP16 color clear registers
80 * 2.30.0 - fix for FMASK texturing
81 * 2.31.0 - Add fastfb support for rs690
82 * 2.32.0 - new info request for rings working
83 * 2.33.0 - Add SI tiling mode array query
84 * 2.34.0 - Add CIK tiling mode array query
85 * 2.35.0 - Add CIK macrotile mode array query
86 * 2.36.0 - Fix CIK DCE tiling setup
87 * 2.37.0 - allow GS ring setup on r6xx/r7xx
88 * 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
89 * CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
90 * 2.39.0 - Add INFO query for number of active CUs
91 * 2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
92 * CS to GPU on >= r600
93 * 2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support
94 * 2.42.0 - Add VCE/VUI (Video Usability Information) support
95 * 2.43.0 - RADEON_INFO_GPU_RESET_COUNTER
96 */
97#define KMS_DRIVER_MAJOR 2
98#define KMS_DRIVER_MINOR 43
99#define KMS_DRIVER_PATCHLEVEL 0
100int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
101int radeon_driver_unload_kms(struct drm_device *dev);
102void radeon_driver_lastclose_kms(struct drm_device *dev);
103int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
104void radeon_driver_postclose_kms(struct drm_device *dev,
105 struct drm_file *file_priv);
106void radeon_driver_preclose_kms(struct drm_device *dev,
107 struct drm_file *file_priv);
108int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
109int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
110u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
111int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
112void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
113int radeon_get_vblank_timestamp_kms(struct drm_device *dev, unsigned int pipe,
114 int *max_error,
115 struct timeval *vblank_time,
116 unsigned flags);
117void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
118int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
119void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
120irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
121void radeon_gem_object_free(struct drm_gem_object *obj);
122int radeon_gem_object_open(struct drm_gem_object *obj,
123 struct drm_file *file_priv);
124void radeon_gem_object_close(struct drm_gem_object *obj,
125 struct drm_file *file_priv);
126struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
127 struct drm_gem_object *gobj,
128 int flags);
129extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc,
130 unsigned int flags, int *vpos, int *hpos,
131 ktime_t *stime, ktime_t *etime,
132 const struct drm_display_mode *mode);
133extern bool radeon_is_px(struct drm_device *dev);
134extern const struct drm_ioctl_desc radeon_ioctls_kms[];
135extern int radeon_max_kms_ioctl;
136int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
137int radeon_mode_dumb_mmap(struct drm_file *filp,
138 struct drm_device *dev,
139 uint32_t handle, uint64_t *offset_p);
140int radeon_mode_dumb_create(struct drm_file *file_priv,
141 struct drm_device *dev,
142 struct drm_mode_create_dumb *args);
143struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
144struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
145 struct dma_buf_attachment *,
146 struct sg_table *sg);
147int radeon_gem_prime_pin(struct drm_gem_object *obj);
148void radeon_gem_prime_unpin(struct drm_gem_object *obj);
149struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *);
150void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
151void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
152extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
153 unsigned long arg);
154
155#if defined(CONFIG_DEBUG_FS)
156int radeon_debugfs_init(struct drm_minor *minor);
157void radeon_debugfs_cleanup(struct drm_minor *minor);
158#endif
159
160/* atpx handler */
161#if defined(CONFIG_VGA_SWITCHEROO)
162void radeon_register_atpx_handler(void);
163void radeon_unregister_atpx_handler(void);
164#else
165static inline void radeon_register_atpx_handler(void) {}
166static inline void radeon_unregister_atpx_handler(void) {}
167#endif
168
169int radeon_no_wb;
170int radeon_modeset = -1;
171int radeon_dynclks = -1;
172int radeon_r4xx_atom = 0;
173int radeon_agpmode = 0;
174int radeon_vram_limit = 0;
175int radeon_gart_size = -1; /* auto */
176int radeon_benchmarking = 0;
177int radeon_testing = 0;
178int radeon_connector_table = 0;
179int radeon_tv = 1;
180int radeon_audio = -1;
181int radeon_disp_priority = 0;
182int radeon_hw_i2c = 0;
183int radeon_pcie_gen2 = -1;
184int radeon_msi = -1;
185int radeon_lockup_timeout = 10000;
186int radeon_fastfb = 0;
187int radeon_dpm = -1;
188int radeon_aspm = -1;
189int radeon_runtime_pm = -1;
190int radeon_hard_reset = 0;
191int radeon_vm_size = 8;
192int radeon_vm_block_size = -1;
193int radeon_deep_color = 0;
194int radeon_use_pflipirq = 2;
195int radeon_bapm = -1;
196int radeon_backlight = -1;
197int radeon_auxch = -1;
198int radeon_mst = 0;
199
200MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
201module_param_named(no_wb, radeon_no_wb, int, 0444);
202
203MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
204module_param_named(modeset, radeon_modeset, int, 0400);
205
206MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
207module_param_named(dynclks, radeon_dynclks, int, 0444);
208
209MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
210module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
211
212MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
213module_param_named(vramlimit, radeon_vram_limit, int, 0600);
214
215MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
216module_param_named(agpmode, radeon_agpmode, int, 0444);
217
218MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
219module_param_named(gartsize, radeon_gart_size, int, 0600);
220
221MODULE_PARM_DESC(benchmark, "Run benchmark");
222module_param_named(benchmark, radeon_benchmarking, int, 0444);
223
224MODULE_PARM_DESC(test, "Run tests");
225module_param_named(test, radeon_testing, int, 0444);
226
227MODULE_PARM_DESC(connector_table, "Force connector table");
228module_param_named(connector_table, radeon_connector_table, int, 0444);
229
230MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
231module_param_named(tv, radeon_tv, int, 0444);
232
233MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
234module_param_named(audio, radeon_audio, int, 0444);
235
236MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
237module_param_named(disp_priority, radeon_disp_priority, int, 0444);
238
239MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
240module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
241
242MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
243module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
244
245MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
246module_param_named(msi, radeon_msi, int, 0444);
247
248MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)");
249module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
250
251MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
252module_param_named(fastfb, radeon_fastfb, int, 0444);
253
254MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
255module_param_named(dpm, radeon_dpm, int, 0444);
256
257MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
258module_param_named(aspm, radeon_aspm, int, 0444);
259
260MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
261module_param_named(runpm, radeon_runtime_pm, int, 0444);
262
263MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
264module_param_named(hard_reset, radeon_hard_reset, int, 0444);
265
266MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
267module_param_named(vm_size, radeon_vm_size, int, 0444);
268
269MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
270module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
271
272MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
273module_param_named(deep_color, radeon_deep_color, int, 0444);
274
275MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
276module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
277
278MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
279module_param_named(bapm, radeon_bapm, int, 0444);
280
281MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
282module_param_named(backlight, radeon_backlight, int, 0444);
283
284MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)");
285module_param_named(auxch, radeon_auxch, int, 0444);
286
287MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)");
288module_param_named(mst, radeon_mst, int, 0444);
289
290static struct pci_device_id pciidlist[] = {
291 radeon_PCI_IDS
292};
293
294MODULE_DEVICE_TABLE(pci, pciidlist);
295
296static struct drm_driver kms_driver;
297
298static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
299{
300 struct apertures_struct *ap;
301 bool primary = false;
302
303 ap = alloc_apertures(1);
304 if (!ap)
305 return -ENOMEM;
306
307 ap->ranges[0].base = pci_resource_start(pdev, 0);
308 ap->ranges[0].size = pci_resource_len(pdev, 0);
309
310#ifdef CONFIG_X86
311 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
312#endif
313 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
314 kfree(ap);
315
316 return 0;
317}
318
319static int radeon_pci_probe(struct pci_dev *pdev,
320 const struct pci_device_id *ent)
321{
322 int ret;
323
324 /*
325 * Initialize amdkfd before starting radeon. If it was not loaded yet,
326 * defer radeon probing
327 */
328 ret = radeon_kfd_init();
329 if (ret == -EPROBE_DEFER)
330 return ret;
331
332 /*
333 * apple-gmux is needed on dual GPU MacBook Pro
334 * to probe the panel if we're the inactive GPU.
335 */
336 if (IS_ENABLED(CONFIG_VGA_ARB) && IS_ENABLED(CONFIG_VGA_SWITCHEROO) &&
337 apple_gmux_present() && pdev != vga_default_device() &&
338 !vga_switcheroo_handler_flags())
339 return -EPROBE_DEFER;
340
341 /* Get rid of things like offb */
342 ret = radeon_kick_out_firmware_fb(pdev);
343 if (ret)
344 return ret;
345
346 return drm_get_pci_dev(pdev, ent, &kms_driver);
347}
348
349static void
350radeon_pci_remove(struct pci_dev *pdev)
351{
352 struct drm_device *dev = pci_get_drvdata(pdev);
353
354 drm_put_dev(dev);
355}
356
357static int radeon_pmops_suspend(struct device *dev)
358{
359 struct pci_dev *pdev = to_pci_dev(dev);
360 struct drm_device *drm_dev = pci_get_drvdata(pdev);
361 return radeon_suspend_kms(drm_dev, true, true);
362}
363
364static int radeon_pmops_resume(struct device *dev)
365{
366 struct pci_dev *pdev = to_pci_dev(dev);
367 struct drm_device *drm_dev = pci_get_drvdata(pdev);
368 return radeon_resume_kms(drm_dev, true, true);
369}
370
371static int radeon_pmops_freeze(struct device *dev)
372{
373 struct pci_dev *pdev = to_pci_dev(dev);
374 struct drm_device *drm_dev = pci_get_drvdata(pdev);
375 return radeon_suspend_kms(drm_dev, false, true);
376}
377
378static int radeon_pmops_thaw(struct device *dev)
379{
380 struct pci_dev *pdev = to_pci_dev(dev);
381 struct drm_device *drm_dev = pci_get_drvdata(pdev);
382 return radeon_resume_kms(drm_dev, false, true);
383}
384
385static int radeon_pmops_runtime_suspend(struct device *dev)
386{
387 struct pci_dev *pdev = to_pci_dev(dev);
388 struct drm_device *drm_dev = pci_get_drvdata(pdev);
389 int ret;
390
391 if (!radeon_is_px(drm_dev)) {
392 pm_runtime_forbid(dev);
393 return -EBUSY;
394 }
395
396 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
397 drm_kms_helper_poll_disable(drm_dev);
398 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
399
400 ret = radeon_suspend_kms(drm_dev, false, false);
401 pci_save_state(pdev);
402 pci_disable_device(pdev);
403 pci_ignore_hotplug(pdev);
404 pci_set_power_state(pdev, PCI_D3cold);
405 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
406
407 return 0;
408}
409
410static int radeon_pmops_runtime_resume(struct device *dev)
411{
412 struct pci_dev *pdev = to_pci_dev(dev);
413 struct drm_device *drm_dev = pci_get_drvdata(pdev);
414 int ret;
415
416 if (!radeon_is_px(drm_dev))
417 return -EINVAL;
418
419 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
420
421 pci_set_power_state(pdev, PCI_D0);
422 pci_restore_state(pdev);
423 ret = pci_enable_device(pdev);
424 if (ret)
425 return ret;
426 pci_set_master(pdev);
427
428 ret = radeon_resume_kms(drm_dev, false, false);
429 drm_kms_helper_poll_enable(drm_dev);
430 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
431 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
432 return 0;
433}
434
435static int radeon_pmops_runtime_idle(struct device *dev)
436{
437 struct pci_dev *pdev = to_pci_dev(dev);
438 struct drm_device *drm_dev = pci_get_drvdata(pdev);
439 struct drm_crtc *crtc;
440
441 if (!radeon_is_px(drm_dev)) {
442 pm_runtime_forbid(dev);
443 return -EBUSY;
444 }
445
446 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
447 if (crtc->enabled) {
448 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
449 return -EBUSY;
450 }
451 }
452
453 pm_runtime_mark_last_busy(dev);
454 pm_runtime_autosuspend(dev);
455 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
456 return 1;
457}
458
459long radeon_drm_ioctl(struct file *filp,
460 unsigned int cmd, unsigned long arg)
461{
462 struct drm_file *file_priv = filp->private_data;
463 struct drm_device *dev;
464 long ret;
465 dev = file_priv->minor->dev;
466 ret = pm_runtime_get_sync(dev->dev);
467 if (ret < 0)
468 return ret;
469
470 ret = drm_ioctl(filp, cmd, arg);
471
472 pm_runtime_mark_last_busy(dev->dev);
473 pm_runtime_put_autosuspend(dev->dev);
474 return ret;
475}
476
477static const struct dev_pm_ops radeon_pm_ops = {
478 .suspend = radeon_pmops_suspend,
479 .resume = radeon_pmops_resume,
480 .freeze = radeon_pmops_freeze,
481 .thaw = radeon_pmops_thaw,
482 .poweroff = radeon_pmops_freeze,
483 .restore = radeon_pmops_resume,
484 .runtime_suspend = radeon_pmops_runtime_suspend,
485 .runtime_resume = radeon_pmops_runtime_resume,
486 .runtime_idle = radeon_pmops_runtime_idle,
487};
488
489static const struct file_operations radeon_driver_kms_fops = {
490 .owner = THIS_MODULE,
491 .open = drm_open,
492 .release = drm_release,
493 .unlocked_ioctl = radeon_drm_ioctl,
494 .mmap = radeon_mmap,
495 .poll = drm_poll,
496 .read = drm_read,
497#ifdef CONFIG_COMPAT
498 .compat_ioctl = radeon_kms_compat_ioctl,
499#endif
500};
501
502static struct drm_driver kms_driver = {
503 .driver_features =
504 DRIVER_USE_AGP |
505 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
506 DRIVER_PRIME | DRIVER_RENDER,
507 .load = radeon_driver_load_kms,
508 .open = radeon_driver_open_kms,
509 .preclose = radeon_driver_preclose_kms,
510 .postclose = radeon_driver_postclose_kms,
511 .lastclose = radeon_driver_lastclose_kms,
512 .set_busid = drm_pci_set_busid,
513 .unload = radeon_driver_unload_kms,
514 .get_vblank_counter = radeon_get_vblank_counter_kms,
515 .enable_vblank = radeon_enable_vblank_kms,
516 .disable_vblank = radeon_disable_vblank_kms,
517 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
518 .get_scanout_position = radeon_get_crtc_scanoutpos,
519#if defined(CONFIG_DEBUG_FS)
520 .debugfs_init = radeon_debugfs_init,
521 .debugfs_cleanup = radeon_debugfs_cleanup,
522#endif
523 .irq_preinstall = radeon_driver_irq_preinstall_kms,
524 .irq_postinstall = radeon_driver_irq_postinstall_kms,
525 .irq_uninstall = radeon_driver_irq_uninstall_kms,
526 .irq_handler = radeon_driver_irq_handler_kms,
527 .ioctls = radeon_ioctls_kms,
528 .gem_free_object = radeon_gem_object_free,
529 .gem_open_object = radeon_gem_object_open,
530 .gem_close_object = radeon_gem_object_close,
531 .dumb_create = radeon_mode_dumb_create,
532 .dumb_map_offset = radeon_mode_dumb_mmap,
533 .dumb_destroy = drm_gem_dumb_destroy,
534 .fops = &radeon_driver_kms_fops,
535
536 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
537 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
538 .gem_prime_export = radeon_gem_prime_export,
539 .gem_prime_import = drm_gem_prime_import,
540 .gem_prime_pin = radeon_gem_prime_pin,
541 .gem_prime_unpin = radeon_gem_prime_unpin,
542 .gem_prime_res_obj = radeon_gem_prime_res_obj,
543 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
544 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
545 .gem_prime_vmap = radeon_gem_prime_vmap,
546 .gem_prime_vunmap = radeon_gem_prime_vunmap,
547
548 .name = DRIVER_NAME,
549 .desc = DRIVER_DESC,
550 .date = DRIVER_DATE,
551 .major = KMS_DRIVER_MAJOR,
552 .minor = KMS_DRIVER_MINOR,
553 .patchlevel = KMS_DRIVER_PATCHLEVEL,
554};
555
556static struct drm_driver *driver;
557static struct pci_driver *pdriver;
558
559static struct pci_driver radeon_kms_pci_driver = {
560 .name = DRIVER_NAME,
561 .id_table = pciidlist,
562 .probe = radeon_pci_probe,
563 .remove = radeon_pci_remove,
564 .driver.pm = &radeon_pm_ops,
565};
566
567static int __init radeon_init(void)
568{
569#ifdef CONFIG_VGA_CONSOLE
570 if (vgacon_text_force() && radeon_modeset == -1) {
571 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
572 radeon_modeset = 0;
573 }
574#endif
575 /* set to modesetting by default if not nomodeset */
576 if (radeon_modeset == -1)
577 radeon_modeset = 1;
578
579 if (radeon_modeset == 1) {
580 DRM_INFO("radeon kernel modesetting enabled.\n");
581 driver = &kms_driver;
582 pdriver = &radeon_kms_pci_driver;
583 driver->driver_features |= DRIVER_MODESET;
584 driver->num_ioctls = radeon_max_kms_ioctl;
585 radeon_register_atpx_handler();
586
587 } else {
588 DRM_ERROR("No UMS support in radeon module!\n");
589 return -EINVAL;
590 }
591
592 /* let modprobe override vga console setting */
593 return drm_pci_init(driver, pdriver);
594}
595
596static void __exit radeon_exit(void)
597{
598 radeon_kfd_fini();
599 drm_pci_exit(driver, pdriver);
600 radeon_unregister_atpx_handler();
601}
602
603module_init(radeon_init);
604module_exit(radeon_exit);
605
606MODULE_AUTHOR(DRIVER_AUTHOR);
607MODULE_DESCRIPTION(DRIVER_DESC);
608MODULE_LICENSE("GPL and additional rights");
1/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
32#include "drmP.h"
33#include "drm.h"
34#include "radeon_drm.h"
35#include "radeon_drv.h"
36
37#include "drm_pciids.h"
38#include <linux/console.h>
39#include <linux/module.h>
40
41
42/*
43 * KMS wrapper.
44 * - 2.0.0 - initial interface
45 * - 2.1.0 - add square tiling interface
46 * - 2.2.0 - add r6xx/r7xx const buffer support
47 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
48 * - 2.4.0 - add crtc id query
49 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
50 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
51 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
52 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
53 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
54 * 2.10.0 - fusion 2D tiling
55 * 2.11.0 - backend map, initial compute support for the CS checker
56 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
57 * 2.13.0 - virtual memory support, streamout
58 * 2.14.0 - add evergreen tiling informations
59 * 2.15.0 - add max_pipes query
60 * 2.16.0 - fix evergreen 2D tiled surface calculation
61 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
62 * 2.18.0 - r600-eg: allow "invalid" DB formats
63 */
64#define KMS_DRIVER_MAJOR 2
65#define KMS_DRIVER_MINOR 18
66#define KMS_DRIVER_PATCHLEVEL 0
67int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
68int radeon_driver_unload_kms(struct drm_device *dev);
69int radeon_driver_firstopen_kms(struct drm_device *dev);
70void radeon_driver_lastclose_kms(struct drm_device *dev);
71int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
72void radeon_driver_postclose_kms(struct drm_device *dev,
73 struct drm_file *file_priv);
74void radeon_driver_preclose_kms(struct drm_device *dev,
75 struct drm_file *file_priv);
76int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
77int radeon_resume_kms(struct drm_device *dev);
78u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
79int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
80void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
81int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
82 int *max_error,
83 struct timeval *vblank_time,
84 unsigned flags);
85void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
86int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
87void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
88irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
89int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
90 struct drm_file *file_priv);
91int radeon_gem_object_init(struct drm_gem_object *obj);
92void radeon_gem_object_free(struct drm_gem_object *obj);
93int radeon_gem_object_open(struct drm_gem_object *obj,
94 struct drm_file *file_priv);
95void radeon_gem_object_close(struct drm_gem_object *obj,
96 struct drm_file *file_priv);
97extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
98 int *vpos, int *hpos);
99extern struct drm_ioctl_desc radeon_ioctls_kms[];
100extern int radeon_max_kms_ioctl;
101int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
102int radeon_mode_dumb_mmap(struct drm_file *filp,
103 struct drm_device *dev,
104 uint32_t handle, uint64_t *offset_p);
105int radeon_mode_dumb_create(struct drm_file *file_priv,
106 struct drm_device *dev,
107 struct drm_mode_create_dumb *args);
108int radeon_mode_dumb_destroy(struct drm_file *file_priv,
109 struct drm_device *dev,
110 uint32_t handle);
111struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
112 struct drm_gem_object *obj,
113 int flags);
114struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev,
115 struct dma_buf *dma_buf);
116
117#if defined(CONFIG_DEBUG_FS)
118int radeon_debugfs_init(struct drm_minor *minor);
119void radeon_debugfs_cleanup(struct drm_minor *minor);
120#endif
121
122
123int radeon_no_wb;
124int radeon_modeset = -1;
125int radeon_dynclks = -1;
126int radeon_r4xx_atom = 0;
127int radeon_agpmode = 0;
128int radeon_vram_limit = 0;
129int radeon_gart_size = 512; /* default gart size */
130int radeon_benchmarking = 0;
131int radeon_testing = 0;
132int radeon_connector_table = 0;
133int radeon_tv = 1;
134int radeon_audio = 0;
135int radeon_disp_priority = 0;
136int radeon_hw_i2c = 0;
137int radeon_pcie_gen2 = 0;
138int radeon_msi = -1;
139int radeon_lockup_timeout = 10000;
140
141MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
142module_param_named(no_wb, radeon_no_wb, int, 0444);
143
144MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
145module_param_named(modeset, radeon_modeset, int, 0400);
146
147MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
148module_param_named(dynclks, radeon_dynclks, int, 0444);
149
150MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
151module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
152
153MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
154module_param_named(vramlimit, radeon_vram_limit, int, 0600);
155
156MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
157module_param_named(agpmode, radeon_agpmode, int, 0444);
158
159MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
160module_param_named(gartsize, radeon_gart_size, int, 0600);
161
162MODULE_PARM_DESC(benchmark, "Run benchmark");
163module_param_named(benchmark, radeon_benchmarking, int, 0444);
164
165MODULE_PARM_DESC(test, "Run tests");
166module_param_named(test, radeon_testing, int, 0444);
167
168MODULE_PARM_DESC(connector_table, "Force connector table");
169module_param_named(connector_table, radeon_connector_table, int, 0444);
170
171MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
172module_param_named(tv, radeon_tv, int, 0444);
173
174MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
175module_param_named(audio, radeon_audio, int, 0444);
176
177MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
178module_param_named(disp_priority, radeon_disp_priority, int, 0444);
179
180MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
181module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
182
183MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (1 = enable)");
184module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
185
186MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
187module_param_named(msi, radeon_msi, int, 0444);
188
189MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
190module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
191
192static int radeon_suspend(struct drm_device *dev, pm_message_t state)
193{
194 drm_radeon_private_t *dev_priv = dev->dev_private;
195
196 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
197 return 0;
198
199 /* Disable *all* interrupts */
200 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
201 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
202 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
203 return 0;
204}
205
206static int radeon_resume(struct drm_device *dev)
207{
208 drm_radeon_private_t *dev_priv = dev->dev_private;
209
210 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
211 return 0;
212
213 /* Restore interrupt registers */
214 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
215 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
216 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
217 return 0;
218}
219
220static struct pci_device_id pciidlist[] = {
221 radeon_PCI_IDS
222};
223
224#if defined(CONFIG_DRM_RADEON_KMS)
225MODULE_DEVICE_TABLE(pci, pciidlist);
226#endif
227
228static const struct file_operations radeon_driver_old_fops = {
229 .owner = THIS_MODULE,
230 .open = drm_open,
231 .release = drm_release,
232 .unlocked_ioctl = drm_ioctl,
233 .mmap = drm_mmap,
234 .poll = drm_poll,
235 .fasync = drm_fasync,
236 .read = drm_read,
237#ifdef CONFIG_COMPAT
238 .compat_ioctl = radeon_compat_ioctl,
239#endif
240 .llseek = noop_llseek,
241};
242
243static struct drm_driver driver_old = {
244 .driver_features =
245 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
246 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
247 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
248 .load = radeon_driver_load,
249 .firstopen = radeon_driver_firstopen,
250 .open = radeon_driver_open,
251 .preclose = radeon_driver_preclose,
252 .postclose = radeon_driver_postclose,
253 .lastclose = radeon_driver_lastclose,
254 .unload = radeon_driver_unload,
255 .suspend = radeon_suspend,
256 .resume = radeon_resume,
257 .get_vblank_counter = radeon_get_vblank_counter,
258 .enable_vblank = radeon_enable_vblank,
259 .disable_vblank = radeon_disable_vblank,
260 .master_create = radeon_master_create,
261 .master_destroy = radeon_master_destroy,
262 .irq_preinstall = radeon_driver_irq_preinstall,
263 .irq_postinstall = radeon_driver_irq_postinstall,
264 .irq_uninstall = radeon_driver_irq_uninstall,
265 .irq_handler = radeon_driver_irq_handler,
266 .reclaim_buffers = drm_core_reclaim_buffers,
267 .ioctls = radeon_ioctls,
268 .dma_ioctl = radeon_cp_buffers,
269 .fops = &radeon_driver_old_fops,
270 .name = DRIVER_NAME,
271 .desc = DRIVER_DESC,
272 .date = DRIVER_DATE,
273 .major = DRIVER_MAJOR,
274 .minor = DRIVER_MINOR,
275 .patchlevel = DRIVER_PATCHLEVEL,
276};
277
278static struct drm_driver kms_driver;
279
280static void radeon_kick_out_firmware_fb(struct pci_dev *pdev)
281{
282 struct apertures_struct *ap;
283 bool primary = false;
284
285 ap = alloc_apertures(1);
286 ap->ranges[0].base = pci_resource_start(pdev, 0);
287 ap->ranges[0].size = pci_resource_len(pdev, 0);
288
289#ifdef CONFIG_X86
290 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
291#endif
292 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
293 kfree(ap);
294}
295
296static int __devinit
297radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
298{
299 /* Get rid of things like offb */
300 radeon_kick_out_firmware_fb(pdev);
301
302 return drm_get_pci_dev(pdev, ent, &kms_driver);
303}
304
305static void
306radeon_pci_remove(struct pci_dev *pdev)
307{
308 struct drm_device *dev = pci_get_drvdata(pdev);
309
310 drm_put_dev(dev);
311}
312
313static int
314radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
315{
316 struct drm_device *dev = pci_get_drvdata(pdev);
317 return radeon_suspend_kms(dev, state);
318}
319
320static int
321radeon_pci_resume(struct pci_dev *pdev)
322{
323 struct drm_device *dev = pci_get_drvdata(pdev);
324 return radeon_resume_kms(dev);
325}
326
327static const struct file_operations radeon_driver_kms_fops = {
328 .owner = THIS_MODULE,
329 .open = drm_open,
330 .release = drm_release,
331 .unlocked_ioctl = drm_ioctl,
332 .mmap = radeon_mmap,
333 .poll = drm_poll,
334 .fasync = drm_fasync,
335 .read = drm_read,
336#ifdef CONFIG_COMPAT
337 .compat_ioctl = radeon_kms_compat_ioctl,
338#endif
339};
340
341static struct drm_driver kms_driver = {
342 .driver_features =
343 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
344 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
345 DRIVER_PRIME,
346 .dev_priv_size = 0,
347 .load = radeon_driver_load_kms,
348 .firstopen = radeon_driver_firstopen_kms,
349 .open = radeon_driver_open_kms,
350 .preclose = radeon_driver_preclose_kms,
351 .postclose = radeon_driver_postclose_kms,
352 .lastclose = radeon_driver_lastclose_kms,
353 .unload = radeon_driver_unload_kms,
354 .suspend = radeon_suspend_kms,
355 .resume = radeon_resume_kms,
356 .get_vblank_counter = radeon_get_vblank_counter_kms,
357 .enable_vblank = radeon_enable_vblank_kms,
358 .disable_vblank = radeon_disable_vblank_kms,
359 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
360 .get_scanout_position = radeon_get_crtc_scanoutpos,
361#if defined(CONFIG_DEBUG_FS)
362 .debugfs_init = radeon_debugfs_init,
363 .debugfs_cleanup = radeon_debugfs_cleanup,
364#endif
365 .irq_preinstall = radeon_driver_irq_preinstall_kms,
366 .irq_postinstall = radeon_driver_irq_postinstall_kms,
367 .irq_uninstall = radeon_driver_irq_uninstall_kms,
368 .irq_handler = radeon_driver_irq_handler_kms,
369 .reclaim_buffers = drm_core_reclaim_buffers,
370 .ioctls = radeon_ioctls_kms,
371 .gem_init_object = radeon_gem_object_init,
372 .gem_free_object = radeon_gem_object_free,
373 .gem_open_object = radeon_gem_object_open,
374 .gem_close_object = radeon_gem_object_close,
375 .dma_ioctl = radeon_dma_ioctl_kms,
376 .dumb_create = radeon_mode_dumb_create,
377 .dumb_map_offset = radeon_mode_dumb_mmap,
378 .dumb_destroy = radeon_mode_dumb_destroy,
379 .fops = &radeon_driver_kms_fops,
380
381 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
382 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
383 .gem_prime_export = radeon_gem_prime_export,
384 .gem_prime_import = radeon_gem_prime_import,
385
386 .name = DRIVER_NAME,
387 .desc = DRIVER_DESC,
388 .date = DRIVER_DATE,
389 .major = KMS_DRIVER_MAJOR,
390 .minor = KMS_DRIVER_MINOR,
391 .patchlevel = KMS_DRIVER_PATCHLEVEL,
392};
393
394static struct drm_driver *driver;
395static struct pci_driver *pdriver;
396
397static struct pci_driver radeon_pci_driver = {
398 .name = DRIVER_NAME,
399 .id_table = pciidlist,
400};
401
402static struct pci_driver radeon_kms_pci_driver = {
403 .name = DRIVER_NAME,
404 .id_table = pciidlist,
405 .probe = radeon_pci_probe,
406 .remove = radeon_pci_remove,
407 .suspend = radeon_pci_suspend,
408 .resume = radeon_pci_resume,
409};
410
411static int __init radeon_init(void)
412{
413 driver = &driver_old;
414 pdriver = &radeon_pci_driver;
415 driver->num_ioctls = radeon_max_ioctl;
416#ifdef CONFIG_VGA_CONSOLE
417 if (vgacon_text_force() && radeon_modeset == -1) {
418 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
419 driver = &driver_old;
420 pdriver = &radeon_pci_driver;
421 driver->driver_features &= ~DRIVER_MODESET;
422 radeon_modeset = 0;
423 }
424#endif
425 /* if enabled by default */
426 if (radeon_modeset == -1) {
427#ifdef CONFIG_DRM_RADEON_KMS
428 DRM_INFO("radeon defaulting to kernel modesetting.\n");
429 radeon_modeset = 1;
430#else
431 DRM_INFO("radeon defaulting to userspace modesetting.\n");
432 radeon_modeset = 0;
433#endif
434 }
435 if (radeon_modeset == 1) {
436 DRM_INFO("radeon kernel modesetting enabled.\n");
437 driver = &kms_driver;
438 pdriver = &radeon_kms_pci_driver;
439 driver->driver_features |= DRIVER_MODESET;
440 driver->num_ioctls = radeon_max_kms_ioctl;
441 radeon_register_atpx_handler();
442 }
443 /* if the vga console setting is enabled still
444 * let modprobe override it */
445 return drm_pci_init(driver, pdriver);
446}
447
448static void __exit radeon_exit(void)
449{
450 drm_pci_exit(driver, pdriver);
451 radeon_unregister_atpx_handler();
452}
453
454module_init(radeon_init);
455module_exit(radeon_exit);
456
457MODULE_AUTHOR(DRIVER_AUTHOR);
458MODULE_DESCRIPTION(DRIVER_DESC);
459MODULE_LICENSE("GPL and additional rights");