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1/*
2 * Faraday FUSBH200 EHCI-like driver
3 *
4 * Copyright (c) 2013 Faraday Technology Corporation
5 *
6 * Author: Yuan-Hsin Chen <yhchen@faraday-tech.com>
7 * Feng-Hsin Chiang <john453@faraday-tech.com>
8 * Po-Yu Chuang <ratbert.chuang@gmail.com>
9 *
10 * Most of code borrowed from the Linux-3.7 EHCI driver
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
19 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
20 * for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software Foundation,
24 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#include <linux/module.h>
28#include <linux/device.h>
29#include <linux/dmapool.h>
30#include <linux/kernel.h>
31#include <linux/delay.h>
32#include <linux/ioport.h>
33#include <linux/sched.h>
34#include <linux/vmalloc.h>
35#include <linux/errno.h>
36#include <linux/init.h>
37#include <linux/hrtimer.h>
38#include <linux/list.h>
39#include <linux/interrupt.h>
40#include <linux/usb.h>
41#include <linux/usb/hcd.h>
42#include <linux/moduleparam.h>
43#include <linux/dma-mapping.h>
44#include <linux/debugfs.h>
45#include <linux/slab.h>
46#include <linux/uaccess.h>
47#include <linux/platform_device.h>
48
49#include <asm/byteorder.h>
50#include <asm/io.h>
51#include <asm/irq.h>
52#include <asm/unaligned.h>
53
54/*-------------------------------------------------------------------------*/
55#define DRIVER_AUTHOR "Yuan-Hsin Chen"
56#define DRIVER_DESC "FUSBH200 Host Controller (EHCI) Driver"
57
58static const char hcd_name [] = "fusbh200_hcd";
59
60#undef FUSBH200_URB_TRACE
61
62/* magic numbers that can affect system performance */
63#define FUSBH200_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
64#define FUSBH200_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
65#define FUSBH200_TUNE_RL_TT 0
66#define FUSBH200_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
67#define FUSBH200_TUNE_MULT_TT 1
68/*
69 * Some drivers think it's safe to schedule isochronous transfers more than
70 * 256 ms into the future (partly as a result of an old bug in the scheduling
71 * code). In an attempt to avoid trouble, we will use a minimum scheduling
72 * length of 512 frames instead of 256.
73 */
74#define FUSBH200_TUNE_FLS 1 /* (medium) 512-frame schedule */
75
76/* Initial IRQ latency: faster than hw default */
77static int log2_irq_thresh = 0; // 0 to 6
78module_param (log2_irq_thresh, int, S_IRUGO);
79MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
80
81/* initial park setting: slower than hw default */
82static unsigned park = 0;
83module_param (park, uint, S_IRUGO);
84MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
85
86/* for link power management(LPM) feature */
87static unsigned int hird;
88module_param(hird, int, S_IRUGO);
89MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us");
90
91#define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
92
93#include "fusbh200.h"
94
95/*-------------------------------------------------------------------------*/
96
97#define fusbh200_dbg(fusbh200, fmt, args...) \
98 dev_dbg (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
99#define fusbh200_err(fusbh200, fmt, args...) \
100 dev_err (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
101#define fusbh200_info(fusbh200, fmt, args...) \
102 dev_info (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
103#define fusbh200_warn(fusbh200, fmt, args...) \
104 dev_warn (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
105
106/* check the values in the HCSPARAMS register
107 * (host controller _Structural_ parameters)
108 * see EHCI spec, Table 2-4 for each value
109 */
110static void dbg_hcs_params (struct fusbh200_hcd *fusbh200, char *label)
111{
112 u32 params = fusbh200_readl(fusbh200, &fusbh200->caps->hcs_params);
113
114 fusbh200_dbg (fusbh200,
115 "%s hcs_params 0x%x ports=%d\n",
116 label, params,
117 HCS_N_PORTS (params)
118 );
119}
120
121/* check the values in the HCCPARAMS register
122 * (host controller _Capability_ parameters)
123 * see EHCI Spec, Table 2-5 for each value
124 * */
125static void dbg_hcc_params (struct fusbh200_hcd *fusbh200, char *label)
126{
127 u32 params = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
128
129 fusbh200_dbg (fusbh200,
130 "%s hcc_params %04x uframes %s%s\n",
131 label,
132 params,
133 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
134 HCC_CANPARK(params) ? " park" : "");
135}
136
137static void __maybe_unused
138dbg_qtd (const char *label, struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd)
139{
140 fusbh200_dbg(fusbh200, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
141 hc32_to_cpup(fusbh200, &qtd->hw_next),
142 hc32_to_cpup(fusbh200, &qtd->hw_alt_next),
143 hc32_to_cpup(fusbh200, &qtd->hw_token),
144 hc32_to_cpup(fusbh200, &qtd->hw_buf [0]));
145 if (qtd->hw_buf [1])
146 fusbh200_dbg(fusbh200, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
147 hc32_to_cpup(fusbh200, &qtd->hw_buf[1]),
148 hc32_to_cpup(fusbh200, &qtd->hw_buf[2]),
149 hc32_to_cpup(fusbh200, &qtd->hw_buf[3]),
150 hc32_to_cpup(fusbh200, &qtd->hw_buf[4]));
151}
152
153static void __maybe_unused
154dbg_qh (const char *label, struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
155{
156 struct fusbh200_qh_hw *hw = qh->hw;
157
158 fusbh200_dbg (fusbh200, "%s qh %p n%08x info %x %x qtd %x\n", label,
159 qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
160 dbg_qtd("overlay", fusbh200, (struct fusbh200_qtd *) &hw->hw_qtd_next);
161}
162
163static void __maybe_unused
164dbg_itd (const char *label, struct fusbh200_hcd *fusbh200, struct fusbh200_itd *itd)
165{
166 fusbh200_dbg (fusbh200, "%s [%d] itd %p, next %08x, urb %p\n",
167 label, itd->frame, itd, hc32_to_cpu(fusbh200, itd->hw_next),
168 itd->urb);
169 fusbh200_dbg (fusbh200,
170 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
171 hc32_to_cpu(fusbh200, itd->hw_transaction[0]),
172 hc32_to_cpu(fusbh200, itd->hw_transaction[1]),
173 hc32_to_cpu(fusbh200, itd->hw_transaction[2]),
174 hc32_to_cpu(fusbh200, itd->hw_transaction[3]),
175 hc32_to_cpu(fusbh200, itd->hw_transaction[4]),
176 hc32_to_cpu(fusbh200, itd->hw_transaction[5]),
177 hc32_to_cpu(fusbh200, itd->hw_transaction[6]),
178 hc32_to_cpu(fusbh200, itd->hw_transaction[7]));
179 fusbh200_dbg (fusbh200,
180 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
181 hc32_to_cpu(fusbh200, itd->hw_bufp[0]),
182 hc32_to_cpu(fusbh200, itd->hw_bufp[1]),
183 hc32_to_cpu(fusbh200, itd->hw_bufp[2]),
184 hc32_to_cpu(fusbh200, itd->hw_bufp[3]),
185 hc32_to_cpu(fusbh200, itd->hw_bufp[4]),
186 hc32_to_cpu(fusbh200, itd->hw_bufp[5]),
187 hc32_to_cpu(fusbh200, itd->hw_bufp[6]));
188 fusbh200_dbg (fusbh200, " index: %d %d %d %d %d %d %d %d\n",
189 itd->index[0], itd->index[1], itd->index[2],
190 itd->index[3], itd->index[4], itd->index[5],
191 itd->index[6], itd->index[7]);
192}
193
194static int __maybe_unused
195dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
196{
197 return scnprintf (buf, len,
198 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
199 label, label [0] ? " " : "", status,
200 (status & STS_ASS) ? " Async" : "",
201 (status & STS_PSS) ? " Periodic" : "",
202 (status & STS_RECL) ? " Recl" : "",
203 (status & STS_HALT) ? " Halt" : "",
204 (status & STS_IAA) ? " IAA" : "",
205 (status & STS_FATAL) ? " FATAL" : "",
206 (status & STS_FLR) ? " FLR" : "",
207 (status & STS_PCD) ? " PCD" : "",
208 (status & STS_ERR) ? " ERR" : "",
209 (status & STS_INT) ? " INT" : ""
210 );
211}
212
213static int __maybe_unused
214dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
215{
216 return scnprintf (buf, len,
217 "%s%sintrenable %02x%s%s%s%s%s%s",
218 label, label [0] ? " " : "", enable,
219 (enable & STS_IAA) ? " IAA" : "",
220 (enable & STS_FATAL) ? " FATAL" : "",
221 (enable & STS_FLR) ? " FLR" : "",
222 (enable & STS_PCD) ? " PCD" : "",
223 (enable & STS_ERR) ? " ERR" : "",
224 (enable & STS_INT) ? " INT" : ""
225 );
226}
227
228static const char *const fls_strings [] =
229 { "1024", "512", "256", "??" };
230
231static int
232dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
233{
234 return scnprintf (buf, len,
235 "%s%scommand %07x %s=%d ithresh=%d%s%s%s "
236 "period=%s%s %s",
237 label, label [0] ? " " : "", command,
238 (command & CMD_PARK) ? " park" : "(park)",
239 CMD_PARK_CNT (command),
240 (command >> 16) & 0x3f,
241 (command & CMD_IAAD) ? " IAAD" : "",
242 (command & CMD_ASE) ? " Async" : "",
243 (command & CMD_PSE) ? " Periodic" : "",
244 fls_strings [(command >> 2) & 0x3],
245 (command & CMD_RESET) ? " Reset" : "",
246 (command & CMD_RUN) ? "RUN" : "HALT"
247 );
248}
249
250static int
251dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
252{
253 char *sig;
254
255 /* signaling state */
256 switch (status & (3 << 10)) {
257 case 0 << 10: sig = "se0"; break;
258 case 1 << 10: sig = "k"; break; /* low speed */
259 case 2 << 10: sig = "j"; break;
260 default: sig = "?"; break;
261 }
262
263 return scnprintf (buf, len,
264 "%s%sport:%d status %06x %d "
265 "sig=%s%s%s%s%s%s%s%s",
266 label, label [0] ? " " : "", port, status,
267 status>>25,/*device address */
268 sig,
269 (status & PORT_RESET) ? " RESET" : "",
270 (status & PORT_SUSPEND) ? " SUSPEND" : "",
271 (status & PORT_RESUME) ? " RESUME" : "",
272 (status & PORT_PEC) ? " PEC" : "",
273 (status & PORT_PE) ? " PE" : "",
274 (status & PORT_CSC) ? " CSC" : "",
275 (status & PORT_CONNECT) ? " CONNECT" : "");
276}
277
278/* functions have the "wrong" filename when they're output... */
279#define dbg_status(fusbh200, label, status) { \
280 char _buf [80]; \
281 dbg_status_buf (_buf, sizeof _buf, label, status); \
282 fusbh200_dbg (fusbh200, "%s\n", _buf); \
283}
284
285#define dbg_cmd(fusbh200, label, command) { \
286 char _buf [80]; \
287 dbg_command_buf (_buf, sizeof _buf, label, command); \
288 fusbh200_dbg (fusbh200, "%s\n", _buf); \
289}
290
291#define dbg_port(fusbh200, label, port, status) { \
292 char _buf [80]; \
293 dbg_port_buf (_buf, sizeof _buf, label, port, status); \
294 fusbh200_dbg (fusbh200, "%s\n", _buf); \
295}
296
297/*-------------------------------------------------------------------------*/
298
299/* troubleshooting help: expose state in debugfs */
300
301static int debug_async_open(struct inode *, struct file *);
302static int debug_periodic_open(struct inode *, struct file *);
303static int debug_registers_open(struct inode *, struct file *);
304static int debug_async_open(struct inode *, struct file *);
305
306static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
307static int debug_close(struct inode *, struct file *);
308
309static const struct file_operations debug_async_fops = {
310 .owner = THIS_MODULE,
311 .open = debug_async_open,
312 .read = debug_output,
313 .release = debug_close,
314 .llseek = default_llseek,
315};
316static const struct file_operations debug_periodic_fops = {
317 .owner = THIS_MODULE,
318 .open = debug_periodic_open,
319 .read = debug_output,
320 .release = debug_close,
321 .llseek = default_llseek,
322};
323static const struct file_operations debug_registers_fops = {
324 .owner = THIS_MODULE,
325 .open = debug_registers_open,
326 .read = debug_output,
327 .release = debug_close,
328 .llseek = default_llseek,
329};
330
331static struct dentry *fusbh200_debug_root;
332
333struct debug_buffer {
334 ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
335 struct usb_bus *bus;
336 struct mutex mutex; /* protect filling of buffer */
337 size_t count; /* number of characters filled into buffer */
338 char *output_buf;
339 size_t alloc_size;
340};
341
342#define speed_char(info1) ({ char tmp; \
343 switch (info1 & (3 << 12)) { \
344 case QH_FULL_SPEED: tmp = 'f'; break; \
345 case QH_LOW_SPEED: tmp = 'l'; break; \
346 case QH_HIGH_SPEED: tmp = 'h'; break; \
347 default: tmp = '?'; break; \
348 } tmp; })
349
350static inline char token_mark(struct fusbh200_hcd *fusbh200, __hc32 token)
351{
352 __u32 v = hc32_to_cpu(fusbh200, token);
353
354 if (v & QTD_STS_ACTIVE)
355 return '*';
356 if (v & QTD_STS_HALT)
357 return '-';
358 if (!IS_SHORT_READ (v))
359 return ' ';
360 /* tries to advance through hw_alt_next */
361 return '/';
362}
363
364static void qh_lines (
365 struct fusbh200_hcd *fusbh200,
366 struct fusbh200_qh *qh,
367 char **nextp,
368 unsigned *sizep
369)
370{
371 u32 scratch;
372 u32 hw_curr;
373 struct fusbh200_qtd *td;
374 unsigned temp;
375 unsigned size = *sizep;
376 char *next = *nextp;
377 char mark;
378 __le32 list_end = FUSBH200_LIST_END(fusbh200);
379 struct fusbh200_qh_hw *hw = qh->hw;
380
381 if (hw->hw_qtd_next == list_end) /* NEC does this */
382 mark = '@';
383 else
384 mark = token_mark(fusbh200, hw->hw_token);
385 if (mark == '/') { /* qh_alt_next controls qh advance? */
386 if ((hw->hw_alt_next & QTD_MASK(fusbh200))
387 == fusbh200->async->hw->hw_alt_next)
388 mark = '#'; /* blocked */
389 else if (hw->hw_alt_next == list_end)
390 mark = '.'; /* use hw_qtd_next */
391 /* else alt_next points to some other qtd */
392 }
393 scratch = hc32_to_cpup(fusbh200, &hw->hw_info1);
394 hw_curr = (mark == '*') ? hc32_to_cpup(fusbh200, &hw->hw_current) : 0;
395 temp = scnprintf (next, size,
396 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
397 qh, scratch & 0x007f,
398 speed_char (scratch),
399 (scratch >> 8) & 0x000f,
400 scratch, hc32_to_cpup(fusbh200, &hw->hw_info2),
401 hc32_to_cpup(fusbh200, &hw->hw_token), mark,
402 (cpu_to_hc32(fusbh200, QTD_TOGGLE) & hw->hw_token)
403 ? "data1" : "data0",
404 (hc32_to_cpup(fusbh200, &hw->hw_alt_next) >> 1) & 0x0f);
405 size -= temp;
406 next += temp;
407
408 /* hc may be modifying the list as we read it ... */
409 list_for_each_entry(td, &qh->qtd_list, qtd_list) {
410 scratch = hc32_to_cpup(fusbh200, &td->hw_token);
411 mark = ' ';
412 if (hw_curr == td->qtd_dma)
413 mark = '*';
414 else if (hw->hw_qtd_next == cpu_to_hc32(fusbh200, td->qtd_dma))
415 mark = '+';
416 else if (QTD_LENGTH (scratch)) {
417 if (td->hw_alt_next == fusbh200->async->hw->hw_alt_next)
418 mark = '#';
419 else if (td->hw_alt_next != list_end)
420 mark = '/';
421 }
422 temp = snprintf (next, size,
423 "\n\t%p%c%s len=%d %08x urb %p",
424 td, mark, ({ char *tmp;
425 switch ((scratch>>8)&0x03) {
426 case 0: tmp = "out"; break;
427 case 1: tmp = "in"; break;
428 case 2: tmp = "setup"; break;
429 default: tmp = "?"; break;
430 } tmp;}),
431 (scratch >> 16) & 0x7fff,
432 scratch,
433 td->urb);
434 if (size < temp)
435 temp = size;
436 size -= temp;
437 next += temp;
438 if (temp == size)
439 goto done;
440 }
441
442 temp = snprintf (next, size, "\n");
443 if (size < temp)
444 temp = size;
445 size -= temp;
446 next += temp;
447
448done:
449 *sizep = size;
450 *nextp = next;
451}
452
453static ssize_t fill_async_buffer(struct debug_buffer *buf)
454{
455 struct usb_hcd *hcd;
456 struct fusbh200_hcd *fusbh200;
457 unsigned long flags;
458 unsigned temp, size;
459 char *next;
460 struct fusbh200_qh *qh;
461
462 hcd = bus_to_hcd(buf->bus);
463 fusbh200 = hcd_to_fusbh200 (hcd);
464 next = buf->output_buf;
465 size = buf->alloc_size;
466
467 *next = 0;
468
469 /* dumps a snapshot of the async schedule.
470 * usually empty except for long-term bulk reads, or head.
471 * one QH per line, and TDs we know about
472 */
473 spin_lock_irqsave (&fusbh200->lock, flags);
474 for (qh = fusbh200->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
475 qh_lines (fusbh200, qh, &next, &size);
476 if (fusbh200->async_unlink && size > 0) {
477 temp = scnprintf(next, size, "\nunlink =\n");
478 size -= temp;
479 next += temp;
480
481 for (qh = fusbh200->async_unlink; size > 0 && qh;
482 qh = qh->unlink_next)
483 qh_lines (fusbh200, qh, &next, &size);
484 }
485 spin_unlock_irqrestore (&fusbh200->lock, flags);
486
487 return strlen(buf->output_buf);
488}
489
490#define DBG_SCHED_LIMIT 64
491static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
492{
493 struct usb_hcd *hcd;
494 struct fusbh200_hcd *fusbh200;
495 unsigned long flags;
496 union fusbh200_shadow p, *seen;
497 unsigned temp, size, seen_count;
498 char *next;
499 unsigned i;
500 __hc32 tag;
501
502 if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC)))
503 return 0;
504 seen_count = 0;
505
506 hcd = bus_to_hcd(buf->bus);
507 fusbh200 = hcd_to_fusbh200 (hcd);
508 next = buf->output_buf;
509 size = buf->alloc_size;
510
511 temp = scnprintf (next, size, "size = %d\n", fusbh200->periodic_size);
512 size -= temp;
513 next += temp;
514
515 /* dump a snapshot of the periodic schedule.
516 * iso changes, interrupt usually doesn't.
517 */
518 spin_lock_irqsave (&fusbh200->lock, flags);
519 for (i = 0; i < fusbh200->periodic_size; i++) {
520 p = fusbh200->pshadow [i];
521 if (likely (!p.ptr))
522 continue;
523 tag = Q_NEXT_TYPE(fusbh200, fusbh200->periodic [i]);
524
525 temp = scnprintf (next, size, "%4d: ", i);
526 size -= temp;
527 next += temp;
528
529 do {
530 struct fusbh200_qh_hw *hw;
531
532 switch (hc32_to_cpu(fusbh200, tag)) {
533 case Q_TYPE_QH:
534 hw = p.qh->hw;
535 temp = scnprintf (next, size, " qh%d-%04x/%p",
536 p.qh->period,
537 hc32_to_cpup(fusbh200,
538 &hw->hw_info2)
539 /* uframe masks */
540 & (QH_CMASK | QH_SMASK),
541 p.qh);
542 size -= temp;
543 next += temp;
544 /* don't repeat what follows this qh */
545 for (temp = 0; temp < seen_count; temp++) {
546 if (seen [temp].ptr != p.ptr)
547 continue;
548 if (p.qh->qh_next.ptr) {
549 temp = scnprintf (next, size,
550 " ...");
551 size -= temp;
552 next += temp;
553 }
554 break;
555 }
556 /* show more info the first time around */
557 if (temp == seen_count) {
558 u32 scratch = hc32_to_cpup(fusbh200,
559 &hw->hw_info1);
560 struct fusbh200_qtd *qtd;
561 char *type = "";
562
563 /* count tds, get ep direction */
564 temp = 0;
565 list_for_each_entry (qtd,
566 &p.qh->qtd_list,
567 qtd_list) {
568 temp++;
569 switch (0x03 & (hc32_to_cpu(
570 fusbh200,
571 qtd->hw_token) >> 8)) {
572 case 0: type = "out"; continue;
573 case 1: type = "in"; continue;
574 }
575 }
576
577 temp = scnprintf (next, size,
578 " (%c%d ep%d%s "
579 "[%d/%d] q%d p%d)",
580 speed_char (scratch),
581 scratch & 0x007f,
582 (scratch >> 8) & 0x000f, type,
583 p.qh->usecs, p.qh->c_usecs,
584 temp,
585 0x7ff & (scratch >> 16));
586
587 if (seen_count < DBG_SCHED_LIMIT)
588 seen [seen_count++].qh = p.qh;
589 } else
590 temp = 0;
591 tag = Q_NEXT_TYPE(fusbh200, hw->hw_next);
592 p = p.qh->qh_next;
593 break;
594 case Q_TYPE_FSTN:
595 temp = scnprintf (next, size,
596 " fstn-%8x/%p", p.fstn->hw_prev,
597 p.fstn);
598 tag = Q_NEXT_TYPE(fusbh200, p.fstn->hw_next);
599 p = p.fstn->fstn_next;
600 break;
601 case Q_TYPE_ITD:
602 temp = scnprintf (next, size,
603 " itd/%p", p.itd);
604 tag = Q_NEXT_TYPE(fusbh200, p.itd->hw_next);
605 p = p.itd->itd_next;
606 break;
607 }
608 size -= temp;
609 next += temp;
610 } while (p.ptr);
611
612 temp = scnprintf (next, size, "\n");
613 size -= temp;
614 next += temp;
615 }
616 spin_unlock_irqrestore (&fusbh200->lock, flags);
617 kfree (seen);
618
619 return buf->alloc_size - size;
620}
621#undef DBG_SCHED_LIMIT
622
623static const char *rh_state_string(struct fusbh200_hcd *fusbh200)
624{
625 switch (fusbh200->rh_state) {
626 case FUSBH200_RH_HALTED:
627 return "halted";
628 case FUSBH200_RH_SUSPENDED:
629 return "suspended";
630 case FUSBH200_RH_RUNNING:
631 return "running";
632 case FUSBH200_RH_STOPPING:
633 return "stopping";
634 }
635 return "?";
636}
637
638static ssize_t fill_registers_buffer(struct debug_buffer *buf)
639{
640 struct usb_hcd *hcd;
641 struct fusbh200_hcd *fusbh200;
642 unsigned long flags;
643 unsigned temp, size, i;
644 char *next, scratch [80];
645 static char fmt [] = "%*s\n";
646 static char label [] = "";
647
648 hcd = bus_to_hcd(buf->bus);
649 fusbh200 = hcd_to_fusbh200 (hcd);
650 next = buf->output_buf;
651 size = buf->alloc_size;
652
653 spin_lock_irqsave (&fusbh200->lock, flags);
654
655 if (!HCD_HW_ACCESSIBLE(hcd)) {
656 size = scnprintf (next, size,
657 "bus %s, device %s\n"
658 "%s\n"
659 "SUSPENDED (no register access)\n",
660 hcd->self.controller->bus->name,
661 dev_name(hcd->self.controller),
662 hcd->product_desc);
663 goto done;
664 }
665
666 /* Capability Registers */
667 i = HC_VERSION(fusbh200, fusbh200_readl(fusbh200, &fusbh200->caps->hc_capbase));
668 temp = scnprintf (next, size,
669 "bus %s, device %s\n"
670 "%s\n"
671 "EHCI %x.%02x, rh state %s\n",
672 hcd->self.controller->bus->name,
673 dev_name(hcd->self.controller),
674 hcd->product_desc,
675 i >> 8, i & 0x0ff, rh_state_string(fusbh200));
676 size -= temp;
677 next += temp;
678
679 // FIXME interpret both types of params
680 i = fusbh200_readl(fusbh200, &fusbh200->caps->hcs_params);
681 temp = scnprintf (next, size, "structural params 0x%08x\n", i);
682 size -= temp;
683 next += temp;
684
685 i = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
686 temp = scnprintf (next, size, "capability params 0x%08x\n", i);
687 size -= temp;
688 next += temp;
689
690 /* Operational Registers */
691 temp = dbg_status_buf (scratch, sizeof scratch, label,
692 fusbh200_readl(fusbh200, &fusbh200->regs->status));
693 temp = scnprintf (next, size, fmt, temp, scratch);
694 size -= temp;
695 next += temp;
696
697 temp = dbg_command_buf (scratch, sizeof scratch, label,
698 fusbh200_readl(fusbh200, &fusbh200->regs->command));
699 temp = scnprintf (next, size, fmt, temp, scratch);
700 size -= temp;
701 next += temp;
702
703 temp = dbg_intr_buf (scratch, sizeof scratch, label,
704 fusbh200_readl(fusbh200, &fusbh200->regs->intr_enable));
705 temp = scnprintf (next, size, fmt, temp, scratch);
706 size -= temp;
707 next += temp;
708
709 temp = scnprintf (next, size, "uframe %04x\n",
710 fusbh200_read_frame_index(fusbh200));
711 size -= temp;
712 next += temp;
713
714 if (fusbh200->async_unlink) {
715 temp = scnprintf(next, size, "async unlink qh %p\n",
716 fusbh200->async_unlink);
717 size -= temp;
718 next += temp;
719 }
720
721 temp = scnprintf (next, size,
722 "irq normal %ld err %ld iaa %ld (lost %ld)\n",
723 fusbh200->stats.normal, fusbh200->stats.error, fusbh200->stats.iaa,
724 fusbh200->stats.lost_iaa);
725 size -= temp;
726 next += temp;
727
728 temp = scnprintf (next, size, "complete %ld unlink %ld\n",
729 fusbh200->stats.complete, fusbh200->stats.unlink);
730 size -= temp;
731 next += temp;
732
733done:
734 spin_unlock_irqrestore (&fusbh200->lock, flags);
735
736 return buf->alloc_size - size;
737}
738
739static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
740 ssize_t (*fill_func)(struct debug_buffer *))
741{
742 struct debug_buffer *buf;
743
744 buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
745
746 if (buf) {
747 buf->bus = bus;
748 buf->fill_func = fill_func;
749 mutex_init(&buf->mutex);
750 buf->alloc_size = PAGE_SIZE;
751 }
752
753 return buf;
754}
755
756static int fill_buffer(struct debug_buffer *buf)
757{
758 int ret = 0;
759
760 if (!buf->output_buf)
761 buf->output_buf = vmalloc(buf->alloc_size);
762
763 if (!buf->output_buf) {
764 ret = -ENOMEM;
765 goto out;
766 }
767
768 ret = buf->fill_func(buf);
769
770 if (ret >= 0) {
771 buf->count = ret;
772 ret = 0;
773 }
774
775out:
776 return ret;
777}
778
779static ssize_t debug_output(struct file *file, char __user *user_buf,
780 size_t len, loff_t *offset)
781{
782 struct debug_buffer *buf = file->private_data;
783 int ret = 0;
784
785 mutex_lock(&buf->mutex);
786 if (buf->count == 0) {
787 ret = fill_buffer(buf);
788 if (ret != 0) {
789 mutex_unlock(&buf->mutex);
790 goto out;
791 }
792 }
793 mutex_unlock(&buf->mutex);
794
795 ret = simple_read_from_buffer(user_buf, len, offset,
796 buf->output_buf, buf->count);
797
798out:
799 return ret;
800
801}
802
803static int debug_close(struct inode *inode, struct file *file)
804{
805 struct debug_buffer *buf = file->private_data;
806
807 if (buf) {
808 vfree(buf->output_buf);
809 kfree(buf);
810 }
811
812 return 0;
813}
814static int debug_async_open(struct inode *inode, struct file *file)
815{
816 file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
817
818 return file->private_data ? 0 : -ENOMEM;
819}
820
821static int debug_periodic_open(struct inode *inode, struct file *file)
822{
823 struct debug_buffer *buf;
824 buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
825 if (!buf)
826 return -ENOMEM;
827
828 buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8)*PAGE_SIZE;
829 file->private_data = buf;
830 return 0;
831}
832
833static int debug_registers_open(struct inode *inode, struct file *file)
834{
835 file->private_data = alloc_buffer(inode->i_private,
836 fill_registers_buffer);
837
838 return file->private_data ? 0 : -ENOMEM;
839}
840
841static inline void create_debug_files (struct fusbh200_hcd *fusbh200)
842{
843 struct usb_bus *bus = &fusbh200_to_hcd(fusbh200)->self;
844
845 fusbh200->debug_dir = debugfs_create_dir(bus->bus_name, fusbh200_debug_root);
846 if (!fusbh200->debug_dir)
847 return;
848
849 if (!debugfs_create_file("async", S_IRUGO, fusbh200->debug_dir, bus,
850 &debug_async_fops))
851 goto file_error;
852
853 if (!debugfs_create_file("periodic", S_IRUGO, fusbh200->debug_dir, bus,
854 &debug_periodic_fops))
855 goto file_error;
856
857 if (!debugfs_create_file("registers", S_IRUGO, fusbh200->debug_dir, bus,
858 &debug_registers_fops))
859 goto file_error;
860
861 return;
862
863file_error:
864 debugfs_remove_recursive(fusbh200->debug_dir);
865}
866
867static inline void remove_debug_files (struct fusbh200_hcd *fusbh200)
868{
869 debugfs_remove_recursive(fusbh200->debug_dir);
870}
871
872/*-------------------------------------------------------------------------*/
873
874/*
875 * handshake - spin reading hc until handshake completes or fails
876 * @ptr: address of hc register to be read
877 * @mask: bits to look at in result of read
878 * @done: value of those bits when handshake succeeds
879 * @usec: timeout in microseconds
880 *
881 * Returns negative errno, or zero on success
882 *
883 * Success happens when the "mask" bits have the specified value (hardware
884 * handshake done). There are two failure modes: "usec" have passed (major
885 * hardware flakeout), or the register reads as all-ones (hardware removed).
886 *
887 * That last failure should_only happen in cases like physical cardbus eject
888 * before driver shutdown. But it also seems to be caused by bugs in cardbus
889 * bridge shutdown: shutting down the bridge before the devices using it.
890 */
891static int handshake (struct fusbh200_hcd *fusbh200, void __iomem *ptr,
892 u32 mask, u32 done, int usec)
893{
894 u32 result;
895
896 do {
897 result = fusbh200_readl(fusbh200, ptr);
898 if (result == ~(u32)0) /* card removed */
899 return -ENODEV;
900 result &= mask;
901 if (result == done)
902 return 0;
903 udelay (1);
904 usec--;
905 } while (usec > 0);
906 return -ETIMEDOUT;
907}
908
909/*
910 * Force HC to halt state from unknown (EHCI spec section 2.3).
911 * Must be called with interrupts enabled and the lock not held.
912 */
913static int fusbh200_halt (struct fusbh200_hcd *fusbh200)
914{
915 u32 temp;
916
917 spin_lock_irq(&fusbh200->lock);
918
919 /* disable any irqs left enabled by previous code */
920 fusbh200_writel(fusbh200, 0, &fusbh200->regs->intr_enable);
921
922 /*
923 * This routine gets called during probe before fusbh200->command
924 * has been initialized, so we can't rely on its value.
925 */
926 fusbh200->command &= ~CMD_RUN;
927 temp = fusbh200_readl(fusbh200, &fusbh200->regs->command);
928 temp &= ~(CMD_RUN | CMD_IAAD);
929 fusbh200_writel(fusbh200, temp, &fusbh200->regs->command);
930
931 spin_unlock_irq(&fusbh200->lock);
932 synchronize_irq(fusbh200_to_hcd(fusbh200)->irq);
933
934 return handshake(fusbh200, &fusbh200->regs->status,
935 STS_HALT, STS_HALT, 16 * 125);
936}
937
938/*
939 * Reset a non-running (STS_HALT == 1) controller.
940 * Must be called with interrupts enabled and the lock not held.
941 */
942static int fusbh200_reset (struct fusbh200_hcd *fusbh200)
943{
944 int retval;
945 u32 command = fusbh200_readl(fusbh200, &fusbh200->regs->command);
946
947 /* If the EHCI debug controller is active, special care must be
948 * taken before and after a host controller reset */
949 if (fusbh200->debug && !dbgp_reset_prep(fusbh200_to_hcd(fusbh200)))
950 fusbh200->debug = NULL;
951
952 command |= CMD_RESET;
953 dbg_cmd (fusbh200, "reset", command);
954 fusbh200_writel(fusbh200, command, &fusbh200->regs->command);
955 fusbh200->rh_state = FUSBH200_RH_HALTED;
956 fusbh200->next_statechange = jiffies;
957 retval = handshake (fusbh200, &fusbh200->regs->command,
958 CMD_RESET, 0, 250 * 1000);
959
960 if (retval)
961 return retval;
962
963 if (fusbh200->debug)
964 dbgp_external_startup(fusbh200_to_hcd(fusbh200));
965
966 fusbh200->port_c_suspend = fusbh200->suspended_ports =
967 fusbh200->resuming_ports = 0;
968 return retval;
969}
970
971/*
972 * Idle the controller (turn off the schedules).
973 * Must be called with interrupts enabled and the lock not held.
974 */
975static void fusbh200_quiesce (struct fusbh200_hcd *fusbh200)
976{
977 u32 temp;
978
979 if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
980 return;
981
982 /* wait for any schedule enables/disables to take effect */
983 temp = (fusbh200->command << 10) & (STS_ASS | STS_PSS);
984 handshake(fusbh200, &fusbh200->regs->status, STS_ASS | STS_PSS, temp, 16 * 125);
985
986 /* then disable anything that's still active */
987 spin_lock_irq(&fusbh200->lock);
988 fusbh200->command &= ~(CMD_ASE | CMD_PSE);
989 fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
990 spin_unlock_irq(&fusbh200->lock);
991
992 /* hardware can take 16 microframes to turn off ... */
993 handshake(fusbh200, &fusbh200->regs->status, STS_ASS | STS_PSS, 0, 16 * 125);
994}
995
996/*-------------------------------------------------------------------------*/
997
998static void end_unlink_async(struct fusbh200_hcd *fusbh200);
999static void unlink_empty_async(struct fusbh200_hcd *fusbh200);
1000static void fusbh200_work(struct fusbh200_hcd *fusbh200);
1001static void start_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
1002static void end_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
1003
1004/*-------------------------------------------------------------------------*/
1005
1006/* Set a bit in the USBCMD register */
1007static void fusbh200_set_command_bit(struct fusbh200_hcd *fusbh200, u32 bit)
1008{
1009 fusbh200->command |= bit;
1010 fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
1011
1012 /* unblock posted write */
1013 fusbh200_readl(fusbh200, &fusbh200->regs->command);
1014}
1015
1016/* Clear a bit in the USBCMD register */
1017static void fusbh200_clear_command_bit(struct fusbh200_hcd *fusbh200, u32 bit)
1018{
1019 fusbh200->command &= ~bit;
1020 fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
1021
1022 /* unblock posted write */
1023 fusbh200_readl(fusbh200, &fusbh200->regs->command);
1024}
1025
1026/*-------------------------------------------------------------------------*/
1027
1028/*
1029 * EHCI timer support... Now using hrtimers.
1030 *
1031 * Lots of different events are triggered from fusbh200->hrtimer. Whenever
1032 * the timer routine runs, it checks each possible event; events that are
1033 * currently enabled and whose expiration time has passed get handled.
1034 * The set of enabled events is stored as a collection of bitflags in
1035 * fusbh200->enabled_hrtimer_events, and they are numbered in order of
1036 * increasing delay values (ranging between 1 ms and 100 ms).
1037 *
1038 * Rather than implementing a sorted list or tree of all pending events,
1039 * we keep track only of the lowest-numbered pending event, in
1040 * fusbh200->next_hrtimer_event. Whenever fusbh200->hrtimer gets restarted, its
1041 * expiration time is set to the timeout value for this event.
1042 *
1043 * As a result, events might not get handled right away; the actual delay
1044 * could be anywhere up to twice the requested delay. This doesn't
1045 * matter, because none of the events are especially time-critical. The
1046 * ones that matter most all have a delay of 1 ms, so they will be
1047 * handled after 2 ms at most, which is okay. In addition to this, we
1048 * allow for an expiration range of 1 ms.
1049 */
1050
1051/*
1052 * Delay lengths for the hrtimer event types.
1053 * Keep this list sorted by delay length, in the same order as
1054 * the event types indexed by enum fusbh200_hrtimer_event in fusbh200.h.
1055 */
1056static unsigned event_delays_ns[] = {
1057 1 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_POLL_ASS */
1058 1 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_POLL_PSS */
1059 1 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_POLL_DEAD */
1060 1125 * NSEC_PER_USEC, /* FUSBH200_HRTIMER_UNLINK_INTR */
1061 2 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_FREE_ITDS */
1062 6 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_ASYNC_UNLINKS */
1063 10 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_IAA_WATCHDOG */
1064 10 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_DISABLE_PERIODIC */
1065 15 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_DISABLE_ASYNC */
1066 100 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_IO_WATCHDOG */
1067};
1068
1069/* Enable a pending hrtimer event */
1070static void fusbh200_enable_event(struct fusbh200_hcd *fusbh200, unsigned event,
1071 bool resched)
1072{
1073 ktime_t *timeout = &fusbh200->hr_timeouts[event];
1074
1075 if (resched)
1076 *timeout = ktime_add(ktime_get(),
1077 ktime_set(0, event_delays_ns[event]));
1078 fusbh200->enabled_hrtimer_events |= (1 << event);
1079
1080 /* Track only the lowest-numbered pending event */
1081 if (event < fusbh200->next_hrtimer_event) {
1082 fusbh200->next_hrtimer_event = event;
1083 hrtimer_start_range_ns(&fusbh200->hrtimer, *timeout,
1084 NSEC_PER_MSEC, HRTIMER_MODE_ABS);
1085 }
1086}
1087
1088
1089/* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
1090static void fusbh200_poll_ASS(struct fusbh200_hcd *fusbh200)
1091{
1092 unsigned actual, want;
1093
1094 /* Don't enable anything if the controller isn't running (e.g., died) */
1095 if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
1096 return;
1097
1098 want = (fusbh200->command & CMD_ASE) ? STS_ASS : 0;
1099 actual = fusbh200_readl(fusbh200, &fusbh200->regs->status) & STS_ASS;
1100
1101 if (want != actual) {
1102
1103 /* Poll again later, but give up after about 20 ms */
1104 if (fusbh200->ASS_poll_count++ < 20) {
1105 fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_POLL_ASS, true);
1106 return;
1107 }
1108 fusbh200_dbg(fusbh200, "Waited too long for the async schedule status (%x/%x), giving up\n",
1109 want, actual);
1110 }
1111 fusbh200->ASS_poll_count = 0;
1112
1113 /* The status is up-to-date; restart or stop the schedule as needed */
1114 if (want == 0) { /* Stopped */
1115 if (fusbh200->async_count > 0)
1116 fusbh200_set_command_bit(fusbh200, CMD_ASE);
1117
1118 } else { /* Running */
1119 if (fusbh200->async_count == 0) {
1120
1121 /* Turn off the schedule after a while */
1122 fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_DISABLE_ASYNC,
1123 true);
1124 }
1125 }
1126}
1127
1128/* Turn off the async schedule after a brief delay */
1129static void fusbh200_disable_ASE(struct fusbh200_hcd *fusbh200)
1130{
1131 fusbh200_clear_command_bit(fusbh200, CMD_ASE);
1132}
1133
1134
1135/* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
1136static void fusbh200_poll_PSS(struct fusbh200_hcd *fusbh200)
1137{
1138 unsigned actual, want;
1139
1140 /* Don't do anything if the controller isn't running (e.g., died) */
1141 if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
1142 return;
1143
1144 want = (fusbh200->command & CMD_PSE) ? STS_PSS : 0;
1145 actual = fusbh200_readl(fusbh200, &fusbh200->regs->status) & STS_PSS;
1146
1147 if (want != actual) {
1148
1149 /* Poll again later, but give up after about 20 ms */
1150 if (fusbh200->PSS_poll_count++ < 20) {
1151 fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_POLL_PSS, true);
1152 return;
1153 }
1154 fusbh200_dbg(fusbh200, "Waited too long for the periodic schedule status (%x/%x), giving up\n",
1155 want, actual);
1156 }
1157 fusbh200->PSS_poll_count = 0;
1158
1159 /* The status is up-to-date; restart or stop the schedule as needed */
1160 if (want == 0) { /* Stopped */
1161 if (fusbh200->periodic_count > 0)
1162 fusbh200_set_command_bit(fusbh200, CMD_PSE);
1163
1164 } else { /* Running */
1165 if (fusbh200->periodic_count == 0) {
1166
1167 /* Turn off the schedule after a while */
1168 fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_DISABLE_PERIODIC,
1169 true);
1170 }
1171 }
1172}
1173
1174/* Turn off the periodic schedule after a brief delay */
1175static void fusbh200_disable_PSE(struct fusbh200_hcd *fusbh200)
1176{
1177 fusbh200_clear_command_bit(fusbh200, CMD_PSE);
1178}
1179
1180
1181/* Poll the STS_HALT status bit; see when a dead controller stops */
1182static void fusbh200_handle_controller_death(struct fusbh200_hcd *fusbh200)
1183{
1184 if (!(fusbh200_readl(fusbh200, &fusbh200->regs->status) & STS_HALT)) {
1185
1186 /* Give up after a few milliseconds */
1187 if (fusbh200->died_poll_count++ < 5) {
1188 /* Try again later */
1189 fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_POLL_DEAD, true);
1190 return;
1191 }
1192 fusbh200_warn(fusbh200, "Waited too long for the controller to stop, giving up\n");
1193 }
1194
1195 /* Clean up the mess */
1196 fusbh200->rh_state = FUSBH200_RH_HALTED;
1197 fusbh200_writel(fusbh200, 0, &fusbh200->regs->intr_enable);
1198 fusbh200_work(fusbh200);
1199 end_unlink_async(fusbh200);
1200
1201 /* Not in process context, so don't try to reset the controller */
1202}
1203
1204
1205/* Handle unlinked interrupt QHs once they are gone from the hardware */
1206static void fusbh200_handle_intr_unlinks(struct fusbh200_hcd *fusbh200)
1207{
1208 bool stopped = (fusbh200->rh_state < FUSBH200_RH_RUNNING);
1209
1210 /*
1211 * Process all the QHs on the intr_unlink list that were added
1212 * before the current unlink cycle began. The list is in
1213 * temporal order, so stop when we reach the first entry in the
1214 * current cycle. But if the root hub isn't running then
1215 * process all the QHs on the list.
1216 */
1217 fusbh200->intr_unlinking = true;
1218 while (fusbh200->intr_unlink) {
1219 struct fusbh200_qh *qh = fusbh200->intr_unlink;
1220
1221 if (!stopped && qh->unlink_cycle == fusbh200->intr_unlink_cycle)
1222 break;
1223 fusbh200->intr_unlink = qh->unlink_next;
1224 qh->unlink_next = NULL;
1225 end_unlink_intr(fusbh200, qh);
1226 }
1227
1228 /* Handle remaining entries later */
1229 if (fusbh200->intr_unlink) {
1230 fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_UNLINK_INTR, true);
1231 ++fusbh200->intr_unlink_cycle;
1232 }
1233 fusbh200->intr_unlinking = false;
1234}
1235
1236
1237/* Start another free-iTDs/siTDs cycle */
1238static void start_free_itds(struct fusbh200_hcd *fusbh200)
1239{
1240 if (!(fusbh200->enabled_hrtimer_events & BIT(FUSBH200_HRTIMER_FREE_ITDS))) {
1241 fusbh200->last_itd_to_free = list_entry(
1242 fusbh200->cached_itd_list.prev,
1243 struct fusbh200_itd, itd_list);
1244 fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_FREE_ITDS, true);
1245 }
1246}
1247
1248/* Wait for controller to stop using old iTDs and siTDs */
1249static void end_free_itds(struct fusbh200_hcd *fusbh200)
1250{
1251 struct fusbh200_itd *itd, *n;
1252
1253 if (fusbh200->rh_state < FUSBH200_RH_RUNNING) {
1254 fusbh200->last_itd_to_free = NULL;
1255 }
1256
1257 list_for_each_entry_safe(itd, n, &fusbh200->cached_itd_list, itd_list) {
1258 list_del(&itd->itd_list);
1259 dma_pool_free(fusbh200->itd_pool, itd, itd->itd_dma);
1260 if (itd == fusbh200->last_itd_to_free)
1261 break;
1262 }
1263
1264 if (!list_empty(&fusbh200->cached_itd_list))
1265 start_free_itds(fusbh200);
1266}
1267
1268
1269/* Handle lost (or very late) IAA interrupts */
1270static void fusbh200_iaa_watchdog(struct fusbh200_hcd *fusbh200)
1271{
1272 if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
1273 return;
1274
1275 /*
1276 * Lost IAA irqs wedge things badly; seen first with a vt8235.
1277 * So we need this watchdog, but must protect it against both
1278 * (a) SMP races against real IAA firing and retriggering, and
1279 * (b) clean HC shutdown, when IAA watchdog was pending.
1280 */
1281 if (fusbh200->async_iaa) {
1282 u32 cmd, status;
1283
1284 /* If we get here, IAA is *REALLY* late. It's barely
1285 * conceivable that the system is so busy that CMD_IAAD
1286 * is still legitimately set, so let's be sure it's
1287 * clear before we read STS_IAA. (The HC should clear
1288 * CMD_IAAD when it sets STS_IAA.)
1289 */
1290 cmd = fusbh200_readl(fusbh200, &fusbh200->regs->command);
1291
1292 /*
1293 * If IAA is set here it either legitimately triggered
1294 * after the watchdog timer expired (_way_ late, so we'll
1295 * still count it as lost) ... or a silicon erratum:
1296 * - VIA seems to set IAA without triggering the IRQ;
1297 * - IAAD potentially cleared without setting IAA.
1298 */
1299 status = fusbh200_readl(fusbh200, &fusbh200->regs->status);
1300 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
1301 COUNT(fusbh200->stats.lost_iaa);
1302 fusbh200_writel(fusbh200, STS_IAA, &fusbh200->regs->status);
1303 }
1304
1305 fusbh200_dbg(fusbh200, "IAA watchdog: status %x cmd %x\n",
1306 status, cmd);
1307 end_unlink_async(fusbh200);
1308 }
1309}
1310
1311
1312/* Enable the I/O watchdog, if appropriate */
1313static void turn_on_io_watchdog(struct fusbh200_hcd *fusbh200)
1314{
1315 /* Not needed if the controller isn't running or it's already enabled */
1316 if (fusbh200->rh_state != FUSBH200_RH_RUNNING ||
1317 (fusbh200->enabled_hrtimer_events &
1318 BIT(FUSBH200_HRTIMER_IO_WATCHDOG)))
1319 return;
1320
1321 /*
1322 * Isochronous transfers always need the watchdog.
1323 * For other sorts we use it only if the flag is set.
1324 */
1325 if (fusbh200->isoc_count > 0 || (fusbh200->need_io_watchdog &&
1326 fusbh200->async_count + fusbh200->intr_count > 0))
1327 fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_IO_WATCHDOG, true);
1328}
1329
1330
1331/*
1332 * Handler functions for the hrtimer event types.
1333 * Keep this array in the same order as the event types indexed by
1334 * enum fusbh200_hrtimer_event in fusbh200.h.
1335 */
1336static void (*event_handlers[])(struct fusbh200_hcd *) = {
1337 fusbh200_poll_ASS, /* FUSBH200_HRTIMER_POLL_ASS */
1338 fusbh200_poll_PSS, /* FUSBH200_HRTIMER_POLL_PSS */
1339 fusbh200_handle_controller_death, /* FUSBH200_HRTIMER_POLL_DEAD */
1340 fusbh200_handle_intr_unlinks, /* FUSBH200_HRTIMER_UNLINK_INTR */
1341 end_free_itds, /* FUSBH200_HRTIMER_FREE_ITDS */
1342 unlink_empty_async, /* FUSBH200_HRTIMER_ASYNC_UNLINKS */
1343 fusbh200_iaa_watchdog, /* FUSBH200_HRTIMER_IAA_WATCHDOG */
1344 fusbh200_disable_PSE, /* FUSBH200_HRTIMER_DISABLE_PERIODIC */
1345 fusbh200_disable_ASE, /* FUSBH200_HRTIMER_DISABLE_ASYNC */
1346 fusbh200_work, /* FUSBH200_HRTIMER_IO_WATCHDOG */
1347};
1348
1349static enum hrtimer_restart fusbh200_hrtimer_func(struct hrtimer *t)
1350{
1351 struct fusbh200_hcd *fusbh200 = container_of(t, struct fusbh200_hcd, hrtimer);
1352 ktime_t now;
1353 unsigned long events;
1354 unsigned long flags;
1355 unsigned e;
1356
1357 spin_lock_irqsave(&fusbh200->lock, flags);
1358
1359 events = fusbh200->enabled_hrtimer_events;
1360 fusbh200->enabled_hrtimer_events = 0;
1361 fusbh200->next_hrtimer_event = FUSBH200_HRTIMER_NO_EVENT;
1362
1363 /*
1364 * Check each pending event. If its time has expired, handle
1365 * the event; otherwise re-enable it.
1366 */
1367 now = ktime_get();
1368 for_each_set_bit(e, &events, FUSBH200_HRTIMER_NUM_EVENTS) {
1369 if (now.tv64 >= fusbh200->hr_timeouts[e].tv64)
1370 event_handlers[e](fusbh200);
1371 else
1372 fusbh200_enable_event(fusbh200, e, false);
1373 }
1374
1375 spin_unlock_irqrestore(&fusbh200->lock, flags);
1376 return HRTIMER_NORESTART;
1377}
1378
1379/*-------------------------------------------------------------------------*/
1380
1381#define fusbh200_bus_suspend NULL
1382#define fusbh200_bus_resume NULL
1383
1384/*-------------------------------------------------------------------------*/
1385
1386static int check_reset_complete (
1387 struct fusbh200_hcd *fusbh200,
1388 int index,
1389 u32 __iomem *status_reg,
1390 int port_status
1391) {
1392 if (!(port_status & PORT_CONNECT))
1393 return port_status;
1394
1395 /* if reset finished and it's still not enabled -- handoff */
1396 if (!(port_status & PORT_PE)) {
1397 /* with integrated TT, there's nobody to hand it to! */
1398 fusbh200_dbg (fusbh200,
1399 "Failed to enable port %d on root hub TT\n",
1400 index+1);
1401 return port_status;
1402 } else {
1403 fusbh200_dbg(fusbh200, "port %d reset complete, port enabled\n",
1404 index + 1);
1405 }
1406
1407 return port_status;
1408}
1409
1410/*-------------------------------------------------------------------------*/
1411
1412
1413/* build "status change" packet (one or two bytes) from HC registers */
1414
1415static int
1416fusbh200_hub_status_data (struct usb_hcd *hcd, char *buf)
1417{
1418 struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
1419 u32 temp, status;
1420 u32 mask;
1421 int retval = 1;
1422 unsigned long flags;
1423
1424 /* init status to no-changes */
1425 buf [0] = 0;
1426
1427 /* Inform the core about resumes-in-progress by returning
1428 * a non-zero value even if there are no status changes.
1429 */
1430 status = fusbh200->resuming_ports;
1431
1432 mask = PORT_CSC | PORT_PEC;
1433 // PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND
1434
1435 /* no hub change reports (bit 0) for now (power, ...) */
1436
1437 /* port N changes (bit N)? */
1438 spin_lock_irqsave (&fusbh200->lock, flags);
1439
1440 temp = fusbh200_readl(fusbh200, &fusbh200->regs->port_status);
1441
1442 /*
1443 * Return status information even for ports with OWNER set.
1444 * Otherwise khubd wouldn't see the disconnect event when a
1445 * high-speed device is switched over to the companion
1446 * controller by the user.
1447 */
1448
1449 if ((temp & mask) != 0 || test_bit(0, &fusbh200->port_c_suspend)
1450 || (fusbh200->reset_done[0] && time_after_eq(
1451 jiffies, fusbh200->reset_done[0]))) {
1452 buf [0] |= 1 << 1;
1453 status = STS_PCD;
1454 }
1455 /* FIXME autosuspend idle root hubs */
1456 spin_unlock_irqrestore (&fusbh200->lock, flags);
1457 return status ? retval : 0;
1458}
1459
1460/*-------------------------------------------------------------------------*/
1461
1462static void
1463fusbh200_hub_descriptor (
1464 struct fusbh200_hcd *fusbh200,
1465 struct usb_hub_descriptor *desc
1466) {
1467 int ports = HCS_N_PORTS (fusbh200->hcs_params);
1468 u16 temp;
1469
1470 desc->bDescriptorType = 0x29;
1471 desc->bPwrOn2PwrGood = 10; /* fusbh200 1.0, 2.3.9 says 20ms max */
1472 desc->bHubContrCurrent = 0;
1473
1474 desc->bNbrPorts = ports;
1475 temp = 1 + (ports / 8);
1476 desc->bDescLength = 7 + 2 * temp;
1477
1478 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1479 memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
1480 memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
1481
1482 temp = 0x0008; /* per-port overcurrent reporting */
1483 temp |= 0x0002; /* no power switching */
1484 desc->wHubCharacteristics = cpu_to_le16(temp);
1485}
1486
1487/*-------------------------------------------------------------------------*/
1488
1489static int fusbh200_hub_control (
1490 struct usb_hcd *hcd,
1491 u16 typeReq,
1492 u16 wValue,
1493 u16 wIndex,
1494 char *buf,
1495 u16 wLength
1496) {
1497 struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
1498 int ports = HCS_N_PORTS (fusbh200->hcs_params);
1499 u32 __iomem *status_reg = &fusbh200->regs->port_status;
1500 u32 temp, temp1, status;
1501 unsigned long flags;
1502 int retval = 0;
1503 unsigned selector;
1504
1505 /*
1506 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1507 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1508 * (track current state ourselves) ... blink for diagnostics,
1509 * power, "this is the one", etc. EHCI spec supports this.
1510 */
1511
1512 spin_lock_irqsave (&fusbh200->lock, flags);
1513 switch (typeReq) {
1514 case ClearHubFeature:
1515 switch (wValue) {
1516 case C_HUB_LOCAL_POWER:
1517 case C_HUB_OVER_CURRENT:
1518 /* no hub-wide feature/status flags */
1519 break;
1520 default:
1521 goto error;
1522 }
1523 break;
1524 case ClearPortFeature:
1525 if (!wIndex || wIndex > ports)
1526 goto error;
1527 wIndex--;
1528 temp = fusbh200_readl(fusbh200, status_reg);
1529 temp &= ~PORT_RWC_BITS;
1530
1531 /*
1532 * Even if OWNER is set, so the port is owned by the
1533 * companion controller, khubd needs to be able to clear
1534 * the port-change status bits (especially
1535 * USB_PORT_STAT_C_CONNECTION).
1536 */
1537
1538 switch (wValue) {
1539 case USB_PORT_FEAT_ENABLE:
1540 fusbh200_writel(fusbh200, temp & ~PORT_PE, status_reg);
1541 break;
1542 case USB_PORT_FEAT_C_ENABLE:
1543 fusbh200_writel(fusbh200, temp | PORT_PEC, status_reg);
1544 break;
1545 case USB_PORT_FEAT_SUSPEND:
1546 if (temp & PORT_RESET)
1547 goto error;
1548 if (!(temp & PORT_SUSPEND))
1549 break;
1550 if ((temp & PORT_PE) == 0)
1551 goto error;
1552
1553 /* resume signaling for 20 msec */
1554 fusbh200_writel(fusbh200, temp | PORT_RESUME, status_reg);
1555 fusbh200->reset_done[wIndex] = jiffies
1556 + msecs_to_jiffies(20);
1557 break;
1558 case USB_PORT_FEAT_C_SUSPEND:
1559 clear_bit(wIndex, &fusbh200->port_c_suspend);
1560 break;
1561 case USB_PORT_FEAT_C_CONNECTION:
1562 fusbh200_writel(fusbh200, temp | PORT_CSC, status_reg);
1563 break;
1564 case USB_PORT_FEAT_C_OVER_CURRENT:
1565 fusbh200_writel(fusbh200, temp | BMISR_OVC, &fusbh200->regs->bmisr);
1566 break;
1567 case USB_PORT_FEAT_C_RESET:
1568 /* GetPortStatus clears reset */
1569 break;
1570 default:
1571 goto error;
1572 }
1573 fusbh200_readl(fusbh200, &fusbh200->regs->command); /* unblock posted write */
1574 break;
1575 case GetHubDescriptor:
1576 fusbh200_hub_descriptor (fusbh200, (struct usb_hub_descriptor *)
1577 buf);
1578 break;
1579 case GetHubStatus:
1580 /* no hub-wide feature/status flags */
1581 memset (buf, 0, 4);
1582 //cpu_to_le32s ((u32 *) buf);
1583 break;
1584 case GetPortStatus:
1585 if (!wIndex || wIndex > ports)
1586 goto error;
1587 wIndex--;
1588 status = 0;
1589 temp = fusbh200_readl(fusbh200, status_reg);
1590
1591 // wPortChange bits
1592 if (temp & PORT_CSC)
1593 status |= USB_PORT_STAT_C_CONNECTION << 16;
1594 if (temp & PORT_PEC)
1595 status |= USB_PORT_STAT_C_ENABLE << 16;
1596
1597 temp1 = fusbh200_readl(fusbh200, &fusbh200->regs->bmisr);
1598 if (temp1 & BMISR_OVC)
1599 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
1600
1601 /* whoever resumes must GetPortStatus to complete it!! */
1602 if (temp & PORT_RESUME) {
1603
1604 /* Remote Wakeup received? */
1605 if (!fusbh200->reset_done[wIndex]) {
1606 /* resume signaling for 20 msec */
1607 fusbh200->reset_done[wIndex] = jiffies
1608 + msecs_to_jiffies(20);
1609 /* check the port again */
1610 mod_timer(&fusbh200_to_hcd(fusbh200)->rh_timer,
1611 fusbh200->reset_done[wIndex]);
1612 }
1613
1614 /* resume completed? */
1615 else if (time_after_eq(jiffies,
1616 fusbh200->reset_done[wIndex])) {
1617 clear_bit(wIndex, &fusbh200->suspended_ports);
1618 set_bit(wIndex, &fusbh200->port_c_suspend);
1619 fusbh200->reset_done[wIndex] = 0;
1620
1621 /* stop resume signaling */
1622 temp = fusbh200_readl(fusbh200, status_reg);
1623 fusbh200_writel(fusbh200,
1624 temp & ~(PORT_RWC_BITS | PORT_RESUME),
1625 status_reg);
1626 clear_bit(wIndex, &fusbh200->resuming_ports);
1627 retval = handshake(fusbh200, status_reg,
1628 PORT_RESUME, 0, 2000 /* 2msec */);
1629 if (retval != 0) {
1630 fusbh200_err(fusbh200,
1631 "port %d resume error %d\n",
1632 wIndex + 1, retval);
1633 goto error;
1634 }
1635 temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
1636 }
1637 }
1638
1639 /* whoever resets must GetPortStatus to complete it!! */
1640 if ((temp & PORT_RESET)
1641 && time_after_eq(jiffies,
1642 fusbh200->reset_done[wIndex])) {
1643 status |= USB_PORT_STAT_C_RESET << 16;
1644 fusbh200->reset_done [wIndex] = 0;
1645 clear_bit(wIndex, &fusbh200->resuming_ports);
1646
1647 /* force reset to complete */
1648 fusbh200_writel(fusbh200, temp & ~(PORT_RWC_BITS | PORT_RESET),
1649 status_reg);
1650 /* REVISIT: some hardware needs 550+ usec to clear
1651 * this bit; seems too long to spin routinely...
1652 */
1653 retval = handshake(fusbh200, status_reg,
1654 PORT_RESET, 0, 1000);
1655 if (retval != 0) {
1656 fusbh200_err (fusbh200, "port %d reset error %d\n",
1657 wIndex + 1, retval);
1658 goto error;
1659 }
1660
1661 /* see what we found out */
1662 temp = check_reset_complete (fusbh200, wIndex, status_reg,
1663 fusbh200_readl(fusbh200, status_reg));
1664 }
1665
1666 if (!(temp & (PORT_RESUME|PORT_RESET))) {
1667 fusbh200->reset_done[wIndex] = 0;
1668 clear_bit(wIndex, &fusbh200->resuming_ports);
1669 }
1670
1671 /* transfer dedicated ports to the companion hc */
1672 if ((temp & PORT_CONNECT) &&
1673 test_bit(wIndex, &fusbh200->companion_ports)) {
1674 temp &= ~PORT_RWC_BITS;
1675 fusbh200_writel(fusbh200, temp, status_reg);
1676 fusbh200_dbg(fusbh200, "port %d --> companion\n", wIndex + 1);
1677 temp = fusbh200_readl(fusbh200, status_reg);
1678 }
1679
1680 /*
1681 * Even if OWNER is set, there's no harm letting khubd
1682 * see the wPortStatus values (they should all be 0 except
1683 * for PORT_POWER anyway).
1684 */
1685
1686 if (temp & PORT_CONNECT) {
1687 status |= USB_PORT_STAT_CONNECTION;
1688 status |= fusbh200_port_speed(fusbh200, temp);
1689 }
1690 if (temp & PORT_PE)
1691 status |= USB_PORT_STAT_ENABLE;
1692
1693 /* maybe the port was unsuspended without our knowledge */
1694 if (temp & (PORT_SUSPEND|PORT_RESUME)) {
1695 status |= USB_PORT_STAT_SUSPEND;
1696 } else if (test_bit(wIndex, &fusbh200->suspended_ports)) {
1697 clear_bit(wIndex, &fusbh200->suspended_ports);
1698 clear_bit(wIndex, &fusbh200->resuming_ports);
1699 fusbh200->reset_done[wIndex] = 0;
1700 if (temp & PORT_PE)
1701 set_bit(wIndex, &fusbh200->port_c_suspend);
1702 }
1703
1704 temp1 = fusbh200_readl(fusbh200, &fusbh200->regs->bmisr);
1705 if (temp1 & BMISR_OVC)
1706 status |= USB_PORT_STAT_OVERCURRENT;
1707 if (temp & PORT_RESET)
1708 status |= USB_PORT_STAT_RESET;
1709 if (test_bit(wIndex, &fusbh200->port_c_suspend))
1710 status |= USB_PORT_STAT_C_SUSPEND << 16;
1711
1712 if (status & ~0xffff) /* only if wPortChange is interesting */
1713 dbg_port(fusbh200, "GetStatus", wIndex + 1, temp);
1714 put_unaligned_le32(status, buf);
1715 break;
1716 case SetHubFeature:
1717 switch (wValue) {
1718 case C_HUB_LOCAL_POWER:
1719 case C_HUB_OVER_CURRENT:
1720 /* no hub-wide feature/status flags */
1721 break;
1722 default:
1723 goto error;
1724 }
1725 break;
1726 case SetPortFeature:
1727 selector = wIndex >> 8;
1728 wIndex &= 0xff;
1729
1730 if (!wIndex || wIndex > ports)
1731 goto error;
1732 wIndex--;
1733 temp = fusbh200_readl(fusbh200, status_reg);
1734 temp &= ~PORT_RWC_BITS;
1735 switch (wValue) {
1736 case USB_PORT_FEAT_SUSPEND:
1737 if ((temp & PORT_PE) == 0
1738 || (temp & PORT_RESET) != 0)
1739 goto error;
1740
1741 /* After above check the port must be connected.
1742 * Set appropriate bit thus could put phy into low power
1743 * mode if we have hostpc feature
1744 */
1745 fusbh200_writel(fusbh200, temp | PORT_SUSPEND, status_reg);
1746 set_bit(wIndex, &fusbh200->suspended_ports);
1747 break;
1748 case USB_PORT_FEAT_RESET:
1749 if (temp & PORT_RESUME)
1750 goto error;
1751 /* line status bits may report this as low speed,
1752 * which can be fine if this root hub has a
1753 * transaction translator built in.
1754 */
1755 fusbh200_dbg(fusbh200, "port %d reset\n", wIndex + 1);
1756 temp |= PORT_RESET;
1757 temp &= ~PORT_PE;
1758
1759 /*
1760 * caller must wait, then call GetPortStatus
1761 * usb 2.0 spec says 50 ms resets on root
1762 */
1763 fusbh200->reset_done [wIndex] = jiffies
1764 + msecs_to_jiffies (50);
1765 fusbh200_writel(fusbh200, temp, status_reg);
1766 break;
1767
1768 /* For downstream facing ports (these): one hub port is put
1769 * into test mode according to USB2 11.24.2.13, then the hub
1770 * must be reset (which for root hub now means rmmod+modprobe,
1771 * or else system reboot). See EHCI 2.3.9 and 4.14 for info
1772 * about the EHCI-specific stuff.
1773 */
1774 case USB_PORT_FEAT_TEST:
1775 if (!selector || selector > 5)
1776 goto error;
1777 spin_unlock_irqrestore(&fusbh200->lock, flags);
1778 fusbh200_quiesce(fusbh200);
1779 spin_lock_irqsave(&fusbh200->lock, flags);
1780
1781 /* Put all enabled ports into suspend */
1782 temp = fusbh200_readl(fusbh200, status_reg) & ~PORT_RWC_BITS;
1783 if (temp & PORT_PE)
1784 fusbh200_writel(fusbh200, temp | PORT_SUSPEND,
1785 status_reg);
1786
1787 spin_unlock_irqrestore(&fusbh200->lock, flags);
1788 fusbh200_halt(fusbh200);
1789 spin_lock_irqsave(&fusbh200->lock, flags);
1790
1791 temp = fusbh200_readl(fusbh200, status_reg);
1792 temp |= selector << 16;
1793 fusbh200_writel(fusbh200, temp, status_reg);
1794 break;
1795
1796 default:
1797 goto error;
1798 }
1799 fusbh200_readl(fusbh200, &fusbh200->regs->command); /* unblock posted writes */
1800 break;
1801
1802 default:
1803error:
1804 /* "stall" on error */
1805 retval = -EPIPE;
1806 }
1807 spin_unlock_irqrestore (&fusbh200->lock, flags);
1808 return retval;
1809}
1810
1811static void __maybe_unused fusbh200_relinquish_port(struct usb_hcd *hcd,
1812 int portnum)
1813{
1814 return;
1815}
1816
1817static int __maybe_unused fusbh200_port_handed_over(struct usb_hcd *hcd,
1818 int portnum)
1819{
1820 return 0;
1821}
1822/*-------------------------------------------------------------------------*/
1823/*
1824 * There's basically three types of memory:
1825 * - data used only by the HCD ... kmalloc is fine
1826 * - async and periodic schedules, shared by HC and HCD ... these
1827 * need to use dma_pool or dma_alloc_coherent
1828 * - driver buffers, read/written by HC ... single shot DMA mapped
1829 *
1830 * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
1831 * No memory seen by this driver is pageable.
1832 */
1833
1834/*-------------------------------------------------------------------------*/
1835
1836/* Allocate the key transfer structures from the previously allocated pool */
1837
1838static inline void fusbh200_qtd_init(struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd,
1839 dma_addr_t dma)
1840{
1841 memset (qtd, 0, sizeof *qtd);
1842 qtd->qtd_dma = dma;
1843 qtd->hw_token = cpu_to_hc32(fusbh200, QTD_STS_HALT);
1844 qtd->hw_next = FUSBH200_LIST_END(fusbh200);
1845 qtd->hw_alt_next = FUSBH200_LIST_END(fusbh200);
1846 INIT_LIST_HEAD (&qtd->qtd_list);
1847}
1848
1849static struct fusbh200_qtd *fusbh200_qtd_alloc (struct fusbh200_hcd *fusbh200, gfp_t flags)
1850{
1851 struct fusbh200_qtd *qtd;
1852 dma_addr_t dma;
1853
1854 qtd = dma_pool_alloc (fusbh200->qtd_pool, flags, &dma);
1855 if (qtd != NULL) {
1856 fusbh200_qtd_init(fusbh200, qtd, dma);
1857 }
1858 return qtd;
1859}
1860
1861static inline void fusbh200_qtd_free (struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd)
1862{
1863 dma_pool_free (fusbh200->qtd_pool, qtd, qtd->qtd_dma);
1864}
1865
1866
1867static void qh_destroy(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
1868{
1869 /* clean qtds first, and know this is not linked */
1870 if (!list_empty (&qh->qtd_list) || qh->qh_next.ptr) {
1871 fusbh200_dbg (fusbh200, "unused qh not empty!\n");
1872 BUG ();
1873 }
1874 if (qh->dummy)
1875 fusbh200_qtd_free (fusbh200, qh->dummy);
1876 dma_pool_free(fusbh200->qh_pool, qh->hw, qh->qh_dma);
1877 kfree(qh);
1878}
1879
1880static struct fusbh200_qh *fusbh200_qh_alloc (struct fusbh200_hcd *fusbh200, gfp_t flags)
1881{
1882 struct fusbh200_qh *qh;
1883 dma_addr_t dma;
1884
1885 qh = kzalloc(sizeof *qh, GFP_ATOMIC);
1886 if (!qh)
1887 goto done;
1888 qh->hw = (struct fusbh200_qh_hw *)
1889 dma_pool_alloc(fusbh200->qh_pool, flags, &dma);
1890 if (!qh->hw)
1891 goto fail;
1892 memset(qh->hw, 0, sizeof *qh->hw);
1893 qh->qh_dma = dma;
1894 // INIT_LIST_HEAD (&qh->qh_list);
1895 INIT_LIST_HEAD (&qh->qtd_list);
1896
1897 /* dummy td enables safe urb queuing */
1898 qh->dummy = fusbh200_qtd_alloc (fusbh200, flags);
1899 if (qh->dummy == NULL) {
1900 fusbh200_dbg (fusbh200, "no dummy td\n");
1901 goto fail1;
1902 }
1903done:
1904 return qh;
1905fail1:
1906 dma_pool_free(fusbh200->qh_pool, qh->hw, qh->qh_dma);
1907fail:
1908 kfree(qh);
1909 return NULL;
1910}
1911
1912/*-------------------------------------------------------------------------*/
1913
1914/* The queue heads and transfer descriptors are managed from pools tied
1915 * to each of the "per device" structures.
1916 * This is the initialisation and cleanup code.
1917 */
1918
1919static void fusbh200_mem_cleanup (struct fusbh200_hcd *fusbh200)
1920{
1921 if (fusbh200->async)
1922 qh_destroy(fusbh200, fusbh200->async);
1923 fusbh200->async = NULL;
1924
1925 if (fusbh200->dummy)
1926 qh_destroy(fusbh200, fusbh200->dummy);
1927 fusbh200->dummy = NULL;
1928
1929 /* DMA consistent memory and pools */
1930 if (fusbh200->qtd_pool)
1931 dma_pool_destroy (fusbh200->qtd_pool);
1932 fusbh200->qtd_pool = NULL;
1933
1934 if (fusbh200->qh_pool) {
1935 dma_pool_destroy (fusbh200->qh_pool);
1936 fusbh200->qh_pool = NULL;
1937 }
1938
1939 if (fusbh200->itd_pool)
1940 dma_pool_destroy (fusbh200->itd_pool);
1941 fusbh200->itd_pool = NULL;
1942
1943 if (fusbh200->periodic)
1944 dma_free_coherent (fusbh200_to_hcd(fusbh200)->self.controller,
1945 fusbh200->periodic_size * sizeof (u32),
1946 fusbh200->periodic, fusbh200->periodic_dma);
1947 fusbh200->periodic = NULL;
1948
1949 /* shadow periodic table */
1950 kfree(fusbh200->pshadow);
1951 fusbh200->pshadow = NULL;
1952}
1953
1954/* remember to add cleanup code (above) if you add anything here */
1955static int fusbh200_mem_init (struct fusbh200_hcd *fusbh200, gfp_t flags)
1956{
1957 int i;
1958
1959 /* QTDs for control/bulk/intr transfers */
1960 fusbh200->qtd_pool = dma_pool_create ("fusbh200_qtd",
1961 fusbh200_to_hcd(fusbh200)->self.controller,
1962 sizeof (struct fusbh200_qtd),
1963 32 /* byte alignment (for hw parts) */,
1964 4096 /* can't cross 4K */);
1965 if (!fusbh200->qtd_pool) {
1966 goto fail;
1967 }
1968
1969 /* QHs for control/bulk/intr transfers */
1970 fusbh200->qh_pool = dma_pool_create ("fusbh200_qh",
1971 fusbh200_to_hcd(fusbh200)->self.controller,
1972 sizeof(struct fusbh200_qh_hw),
1973 32 /* byte alignment (for hw parts) */,
1974 4096 /* can't cross 4K */);
1975 if (!fusbh200->qh_pool) {
1976 goto fail;
1977 }
1978 fusbh200->async = fusbh200_qh_alloc (fusbh200, flags);
1979 if (!fusbh200->async) {
1980 goto fail;
1981 }
1982
1983 /* ITD for high speed ISO transfers */
1984 fusbh200->itd_pool = dma_pool_create ("fusbh200_itd",
1985 fusbh200_to_hcd(fusbh200)->self.controller,
1986 sizeof (struct fusbh200_itd),
1987 64 /* byte alignment (for hw parts) */,
1988 4096 /* can't cross 4K */);
1989 if (!fusbh200->itd_pool) {
1990 goto fail;
1991 }
1992
1993 /* Hardware periodic table */
1994 fusbh200->periodic = (__le32 *)
1995 dma_alloc_coherent (fusbh200_to_hcd(fusbh200)->self.controller,
1996 fusbh200->periodic_size * sizeof(__le32),
1997 &fusbh200->periodic_dma, 0);
1998 if (fusbh200->periodic == NULL) {
1999 goto fail;
2000 }
2001
2002 for (i = 0; i < fusbh200->periodic_size; i++)
2003 fusbh200->periodic[i] = FUSBH200_LIST_END(fusbh200);
2004
2005 /* software shadow of hardware table */
2006 fusbh200->pshadow = kcalloc(fusbh200->periodic_size, sizeof(void *), flags);
2007 if (fusbh200->pshadow != NULL)
2008 return 0;
2009
2010fail:
2011 fusbh200_dbg (fusbh200, "couldn't init memory\n");
2012 fusbh200_mem_cleanup (fusbh200);
2013 return -ENOMEM;
2014}
2015/*-------------------------------------------------------------------------*/
2016/*
2017 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
2018 *
2019 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
2020 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
2021 * buffers needed for the larger number). We use one QH per endpoint, queue
2022 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
2023 *
2024 * ISO traffic uses "ISO TD" (itd) records, and (along with
2025 * interrupts) needs careful scheduling. Performance improvements can be
2026 * an ongoing challenge. That's in "ehci-sched.c".
2027 *
2028 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
2029 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
2030 * (b) special fields in qh entries or (c) split iso entries. TTs will
2031 * buffer low/full speed data so the host collects it at high speed.
2032 */
2033
2034/*-------------------------------------------------------------------------*/
2035
2036/* fill a qtd, returning how much of the buffer we were able to queue up */
2037
2038static int
2039qtd_fill(struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd, dma_addr_t buf,
2040 size_t len, int token, int maxpacket)
2041{
2042 int i, count;
2043 u64 addr = buf;
2044
2045 /* one buffer entry per 4K ... first might be short or unaligned */
2046 qtd->hw_buf[0] = cpu_to_hc32(fusbh200, (u32)addr);
2047 qtd->hw_buf_hi[0] = cpu_to_hc32(fusbh200, (u32)(addr >> 32));
2048 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
2049 if (likely (len < count)) /* ... iff needed */
2050 count = len;
2051 else {
2052 buf += 0x1000;
2053 buf &= ~0x0fff;
2054
2055 /* per-qtd limit: from 16K to 20K (best alignment) */
2056 for (i = 1; count < len && i < 5; i++) {
2057 addr = buf;
2058 qtd->hw_buf[i] = cpu_to_hc32(fusbh200, (u32)addr);
2059 qtd->hw_buf_hi[i] = cpu_to_hc32(fusbh200,
2060 (u32)(addr >> 32));
2061 buf += 0x1000;
2062 if ((count + 0x1000) < len)
2063 count += 0x1000;
2064 else
2065 count = len;
2066 }
2067
2068 /* short packets may only terminate transfers */
2069 if (count != len)
2070 count -= (count % maxpacket);
2071 }
2072 qtd->hw_token = cpu_to_hc32(fusbh200, (count << 16) | token);
2073 qtd->length = count;
2074
2075 return count;
2076}
2077
2078/*-------------------------------------------------------------------------*/
2079
2080static inline void
2081qh_update (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh, struct fusbh200_qtd *qtd)
2082{
2083 struct fusbh200_qh_hw *hw = qh->hw;
2084
2085 /* writes to an active overlay are unsafe */
2086 BUG_ON(qh->qh_state != QH_STATE_IDLE);
2087
2088 hw->hw_qtd_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
2089 hw->hw_alt_next = FUSBH200_LIST_END(fusbh200);
2090
2091 /* Except for control endpoints, we make hardware maintain data
2092 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
2093 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
2094 * ever clear it.
2095 */
2096 if (!(hw->hw_info1 & cpu_to_hc32(fusbh200, QH_TOGGLE_CTL))) {
2097 unsigned is_out, epnum;
2098
2099 is_out = qh->is_out;
2100 epnum = (hc32_to_cpup(fusbh200, &hw->hw_info1) >> 8) & 0x0f;
2101 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
2102 hw->hw_token &= ~cpu_to_hc32(fusbh200, QTD_TOGGLE);
2103 usb_settoggle (qh->dev, epnum, is_out, 1);
2104 }
2105 }
2106
2107 hw->hw_token &= cpu_to_hc32(fusbh200, QTD_TOGGLE | QTD_STS_PING);
2108}
2109
2110/* if it weren't for a common silicon quirk (writing the dummy into the qh
2111 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
2112 * recovery (including urb dequeue) would need software changes to a QH...
2113 */
2114static void
2115qh_refresh (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
2116{
2117 struct fusbh200_qtd *qtd;
2118
2119 if (list_empty (&qh->qtd_list))
2120 qtd = qh->dummy;
2121 else {
2122 qtd = list_entry (qh->qtd_list.next,
2123 struct fusbh200_qtd, qtd_list);
2124 /*
2125 * first qtd may already be partially processed.
2126 * If we come here during unlink, the QH overlay region
2127 * might have reference to the just unlinked qtd. The
2128 * qtd is updated in qh_completions(). Update the QH
2129 * overlay here.
2130 */
2131 if (cpu_to_hc32(fusbh200, qtd->qtd_dma) == qh->hw->hw_current) {
2132 qh->hw->hw_qtd_next = qtd->hw_next;
2133 qtd = NULL;
2134 }
2135 }
2136
2137 if (qtd)
2138 qh_update (fusbh200, qh, qtd);
2139}
2140
2141/*-------------------------------------------------------------------------*/
2142
2143static void qh_link_async(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
2144
2145static void fusbh200_clear_tt_buffer_complete(struct usb_hcd *hcd,
2146 struct usb_host_endpoint *ep)
2147{
2148 struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
2149 struct fusbh200_qh *qh = ep->hcpriv;
2150 unsigned long flags;
2151
2152 spin_lock_irqsave(&fusbh200->lock, flags);
2153 qh->clearing_tt = 0;
2154 if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
2155 && fusbh200->rh_state == FUSBH200_RH_RUNNING)
2156 qh_link_async(fusbh200, qh);
2157 spin_unlock_irqrestore(&fusbh200->lock, flags);
2158}
2159
2160static void fusbh200_clear_tt_buffer(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh,
2161 struct urb *urb, u32 token)
2162{
2163
2164 /* If an async split transaction gets an error or is unlinked,
2165 * the TT buffer may be left in an indeterminate state. We
2166 * have to clear the TT buffer.
2167 *
2168 * Note: this routine is never called for Isochronous transfers.
2169 */
2170 if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
2171 struct usb_device *tt = urb->dev->tt->hub;
2172
2173 dev_dbg(&tt->dev,
2174 "clear tt buffer port %d, a%d ep%d t%08x\n",
2175 urb->dev->ttport, urb->dev->devnum,
2176 usb_pipeendpoint(urb->pipe), token);
2177
2178 if (urb->dev->tt->hub !=
2179 fusbh200_to_hcd(fusbh200)->self.root_hub) {
2180 if (usb_hub_clear_tt_buffer(urb) == 0)
2181 qh->clearing_tt = 1;
2182 }
2183 }
2184}
2185
2186static int qtd_copy_status (
2187 struct fusbh200_hcd *fusbh200,
2188 struct urb *urb,
2189 size_t length,
2190 u32 token
2191)
2192{
2193 int status = -EINPROGRESS;
2194
2195 /* count IN/OUT bytes, not SETUP (even short packets) */
2196 if (likely (QTD_PID (token) != 2))
2197 urb->actual_length += length - QTD_LENGTH (token);
2198
2199 /* don't modify error codes */
2200 if (unlikely(urb->unlinked))
2201 return status;
2202
2203 /* force cleanup after short read; not always an error */
2204 if (unlikely (IS_SHORT_READ (token)))
2205 status = -EREMOTEIO;
2206
2207 /* serious "can't proceed" faults reported by the hardware */
2208 if (token & QTD_STS_HALT) {
2209 if (token & QTD_STS_BABBLE) {
2210 /* FIXME "must" disable babbling device's port too */
2211 status = -EOVERFLOW;
2212 /* CERR nonzero + halt --> stall */
2213 } else if (QTD_CERR(token)) {
2214 status = -EPIPE;
2215
2216 /* In theory, more than one of the following bits can be set
2217 * since they are sticky and the transaction is retried.
2218 * Which to test first is rather arbitrary.
2219 */
2220 } else if (token & QTD_STS_MMF) {
2221 /* fs/ls interrupt xfer missed the complete-split */
2222 status = -EPROTO;
2223 } else if (token & QTD_STS_DBE) {
2224 status = (QTD_PID (token) == 1) /* IN ? */
2225 ? -ENOSR /* hc couldn't read data */
2226 : -ECOMM; /* hc couldn't write data */
2227 } else if (token & QTD_STS_XACT) {
2228 /* timeout, bad CRC, wrong PID, etc */
2229 fusbh200_dbg(fusbh200, "devpath %s ep%d%s 3strikes\n",
2230 urb->dev->devpath,
2231 usb_pipeendpoint(urb->pipe),
2232 usb_pipein(urb->pipe) ? "in" : "out");
2233 status = -EPROTO;
2234 } else { /* unknown */
2235 status = -EPROTO;
2236 }
2237
2238 fusbh200_dbg(fusbh200,
2239 "dev%d ep%d%s qtd token %08x --> status %d\n",
2240 usb_pipedevice (urb->pipe),
2241 usb_pipeendpoint (urb->pipe),
2242 usb_pipein (urb->pipe) ? "in" : "out",
2243 token, status);
2244 }
2245
2246 return status;
2247}
2248
2249static void
2250fusbh200_urb_done(struct fusbh200_hcd *fusbh200, struct urb *urb, int status)
2251__releases(fusbh200->lock)
2252__acquires(fusbh200->lock)
2253{
2254 if (likely (urb->hcpriv != NULL)) {
2255 struct fusbh200_qh *qh = (struct fusbh200_qh *) urb->hcpriv;
2256
2257 /* S-mask in a QH means it's an interrupt urb */
2258 if ((qh->hw->hw_info2 & cpu_to_hc32(fusbh200, QH_SMASK)) != 0) {
2259
2260 /* ... update hc-wide periodic stats (for usbfs) */
2261 fusbh200_to_hcd(fusbh200)->self.bandwidth_int_reqs--;
2262 }
2263 }
2264
2265 if (unlikely(urb->unlinked)) {
2266 COUNT(fusbh200->stats.unlink);
2267 } else {
2268 /* report non-error and short read status as zero */
2269 if (status == -EINPROGRESS || status == -EREMOTEIO)
2270 status = 0;
2271 COUNT(fusbh200->stats.complete);
2272 }
2273
2274#ifdef FUSBH200_URB_TRACE
2275 fusbh200_dbg (fusbh200,
2276 "%s %s urb %p ep%d%s status %d len %d/%d\n",
2277 __func__, urb->dev->devpath, urb,
2278 usb_pipeendpoint (urb->pipe),
2279 usb_pipein (urb->pipe) ? "in" : "out",
2280 status,
2281 urb->actual_length, urb->transfer_buffer_length);
2282#endif
2283
2284 /* complete() can reenter this HCD */
2285 usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
2286 spin_unlock (&fusbh200->lock);
2287 usb_hcd_giveback_urb(fusbh200_to_hcd(fusbh200), urb, status);
2288 spin_lock (&fusbh200->lock);
2289}
2290
2291static int qh_schedule (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
2292
2293/*
2294 * Process and free completed qtds for a qh, returning URBs to drivers.
2295 * Chases up to qh->hw_current. Returns number of completions called,
2296 * indicating how much "real" work we did.
2297 */
2298static unsigned
2299qh_completions (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
2300{
2301 struct fusbh200_qtd *last, *end = qh->dummy;
2302 struct list_head *entry, *tmp;
2303 int last_status;
2304 int stopped;
2305 unsigned count = 0;
2306 u8 state;
2307 struct fusbh200_qh_hw *hw = qh->hw;
2308
2309 if (unlikely (list_empty (&qh->qtd_list)))
2310 return count;
2311
2312 /* completions (or tasks on other cpus) must never clobber HALT
2313 * till we've gone through and cleaned everything up, even when
2314 * they add urbs to this qh's queue or mark them for unlinking.
2315 *
2316 * NOTE: unlinking expects to be done in queue order.
2317 *
2318 * It's a bug for qh->qh_state to be anything other than
2319 * QH_STATE_IDLE, unless our caller is scan_async() or
2320 * scan_intr().
2321 */
2322 state = qh->qh_state;
2323 qh->qh_state = QH_STATE_COMPLETING;
2324 stopped = (state == QH_STATE_IDLE);
2325
2326 rescan:
2327 last = NULL;
2328 last_status = -EINPROGRESS;
2329 qh->needs_rescan = 0;
2330
2331 /* remove de-activated QTDs from front of queue.
2332 * after faults (including short reads), cleanup this urb
2333 * then let the queue advance.
2334 * if queue is stopped, handles unlinks.
2335 */
2336 list_for_each_safe (entry, tmp, &qh->qtd_list) {
2337 struct fusbh200_qtd *qtd;
2338 struct urb *urb;
2339 u32 token = 0;
2340
2341 qtd = list_entry (entry, struct fusbh200_qtd, qtd_list);
2342 urb = qtd->urb;
2343
2344 /* clean up any state from previous QTD ...*/
2345 if (last) {
2346 if (likely (last->urb != urb)) {
2347 fusbh200_urb_done(fusbh200, last->urb, last_status);
2348 count++;
2349 last_status = -EINPROGRESS;
2350 }
2351 fusbh200_qtd_free (fusbh200, last);
2352 last = NULL;
2353 }
2354
2355 /* ignore urbs submitted during completions we reported */
2356 if (qtd == end)
2357 break;
2358
2359 /* hardware copies qtd out of qh overlay */
2360 rmb ();
2361 token = hc32_to_cpu(fusbh200, qtd->hw_token);
2362
2363 /* always clean up qtds the hc de-activated */
2364 retry_xacterr:
2365 if ((token & QTD_STS_ACTIVE) == 0) {
2366
2367 /* Report Data Buffer Error: non-fatal but useful */
2368 if (token & QTD_STS_DBE)
2369 fusbh200_dbg(fusbh200,
2370 "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
2371 urb,
2372 usb_endpoint_num(&urb->ep->desc),
2373 usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
2374 urb->transfer_buffer_length,
2375 qtd,
2376 qh);
2377
2378 /* on STALL, error, and short reads this urb must
2379 * complete and all its qtds must be recycled.
2380 */
2381 if ((token & QTD_STS_HALT) != 0) {
2382
2383 /* retry transaction errors until we
2384 * reach the software xacterr limit
2385 */
2386 if ((token & QTD_STS_XACT) &&
2387 QTD_CERR(token) == 0 &&
2388 ++qh->xacterrs < QH_XACTERR_MAX &&
2389 !urb->unlinked) {
2390 fusbh200_dbg(fusbh200,
2391 "detected XactErr len %zu/%zu retry %d\n",
2392 qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
2393
2394 /* reset the token in the qtd and the
2395 * qh overlay (which still contains
2396 * the qtd) so that we pick up from
2397 * where we left off
2398 */
2399 token &= ~QTD_STS_HALT;
2400 token |= QTD_STS_ACTIVE |
2401 (FUSBH200_TUNE_CERR << 10);
2402 qtd->hw_token = cpu_to_hc32(fusbh200,
2403 token);
2404 wmb();
2405 hw->hw_token = cpu_to_hc32(fusbh200,
2406 token);
2407 goto retry_xacterr;
2408 }
2409 stopped = 1;
2410
2411 /* magic dummy for some short reads; qh won't advance.
2412 * that silicon quirk can kick in with this dummy too.
2413 *
2414 * other short reads won't stop the queue, including
2415 * control transfers (status stage handles that) or
2416 * most other single-qtd reads ... the queue stops if
2417 * URB_SHORT_NOT_OK was set so the driver submitting
2418 * the urbs could clean it up.
2419 */
2420 } else if (IS_SHORT_READ (token)
2421 && !(qtd->hw_alt_next
2422 & FUSBH200_LIST_END(fusbh200))) {
2423 stopped = 1;
2424 }
2425
2426 /* stop scanning when we reach qtds the hc is using */
2427 } else if (likely (!stopped
2428 && fusbh200->rh_state >= FUSBH200_RH_RUNNING)) {
2429 break;
2430
2431 /* scan the whole queue for unlinks whenever it stops */
2432 } else {
2433 stopped = 1;
2434
2435 /* cancel everything if we halt, suspend, etc */
2436 if (fusbh200->rh_state < FUSBH200_RH_RUNNING)
2437 last_status = -ESHUTDOWN;
2438
2439 /* this qtd is active; skip it unless a previous qtd
2440 * for its urb faulted, or its urb was canceled.
2441 */
2442 else if (last_status == -EINPROGRESS && !urb->unlinked)
2443 continue;
2444
2445 /* qh unlinked; token in overlay may be most current */
2446 if (state == QH_STATE_IDLE
2447 && cpu_to_hc32(fusbh200, qtd->qtd_dma)
2448 == hw->hw_current) {
2449 token = hc32_to_cpu(fusbh200, hw->hw_token);
2450
2451 /* An unlink may leave an incomplete
2452 * async transaction in the TT buffer.
2453 * We have to clear it.
2454 */
2455 fusbh200_clear_tt_buffer(fusbh200, qh, urb, token);
2456 }
2457 }
2458
2459 /* unless we already know the urb's status, collect qtd status
2460 * and update count of bytes transferred. in common short read
2461 * cases with only one data qtd (including control transfers),
2462 * queue processing won't halt. but with two or more qtds (for
2463 * example, with a 32 KB transfer), when the first qtd gets a
2464 * short read the second must be removed by hand.
2465 */
2466 if (last_status == -EINPROGRESS) {
2467 last_status = qtd_copy_status(fusbh200, urb,
2468 qtd->length, token);
2469 if (last_status == -EREMOTEIO
2470 && (qtd->hw_alt_next
2471 & FUSBH200_LIST_END(fusbh200)))
2472 last_status = -EINPROGRESS;
2473
2474 /* As part of low/full-speed endpoint-halt processing
2475 * we must clear the TT buffer (11.17.5).
2476 */
2477 if (unlikely(last_status != -EINPROGRESS &&
2478 last_status != -EREMOTEIO)) {
2479 /* The TT's in some hubs malfunction when they
2480 * receive this request following a STALL (they
2481 * stop sending isochronous packets). Since a
2482 * STALL can't leave the TT buffer in a busy
2483 * state (if you believe Figures 11-48 - 11-51
2484 * in the USB 2.0 spec), we won't clear the TT
2485 * buffer in this case. Strictly speaking this
2486 * is a violation of the spec.
2487 */
2488 if (last_status != -EPIPE)
2489 fusbh200_clear_tt_buffer(fusbh200, qh, urb,
2490 token);
2491 }
2492 }
2493
2494 /* if we're removing something not at the queue head,
2495 * patch the hardware queue pointer.
2496 */
2497 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
2498 last = list_entry (qtd->qtd_list.prev,
2499 struct fusbh200_qtd, qtd_list);
2500 last->hw_next = qtd->hw_next;
2501 }
2502
2503 /* remove qtd; it's recycled after possible urb completion */
2504 list_del (&qtd->qtd_list);
2505 last = qtd;
2506
2507 /* reinit the xacterr counter for the next qtd */
2508 qh->xacterrs = 0;
2509 }
2510
2511 /* last urb's completion might still need calling */
2512 if (likely (last != NULL)) {
2513 fusbh200_urb_done(fusbh200, last->urb, last_status);
2514 count++;
2515 fusbh200_qtd_free (fusbh200, last);
2516 }
2517
2518 /* Do we need to rescan for URBs dequeued during a giveback? */
2519 if (unlikely(qh->needs_rescan)) {
2520 /* If the QH is already unlinked, do the rescan now. */
2521 if (state == QH_STATE_IDLE)
2522 goto rescan;
2523
2524 /* Otherwise we have to wait until the QH is fully unlinked.
2525 * Our caller will start an unlink if qh->needs_rescan is
2526 * set. But if an unlink has already started, nothing needs
2527 * to be done.
2528 */
2529 if (state != QH_STATE_LINKED)
2530 qh->needs_rescan = 0;
2531 }
2532
2533 /* restore original state; caller must unlink or relink */
2534 qh->qh_state = state;
2535
2536 /* be sure the hardware's done with the qh before refreshing
2537 * it after fault cleanup, or recovering from silicon wrongly
2538 * overlaying the dummy qtd (which reduces DMA chatter).
2539 */
2540 if (stopped != 0 || hw->hw_qtd_next == FUSBH200_LIST_END(fusbh200)) {
2541 switch (state) {
2542 case QH_STATE_IDLE:
2543 qh_refresh(fusbh200, qh);
2544 break;
2545 case QH_STATE_LINKED:
2546 /* We won't refresh a QH that's linked (after the HC
2547 * stopped the queue). That avoids a race:
2548 * - HC reads first part of QH;
2549 * - CPU updates that first part and the token;
2550 * - HC reads rest of that QH, including token
2551 * Result: HC gets an inconsistent image, and then
2552 * DMAs to/from the wrong memory (corrupting it).
2553 *
2554 * That should be rare for interrupt transfers,
2555 * except maybe high bandwidth ...
2556 */
2557
2558 /* Tell the caller to start an unlink */
2559 qh->needs_rescan = 1;
2560 break;
2561 /* otherwise, unlink already started */
2562 }
2563 }
2564
2565 return count;
2566}
2567
2568/*-------------------------------------------------------------------------*/
2569
2570// high bandwidth multiplier, as encoded in highspeed endpoint descriptors
2571#define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
2572// ... and packet size, for any kind of endpoint descriptor
2573#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
2574
2575/*
2576 * reverse of qh_urb_transaction: free a list of TDs.
2577 * used for cleanup after errors, before HC sees an URB's TDs.
2578 */
2579static void qtd_list_free (
2580 struct fusbh200_hcd *fusbh200,
2581 struct urb *urb,
2582 struct list_head *qtd_list
2583) {
2584 struct list_head *entry, *temp;
2585
2586 list_for_each_safe (entry, temp, qtd_list) {
2587 struct fusbh200_qtd *qtd;
2588
2589 qtd = list_entry (entry, struct fusbh200_qtd, qtd_list);
2590 list_del (&qtd->qtd_list);
2591 fusbh200_qtd_free (fusbh200, qtd);
2592 }
2593}
2594
2595/*
2596 * create a list of filled qtds for this URB; won't link into qh.
2597 */
2598static struct list_head *
2599qh_urb_transaction (
2600 struct fusbh200_hcd *fusbh200,
2601 struct urb *urb,
2602 struct list_head *head,
2603 gfp_t flags
2604) {
2605 struct fusbh200_qtd *qtd, *qtd_prev;
2606 dma_addr_t buf;
2607 int len, this_sg_len, maxpacket;
2608 int is_input;
2609 u32 token;
2610 int i;
2611 struct scatterlist *sg;
2612
2613 /*
2614 * URBs map to sequences of QTDs: one logical transaction
2615 */
2616 qtd = fusbh200_qtd_alloc (fusbh200, flags);
2617 if (unlikely (!qtd))
2618 return NULL;
2619 list_add_tail (&qtd->qtd_list, head);
2620 qtd->urb = urb;
2621
2622 token = QTD_STS_ACTIVE;
2623 token |= (FUSBH200_TUNE_CERR << 10);
2624 /* for split transactions, SplitXState initialized to zero */
2625
2626 len = urb->transfer_buffer_length;
2627 is_input = usb_pipein (urb->pipe);
2628 if (usb_pipecontrol (urb->pipe)) {
2629 /* SETUP pid */
2630 qtd_fill(fusbh200, qtd, urb->setup_dma,
2631 sizeof (struct usb_ctrlrequest),
2632 token | (2 /* "setup" */ << 8), 8);
2633
2634 /* ... and always at least one more pid */
2635 token ^= QTD_TOGGLE;
2636 qtd_prev = qtd;
2637 qtd = fusbh200_qtd_alloc (fusbh200, flags);
2638 if (unlikely (!qtd))
2639 goto cleanup;
2640 qtd->urb = urb;
2641 qtd_prev->hw_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
2642 list_add_tail (&qtd->qtd_list, head);
2643
2644 /* for zero length DATA stages, STATUS is always IN */
2645 if (len == 0)
2646 token |= (1 /* "in" */ << 8);
2647 }
2648
2649 /*
2650 * data transfer stage: buffer setup
2651 */
2652 i = urb->num_mapped_sgs;
2653 if (len > 0 && i > 0) {
2654 sg = urb->sg;
2655 buf = sg_dma_address(sg);
2656
2657 /* urb->transfer_buffer_length may be smaller than the
2658 * size of the scatterlist (or vice versa)
2659 */
2660 this_sg_len = min_t(int, sg_dma_len(sg), len);
2661 } else {
2662 sg = NULL;
2663 buf = urb->transfer_dma;
2664 this_sg_len = len;
2665 }
2666
2667 if (is_input)
2668 token |= (1 /* "in" */ << 8);
2669 /* else it's already initted to "out" pid (0 << 8) */
2670
2671 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
2672
2673 /*
2674 * buffer gets wrapped in one or more qtds;
2675 * last one may be "short" (including zero len)
2676 * and may serve as a control status ack
2677 */
2678 for (;;) {
2679 int this_qtd_len;
2680
2681 this_qtd_len = qtd_fill(fusbh200, qtd, buf, this_sg_len, token,
2682 maxpacket);
2683 this_sg_len -= this_qtd_len;
2684 len -= this_qtd_len;
2685 buf += this_qtd_len;
2686
2687 /*
2688 * short reads advance to a "magic" dummy instead of the next
2689 * qtd ... that forces the queue to stop, for manual cleanup.
2690 * (this will usually be overridden later.)
2691 */
2692 if (is_input)
2693 qtd->hw_alt_next = fusbh200->async->hw->hw_alt_next;
2694
2695 /* qh makes control packets use qtd toggle; maybe switch it */
2696 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
2697 token ^= QTD_TOGGLE;
2698
2699 if (likely(this_sg_len <= 0)) {
2700 if (--i <= 0 || len <= 0)
2701 break;
2702 sg = sg_next(sg);
2703 buf = sg_dma_address(sg);
2704 this_sg_len = min_t(int, sg_dma_len(sg), len);
2705 }
2706
2707 qtd_prev = qtd;
2708 qtd = fusbh200_qtd_alloc (fusbh200, flags);
2709 if (unlikely (!qtd))
2710 goto cleanup;
2711 qtd->urb = urb;
2712 qtd_prev->hw_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
2713 list_add_tail (&qtd->qtd_list, head);
2714 }
2715
2716 /*
2717 * unless the caller requires manual cleanup after short reads,
2718 * have the alt_next mechanism keep the queue running after the
2719 * last data qtd (the only one, for control and most other cases).
2720 */
2721 if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
2722 || usb_pipecontrol (urb->pipe)))
2723 qtd->hw_alt_next = FUSBH200_LIST_END(fusbh200);
2724
2725 /*
2726 * control requests may need a terminating data "status" ack;
2727 * other OUT ones may need a terminating short packet
2728 * (zero length).
2729 */
2730 if (likely (urb->transfer_buffer_length != 0)) {
2731 int one_more = 0;
2732
2733 if (usb_pipecontrol (urb->pipe)) {
2734 one_more = 1;
2735 token ^= 0x0100; /* "in" <--> "out" */
2736 token |= QTD_TOGGLE; /* force DATA1 */
2737 } else if (usb_pipeout(urb->pipe)
2738 && (urb->transfer_flags & URB_ZERO_PACKET)
2739 && !(urb->transfer_buffer_length % maxpacket)) {
2740 one_more = 1;
2741 }
2742 if (one_more) {
2743 qtd_prev = qtd;
2744 qtd = fusbh200_qtd_alloc (fusbh200, flags);
2745 if (unlikely (!qtd))
2746 goto cleanup;
2747 qtd->urb = urb;
2748 qtd_prev->hw_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
2749 list_add_tail (&qtd->qtd_list, head);
2750
2751 /* never any data in such packets */
2752 qtd_fill(fusbh200, qtd, 0, 0, token, 0);
2753 }
2754 }
2755
2756 /* by default, enable interrupt on urb completion */
2757 if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
2758 qtd->hw_token |= cpu_to_hc32(fusbh200, QTD_IOC);
2759 return head;
2760
2761cleanup:
2762 qtd_list_free (fusbh200, urb, head);
2763 return NULL;
2764}
2765
2766/*-------------------------------------------------------------------------*/
2767
2768// Would be best to create all qh's from config descriptors,
2769// when each interface/altsetting is established. Unlink
2770// any previous qh and cancel its urbs first; endpoints are
2771// implicitly reset then (data toggle too).
2772// That'd mean updating how usbcore talks to HCDs. (2.7?)
2773
2774
2775/*
2776 * Each QH holds a qtd list; a QH is used for everything except iso.
2777 *
2778 * For interrupt urbs, the scheduler must set the microframe scheduling
2779 * mask(s) each time the QH gets scheduled. For highspeed, that's
2780 * just one microframe in the s-mask. For split interrupt transactions
2781 * there are additional complications: c-mask, maybe FSTNs.
2782 */
2783static struct fusbh200_qh *
2784qh_make (
2785 struct fusbh200_hcd *fusbh200,
2786 struct urb *urb,
2787 gfp_t flags
2788) {
2789 struct fusbh200_qh *qh = fusbh200_qh_alloc (fusbh200, flags);
2790 u32 info1 = 0, info2 = 0;
2791 int is_input, type;
2792 int maxp = 0;
2793 struct usb_tt *tt = urb->dev->tt;
2794 struct fusbh200_qh_hw *hw;
2795
2796 if (!qh)
2797 return qh;
2798
2799 /*
2800 * init endpoint/device data for this QH
2801 */
2802 info1 |= usb_pipeendpoint (urb->pipe) << 8;
2803 info1 |= usb_pipedevice (urb->pipe) << 0;
2804
2805 is_input = usb_pipein (urb->pipe);
2806 type = usb_pipetype (urb->pipe);
2807 maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
2808
2809 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
2810 * acts like up to 3KB, but is built from smaller packets.
2811 */
2812 if (max_packet(maxp) > 1024) {
2813 fusbh200_dbg(fusbh200, "bogus qh maxpacket %d\n", max_packet(maxp));
2814 goto done;
2815 }
2816
2817 /* Compute interrupt scheduling parameters just once, and save.
2818 * - allowing for high bandwidth, how many nsec/uframe are used?
2819 * - split transactions need a second CSPLIT uframe; same question
2820 * - splits also need a schedule gap (for full/low speed I/O)
2821 * - qh has a polling interval
2822 *
2823 * For control/bulk requests, the HC or TT handles these.
2824 */
2825 if (type == PIPE_INTERRUPT) {
2826 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
2827 is_input, 0,
2828 hb_mult(maxp) * max_packet(maxp)));
2829 qh->start = NO_FRAME;
2830
2831 if (urb->dev->speed == USB_SPEED_HIGH) {
2832 qh->c_usecs = 0;
2833 qh->gap_uf = 0;
2834
2835 qh->period = urb->interval >> 3;
2836 if (qh->period == 0 && urb->interval != 1) {
2837 /* NOTE interval 2 or 4 uframes could work.
2838 * But interval 1 scheduling is simpler, and
2839 * includes high bandwidth.
2840 */
2841 urb->interval = 1;
2842 } else if (qh->period > fusbh200->periodic_size) {
2843 qh->period = fusbh200->periodic_size;
2844 urb->interval = qh->period << 3;
2845 }
2846 } else {
2847 int think_time;
2848
2849 /* gap is f(FS/LS transfer times) */
2850 qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
2851 is_input, 0, maxp) / (125 * 1000);
2852
2853 /* FIXME this just approximates SPLIT/CSPLIT times */
2854 if (is_input) { // SPLIT, gap, CSPLIT+DATA
2855 qh->c_usecs = qh->usecs + HS_USECS (0);
2856 qh->usecs = HS_USECS (1);
2857 } else { // SPLIT+DATA, gap, CSPLIT
2858 qh->usecs += HS_USECS (1);
2859 qh->c_usecs = HS_USECS (0);
2860 }
2861
2862 think_time = tt ? tt->think_time : 0;
2863 qh->tt_usecs = NS_TO_US (think_time +
2864 usb_calc_bus_time (urb->dev->speed,
2865 is_input, 0, max_packet (maxp)));
2866 qh->period = urb->interval;
2867 if (qh->period > fusbh200->periodic_size) {
2868 qh->period = fusbh200->periodic_size;
2869 urb->interval = qh->period;
2870 }
2871 }
2872 }
2873
2874 /* support for tt scheduling, and access to toggles */
2875 qh->dev = urb->dev;
2876
2877 /* using TT? */
2878 switch (urb->dev->speed) {
2879 case USB_SPEED_LOW:
2880 info1 |= QH_LOW_SPEED;
2881 /* FALL THROUGH */
2882
2883 case USB_SPEED_FULL:
2884 /* EPS 0 means "full" */
2885 if (type != PIPE_INTERRUPT)
2886 info1 |= (FUSBH200_TUNE_RL_TT << 28);
2887 if (type == PIPE_CONTROL) {
2888 info1 |= QH_CONTROL_EP; /* for TT */
2889 info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
2890 }
2891 info1 |= maxp << 16;
2892
2893 info2 |= (FUSBH200_TUNE_MULT_TT << 30);
2894
2895 /* Some Freescale processors have an erratum in which the
2896 * port number in the queue head was 0..N-1 instead of 1..N.
2897 */
2898 if (fusbh200_has_fsl_portno_bug(fusbh200))
2899 info2 |= (urb->dev->ttport-1) << 23;
2900 else
2901 info2 |= urb->dev->ttport << 23;
2902
2903 /* set the address of the TT; for TDI's integrated
2904 * root hub tt, leave it zeroed.
2905 */
2906 if (tt && tt->hub != fusbh200_to_hcd(fusbh200)->self.root_hub)
2907 info2 |= tt->hub->devnum << 16;
2908
2909 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
2910
2911 break;
2912
2913 case USB_SPEED_HIGH: /* no TT involved */
2914 info1 |= QH_HIGH_SPEED;
2915 if (type == PIPE_CONTROL) {
2916 info1 |= (FUSBH200_TUNE_RL_HS << 28);
2917 info1 |= 64 << 16; /* usb2 fixed maxpacket */
2918 info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
2919 info2 |= (FUSBH200_TUNE_MULT_HS << 30);
2920 } else if (type == PIPE_BULK) {
2921 info1 |= (FUSBH200_TUNE_RL_HS << 28);
2922 /* The USB spec says that high speed bulk endpoints
2923 * always use 512 byte maxpacket. But some device
2924 * vendors decided to ignore that, and MSFT is happy
2925 * to help them do so. So now people expect to use
2926 * such nonconformant devices with Linux too; sigh.
2927 */
2928 info1 |= max_packet(maxp) << 16;
2929 info2 |= (FUSBH200_TUNE_MULT_HS << 30);
2930 } else { /* PIPE_INTERRUPT */
2931 info1 |= max_packet (maxp) << 16;
2932 info2 |= hb_mult (maxp) << 30;
2933 }
2934 break;
2935 default:
2936 fusbh200_dbg(fusbh200, "bogus dev %p speed %d\n", urb->dev,
2937 urb->dev->speed);
2938done:
2939 qh_destroy(fusbh200, qh);
2940 return NULL;
2941 }
2942
2943 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
2944
2945 /* init as live, toggle clear, advance to dummy */
2946 qh->qh_state = QH_STATE_IDLE;
2947 hw = qh->hw;
2948 hw->hw_info1 = cpu_to_hc32(fusbh200, info1);
2949 hw->hw_info2 = cpu_to_hc32(fusbh200, info2);
2950 qh->is_out = !is_input;
2951 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
2952 qh_refresh (fusbh200, qh);
2953 return qh;
2954}
2955
2956/*-------------------------------------------------------------------------*/
2957
2958static void enable_async(struct fusbh200_hcd *fusbh200)
2959{
2960 if (fusbh200->async_count++)
2961 return;
2962
2963 /* Stop waiting to turn off the async schedule */
2964 fusbh200->enabled_hrtimer_events &= ~BIT(FUSBH200_HRTIMER_DISABLE_ASYNC);
2965
2966 /* Don't start the schedule until ASS is 0 */
2967 fusbh200_poll_ASS(fusbh200);
2968 turn_on_io_watchdog(fusbh200);
2969}
2970
2971static void disable_async(struct fusbh200_hcd *fusbh200)
2972{
2973 if (--fusbh200->async_count)
2974 return;
2975
2976 /* The async schedule and async_unlink list are supposed to be empty */
2977 WARN_ON(fusbh200->async->qh_next.qh || fusbh200->async_unlink);
2978
2979 /* Don't turn off the schedule until ASS is 1 */
2980 fusbh200_poll_ASS(fusbh200);
2981}
2982
2983/* move qh (and its qtds) onto async queue; maybe enable queue. */
2984
2985static void qh_link_async (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
2986{
2987 __hc32 dma = QH_NEXT(fusbh200, qh->qh_dma);
2988 struct fusbh200_qh *head;
2989
2990 /* Don't link a QH if there's a Clear-TT-Buffer pending */
2991 if (unlikely(qh->clearing_tt))
2992 return;
2993
2994 WARN_ON(qh->qh_state != QH_STATE_IDLE);
2995
2996 /* clear halt and/or toggle; and maybe recover from silicon quirk */
2997 qh_refresh(fusbh200, qh);
2998
2999 /* splice right after start */
3000 head = fusbh200->async;
3001 qh->qh_next = head->qh_next;
3002 qh->hw->hw_next = head->hw->hw_next;
3003 wmb ();
3004
3005 head->qh_next.qh = qh;
3006 head->hw->hw_next = dma;
3007
3008 qh->xacterrs = 0;
3009 qh->qh_state = QH_STATE_LINKED;
3010 /* qtd completions reported later by interrupt */
3011
3012 enable_async(fusbh200);
3013}
3014
3015/*-------------------------------------------------------------------------*/
3016
3017/*
3018 * For control/bulk/interrupt, return QH with these TDs appended.
3019 * Allocates and initializes the QH if necessary.
3020 * Returns null if it can't allocate a QH it needs to.
3021 * If the QH has TDs (urbs) already, that's great.
3022 */
3023static struct fusbh200_qh *qh_append_tds (
3024 struct fusbh200_hcd *fusbh200,
3025 struct urb *urb,
3026 struct list_head *qtd_list,
3027 int epnum,
3028 void **ptr
3029)
3030{
3031 struct fusbh200_qh *qh = NULL;
3032 __hc32 qh_addr_mask = cpu_to_hc32(fusbh200, 0x7f);
3033
3034 qh = (struct fusbh200_qh *) *ptr;
3035 if (unlikely (qh == NULL)) {
3036 /* can't sleep here, we have fusbh200->lock... */
3037 qh = qh_make (fusbh200, urb, GFP_ATOMIC);
3038 *ptr = qh;
3039 }
3040 if (likely (qh != NULL)) {
3041 struct fusbh200_qtd *qtd;
3042
3043 if (unlikely (list_empty (qtd_list)))
3044 qtd = NULL;
3045 else
3046 qtd = list_entry (qtd_list->next, struct fusbh200_qtd,
3047 qtd_list);
3048
3049 /* control qh may need patching ... */
3050 if (unlikely (epnum == 0)) {
3051
3052 /* usb_reset_device() briefly reverts to address 0 */
3053 if (usb_pipedevice (urb->pipe) == 0)
3054 qh->hw->hw_info1 &= ~qh_addr_mask;
3055 }
3056
3057 /* just one way to queue requests: swap with the dummy qtd.
3058 * only hc or qh_refresh() ever modify the overlay.
3059 */
3060 if (likely (qtd != NULL)) {
3061 struct fusbh200_qtd *dummy;
3062 dma_addr_t dma;
3063 __hc32 token;
3064
3065 /* to avoid racing the HC, use the dummy td instead of
3066 * the first td of our list (becomes new dummy). both
3067 * tds stay deactivated until we're done, when the
3068 * HC is allowed to fetch the old dummy (4.10.2).
3069 */
3070 token = qtd->hw_token;
3071 qtd->hw_token = HALT_BIT(fusbh200);
3072
3073 dummy = qh->dummy;
3074
3075 dma = dummy->qtd_dma;
3076 *dummy = *qtd;
3077 dummy->qtd_dma = dma;
3078
3079 list_del (&qtd->qtd_list);
3080 list_add (&dummy->qtd_list, qtd_list);
3081 list_splice_tail(qtd_list, &qh->qtd_list);
3082
3083 fusbh200_qtd_init(fusbh200, qtd, qtd->qtd_dma);
3084 qh->dummy = qtd;
3085
3086 /* hc must see the new dummy at list end */
3087 dma = qtd->qtd_dma;
3088 qtd = list_entry (qh->qtd_list.prev,
3089 struct fusbh200_qtd, qtd_list);
3090 qtd->hw_next = QTD_NEXT(fusbh200, dma);
3091
3092 /* let the hc process these next qtds */
3093 wmb ();
3094 dummy->hw_token = token;
3095
3096 urb->hcpriv = qh;
3097 }
3098 }
3099 return qh;
3100}
3101
3102/*-------------------------------------------------------------------------*/
3103
3104static int
3105submit_async (
3106 struct fusbh200_hcd *fusbh200,
3107 struct urb *urb,
3108 struct list_head *qtd_list,
3109 gfp_t mem_flags
3110) {
3111 int epnum;
3112 unsigned long flags;
3113 struct fusbh200_qh *qh = NULL;
3114 int rc;
3115
3116 epnum = urb->ep->desc.bEndpointAddress;
3117
3118#ifdef FUSBH200_URB_TRACE
3119 {
3120 struct fusbh200_qtd *qtd;
3121 qtd = list_entry(qtd_list->next, struct fusbh200_qtd, qtd_list);
3122 fusbh200_dbg(fusbh200,
3123 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
3124 __func__, urb->dev->devpath, urb,
3125 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
3126 urb->transfer_buffer_length,
3127 qtd, urb->ep->hcpriv);
3128 }
3129#endif
3130
3131 spin_lock_irqsave (&fusbh200->lock, flags);
3132 if (unlikely(!HCD_HW_ACCESSIBLE(fusbh200_to_hcd(fusbh200)))) {
3133 rc = -ESHUTDOWN;
3134 goto done;
3135 }
3136 rc = usb_hcd_link_urb_to_ep(fusbh200_to_hcd(fusbh200), urb);
3137 if (unlikely(rc))
3138 goto done;
3139
3140 qh = qh_append_tds(fusbh200, urb, qtd_list, epnum, &urb->ep->hcpriv);
3141 if (unlikely(qh == NULL)) {
3142 usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
3143 rc = -ENOMEM;
3144 goto done;
3145 }
3146
3147 /* Control/bulk operations through TTs don't need scheduling,
3148 * the HC and TT handle it when the TT has a buffer ready.
3149 */
3150 if (likely (qh->qh_state == QH_STATE_IDLE))
3151 qh_link_async(fusbh200, qh);
3152 done:
3153 spin_unlock_irqrestore (&fusbh200->lock, flags);
3154 if (unlikely (qh == NULL))
3155 qtd_list_free (fusbh200, urb, qtd_list);
3156 return rc;
3157}
3158
3159/*-------------------------------------------------------------------------*/
3160
3161static void single_unlink_async(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
3162{
3163 struct fusbh200_qh *prev;
3164
3165 /* Add to the end of the list of QHs waiting for the next IAAD */
3166 qh->qh_state = QH_STATE_UNLINK;
3167 if (fusbh200->async_unlink)
3168 fusbh200->async_unlink_last->unlink_next = qh;
3169 else
3170 fusbh200->async_unlink = qh;
3171 fusbh200->async_unlink_last = qh;
3172
3173 /* Unlink it from the schedule */
3174 prev = fusbh200->async;
3175 while (prev->qh_next.qh != qh)
3176 prev = prev->qh_next.qh;
3177
3178 prev->hw->hw_next = qh->hw->hw_next;
3179 prev->qh_next = qh->qh_next;
3180 if (fusbh200->qh_scan_next == qh)
3181 fusbh200->qh_scan_next = qh->qh_next.qh;
3182}
3183
3184static void start_iaa_cycle(struct fusbh200_hcd *fusbh200, bool nested)
3185{
3186 /*
3187 * Do nothing if an IAA cycle is already running or
3188 * if one will be started shortly.
3189 */
3190 if (fusbh200->async_iaa || fusbh200->async_unlinking)
3191 return;
3192
3193 /* Do all the waiting QHs at once */
3194 fusbh200->async_iaa = fusbh200->async_unlink;
3195 fusbh200->async_unlink = NULL;
3196
3197 /* If the controller isn't running, we don't have to wait for it */
3198 if (unlikely(fusbh200->rh_state < FUSBH200_RH_RUNNING)) {
3199 if (!nested) /* Avoid recursion */
3200 end_unlink_async(fusbh200);
3201
3202 /* Otherwise start a new IAA cycle */
3203 } else if (likely(fusbh200->rh_state == FUSBH200_RH_RUNNING)) {
3204 /* Make sure the unlinks are all visible to the hardware */
3205 wmb();
3206
3207 fusbh200_writel(fusbh200, fusbh200->command | CMD_IAAD,
3208 &fusbh200->regs->command);
3209 fusbh200_readl(fusbh200, &fusbh200->regs->command);
3210 fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_IAA_WATCHDOG, true);
3211 }
3212}
3213
3214/* the async qh for the qtds being unlinked are now gone from the HC */
3215
3216static void end_unlink_async(struct fusbh200_hcd *fusbh200)
3217{
3218 struct fusbh200_qh *qh;
3219
3220 /* Process the idle QHs */
3221 restart:
3222 fusbh200->async_unlinking = true;
3223 while (fusbh200->async_iaa) {
3224 qh = fusbh200->async_iaa;
3225 fusbh200->async_iaa = qh->unlink_next;
3226 qh->unlink_next = NULL;
3227
3228 qh->qh_state = QH_STATE_IDLE;
3229 qh->qh_next.qh = NULL;
3230
3231 qh_completions(fusbh200, qh);
3232 if (!list_empty(&qh->qtd_list) &&
3233 fusbh200->rh_state == FUSBH200_RH_RUNNING)
3234 qh_link_async(fusbh200, qh);
3235 disable_async(fusbh200);
3236 }
3237 fusbh200->async_unlinking = false;
3238
3239 /* Start a new IAA cycle if any QHs are waiting for it */
3240 if (fusbh200->async_unlink) {
3241 start_iaa_cycle(fusbh200, true);
3242 if (unlikely(fusbh200->rh_state < FUSBH200_RH_RUNNING))
3243 goto restart;
3244 }
3245}
3246
3247static void unlink_empty_async(struct fusbh200_hcd *fusbh200)
3248{
3249 struct fusbh200_qh *qh, *next;
3250 bool stopped = (fusbh200->rh_state < FUSBH200_RH_RUNNING);
3251 bool check_unlinks_later = false;
3252
3253 /* Unlink all the async QHs that have been empty for a timer cycle */
3254 next = fusbh200->async->qh_next.qh;
3255 while (next) {
3256 qh = next;
3257 next = qh->qh_next.qh;
3258
3259 if (list_empty(&qh->qtd_list) &&
3260 qh->qh_state == QH_STATE_LINKED) {
3261 if (!stopped && qh->unlink_cycle ==
3262 fusbh200->async_unlink_cycle)
3263 check_unlinks_later = true;
3264 else
3265 single_unlink_async(fusbh200, qh);
3266 }
3267 }
3268
3269 /* Start a new IAA cycle if any QHs are waiting for it */
3270 if (fusbh200->async_unlink)
3271 start_iaa_cycle(fusbh200, false);
3272
3273 /* QHs that haven't been empty for long enough will be handled later */
3274 if (check_unlinks_later) {
3275 fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_ASYNC_UNLINKS, true);
3276 ++fusbh200->async_unlink_cycle;
3277 }
3278}
3279
3280/* makes sure the async qh will become idle */
3281/* caller must own fusbh200->lock */
3282
3283static void start_unlink_async(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
3284{
3285 /*
3286 * If the QH isn't linked then there's nothing we can do
3287 * unless we were called during a giveback, in which case
3288 * qh_completions() has to deal with it.
3289 */
3290 if (qh->qh_state != QH_STATE_LINKED) {
3291 if (qh->qh_state == QH_STATE_COMPLETING)
3292 qh->needs_rescan = 1;
3293 return;
3294 }
3295
3296 single_unlink_async(fusbh200, qh);
3297 start_iaa_cycle(fusbh200, false);
3298}
3299
3300/*-------------------------------------------------------------------------*/
3301
3302static void scan_async (struct fusbh200_hcd *fusbh200)
3303{
3304 struct fusbh200_qh *qh;
3305 bool check_unlinks_later = false;
3306
3307 fusbh200->qh_scan_next = fusbh200->async->qh_next.qh;
3308 while (fusbh200->qh_scan_next) {
3309 qh = fusbh200->qh_scan_next;
3310 fusbh200->qh_scan_next = qh->qh_next.qh;
3311 rescan:
3312 /* clean any finished work for this qh */
3313 if (!list_empty(&qh->qtd_list)) {
3314 int temp;
3315
3316 /*
3317 * Unlinks could happen here; completion reporting
3318 * drops the lock. That's why fusbh200->qh_scan_next
3319 * always holds the next qh to scan; if the next qh
3320 * gets unlinked then fusbh200->qh_scan_next is adjusted
3321 * in single_unlink_async().
3322 */
3323 temp = qh_completions(fusbh200, qh);
3324 if (qh->needs_rescan) {
3325 start_unlink_async(fusbh200, qh);
3326 } else if (list_empty(&qh->qtd_list)
3327 && qh->qh_state == QH_STATE_LINKED) {
3328 qh->unlink_cycle = fusbh200->async_unlink_cycle;
3329 check_unlinks_later = true;
3330 } else if (temp != 0)
3331 goto rescan;
3332 }
3333 }
3334
3335 /*
3336 * Unlink empty entries, reducing DMA usage as well
3337 * as HCD schedule-scanning costs. Delay for any qh
3338 * we just scanned, there's a not-unusual case that it
3339 * doesn't stay idle for long.
3340 */
3341 if (check_unlinks_later && fusbh200->rh_state == FUSBH200_RH_RUNNING &&
3342 !(fusbh200->enabled_hrtimer_events &
3343 BIT(FUSBH200_HRTIMER_ASYNC_UNLINKS))) {
3344 fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_ASYNC_UNLINKS, true);
3345 ++fusbh200->async_unlink_cycle;
3346 }
3347}
3348/*-------------------------------------------------------------------------*/
3349/*
3350 * EHCI scheduled transaction support: interrupt, iso, split iso
3351 * These are called "periodic" transactions in the EHCI spec.
3352 *
3353 * Note that for interrupt transfers, the QH/QTD manipulation is shared
3354 * with the "asynchronous" transaction support (control/bulk transfers).
3355 * The only real difference is in how interrupt transfers are scheduled.
3356 *
3357 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
3358 * It keeps track of every ITD (or SITD) that's linked, and holds enough
3359 * pre-calculated schedule data to make appending to the queue be quick.
3360 */
3361
3362static int fusbh200_get_frame (struct usb_hcd *hcd);
3363
3364/*-------------------------------------------------------------------------*/
3365
3366/*
3367 * periodic_next_shadow - return "next" pointer on shadow list
3368 * @periodic: host pointer to qh/itd
3369 * @tag: hardware tag for type of this record
3370 */
3371static union fusbh200_shadow *
3372periodic_next_shadow(struct fusbh200_hcd *fusbh200, union fusbh200_shadow *periodic,
3373 __hc32 tag)
3374{
3375 switch (hc32_to_cpu(fusbh200, tag)) {
3376 case Q_TYPE_QH:
3377 return &periodic->qh->qh_next;
3378 case Q_TYPE_FSTN:
3379 return &periodic->fstn->fstn_next;
3380 default:
3381 return &periodic->itd->itd_next;
3382 }
3383}
3384
3385static __hc32 *
3386shadow_next_periodic(struct fusbh200_hcd *fusbh200, union fusbh200_shadow *periodic,
3387 __hc32 tag)
3388{
3389 switch (hc32_to_cpu(fusbh200, tag)) {
3390 /* our fusbh200_shadow.qh is actually software part */
3391 case Q_TYPE_QH:
3392 return &periodic->qh->hw->hw_next;
3393 /* others are hw parts */
3394 default:
3395 return periodic->hw_next;
3396 }
3397}
3398
3399/* caller must hold fusbh200->lock */
3400static void periodic_unlink (struct fusbh200_hcd *fusbh200, unsigned frame, void *ptr)
3401{
3402 union fusbh200_shadow *prev_p = &fusbh200->pshadow[frame];
3403 __hc32 *hw_p = &fusbh200->periodic[frame];
3404 union fusbh200_shadow here = *prev_p;
3405
3406 /* find predecessor of "ptr"; hw and shadow lists are in sync */
3407 while (here.ptr && here.ptr != ptr) {
3408 prev_p = periodic_next_shadow(fusbh200, prev_p,
3409 Q_NEXT_TYPE(fusbh200, *hw_p));
3410 hw_p = shadow_next_periodic(fusbh200, &here,
3411 Q_NEXT_TYPE(fusbh200, *hw_p));
3412 here = *prev_p;
3413 }
3414 /* an interrupt entry (at list end) could have been shared */
3415 if (!here.ptr)
3416 return;
3417
3418 /* update shadow and hardware lists ... the old "next" pointers
3419 * from ptr may still be in use, the caller updates them.
3420 */
3421 *prev_p = *periodic_next_shadow(fusbh200, &here,
3422 Q_NEXT_TYPE(fusbh200, *hw_p));
3423
3424 *hw_p = *shadow_next_periodic(fusbh200, &here,
3425 Q_NEXT_TYPE(fusbh200, *hw_p));
3426}
3427
3428/* how many of the uframe's 125 usecs are allocated? */
3429static unsigned short
3430periodic_usecs (struct fusbh200_hcd *fusbh200, unsigned frame, unsigned uframe)
3431{
3432 __hc32 *hw_p = &fusbh200->periodic [frame];
3433 union fusbh200_shadow *q = &fusbh200->pshadow [frame];
3434 unsigned usecs = 0;
3435 struct fusbh200_qh_hw *hw;
3436
3437 while (q->ptr) {
3438 switch (hc32_to_cpu(fusbh200, Q_NEXT_TYPE(fusbh200, *hw_p))) {
3439 case Q_TYPE_QH:
3440 hw = q->qh->hw;
3441 /* is it in the S-mask? */
3442 if (hw->hw_info2 & cpu_to_hc32(fusbh200, 1 << uframe))
3443 usecs += q->qh->usecs;
3444 /* ... or C-mask? */
3445 if (hw->hw_info2 & cpu_to_hc32(fusbh200,
3446 1 << (8 + uframe)))
3447 usecs += q->qh->c_usecs;
3448 hw_p = &hw->hw_next;
3449 q = &q->qh->qh_next;
3450 break;
3451 // case Q_TYPE_FSTN:
3452 default:
3453 /* for "save place" FSTNs, count the relevant INTR
3454 * bandwidth from the previous frame
3455 */
3456 if (q->fstn->hw_prev != FUSBH200_LIST_END(fusbh200)) {
3457 fusbh200_dbg (fusbh200, "ignoring FSTN cost ...\n");
3458 }
3459 hw_p = &q->fstn->hw_next;
3460 q = &q->fstn->fstn_next;
3461 break;
3462 case Q_TYPE_ITD:
3463 if (q->itd->hw_transaction[uframe])
3464 usecs += q->itd->stream->usecs;
3465 hw_p = &q->itd->hw_next;
3466 q = &q->itd->itd_next;
3467 break;
3468 }
3469 }
3470 if (usecs > fusbh200->uframe_periodic_max)
3471 fusbh200_err (fusbh200, "uframe %d sched overrun: %d usecs\n",
3472 frame * 8 + uframe, usecs);
3473 return usecs;
3474}
3475
3476/*-------------------------------------------------------------------------*/
3477
3478static int same_tt (struct usb_device *dev1, struct usb_device *dev2)
3479{
3480 if (!dev1->tt || !dev2->tt)
3481 return 0;
3482 if (dev1->tt != dev2->tt)
3483 return 0;
3484 if (dev1->tt->multi)
3485 return dev1->ttport == dev2->ttport;
3486 else
3487 return 1;
3488}
3489
3490/* return true iff the device's transaction translator is available
3491 * for a periodic transfer starting at the specified frame, using
3492 * all the uframes in the mask.
3493 */
3494static int tt_no_collision (
3495 struct fusbh200_hcd *fusbh200,
3496 unsigned period,
3497 struct usb_device *dev,
3498 unsigned frame,
3499 u32 uf_mask
3500)
3501{
3502 if (period == 0) /* error */
3503 return 0;
3504
3505 /* note bandwidth wastage: split never follows csplit
3506 * (different dev or endpoint) until the next uframe.
3507 * calling convention doesn't make that distinction.
3508 */
3509 for (; frame < fusbh200->periodic_size; frame += period) {
3510 union fusbh200_shadow here;
3511 __hc32 type;
3512 struct fusbh200_qh_hw *hw;
3513
3514 here = fusbh200->pshadow [frame];
3515 type = Q_NEXT_TYPE(fusbh200, fusbh200->periodic [frame]);
3516 while (here.ptr) {
3517 switch (hc32_to_cpu(fusbh200, type)) {
3518 case Q_TYPE_ITD:
3519 type = Q_NEXT_TYPE(fusbh200, here.itd->hw_next);
3520 here = here.itd->itd_next;
3521 continue;
3522 case Q_TYPE_QH:
3523 hw = here.qh->hw;
3524 if (same_tt (dev, here.qh->dev)) {
3525 u32 mask;
3526
3527 mask = hc32_to_cpu(fusbh200,
3528 hw->hw_info2);
3529 /* "knows" no gap is needed */
3530 mask |= mask >> 8;
3531 if (mask & uf_mask)
3532 break;
3533 }
3534 type = Q_NEXT_TYPE(fusbh200, hw->hw_next);
3535 here = here.qh->qh_next;
3536 continue;
3537 // case Q_TYPE_FSTN:
3538 default:
3539 fusbh200_dbg (fusbh200,
3540 "periodic frame %d bogus type %d\n",
3541 frame, type);
3542 }
3543
3544 /* collision or error */
3545 return 0;
3546 }
3547 }
3548
3549 /* no collision */
3550 return 1;
3551}
3552
3553/*-------------------------------------------------------------------------*/
3554
3555static void enable_periodic(struct fusbh200_hcd *fusbh200)
3556{
3557 if (fusbh200->periodic_count++)
3558 return;
3559
3560 /* Stop waiting to turn off the periodic schedule */
3561 fusbh200->enabled_hrtimer_events &= ~BIT(FUSBH200_HRTIMER_DISABLE_PERIODIC);
3562
3563 /* Don't start the schedule until PSS is 0 */
3564 fusbh200_poll_PSS(fusbh200);
3565 turn_on_io_watchdog(fusbh200);
3566}
3567
3568static void disable_periodic(struct fusbh200_hcd *fusbh200)
3569{
3570 if (--fusbh200->periodic_count)
3571 return;
3572
3573 /* Don't turn off the schedule until PSS is 1 */
3574 fusbh200_poll_PSS(fusbh200);
3575}
3576
3577/*-------------------------------------------------------------------------*/
3578
3579/* periodic schedule slots have iso tds (normal or split) first, then a
3580 * sparse tree for active interrupt transfers.
3581 *
3582 * this just links in a qh; caller guarantees uframe masks are set right.
3583 * no FSTN support (yet; fusbh200 0.96+)
3584 */
3585static void qh_link_periodic(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
3586{
3587 unsigned i;
3588 unsigned period = qh->period;
3589
3590 dev_dbg (&qh->dev->dev,
3591 "link qh%d-%04x/%p start %d [%d/%d us]\n",
3592 period, hc32_to_cpup(fusbh200, &qh->hw->hw_info2)
3593 & (QH_CMASK | QH_SMASK),
3594 qh, qh->start, qh->usecs, qh->c_usecs);
3595
3596 /* high bandwidth, or otherwise every microframe */
3597 if (period == 0)
3598 period = 1;
3599
3600 for (i = qh->start; i < fusbh200->periodic_size; i += period) {
3601 union fusbh200_shadow *prev = &fusbh200->pshadow[i];
3602 __hc32 *hw_p = &fusbh200->periodic[i];
3603 union fusbh200_shadow here = *prev;
3604 __hc32 type = 0;
3605
3606 /* skip the iso nodes at list head */
3607 while (here.ptr) {
3608 type = Q_NEXT_TYPE(fusbh200, *hw_p);
3609 if (type == cpu_to_hc32(fusbh200, Q_TYPE_QH))
3610 break;
3611 prev = periodic_next_shadow(fusbh200, prev, type);
3612 hw_p = shadow_next_periodic(fusbh200, &here, type);
3613 here = *prev;
3614 }
3615
3616 /* sorting each branch by period (slow-->fast)
3617 * enables sharing interior tree nodes
3618 */
3619 while (here.ptr && qh != here.qh) {
3620 if (qh->period > here.qh->period)
3621 break;
3622 prev = &here.qh->qh_next;
3623 hw_p = &here.qh->hw->hw_next;
3624 here = *prev;
3625 }
3626 /* link in this qh, unless some earlier pass did that */
3627 if (qh != here.qh) {
3628 qh->qh_next = here;
3629 if (here.qh)
3630 qh->hw->hw_next = *hw_p;
3631 wmb ();
3632 prev->qh = qh;
3633 *hw_p = QH_NEXT (fusbh200, qh->qh_dma);
3634 }
3635 }
3636 qh->qh_state = QH_STATE_LINKED;
3637 qh->xacterrs = 0;
3638
3639 /* update per-qh bandwidth for usbfs */
3640 fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated += qh->period
3641 ? ((qh->usecs + qh->c_usecs) / qh->period)
3642 : (qh->usecs * 8);
3643
3644 list_add(&qh->intr_node, &fusbh200->intr_qh_list);
3645
3646 /* maybe enable periodic schedule processing */
3647 ++fusbh200->intr_count;
3648 enable_periodic(fusbh200);
3649}
3650
3651static void qh_unlink_periodic(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
3652{
3653 unsigned i;
3654 unsigned period;
3655
3656 /*
3657 * If qh is for a low/full-speed device, simply unlinking it
3658 * could interfere with an ongoing split transaction. To unlink
3659 * it safely would require setting the QH_INACTIVATE bit and
3660 * waiting at least one frame, as described in EHCI 4.12.2.5.
3661 *
3662 * We won't bother with any of this. Instead, we assume that the
3663 * only reason for unlinking an interrupt QH while the current URB
3664 * is still active is to dequeue all the URBs (flush the whole
3665 * endpoint queue).
3666 *
3667 * If rebalancing the periodic schedule is ever implemented, this
3668 * approach will no longer be valid.
3669 */
3670
3671 /* high bandwidth, or otherwise part of every microframe */
3672 if ((period = qh->period) == 0)
3673 period = 1;
3674
3675 for (i = qh->start; i < fusbh200->periodic_size; i += period)
3676 periodic_unlink (fusbh200, i, qh);
3677
3678 /* update per-qh bandwidth for usbfs */
3679 fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated -= qh->period
3680 ? ((qh->usecs + qh->c_usecs) / qh->period)
3681 : (qh->usecs * 8);
3682
3683 dev_dbg (&qh->dev->dev,
3684 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
3685 qh->period,
3686 hc32_to_cpup(fusbh200, &qh->hw->hw_info2) & (QH_CMASK | QH_SMASK),
3687 qh, qh->start, qh->usecs, qh->c_usecs);
3688
3689 /* qh->qh_next still "live" to HC */
3690 qh->qh_state = QH_STATE_UNLINK;
3691 qh->qh_next.ptr = NULL;
3692
3693 if (fusbh200->qh_scan_next == qh)
3694 fusbh200->qh_scan_next = list_entry(qh->intr_node.next,
3695 struct fusbh200_qh, intr_node);
3696 list_del(&qh->intr_node);
3697}
3698
3699static void start_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
3700{
3701 /* If the QH isn't linked then there's nothing we can do
3702 * unless we were called during a giveback, in which case
3703 * qh_completions() has to deal with it.
3704 */
3705 if (qh->qh_state != QH_STATE_LINKED) {
3706 if (qh->qh_state == QH_STATE_COMPLETING)
3707 qh->needs_rescan = 1;
3708 return;
3709 }
3710
3711 qh_unlink_periodic (fusbh200, qh);
3712
3713 /* Make sure the unlinks are visible before starting the timer */
3714 wmb();
3715
3716 /*
3717 * The EHCI spec doesn't say how long it takes the controller to
3718 * stop accessing an unlinked interrupt QH. The timer delay is
3719 * 9 uframes; presumably that will be long enough.
3720 */
3721 qh->unlink_cycle = fusbh200->intr_unlink_cycle;
3722
3723 /* New entries go at the end of the intr_unlink list */
3724 if (fusbh200->intr_unlink)
3725 fusbh200->intr_unlink_last->unlink_next = qh;
3726 else
3727 fusbh200->intr_unlink = qh;
3728 fusbh200->intr_unlink_last = qh;
3729
3730 if (fusbh200->intr_unlinking)
3731 ; /* Avoid recursive calls */
3732 else if (fusbh200->rh_state < FUSBH200_RH_RUNNING)
3733 fusbh200_handle_intr_unlinks(fusbh200);
3734 else if (fusbh200->intr_unlink == qh) {
3735 fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_UNLINK_INTR, true);
3736 ++fusbh200->intr_unlink_cycle;
3737 }
3738}
3739
3740static void end_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
3741{
3742 struct fusbh200_qh_hw *hw = qh->hw;
3743 int rc;
3744
3745 qh->qh_state = QH_STATE_IDLE;
3746 hw->hw_next = FUSBH200_LIST_END(fusbh200);
3747
3748 qh_completions(fusbh200, qh);
3749
3750 /* reschedule QH iff another request is queued */
3751 if (!list_empty(&qh->qtd_list) && fusbh200->rh_state == FUSBH200_RH_RUNNING) {
3752 rc = qh_schedule(fusbh200, qh);
3753
3754 /* An error here likely indicates handshake failure
3755 * or no space left in the schedule. Neither fault
3756 * should happen often ...
3757 *
3758 * FIXME kill the now-dysfunctional queued urbs
3759 */
3760 if (rc != 0)
3761 fusbh200_err(fusbh200, "can't reschedule qh %p, err %d\n",
3762 qh, rc);
3763 }
3764
3765 /* maybe turn off periodic schedule */
3766 --fusbh200->intr_count;
3767 disable_periodic(fusbh200);
3768}
3769
3770/*-------------------------------------------------------------------------*/
3771
3772static int check_period (
3773 struct fusbh200_hcd *fusbh200,
3774 unsigned frame,
3775 unsigned uframe,
3776 unsigned period,
3777 unsigned usecs
3778) {
3779 int claimed;
3780
3781 /* complete split running into next frame?
3782 * given FSTN support, we could sometimes check...
3783 */
3784 if (uframe >= 8)
3785 return 0;
3786
3787 /* convert "usecs we need" to "max already claimed" */
3788 usecs = fusbh200->uframe_periodic_max - usecs;
3789
3790 /* we "know" 2 and 4 uframe intervals were rejected; so
3791 * for period 0, check _every_ microframe in the schedule.
3792 */
3793 if (unlikely (period == 0)) {
3794 do {
3795 for (uframe = 0; uframe < 7; uframe++) {
3796 claimed = periodic_usecs (fusbh200, frame, uframe);
3797 if (claimed > usecs)
3798 return 0;
3799 }
3800 } while ((frame += 1) < fusbh200->periodic_size);
3801
3802 /* just check the specified uframe, at that period */
3803 } else {
3804 do {
3805 claimed = periodic_usecs (fusbh200, frame, uframe);
3806 if (claimed > usecs)
3807 return 0;
3808 } while ((frame += period) < fusbh200->periodic_size);
3809 }
3810
3811 // success!
3812 return 1;
3813}
3814
3815static int check_intr_schedule (
3816 struct fusbh200_hcd *fusbh200,
3817 unsigned frame,
3818 unsigned uframe,
3819 const struct fusbh200_qh *qh,
3820 __hc32 *c_maskp
3821)
3822{
3823 int retval = -ENOSPC;
3824 u8 mask = 0;
3825
3826 if (qh->c_usecs && uframe >= 6) /* FSTN territory? */
3827 goto done;
3828
3829 if (!check_period (fusbh200, frame, uframe, qh->period, qh->usecs))
3830 goto done;
3831 if (!qh->c_usecs) {
3832 retval = 0;
3833 *c_maskp = 0;
3834 goto done;
3835 }
3836
3837 /* Make sure this tt's buffer is also available for CSPLITs.
3838 * We pessimize a bit; probably the typical full speed case
3839 * doesn't need the second CSPLIT.
3840 *
3841 * NOTE: both SPLIT and CSPLIT could be checked in just
3842 * one smart pass...
3843 */
3844 mask = 0x03 << (uframe + qh->gap_uf);
3845 *c_maskp = cpu_to_hc32(fusbh200, mask << 8);
3846
3847 mask |= 1 << uframe;
3848 if (tt_no_collision (fusbh200, qh->period, qh->dev, frame, mask)) {
3849 if (!check_period (fusbh200, frame, uframe + qh->gap_uf + 1,
3850 qh->period, qh->c_usecs))
3851 goto done;
3852 if (!check_period (fusbh200, frame, uframe + qh->gap_uf,
3853 qh->period, qh->c_usecs))
3854 goto done;
3855 retval = 0;
3856 }
3857done:
3858 return retval;
3859}
3860
3861/* "first fit" scheduling policy used the first time through,
3862 * or when the previous schedule slot can't be re-used.
3863 */
3864static int qh_schedule(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
3865{
3866 int status;
3867 unsigned uframe;
3868 __hc32 c_mask;
3869 unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
3870 struct fusbh200_qh_hw *hw = qh->hw;
3871
3872 qh_refresh(fusbh200, qh);
3873 hw->hw_next = FUSBH200_LIST_END(fusbh200);
3874 frame = qh->start;
3875
3876 /* reuse the previous schedule slots, if we can */
3877 if (frame < qh->period) {
3878 uframe = ffs(hc32_to_cpup(fusbh200, &hw->hw_info2) & QH_SMASK);
3879 status = check_intr_schedule (fusbh200, frame, --uframe,
3880 qh, &c_mask);
3881 } else {
3882 uframe = 0;
3883 c_mask = 0;
3884 status = -ENOSPC;
3885 }
3886
3887 /* else scan the schedule to find a group of slots such that all
3888 * uframes have enough periodic bandwidth available.
3889 */
3890 if (status) {
3891 /* "normal" case, uframing flexible except with splits */
3892 if (qh->period) {
3893 int i;
3894
3895 for (i = qh->period; status && i > 0; --i) {
3896 frame = ++fusbh200->random_frame % qh->period;
3897 for (uframe = 0; uframe < 8; uframe++) {
3898 status = check_intr_schedule (fusbh200,
3899 frame, uframe, qh,
3900 &c_mask);
3901 if (status == 0)
3902 break;
3903 }
3904 }
3905
3906 /* qh->period == 0 means every uframe */
3907 } else {
3908 frame = 0;
3909 status = check_intr_schedule (fusbh200, 0, 0, qh, &c_mask);
3910 }
3911 if (status)
3912 goto done;
3913 qh->start = frame;
3914
3915 /* reset S-frame and (maybe) C-frame masks */
3916 hw->hw_info2 &= cpu_to_hc32(fusbh200, ~(QH_CMASK | QH_SMASK));
3917 hw->hw_info2 |= qh->period
3918 ? cpu_to_hc32(fusbh200, 1 << uframe)
3919 : cpu_to_hc32(fusbh200, QH_SMASK);
3920 hw->hw_info2 |= c_mask;
3921 } else
3922 fusbh200_dbg (fusbh200, "reused qh %p schedule\n", qh);
3923
3924 /* stuff into the periodic schedule */
3925 qh_link_periodic(fusbh200, qh);
3926done:
3927 return status;
3928}
3929
3930static int intr_submit (
3931 struct fusbh200_hcd *fusbh200,
3932 struct urb *urb,
3933 struct list_head *qtd_list,
3934 gfp_t mem_flags
3935) {
3936 unsigned epnum;
3937 unsigned long flags;
3938 struct fusbh200_qh *qh;
3939 int status;
3940 struct list_head empty;
3941
3942 /* get endpoint and transfer/schedule data */
3943 epnum = urb->ep->desc.bEndpointAddress;
3944
3945 spin_lock_irqsave (&fusbh200->lock, flags);
3946
3947 if (unlikely(!HCD_HW_ACCESSIBLE(fusbh200_to_hcd(fusbh200)))) {
3948 status = -ESHUTDOWN;
3949 goto done_not_linked;
3950 }
3951 status = usb_hcd_link_urb_to_ep(fusbh200_to_hcd(fusbh200), urb);
3952 if (unlikely(status))
3953 goto done_not_linked;
3954
3955 /* get qh and force any scheduling errors */
3956 INIT_LIST_HEAD (&empty);
3957 qh = qh_append_tds(fusbh200, urb, &empty, epnum, &urb->ep->hcpriv);
3958 if (qh == NULL) {
3959 status = -ENOMEM;
3960 goto done;
3961 }
3962 if (qh->qh_state == QH_STATE_IDLE) {
3963 if ((status = qh_schedule (fusbh200, qh)) != 0)
3964 goto done;
3965 }
3966
3967 /* then queue the urb's tds to the qh */
3968 qh = qh_append_tds(fusbh200, urb, qtd_list, epnum, &urb->ep->hcpriv);
3969 BUG_ON (qh == NULL);
3970
3971 /* ... update usbfs periodic stats */
3972 fusbh200_to_hcd(fusbh200)->self.bandwidth_int_reqs++;
3973
3974done:
3975 if (unlikely(status))
3976 usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
3977done_not_linked:
3978 spin_unlock_irqrestore (&fusbh200->lock, flags);
3979 if (status)
3980 qtd_list_free (fusbh200, urb, qtd_list);
3981
3982 return status;
3983}
3984
3985static void scan_intr(struct fusbh200_hcd *fusbh200)
3986{
3987 struct fusbh200_qh *qh;
3988
3989 list_for_each_entry_safe(qh, fusbh200->qh_scan_next, &fusbh200->intr_qh_list,
3990 intr_node) {
3991 rescan:
3992 /* clean any finished work for this qh */
3993 if (!list_empty(&qh->qtd_list)) {
3994 int temp;
3995
3996 /*
3997 * Unlinks could happen here; completion reporting
3998 * drops the lock. That's why fusbh200->qh_scan_next
3999 * always holds the next qh to scan; if the next qh
4000 * gets unlinked then fusbh200->qh_scan_next is adjusted
4001 * in qh_unlink_periodic().
4002 */
4003 temp = qh_completions(fusbh200, qh);
4004 if (unlikely(qh->needs_rescan ||
4005 (list_empty(&qh->qtd_list) &&
4006 qh->qh_state == QH_STATE_LINKED)))
4007 start_unlink_intr(fusbh200, qh);
4008 else if (temp != 0)
4009 goto rescan;
4010 }
4011 }
4012}
4013
4014/*-------------------------------------------------------------------------*/
4015
4016/* fusbh200_iso_stream ops work with both ITD and SITD */
4017
4018static struct fusbh200_iso_stream *
4019iso_stream_alloc (gfp_t mem_flags)
4020{
4021 struct fusbh200_iso_stream *stream;
4022
4023 stream = kzalloc(sizeof *stream, mem_flags);
4024 if (likely (stream != NULL)) {
4025 INIT_LIST_HEAD(&stream->td_list);
4026 INIT_LIST_HEAD(&stream->free_list);
4027 stream->next_uframe = -1;
4028 }
4029 return stream;
4030}
4031
4032static void
4033iso_stream_init (
4034 struct fusbh200_hcd *fusbh200,
4035 struct fusbh200_iso_stream *stream,
4036 struct usb_device *dev,
4037 int pipe,
4038 unsigned interval
4039)
4040{
4041 u32 buf1;
4042 unsigned epnum, maxp;
4043 int is_input;
4044 long bandwidth;
4045 unsigned multi;
4046
4047 /*
4048 * this might be a "high bandwidth" highspeed endpoint,
4049 * as encoded in the ep descriptor's wMaxPacket field
4050 */
4051 epnum = usb_pipeendpoint (pipe);
4052 is_input = usb_pipein (pipe) ? USB_DIR_IN : 0;
4053 maxp = usb_maxpacket(dev, pipe, !is_input);
4054 if (is_input) {
4055 buf1 = (1 << 11);
4056 } else {
4057 buf1 = 0;
4058 }
4059
4060 maxp = max_packet(maxp);
4061 multi = hb_mult(maxp);
4062 buf1 |= maxp;
4063 maxp *= multi;
4064
4065 stream->buf0 = cpu_to_hc32(fusbh200, (epnum << 8) | dev->devnum);
4066 stream->buf1 = cpu_to_hc32(fusbh200, buf1);
4067 stream->buf2 = cpu_to_hc32(fusbh200, multi);
4068
4069 /* usbfs wants to report the average usecs per frame tied up
4070 * when transfers on this endpoint are scheduled ...
4071 */
4072 if (dev->speed == USB_SPEED_FULL) {
4073 interval <<= 3;
4074 stream->usecs = NS_TO_US(usb_calc_bus_time(dev->speed,
4075 is_input, 1, maxp));
4076 stream->usecs /= 8;
4077 } else {
4078 stream->highspeed = 1;
4079 stream->usecs = HS_USECS_ISO (maxp);
4080 }
4081 bandwidth = stream->usecs * 8;
4082 bandwidth /= interval;
4083
4084 stream->bandwidth = bandwidth;
4085 stream->udev = dev;
4086 stream->bEndpointAddress = is_input | epnum;
4087 stream->interval = interval;
4088 stream->maxp = maxp;
4089}
4090
4091static struct fusbh200_iso_stream *
4092iso_stream_find (struct fusbh200_hcd *fusbh200, struct urb *urb)
4093{
4094 unsigned epnum;
4095 struct fusbh200_iso_stream *stream;
4096 struct usb_host_endpoint *ep;
4097 unsigned long flags;
4098
4099 epnum = usb_pipeendpoint (urb->pipe);
4100 if (usb_pipein(urb->pipe))
4101 ep = urb->dev->ep_in[epnum];
4102 else
4103 ep = urb->dev->ep_out[epnum];
4104
4105 spin_lock_irqsave (&fusbh200->lock, flags);
4106 stream = ep->hcpriv;
4107
4108 if (unlikely (stream == NULL)) {
4109 stream = iso_stream_alloc(GFP_ATOMIC);
4110 if (likely (stream != NULL)) {
4111 ep->hcpriv = stream;
4112 stream->ep = ep;
4113 iso_stream_init(fusbh200, stream, urb->dev, urb->pipe,
4114 urb->interval);
4115 }
4116
4117 /* if dev->ep [epnum] is a QH, hw is set */
4118 } else if (unlikely (stream->hw != NULL)) {
4119 fusbh200_dbg (fusbh200, "dev %s ep%d%s, not iso??\n",
4120 urb->dev->devpath, epnum,
4121 usb_pipein(urb->pipe) ? "in" : "out");
4122 stream = NULL;
4123 }
4124
4125 spin_unlock_irqrestore (&fusbh200->lock, flags);
4126 return stream;
4127}
4128
4129/*-------------------------------------------------------------------------*/
4130
4131/* fusbh200_iso_sched ops can be ITD-only or SITD-only */
4132
4133static struct fusbh200_iso_sched *
4134iso_sched_alloc (unsigned packets, gfp_t mem_flags)
4135{
4136 struct fusbh200_iso_sched *iso_sched;
4137 int size = sizeof *iso_sched;
4138
4139 size += packets * sizeof (struct fusbh200_iso_packet);
4140 iso_sched = kzalloc(size, mem_flags);
4141 if (likely (iso_sched != NULL)) {
4142 INIT_LIST_HEAD (&iso_sched->td_list);
4143 }
4144 return iso_sched;
4145}
4146
4147static inline void
4148itd_sched_init(
4149 struct fusbh200_hcd *fusbh200,
4150 struct fusbh200_iso_sched *iso_sched,
4151 struct fusbh200_iso_stream *stream,
4152 struct urb *urb
4153)
4154{
4155 unsigned i;
4156 dma_addr_t dma = urb->transfer_dma;
4157
4158 /* how many uframes are needed for these transfers */
4159 iso_sched->span = urb->number_of_packets * stream->interval;
4160
4161 /* figure out per-uframe itd fields that we'll need later
4162 * when we fit new itds into the schedule.
4163 */
4164 for (i = 0; i < urb->number_of_packets; i++) {
4165 struct fusbh200_iso_packet *uframe = &iso_sched->packet [i];
4166 unsigned length;
4167 dma_addr_t buf;
4168 u32 trans;
4169
4170 length = urb->iso_frame_desc [i].length;
4171 buf = dma + urb->iso_frame_desc [i].offset;
4172
4173 trans = FUSBH200_ISOC_ACTIVE;
4174 trans |= buf & 0x0fff;
4175 if (unlikely (((i + 1) == urb->number_of_packets))
4176 && !(urb->transfer_flags & URB_NO_INTERRUPT))
4177 trans |= FUSBH200_ITD_IOC;
4178 trans |= length << 16;
4179 uframe->transaction = cpu_to_hc32(fusbh200, trans);
4180
4181 /* might need to cross a buffer page within a uframe */
4182 uframe->bufp = (buf & ~(u64)0x0fff);
4183 buf += length;
4184 if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff))))
4185 uframe->cross = 1;
4186 }
4187}
4188
4189static void
4190iso_sched_free (
4191 struct fusbh200_iso_stream *stream,
4192 struct fusbh200_iso_sched *iso_sched
4193)
4194{
4195 if (!iso_sched)
4196 return;
4197 // caller must hold fusbh200->lock!
4198 list_splice (&iso_sched->td_list, &stream->free_list);
4199 kfree (iso_sched);
4200}
4201
4202static int
4203itd_urb_transaction (
4204 struct fusbh200_iso_stream *stream,
4205 struct fusbh200_hcd *fusbh200,
4206 struct urb *urb,
4207 gfp_t mem_flags
4208)
4209{
4210 struct fusbh200_itd *itd;
4211 dma_addr_t itd_dma;
4212 int i;
4213 unsigned num_itds;
4214 struct fusbh200_iso_sched *sched;
4215 unsigned long flags;
4216
4217 sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
4218 if (unlikely (sched == NULL))
4219 return -ENOMEM;
4220
4221 itd_sched_init(fusbh200, sched, stream, urb);
4222
4223 if (urb->interval < 8)
4224 num_itds = 1 + (sched->span + 7) / 8;
4225 else
4226 num_itds = urb->number_of_packets;
4227
4228 /* allocate/init ITDs */
4229 spin_lock_irqsave (&fusbh200->lock, flags);
4230 for (i = 0; i < num_itds; i++) {
4231
4232 /*
4233 * Use iTDs from the free list, but not iTDs that may
4234 * still be in use by the hardware.
4235 */
4236 if (likely(!list_empty(&stream->free_list))) {
4237 itd = list_first_entry(&stream->free_list,
4238 struct fusbh200_itd, itd_list);
4239 if (itd->frame == fusbh200->now_frame)
4240 goto alloc_itd;
4241 list_del (&itd->itd_list);
4242 itd_dma = itd->itd_dma;
4243 } else {
4244 alloc_itd:
4245 spin_unlock_irqrestore (&fusbh200->lock, flags);
4246 itd = dma_pool_alloc (fusbh200->itd_pool, mem_flags,
4247 &itd_dma);
4248 spin_lock_irqsave (&fusbh200->lock, flags);
4249 if (!itd) {
4250 iso_sched_free(stream, sched);
4251 spin_unlock_irqrestore(&fusbh200->lock, flags);
4252 return -ENOMEM;
4253 }
4254 }
4255
4256 memset (itd, 0, sizeof *itd);
4257 itd->itd_dma = itd_dma;
4258 list_add (&itd->itd_list, &sched->td_list);
4259 }
4260 spin_unlock_irqrestore (&fusbh200->lock, flags);
4261
4262 /* temporarily store schedule info in hcpriv */
4263 urb->hcpriv = sched;
4264 urb->error_count = 0;
4265 return 0;
4266}
4267
4268/*-------------------------------------------------------------------------*/
4269
4270static inline int
4271itd_slot_ok (
4272 struct fusbh200_hcd *fusbh200,
4273 u32 mod,
4274 u32 uframe,
4275 u8 usecs,
4276 u32 period
4277)
4278{
4279 uframe %= period;
4280 do {
4281 /* can't commit more than uframe_periodic_max usec */
4282 if (periodic_usecs (fusbh200, uframe >> 3, uframe & 0x7)
4283 > (fusbh200->uframe_periodic_max - usecs))
4284 return 0;
4285
4286 /* we know urb->interval is 2^N uframes */
4287 uframe += period;
4288 } while (uframe < mod);
4289 return 1;
4290}
4291
4292/*
4293 * This scheduler plans almost as far into the future as it has actual
4294 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
4295 * "as small as possible" to be cache-friendlier.) That limits the size
4296 * transfers you can stream reliably; avoid more than 64 msec per urb.
4297 * Also avoid queue depths of less than fusbh200's worst irq latency (affected
4298 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
4299 * and other factors); or more than about 230 msec total (for portability,
4300 * given FUSBH200_TUNE_FLS and the slop). Or, write a smarter scheduler!
4301 */
4302
4303#define SCHEDULE_SLOP 80 /* microframes */
4304
4305static int
4306iso_stream_schedule (
4307 struct fusbh200_hcd *fusbh200,
4308 struct urb *urb,
4309 struct fusbh200_iso_stream *stream
4310)
4311{
4312 u32 now, next, start, period, span;
4313 int status;
4314 unsigned mod = fusbh200->periodic_size << 3;
4315 struct fusbh200_iso_sched *sched = urb->hcpriv;
4316
4317 period = urb->interval;
4318 span = sched->span;
4319
4320 if (span > mod - SCHEDULE_SLOP) {
4321 fusbh200_dbg (fusbh200, "iso request %p too long\n", urb);
4322 status = -EFBIG;
4323 goto fail;
4324 }
4325
4326 now = fusbh200_read_frame_index(fusbh200) & (mod - 1);
4327
4328 /* Typical case: reuse current schedule, stream is still active.
4329 * Hopefully there are no gaps from the host falling behind
4330 * (irq delays etc), but if there are we'll take the next
4331 * slot in the schedule, implicitly assuming URB_ISO_ASAP.
4332 */
4333 if (likely (!list_empty (&stream->td_list))) {
4334 u32 excess;
4335
4336 /* For high speed devices, allow scheduling within the
4337 * isochronous scheduling threshold. For full speed devices
4338 * and Intel PCI-based controllers, don't (work around for
4339 * Intel ICH9 bug).
4340 */
4341 if (!stream->highspeed && fusbh200->fs_i_thresh)
4342 next = now + fusbh200->i_thresh;
4343 else
4344 next = now;
4345
4346 /* Fell behind (by up to twice the slop amount)?
4347 * We decide based on the time of the last currently-scheduled
4348 * slot, not the time of the next available slot.
4349 */
4350 excess = (stream->next_uframe - period - next) & (mod - 1);
4351 if (excess >= mod - 2 * SCHEDULE_SLOP)
4352 start = next + excess - mod + period *
4353 DIV_ROUND_UP(mod - excess, period);
4354 else
4355 start = next + excess + period;
4356 if (start - now >= mod) {
4357 fusbh200_dbg(fusbh200, "request %p would overflow (%d+%d >= %d)\n",
4358 urb, start - now - period, period,
4359 mod);
4360 status = -EFBIG;
4361 goto fail;
4362 }
4363 }
4364
4365 /* need to schedule; when's the next (u)frame we could start?
4366 * this is bigger than fusbh200->i_thresh allows; scheduling itself
4367 * isn't free, the slop should handle reasonably slow cpus. it
4368 * can also help high bandwidth if the dma and irq loads don't
4369 * jump until after the queue is primed.
4370 */
4371 else {
4372 int done = 0;
4373 start = SCHEDULE_SLOP + (now & ~0x07);
4374
4375 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
4376
4377 /* find a uframe slot with enough bandwidth.
4378 * Early uframes are more precious because full-speed
4379 * iso IN transfers can't use late uframes,
4380 * and therefore they should be allocated last.
4381 */
4382 next = start;
4383 start += period;
4384 do {
4385 start--;
4386 /* check schedule: enough space? */
4387 if (itd_slot_ok(fusbh200, mod, start,
4388 stream->usecs, period))
4389 done = 1;
4390 } while (start > next && !done);
4391
4392 /* no room in the schedule */
4393 if (!done) {
4394 fusbh200_dbg(fusbh200, "iso resched full %p (now %d max %d)\n",
4395 urb, now, now + mod);
4396 status = -ENOSPC;
4397 goto fail;
4398 }
4399 }
4400
4401 /* Tried to schedule too far into the future? */
4402 if (unlikely(start - now + span - period
4403 >= mod - 2 * SCHEDULE_SLOP)) {
4404 fusbh200_dbg(fusbh200, "request %p would overflow (%d+%d >= %d)\n",
4405 urb, start - now, span - period,
4406 mod - 2 * SCHEDULE_SLOP);
4407 status = -EFBIG;
4408 goto fail;
4409 }
4410
4411 stream->next_uframe = start & (mod - 1);
4412
4413 /* report high speed start in uframes; full speed, in frames */
4414 urb->start_frame = stream->next_uframe;
4415 if (!stream->highspeed)
4416 urb->start_frame >>= 3;
4417
4418 /* Make sure scan_isoc() sees these */
4419 if (fusbh200->isoc_count == 0)
4420 fusbh200->next_frame = now >> 3;
4421 return 0;
4422
4423 fail:
4424 iso_sched_free(stream, sched);
4425 urb->hcpriv = NULL;
4426 return status;
4427}
4428
4429/*-------------------------------------------------------------------------*/
4430
4431static inline void
4432itd_init(struct fusbh200_hcd *fusbh200, struct fusbh200_iso_stream *stream,
4433 struct fusbh200_itd *itd)
4434{
4435 int i;
4436
4437 /* it's been recently zeroed */
4438 itd->hw_next = FUSBH200_LIST_END(fusbh200);
4439 itd->hw_bufp [0] = stream->buf0;
4440 itd->hw_bufp [1] = stream->buf1;
4441 itd->hw_bufp [2] = stream->buf2;
4442
4443 for (i = 0; i < 8; i++)
4444 itd->index[i] = -1;
4445
4446 /* All other fields are filled when scheduling */
4447}
4448
4449static inline void
4450itd_patch(
4451 struct fusbh200_hcd *fusbh200,
4452 struct fusbh200_itd *itd,
4453 struct fusbh200_iso_sched *iso_sched,
4454 unsigned index,
4455 u16 uframe
4456)
4457{
4458 struct fusbh200_iso_packet *uf = &iso_sched->packet [index];
4459 unsigned pg = itd->pg;
4460
4461 // BUG_ON (pg == 6 && uf->cross);
4462
4463 uframe &= 0x07;
4464 itd->index [uframe] = index;
4465
4466 itd->hw_transaction[uframe] = uf->transaction;
4467 itd->hw_transaction[uframe] |= cpu_to_hc32(fusbh200, pg << 12);
4468 itd->hw_bufp[pg] |= cpu_to_hc32(fusbh200, uf->bufp & ~(u32)0);
4469 itd->hw_bufp_hi[pg] |= cpu_to_hc32(fusbh200, (u32)(uf->bufp >> 32));
4470
4471 /* iso_frame_desc[].offset must be strictly increasing */
4472 if (unlikely (uf->cross)) {
4473 u64 bufp = uf->bufp + 4096;
4474
4475 itd->pg = ++pg;
4476 itd->hw_bufp[pg] |= cpu_to_hc32(fusbh200, bufp & ~(u32)0);
4477 itd->hw_bufp_hi[pg] |= cpu_to_hc32(fusbh200, (u32)(bufp >> 32));
4478 }
4479}
4480
4481static inline void
4482itd_link (struct fusbh200_hcd *fusbh200, unsigned frame, struct fusbh200_itd *itd)
4483{
4484 union fusbh200_shadow *prev = &fusbh200->pshadow[frame];
4485 __hc32 *hw_p = &fusbh200->periodic[frame];
4486 union fusbh200_shadow here = *prev;
4487 __hc32 type = 0;
4488
4489 /* skip any iso nodes which might belong to previous microframes */
4490 while (here.ptr) {
4491 type = Q_NEXT_TYPE(fusbh200, *hw_p);
4492 if (type == cpu_to_hc32(fusbh200, Q_TYPE_QH))
4493 break;
4494 prev = periodic_next_shadow(fusbh200, prev, type);
4495 hw_p = shadow_next_periodic(fusbh200, &here, type);
4496 here = *prev;
4497 }
4498
4499 itd->itd_next = here;
4500 itd->hw_next = *hw_p;
4501 prev->itd = itd;
4502 itd->frame = frame;
4503 wmb ();
4504 *hw_p = cpu_to_hc32(fusbh200, itd->itd_dma | Q_TYPE_ITD);
4505}
4506
4507/* fit urb's itds into the selected schedule slot; activate as needed */
4508static void itd_link_urb(
4509 struct fusbh200_hcd *fusbh200,
4510 struct urb *urb,
4511 unsigned mod,
4512 struct fusbh200_iso_stream *stream
4513)
4514{
4515 int packet;
4516 unsigned next_uframe, uframe, frame;
4517 struct fusbh200_iso_sched *iso_sched = urb->hcpriv;
4518 struct fusbh200_itd *itd;
4519
4520 next_uframe = stream->next_uframe & (mod - 1);
4521
4522 if (unlikely (list_empty(&stream->td_list))) {
4523 fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated
4524 += stream->bandwidth;
4525 fusbh200_dbg(fusbh200,
4526 "schedule devp %s ep%d%s-iso period %d start %d.%d\n",
4527 urb->dev->devpath, stream->bEndpointAddress & 0x0f,
4528 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
4529 urb->interval,
4530 next_uframe >> 3, next_uframe & 0x7);
4531 }
4532
4533 /* fill iTDs uframe by uframe */
4534 for (packet = 0, itd = NULL; packet < urb->number_of_packets; ) {
4535 if (itd == NULL) {
4536 /* ASSERT: we have all necessary itds */
4537 // BUG_ON (list_empty (&iso_sched->td_list));
4538
4539 /* ASSERT: no itds for this endpoint in this uframe */
4540
4541 itd = list_entry (iso_sched->td_list.next,
4542 struct fusbh200_itd, itd_list);
4543 list_move_tail (&itd->itd_list, &stream->td_list);
4544 itd->stream = stream;
4545 itd->urb = urb;
4546 itd_init (fusbh200, stream, itd);
4547 }
4548
4549 uframe = next_uframe & 0x07;
4550 frame = next_uframe >> 3;
4551
4552 itd_patch(fusbh200, itd, iso_sched, packet, uframe);
4553
4554 next_uframe += stream->interval;
4555 next_uframe &= mod - 1;
4556 packet++;
4557
4558 /* link completed itds into the schedule */
4559 if (((next_uframe >> 3) != frame)
4560 || packet == urb->number_of_packets) {
4561 itd_link(fusbh200, frame & (fusbh200->periodic_size - 1), itd);
4562 itd = NULL;
4563 }
4564 }
4565 stream->next_uframe = next_uframe;
4566
4567 /* don't need that schedule data any more */
4568 iso_sched_free (stream, iso_sched);
4569 urb->hcpriv = NULL;
4570
4571 ++fusbh200->isoc_count;
4572 enable_periodic(fusbh200);
4573}
4574
4575#define ISO_ERRS (FUSBH200_ISOC_BUF_ERR | FUSBH200_ISOC_BABBLE | FUSBH200_ISOC_XACTERR)
4576
4577/* Process and recycle a completed ITD. Return true iff its urb completed,
4578 * and hence its completion callback probably added things to the hardware
4579 * schedule.
4580 *
4581 * Note that we carefully avoid recycling this descriptor until after any
4582 * completion callback runs, so that it won't be reused quickly. That is,
4583 * assuming (a) no more than two urbs per frame on this endpoint, and also
4584 * (b) only this endpoint's completions submit URBs. It seems some silicon
4585 * corrupts things if you reuse completed descriptors very quickly...
4586 */
4587static bool itd_complete(struct fusbh200_hcd *fusbh200, struct fusbh200_itd *itd)
4588{
4589 struct urb *urb = itd->urb;
4590 struct usb_iso_packet_descriptor *desc;
4591 u32 t;
4592 unsigned uframe;
4593 int urb_index = -1;
4594 struct fusbh200_iso_stream *stream = itd->stream;
4595 struct usb_device *dev;
4596 bool retval = false;
4597
4598 /* for each uframe with a packet */
4599 for (uframe = 0; uframe < 8; uframe++) {
4600 if (likely (itd->index[uframe] == -1))
4601 continue;
4602 urb_index = itd->index[uframe];
4603 desc = &urb->iso_frame_desc [urb_index];
4604
4605 t = hc32_to_cpup(fusbh200, &itd->hw_transaction [uframe]);
4606 itd->hw_transaction [uframe] = 0;
4607
4608 /* report transfer status */
4609 if (unlikely (t & ISO_ERRS)) {
4610 urb->error_count++;
4611 if (t & FUSBH200_ISOC_BUF_ERR)
4612 desc->status = usb_pipein (urb->pipe)
4613 ? -ENOSR /* hc couldn't read */
4614 : -ECOMM; /* hc couldn't write */
4615 else if (t & FUSBH200_ISOC_BABBLE)
4616 desc->status = -EOVERFLOW;
4617 else /* (t & FUSBH200_ISOC_XACTERR) */
4618 desc->status = -EPROTO;
4619
4620 /* HC need not update length with this error */
4621 if (!(t & FUSBH200_ISOC_BABBLE)) {
4622 desc->actual_length = fusbh200_itdlen(urb, desc, t);
4623 urb->actual_length += desc->actual_length;
4624 }
4625 } else if (likely ((t & FUSBH200_ISOC_ACTIVE) == 0)) {
4626 desc->status = 0;
4627 desc->actual_length = fusbh200_itdlen(urb, desc, t);
4628 urb->actual_length += desc->actual_length;
4629 } else {
4630 /* URB was too late */
4631 desc->status = -EXDEV;
4632 }
4633 }
4634
4635 /* handle completion now? */
4636 if (likely ((urb_index + 1) != urb->number_of_packets))
4637 goto done;
4638
4639 /* ASSERT: it's really the last itd for this urb
4640 list_for_each_entry (itd, &stream->td_list, itd_list)
4641 BUG_ON (itd->urb == urb);
4642 */
4643
4644 /* give urb back to the driver; completion often (re)submits */
4645 dev = urb->dev;
4646 fusbh200_urb_done(fusbh200, urb, 0);
4647 retval = true;
4648 urb = NULL;
4649
4650 --fusbh200->isoc_count;
4651 disable_periodic(fusbh200);
4652
4653 if (unlikely(list_is_singular(&stream->td_list))) {
4654 fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated
4655 -= stream->bandwidth;
4656 fusbh200_dbg(fusbh200,
4657 "deschedule devp %s ep%d%s-iso\n",
4658 dev->devpath, stream->bEndpointAddress & 0x0f,
4659 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
4660 }
4661
4662done:
4663 itd->urb = NULL;
4664
4665 /* Add to the end of the free list for later reuse */
4666 list_move_tail(&itd->itd_list, &stream->free_list);
4667
4668 /* Recycle the iTDs when the pipeline is empty (ep no longer in use) */
4669 if (list_empty(&stream->td_list)) {
4670 list_splice_tail_init(&stream->free_list,
4671 &fusbh200->cached_itd_list);
4672 start_free_itds(fusbh200);
4673 }
4674
4675 return retval;
4676}
4677
4678/*-------------------------------------------------------------------------*/
4679
4680static int itd_submit (struct fusbh200_hcd *fusbh200, struct urb *urb,
4681 gfp_t mem_flags)
4682{
4683 int status = -EINVAL;
4684 unsigned long flags;
4685 struct fusbh200_iso_stream *stream;
4686
4687 /* Get iso_stream head */
4688 stream = iso_stream_find (fusbh200, urb);
4689 if (unlikely (stream == NULL)) {
4690 fusbh200_dbg (fusbh200, "can't get iso stream\n");
4691 return -ENOMEM;
4692 }
4693 if (unlikely (urb->interval != stream->interval &&
4694 fusbh200_port_speed(fusbh200, 0) == USB_PORT_STAT_HIGH_SPEED)) {
4695 fusbh200_dbg (fusbh200, "can't change iso interval %d --> %d\n",
4696 stream->interval, urb->interval);
4697 goto done;
4698 }
4699
4700#ifdef FUSBH200_URB_TRACE
4701 fusbh200_dbg (fusbh200,
4702 "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
4703 __func__, urb->dev->devpath, urb,
4704 usb_pipeendpoint (urb->pipe),
4705 usb_pipein (urb->pipe) ? "in" : "out",
4706 urb->transfer_buffer_length,
4707 urb->number_of_packets, urb->interval,
4708 stream);
4709#endif
4710
4711 /* allocate ITDs w/o locking anything */
4712 status = itd_urb_transaction (stream, fusbh200, urb, mem_flags);
4713 if (unlikely (status < 0)) {
4714 fusbh200_dbg (fusbh200, "can't init itds\n");
4715 goto done;
4716 }
4717
4718 /* schedule ... need to lock */
4719 spin_lock_irqsave (&fusbh200->lock, flags);
4720 if (unlikely(!HCD_HW_ACCESSIBLE(fusbh200_to_hcd(fusbh200)))) {
4721 status = -ESHUTDOWN;
4722 goto done_not_linked;
4723 }
4724 status = usb_hcd_link_urb_to_ep(fusbh200_to_hcd(fusbh200), urb);
4725 if (unlikely(status))
4726 goto done_not_linked;
4727 status = iso_stream_schedule(fusbh200, urb, stream);
4728 if (likely (status == 0))
4729 itd_link_urb (fusbh200, urb, fusbh200->periodic_size << 3, stream);
4730 else
4731 usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
4732 done_not_linked:
4733 spin_unlock_irqrestore (&fusbh200->lock, flags);
4734 done:
4735 return status;
4736}
4737
4738/*-------------------------------------------------------------------------*/
4739
4740static void scan_isoc(struct fusbh200_hcd *fusbh200)
4741{
4742 unsigned uf, now_frame, frame;
4743 unsigned fmask = fusbh200->periodic_size - 1;
4744 bool modified, live;
4745
4746 /*
4747 * When running, scan from last scan point up to "now"
4748 * else clean up by scanning everything that's left.
4749 * Touches as few pages as possible: cache-friendly.
4750 */
4751 if (fusbh200->rh_state >= FUSBH200_RH_RUNNING) {
4752 uf = fusbh200_read_frame_index(fusbh200);
4753 now_frame = (uf >> 3) & fmask;
4754 live = true;
4755 } else {
4756 now_frame = (fusbh200->next_frame - 1) & fmask;
4757 live = false;
4758 }
4759 fusbh200->now_frame = now_frame;
4760
4761 frame = fusbh200->next_frame;
4762 for (;;) {
4763 union fusbh200_shadow q, *q_p;
4764 __hc32 type, *hw_p;
4765
4766restart:
4767 /* scan each element in frame's queue for completions */
4768 q_p = &fusbh200->pshadow [frame];
4769 hw_p = &fusbh200->periodic [frame];
4770 q.ptr = q_p->ptr;
4771 type = Q_NEXT_TYPE(fusbh200, *hw_p);
4772 modified = false;
4773
4774 while (q.ptr != NULL) {
4775 switch (hc32_to_cpu(fusbh200, type)) {
4776 case Q_TYPE_ITD:
4777 /* If this ITD is still active, leave it for
4778 * later processing ... check the next entry.
4779 * No need to check for activity unless the
4780 * frame is current.
4781 */
4782 if (frame == now_frame && live) {
4783 rmb();
4784 for (uf = 0; uf < 8; uf++) {
4785 if (q.itd->hw_transaction[uf] &
4786 ITD_ACTIVE(fusbh200))
4787 break;
4788 }
4789 if (uf < 8) {
4790 q_p = &q.itd->itd_next;
4791 hw_p = &q.itd->hw_next;
4792 type = Q_NEXT_TYPE(fusbh200,
4793 q.itd->hw_next);
4794 q = *q_p;
4795 break;
4796 }
4797 }
4798
4799 /* Take finished ITDs out of the schedule
4800 * and process them: recycle, maybe report
4801 * URB completion. HC won't cache the
4802 * pointer for much longer, if at all.
4803 */
4804 *q_p = q.itd->itd_next;
4805 *hw_p = q.itd->hw_next;
4806 type = Q_NEXT_TYPE(fusbh200, q.itd->hw_next);
4807 wmb();
4808 modified = itd_complete (fusbh200, q.itd);
4809 q = *q_p;
4810 break;
4811 default:
4812 fusbh200_dbg(fusbh200, "corrupt type %d frame %d shadow %p\n",
4813 type, frame, q.ptr);
4814 // BUG ();
4815 /* FALL THROUGH */
4816 case Q_TYPE_QH:
4817 case Q_TYPE_FSTN:
4818 /* End of the iTDs and siTDs */
4819 q.ptr = NULL;
4820 break;
4821 }
4822
4823 /* assume completion callbacks modify the queue */
4824 if (unlikely(modified && fusbh200->isoc_count > 0))
4825 goto restart;
4826 }
4827
4828 /* Stop when we have reached the current frame */
4829 if (frame == now_frame)
4830 break;
4831 frame = (frame + 1) & fmask;
4832 }
4833 fusbh200->next_frame = now_frame;
4834}
4835/*-------------------------------------------------------------------------*/
4836/*
4837 * Display / Set uframe_periodic_max
4838 */
4839static ssize_t show_uframe_periodic_max(struct device *dev,
4840 struct device_attribute *attr,
4841 char *buf)
4842{
4843 struct fusbh200_hcd *fusbh200;
4844 int n;
4845
4846 fusbh200 = hcd_to_fusbh200(bus_to_hcd(dev_get_drvdata(dev)));
4847 n = scnprintf(buf, PAGE_SIZE, "%d\n", fusbh200->uframe_periodic_max);
4848 return n;
4849}
4850
4851
4852static ssize_t store_uframe_periodic_max(struct device *dev,
4853 struct device_attribute *attr,
4854 const char *buf, size_t count)
4855{
4856 struct fusbh200_hcd *fusbh200;
4857 unsigned uframe_periodic_max;
4858 unsigned frame, uframe;
4859 unsigned short allocated_max;
4860 unsigned long flags;
4861 ssize_t ret;
4862
4863 fusbh200 = hcd_to_fusbh200(bus_to_hcd(dev_get_drvdata(dev)));
4864 if (kstrtouint(buf, 0, &uframe_periodic_max) < 0)
4865 return -EINVAL;
4866
4867 if (uframe_periodic_max < 100 || uframe_periodic_max >= 125) {
4868 fusbh200_info(fusbh200, "rejecting invalid request for "
4869 "uframe_periodic_max=%u\n", uframe_periodic_max);
4870 return -EINVAL;
4871 }
4872
4873 ret = -EINVAL;
4874
4875 /*
4876 * lock, so that our checking does not race with possible periodic
4877 * bandwidth allocation through submitting new urbs.
4878 */
4879 spin_lock_irqsave (&fusbh200->lock, flags);
4880
4881 /*
4882 * for request to decrease max periodic bandwidth, we have to check
4883 * every microframe in the schedule to see whether the decrease is
4884 * possible.
4885 */
4886 if (uframe_periodic_max < fusbh200->uframe_periodic_max) {
4887 allocated_max = 0;
4888
4889 for (frame = 0; frame < fusbh200->periodic_size; ++frame)
4890 for (uframe = 0; uframe < 7; ++uframe)
4891 allocated_max = max(allocated_max,
4892 periodic_usecs (fusbh200, frame, uframe));
4893
4894 if (allocated_max > uframe_periodic_max) {
4895 fusbh200_info(fusbh200,
4896 "cannot decrease uframe_periodic_max becase "
4897 "periodic bandwidth is already allocated "
4898 "(%u > %u)\n",
4899 allocated_max, uframe_periodic_max);
4900 goto out_unlock;
4901 }
4902 }
4903
4904 /* increasing is always ok */
4905
4906 fusbh200_info(fusbh200, "setting max periodic bandwidth to %u%% "
4907 "(== %u usec/uframe)\n",
4908 100*uframe_periodic_max/125, uframe_periodic_max);
4909
4910 if (uframe_periodic_max != 100)
4911 fusbh200_warn(fusbh200, "max periodic bandwidth set is non-standard\n");
4912
4913 fusbh200->uframe_periodic_max = uframe_periodic_max;
4914 ret = count;
4915
4916out_unlock:
4917 spin_unlock_irqrestore (&fusbh200->lock, flags);
4918 return ret;
4919}
4920static DEVICE_ATTR(uframe_periodic_max, 0644, show_uframe_periodic_max, store_uframe_periodic_max);
4921
4922
4923static inline int create_sysfs_files(struct fusbh200_hcd *fusbh200)
4924{
4925 struct device *controller = fusbh200_to_hcd(fusbh200)->self.controller;
4926 int i = 0;
4927
4928 if (i)
4929 goto out;
4930
4931 i = device_create_file(controller, &dev_attr_uframe_periodic_max);
4932out:
4933 return i;
4934}
4935
4936static inline void remove_sysfs_files(struct fusbh200_hcd *fusbh200)
4937{
4938 struct device *controller = fusbh200_to_hcd(fusbh200)->self.controller;
4939
4940 device_remove_file(controller, &dev_attr_uframe_periodic_max);
4941}
4942/*-------------------------------------------------------------------------*/
4943
4944/* On some systems, leaving remote wakeup enabled prevents system shutdown.
4945 * The firmware seems to think that powering off is a wakeup event!
4946 * This routine turns off remote wakeup and everything else, on all ports.
4947 */
4948static void fusbh200_turn_off_all_ports(struct fusbh200_hcd *fusbh200)
4949{
4950 u32 __iomem *status_reg = &fusbh200->regs->port_status;
4951
4952 fusbh200_writel(fusbh200, PORT_RWC_BITS, status_reg);
4953}
4954
4955/*
4956 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
4957 * Must be called with interrupts enabled and the lock not held.
4958 */
4959static void fusbh200_silence_controller(struct fusbh200_hcd *fusbh200)
4960{
4961 fusbh200_halt(fusbh200);
4962
4963 spin_lock_irq(&fusbh200->lock);
4964 fusbh200->rh_state = FUSBH200_RH_HALTED;
4965 fusbh200_turn_off_all_ports(fusbh200);
4966 spin_unlock_irq(&fusbh200->lock);
4967}
4968
4969/* fusbh200_shutdown kick in for silicon on any bus (not just pci, etc).
4970 * This forcibly disables dma and IRQs, helping kexec and other cases
4971 * where the next system software may expect clean state.
4972 */
4973static void fusbh200_shutdown(struct usb_hcd *hcd)
4974{
4975 struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
4976
4977 spin_lock_irq(&fusbh200->lock);
4978 fusbh200->shutdown = true;
4979 fusbh200->rh_state = FUSBH200_RH_STOPPING;
4980 fusbh200->enabled_hrtimer_events = 0;
4981 spin_unlock_irq(&fusbh200->lock);
4982
4983 fusbh200_silence_controller(fusbh200);
4984
4985 hrtimer_cancel(&fusbh200->hrtimer);
4986}
4987
4988/*-------------------------------------------------------------------------*/
4989
4990/*
4991 * fusbh200_work is called from some interrupts, timers, and so on.
4992 * it calls driver completion functions, after dropping fusbh200->lock.
4993 */
4994static void fusbh200_work (struct fusbh200_hcd *fusbh200)
4995{
4996 /* another CPU may drop fusbh200->lock during a schedule scan while
4997 * it reports urb completions. this flag guards against bogus
4998 * attempts at re-entrant schedule scanning.
4999 */
5000 if (fusbh200->scanning) {
5001 fusbh200->need_rescan = true;
5002 return;
5003 }
5004 fusbh200->scanning = true;
5005
5006 rescan:
5007 fusbh200->need_rescan = false;
5008 if (fusbh200->async_count)
5009 scan_async(fusbh200);
5010 if (fusbh200->intr_count > 0)
5011 scan_intr(fusbh200);
5012 if (fusbh200->isoc_count > 0)
5013 scan_isoc(fusbh200);
5014 if (fusbh200->need_rescan)
5015 goto rescan;
5016 fusbh200->scanning = false;
5017
5018 /* the IO watchdog guards against hardware or driver bugs that
5019 * misplace IRQs, and should let us run completely without IRQs.
5020 * such lossage has been observed on both VT6202 and VT8235.
5021 */
5022 turn_on_io_watchdog(fusbh200);
5023}
5024
5025/*
5026 * Called when the fusbh200_hcd module is removed.
5027 */
5028static void fusbh200_stop (struct usb_hcd *hcd)
5029{
5030 struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
5031
5032 fusbh200_dbg (fusbh200, "stop\n");
5033
5034 /* no more interrupts ... */
5035
5036 spin_lock_irq(&fusbh200->lock);
5037 fusbh200->enabled_hrtimer_events = 0;
5038 spin_unlock_irq(&fusbh200->lock);
5039
5040 fusbh200_quiesce(fusbh200);
5041 fusbh200_silence_controller(fusbh200);
5042 fusbh200_reset (fusbh200);
5043
5044 hrtimer_cancel(&fusbh200->hrtimer);
5045 remove_sysfs_files(fusbh200);
5046 remove_debug_files (fusbh200);
5047
5048 /* root hub is shut down separately (first, when possible) */
5049 spin_lock_irq (&fusbh200->lock);
5050 end_free_itds(fusbh200);
5051 spin_unlock_irq (&fusbh200->lock);
5052 fusbh200_mem_cleanup (fusbh200);
5053
5054 fusbh200_dbg(fusbh200, "irq normal %ld err %ld iaa %ld (lost %ld)\n",
5055 fusbh200->stats.normal, fusbh200->stats.error, fusbh200->stats.iaa,
5056 fusbh200->stats.lost_iaa);
5057 fusbh200_dbg (fusbh200, "complete %ld unlink %ld\n",
5058 fusbh200->stats.complete, fusbh200->stats.unlink);
5059
5060 dbg_status (fusbh200, "fusbh200_stop completed",
5061 fusbh200_readl(fusbh200, &fusbh200->regs->status));
5062}
5063
5064/* one-time init, only for memory state */
5065static int hcd_fusbh200_init(struct usb_hcd *hcd)
5066{
5067 struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
5068 u32 temp;
5069 int retval;
5070 u32 hcc_params;
5071 struct fusbh200_qh_hw *hw;
5072
5073 spin_lock_init(&fusbh200->lock);
5074
5075 /*
5076 * keep io watchdog by default, those good HCDs could turn off it later
5077 */
5078 fusbh200->need_io_watchdog = 1;
5079
5080 hrtimer_init(&fusbh200->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
5081 fusbh200->hrtimer.function = fusbh200_hrtimer_func;
5082 fusbh200->next_hrtimer_event = FUSBH200_HRTIMER_NO_EVENT;
5083
5084 hcc_params = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
5085
5086 /*
5087 * by default set standard 80% (== 100 usec/uframe) max periodic
5088 * bandwidth as required by USB 2.0
5089 */
5090 fusbh200->uframe_periodic_max = 100;
5091
5092 /*
5093 * hw default: 1K periodic list heads, one per frame.
5094 * periodic_size can shrink by USBCMD update if hcc_params allows.
5095 */
5096 fusbh200->periodic_size = DEFAULT_I_TDPS;
5097 INIT_LIST_HEAD(&fusbh200->intr_qh_list);
5098 INIT_LIST_HEAD(&fusbh200->cached_itd_list);
5099
5100 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
5101 /* periodic schedule size can be smaller than default */
5102 switch (FUSBH200_TUNE_FLS) {
5103 case 0: fusbh200->periodic_size = 1024; break;
5104 case 1: fusbh200->periodic_size = 512; break;
5105 case 2: fusbh200->periodic_size = 256; break;
5106 default: BUG();
5107 }
5108 }
5109 if ((retval = fusbh200_mem_init(fusbh200, GFP_KERNEL)) < 0)
5110 return retval;
5111
5112 /* controllers may cache some of the periodic schedule ... */
5113 fusbh200->i_thresh = 2;
5114
5115 /*
5116 * dedicate a qh for the async ring head, since we couldn't unlink
5117 * a 'real' qh without stopping the async schedule [4.8]. use it
5118 * as the 'reclamation list head' too.
5119 * its dummy is used in hw_alt_next of many tds, to prevent the qh
5120 * from automatically advancing to the next td after short reads.
5121 */
5122 fusbh200->async->qh_next.qh = NULL;
5123 hw = fusbh200->async->hw;
5124 hw->hw_next = QH_NEXT(fusbh200, fusbh200->async->qh_dma);
5125 hw->hw_info1 = cpu_to_hc32(fusbh200, QH_HEAD);
5126 hw->hw_token = cpu_to_hc32(fusbh200, QTD_STS_HALT);
5127 hw->hw_qtd_next = FUSBH200_LIST_END(fusbh200);
5128 fusbh200->async->qh_state = QH_STATE_LINKED;
5129 hw->hw_alt_next = QTD_NEXT(fusbh200, fusbh200->async->dummy->qtd_dma);
5130
5131 /* clear interrupt enables, set irq latency */
5132 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
5133 log2_irq_thresh = 0;
5134 temp = 1 << (16 + log2_irq_thresh);
5135 if (HCC_CANPARK(hcc_params)) {
5136 /* HW default park == 3, on hardware that supports it (like
5137 * NVidia and ALI silicon), maximizes throughput on the async
5138 * schedule by avoiding QH fetches between transfers.
5139 *
5140 * With fast usb storage devices and NForce2, "park" seems to
5141 * make problems: throughput reduction (!), data errors...
5142 */
5143 if (park) {
5144 park = min(park, (unsigned) 3);
5145 temp |= CMD_PARK;
5146 temp |= park << 8;
5147 }
5148 fusbh200_dbg(fusbh200, "park %d\n", park);
5149 }
5150 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
5151 /* periodic schedule size can be smaller than default */
5152 temp &= ~(3 << 2);
5153 temp |= (FUSBH200_TUNE_FLS << 2);
5154 }
5155 fusbh200->command = temp;
5156
5157 /* Accept arbitrarily long scatter-gather lists */
5158 if (!(hcd->driver->flags & HCD_LOCAL_MEM))
5159 hcd->self.sg_tablesize = ~0;
5160 return 0;
5161}
5162
5163/* start HC running; it's halted, hcd_fusbh200_init() has been run (once) */
5164static int fusbh200_run (struct usb_hcd *hcd)
5165{
5166 struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
5167 u32 temp;
5168 u32 hcc_params;
5169
5170 hcd->uses_new_polling = 1;
5171
5172 /* EHCI spec section 4.1 */
5173
5174 fusbh200_writel(fusbh200, fusbh200->periodic_dma, &fusbh200->regs->frame_list);
5175 fusbh200_writel(fusbh200, (u32)fusbh200->async->qh_dma, &fusbh200->regs->async_next);
5176
5177 /*
5178 * hcc_params controls whether fusbh200->regs->segment must (!!!)
5179 * be used; it constrains QH/ITD/SITD and QTD locations.
5180 * pci_pool consistent memory always uses segment zero.
5181 * streaming mappings for I/O buffers, like pci_map_single(),
5182 * can return segments above 4GB, if the device allows.
5183 *
5184 * NOTE: the dma mask is visible through dma_supported(), so
5185 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
5186 * Scsi_Host.highmem_io, and so forth. It's readonly to all
5187 * host side drivers though.
5188 */
5189 hcc_params = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
5190
5191 // Philips, Intel, and maybe others need CMD_RUN before the
5192 // root hub will detect new devices (why?); NEC doesn't
5193 fusbh200->command &= ~(CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
5194 fusbh200->command |= CMD_RUN;
5195 fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
5196 dbg_cmd (fusbh200, "init", fusbh200->command);
5197
5198 /*
5199 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
5200 * are explicitly handed to companion controller(s), so no TT is
5201 * involved with the root hub. (Except where one is integrated,
5202 * and there's no companion controller unless maybe for USB OTG.)
5203 *
5204 * Turning on the CF flag will transfer ownership of all ports
5205 * from the companions to the EHCI controller. If any of the
5206 * companions are in the middle of a port reset at the time, it
5207 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
5208 * guarantees that no resets are in progress. After we set CF,
5209 * a short delay lets the hardware catch up; new resets shouldn't
5210 * be started before the port switching actions could complete.
5211 */
5212 down_write(&ehci_cf_port_reset_rwsem);
5213 fusbh200->rh_state = FUSBH200_RH_RUNNING;
5214 fusbh200_readl(fusbh200, &fusbh200->regs->command); /* unblock posted writes */
5215 msleep(5);
5216 up_write(&ehci_cf_port_reset_rwsem);
5217 fusbh200->last_periodic_enable = ktime_get_real();
5218
5219 temp = HC_VERSION(fusbh200, fusbh200_readl(fusbh200, &fusbh200->caps->hc_capbase));
5220 fusbh200_info (fusbh200,
5221 "USB %x.%x started, EHCI %x.%02x\n",
5222 ((fusbh200->sbrn & 0xf0)>>4), (fusbh200->sbrn & 0x0f),
5223 temp >> 8, temp & 0xff);
5224
5225 fusbh200_writel(fusbh200, INTR_MASK,
5226 &fusbh200->regs->intr_enable); /* Turn On Interrupts */
5227
5228 /* GRR this is run-once init(), being done every time the HC starts.
5229 * So long as they're part of class devices, we can't do it init()
5230 * since the class device isn't created that early.
5231 */
5232 create_debug_files(fusbh200);
5233 create_sysfs_files(fusbh200);
5234
5235 return 0;
5236}
5237
5238static int fusbh200_setup(struct usb_hcd *hcd)
5239{
5240 struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
5241 int retval;
5242
5243 fusbh200->regs = (void __iomem *)fusbh200->caps +
5244 HC_LENGTH(fusbh200, fusbh200_readl(fusbh200, &fusbh200->caps->hc_capbase));
5245 dbg_hcs_params(fusbh200, "reset");
5246 dbg_hcc_params(fusbh200, "reset");
5247
5248 /* cache this readonly data; minimize chip reads */
5249 fusbh200->hcs_params = fusbh200_readl(fusbh200, &fusbh200->caps->hcs_params);
5250
5251 fusbh200->sbrn = HCD_USB2;
5252
5253 /* data structure init */
5254 retval = hcd_fusbh200_init(hcd);
5255 if (retval)
5256 return retval;
5257
5258 retval = fusbh200_halt(fusbh200);
5259 if (retval)
5260 return retval;
5261
5262 fusbh200_reset(fusbh200);
5263
5264 return 0;
5265}
5266
5267/*-------------------------------------------------------------------------*/
5268
5269static irqreturn_t fusbh200_irq (struct usb_hcd *hcd)
5270{
5271 struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
5272 u32 status, masked_status, pcd_status = 0, cmd;
5273 int bh;
5274
5275 spin_lock (&fusbh200->lock);
5276
5277 status = fusbh200_readl(fusbh200, &fusbh200->regs->status);
5278
5279 /* e.g. cardbus physical eject */
5280 if (status == ~(u32) 0) {
5281 fusbh200_dbg (fusbh200, "device removed\n");
5282 goto dead;
5283 }
5284
5285 /*
5286 * We don't use STS_FLR, but some controllers don't like it to
5287 * remain on, so mask it out along with the other status bits.
5288 */
5289 masked_status = status & (INTR_MASK | STS_FLR);
5290
5291 /* Shared IRQ? */
5292 if (!masked_status || unlikely(fusbh200->rh_state == FUSBH200_RH_HALTED)) {
5293 spin_unlock(&fusbh200->lock);
5294 return IRQ_NONE;
5295 }
5296
5297 /* clear (just) interrupts */
5298 fusbh200_writel(fusbh200, masked_status, &fusbh200->regs->status);
5299 cmd = fusbh200_readl(fusbh200, &fusbh200->regs->command);
5300 bh = 0;
5301
5302 /* normal [4.15.1.2] or error [4.15.1.1] completion */
5303 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
5304 if (likely ((status & STS_ERR) == 0))
5305 COUNT (fusbh200->stats.normal);
5306 else
5307 COUNT (fusbh200->stats.error);
5308 bh = 1;
5309 }
5310
5311 /* complete the unlinking of some qh [4.15.2.3] */
5312 if (status & STS_IAA) {
5313
5314 /* Turn off the IAA watchdog */
5315 fusbh200->enabled_hrtimer_events &= ~BIT(FUSBH200_HRTIMER_IAA_WATCHDOG);
5316
5317 /*
5318 * Mild optimization: Allow another IAAD to reset the
5319 * hrtimer, if one occurs before the next expiration.
5320 * In theory we could always cancel the hrtimer, but
5321 * tests show that about half the time it will be reset
5322 * for some other event anyway.
5323 */
5324 if (fusbh200->next_hrtimer_event == FUSBH200_HRTIMER_IAA_WATCHDOG)
5325 ++fusbh200->next_hrtimer_event;
5326
5327 /* guard against (alleged) silicon errata */
5328 if (cmd & CMD_IAAD)
5329 fusbh200_dbg(fusbh200, "IAA with IAAD still set?\n");
5330 if (fusbh200->async_iaa) {
5331 COUNT(fusbh200->stats.iaa);
5332 end_unlink_async(fusbh200);
5333 } else
5334 fusbh200_dbg(fusbh200, "IAA with nothing unlinked?\n");
5335 }
5336
5337 /* remote wakeup [4.3.1] */
5338 if (status & STS_PCD) {
5339 int pstatus;
5340 u32 __iomem *status_reg = &fusbh200->regs->port_status;
5341
5342 /* kick root hub later */
5343 pcd_status = status;
5344
5345 /* resume root hub? */
5346 if (fusbh200->rh_state == FUSBH200_RH_SUSPENDED)
5347 usb_hcd_resume_root_hub(hcd);
5348
5349 pstatus = fusbh200_readl(fusbh200, status_reg);
5350
5351 if (test_bit(0, &fusbh200->suspended_ports) &&
5352 ((pstatus & PORT_RESUME) ||
5353 !(pstatus & PORT_SUSPEND)) &&
5354 (pstatus & PORT_PE) &&
5355 fusbh200->reset_done[0] == 0) {
5356
5357 /* start 20 msec resume signaling from this port,
5358 * and make khubd collect PORT_STAT_C_SUSPEND to
5359 * stop that signaling. Use 5 ms extra for safety,
5360 * like usb_port_resume() does.
5361 */
5362 fusbh200->reset_done[0] = jiffies + msecs_to_jiffies(25);
5363 set_bit(0, &fusbh200->resuming_ports);
5364 fusbh200_dbg (fusbh200, "port 1 remote wakeup\n");
5365 mod_timer(&hcd->rh_timer, fusbh200->reset_done[0]);
5366 }
5367 }
5368
5369 /* PCI errors [4.15.2.4] */
5370 if (unlikely ((status & STS_FATAL) != 0)) {
5371 fusbh200_err(fusbh200, "fatal error\n");
5372 dbg_cmd(fusbh200, "fatal", cmd);
5373 dbg_status(fusbh200, "fatal", status);
5374dead:
5375 usb_hc_died(hcd);
5376
5377 /* Don't let the controller do anything more */
5378 fusbh200->shutdown = true;
5379 fusbh200->rh_state = FUSBH200_RH_STOPPING;
5380 fusbh200->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
5381 fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
5382 fusbh200_writel(fusbh200, 0, &fusbh200->regs->intr_enable);
5383 fusbh200_handle_controller_death(fusbh200);
5384
5385 /* Handle completions when the controller stops */
5386 bh = 0;
5387 }
5388
5389 if (bh)
5390 fusbh200_work (fusbh200);
5391 spin_unlock (&fusbh200->lock);
5392 if (pcd_status)
5393 usb_hcd_poll_rh_status(hcd);
5394 return IRQ_HANDLED;
5395}
5396
5397/*-------------------------------------------------------------------------*/
5398
5399/*
5400 * non-error returns are a promise to giveback() the urb later
5401 * we drop ownership so next owner (or urb unlink) can get it
5402 *
5403 * urb + dev is in hcd.self.controller.urb_list
5404 * we're queueing TDs onto software and hardware lists
5405 *
5406 * hcd-specific init for hcpriv hasn't been done yet
5407 *
5408 * NOTE: control, bulk, and interrupt share the same code to append TDs
5409 * to a (possibly active) QH, and the same QH scanning code.
5410 */
5411static int fusbh200_urb_enqueue (
5412 struct usb_hcd *hcd,
5413 struct urb *urb,
5414 gfp_t mem_flags
5415) {
5416 struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
5417 struct list_head qtd_list;
5418
5419 INIT_LIST_HEAD (&qtd_list);
5420
5421 switch (usb_pipetype (urb->pipe)) {
5422 case PIPE_CONTROL:
5423 /* qh_completions() code doesn't handle all the fault cases
5424 * in multi-TD control transfers. Even 1KB is rare anyway.
5425 */
5426 if (urb->transfer_buffer_length > (16 * 1024))
5427 return -EMSGSIZE;
5428 /* FALLTHROUGH */
5429 /* case PIPE_BULK: */
5430 default:
5431 if (!qh_urb_transaction (fusbh200, urb, &qtd_list, mem_flags))
5432 return -ENOMEM;
5433 return submit_async(fusbh200, urb, &qtd_list, mem_flags);
5434
5435 case PIPE_INTERRUPT:
5436 if (!qh_urb_transaction (fusbh200, urb, &qtd_list, mem_flags))
5437 return -ENOMEM;
5438 return intr_submit(fusbh200, urb, &qtd_list, mem_flags);
5439
5440 case PIPE_ISOCHRONOUS:
5441 return itd_submit (fusbh200, urb, mem_flags);
5442 }
5443}
5444
5445/* remove from hardware lists
5446 * completions normally happen asynchronously
5447 */
5448
5449static int fusbh200_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
5450{
5451 struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
5452 struct fusbh200_qh *qh;
5453 unsigned long flags;
5454 int rc;
5455
5456 spin_lock_irqsave (&fusbh200->lock, flags);
5457 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
5458 if (rc)
5459 goto done;
5460
5461 switch (usb_pipetype (urb->pipe)) {
5462 // case PIPE_CONTROL:
5463 // case PIPE_BULK:
5464 default:
5465 qh = (struct fusbh200_qh *) urb->hcpriv;
5466 if (!qh)
5467 break;
5468 switch (qh->qh_state) {
5469 case QH_STATE_LINKED:
5470 case QH_STATE_COMPLETING:
5471 start_unlink_async(fusbh200, qh);
5472 break;
5473 case QH_STATE_UNLINK:
5474 case QH_STATE_UNLINK_WAIT:
5475 /* already started */
5476 break;
5477 case QH_STATE_IDLE:
5478 /* QH might be waiting for a Clear-TT-Buffer */
5479 qh_completions(fusbh200, qh);
5480 break;
5481 }
5482 break;
5483
5484 case PIPE_INTERRUPT:
5485 qh = (struct fusbh200_qh *) urb->hcpriv;
5486 if (!qh)
5487 break;
5488 switch (qh->qh_state) {
5489 case QH_STATE_LINKED:
5490 case QH_STATE_COMPLETING:
5491 start_unlink_intr(fusbh200, qh);
5492 break;
5493 case QH_STATE_IDLE:
5494 qh_completions (fusbh200, qh);
5495 break;
5496 default:
5497 fusbh200_dbg (fusbh200, "bogus qh %p state %d\n",
5498 qh, qh->qh_state);
5499 goto done;
5500 }
5501 break;
5502
5503 case PIPE_ISOCHRONOUS:
5504 // itd...
5505
5506 // wait till next completion, do it then.
5507 // completion irqs can wait up to 1024 msec,
5508 break;
5509 }
5510done:
5511 spin_unlock_irqrestore (&fusbh200->lock, flags);
5512 return rc;
5513}
5514
5515/*-------------------------------------------------------------------------*/
5516
5517// bulk qh holds the data toggle
5518
5519static void
5520fusbh200_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
5521{
5522 struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
5523 unsigned long flags;
5524 struct fusbh200_qh *qh, *tmp;
5525
5526 /* ASSERT: any requests/urbs are being unlinked */
5527 /* ASSERT: nobody can be submitting urbs for this any more */
5528
5529rescan:
5530 spin_lock_irqsave (&fusbh200->lock, flags);
5531 qh = ep->hcpriv;
5532 if (!qh)
5533 goto done;
5534
5535 /* endpoints can be iso streams. for now, we don't
5536 * accelerate iso completions ... so spin a while.
5537 */
5538 if (qh->hw == NULL) {
5539 struct fusbh200_iso_stream *stream = ep->hcpriv;
5540
5541 if (!list_empty(&stream->td_list))
5542 goto idle_timeout;
5543
5544 /* BUG_ON(!list_empty(&stream->free_list)); */
5545 kfree(stream);
5546 goto done;
5547 }
5548
5549 if (fusbh200->rh_state < FUSBH200_RH_RUNNING)
5550 qh->qh_state = QH_STATE_IDLE;
5551 switch (qh->qh_state) {
5552 case QH_STATE_LINKED:
5553 case QH_STATE_COMPLETING:
5554 for (tmp = fusbh200->async->qh_next.qh;
5555 tmp && tmp != qh;
5556 tmp = tmp->qh_next.qh)
5557 continue;
5558 /* periodic qh self-unlinks on empty, and a COMPLETING qh
5559 * may already be unlinked.
5560 */
5561 if (tmp)
5562 start_unlink_async(fusbh200, qh);
5563 /* FALL THROUGH */
5564 case QH_STATE_UNLINK: /* wait for hw to finish? */
5565 case QH_STATE_UNLINK_WAIT:
5566idle_timeout:
5567 spin_unlock_irqrestore (&fusbh200->lock, flags);
5568 schedule_timeout_uninterruptible(1);
5569 goto rescan;
5570 case QH_STATE_IDLE: /* fully unlinked */
5571 if (qh->clearing_tt)
5572 goto idle_timeout;
5573 if (list_empty (&qh->qtd_list)) {
5574 qh_destroy(fusbh200, qh);
5575 break;
5576 }
5577 /* else FALL THROUGH */
5578 default:
5579 /* caller was supposed to have unlinked any requests;
5580 * that's not our job. just leak this memory.
5581 */
5582 fusbh200_err (fusbh200, "qh %p (#%02x) state %d%s\n",
5583 qh, ep->desc.bEndpointAddress, qh->qh_state,
5584 list_empty (&qh->qtd_list) ? "" : "(has tds)");
5585 break;
5586 }
5587 done:
5588 ep->hcpriv = NULL;
5589 spin_unlock_irqrestore (&fusbh200->lock, flags);
5590}
5591
5592static void
5593fusbh200_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
5594{
5595 struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
5596 struct fusbh200_qh *qh;
5597 int eptype = usb_endpoint_type(&ep->desc);
5598 int epnum = usb_endpoint_num(&ep->desc);
5599 int is_out = usb_endpoint_dir_out(&ep->desc);
5600 unsigned long flags;
5601
5602 if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
5603 return;
5604
5605 spin_lock_irqsave(&fusbh200->lock, flags);
5606 qh = ep->hcpriv;
5607
5608 /* For Bulk and Interrupt endpoints we maintain the toggle state
5609 * in the hardware; the toggle bits in udev aren't used at all.
5610 * When an endpoint is reset by usb_clear_halt() we must reset
5611 * the toggle bit in the QH.
5612 */
5613 if (qh) {
5614 usb_settoggle(qh->dev, epnum, is_out, 0);
5615 if (!list_empty(&qh->qtd_list)) {
5616 WARN_ONCE(1, "clear_halt for a busy endpoint\n");
5617 } else if (qh->qh_state == QH_STATE_LINKED ||
5618 qh->qh_state == QH_STATE_COMPLETING) {
5619
5620 /* The toggle value in the QH can't be updated
5621 * while the QH is active. Unlink it now;
5622 * re-linking will call qh_refresh().
5623 */
5624 if (eptype == USB_ENDPOINT_XFER_BULK)
5625 start_unlink_async(fusbh200, qh);
5626 else
5627 start_unlink_intr(fusbh200, qh);
5628 }
5629 }
5630 spin_unlock_irqrestore(&fusbh200->lock, flags);
5631}
5632
5633static int fusbh200_get_frame (struct usb_hcd *hcd)
5634{
5635 struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
5636 return (fusbh200_read_frame_index(fusbh200) >> 3) % fusbh200->periodic_size;
5637}
5638
5639/*-------------------------------------------------------------------------*/
5640
5641/*
5642 * The EHCI in ChipIdea HDRC cannot be a separate module or device,
5643 * because its registers (and irq) are shared between host/gadget/otg
5644 * functions and in order to facilitate role switching we cannot
5645 * give the fusbh200 driver exclusive access to those.
5646 */
5647MODULE_DESCRIPTION(DRIVER_DESC);
5648MODULE_AUTHOR (DRIVER_AUTHOR);
5649MODULE_LICENSE ("GPL");
5650
5651static const struct hc_driver fusbh200_fusbh200_hc_driver = {
5652 .description = hcd_name,
5653 .product_desc = "Faraday USB2.0 Host Controller",
5654 .hcd_priv_size = sizeof(struct fusbh200_hcd),
5655
5656 /*
5657 * generic hardware linkage
5658 */
5659 .irq = fusbh200_irq,
5660 .flags = HCD_MEMORY | HCD_USB2,
5661
5662 /*
5663 * basic lifecycle operations
5664 */
5665 .reset = hcd_fusbh200_init,
5666 .start = fusbh200_run,
5667 .stop = fusbh200_stop,
5668 .shutdown = fusbh200_shutdown,
5669
5670 /*
5671 * managing i/o requests and associated device resources
5672 */
5673 .urb_enqueue = fusbh200_urb_enqueue,
5674 .urb_dequeue = fusbh200_urb_dequeue,
5675 .endpoint_disable = fusbh200_endpoint_disable,
5676 .endpoint_reset = fusbh200_endpoint_reset,
5677
5678 /*
5679 * scheduling support
5680 */
5681 .get_frame_number = fusbh200_get_frame,
5682
5683 /*
5684 * root hub support
5685 */
5686 .hub_status_data = fusbh200_hub_status_data,
5687 .hub_control = fusbh200_hub_control,
5688 .bus_suspend = fusbh200_bus_suspend,
5689 .bus_resume = fusbh200_bus_resume,
5690
5691 .relinquish_port = fusbh200_relinquish_port,
5692 .port_handed_over = fusbh200_port_handed_over,
5693
5694 .clear_tt_buffer_complete = fusbh200_clear_tt_buffer_complete,
5695};
5696
5697static void fusbh200_init(struct fusbh200_hcd *fusbh200)
5698{
5699 u32 reg;
5700
5701 reg = fusbh200_readl(fusbh200, &fusbh200->regs->bmcsr);
5702 reg |= BMCSR_INT_POLARITY;
5703 reg &= ~BMCSR_VBUS_OFF;
5704 fusbh200_writel(fusbh200, reg, &fusbh200->regs->bmcsr);
5705
5706 reg = fusbh200_readl(fusbh200, &fusbh200->regs->bmier);
5707 fusbh200_writel(fusbh200, reg | BMIER_OVC_EN | BMIER_VBUS_ERR_EN,
5708 &fusbh200->regs->bmier);
5709}
5710
5711/**
5712 * fusbh200_hcd_probe - initialize faraday FUSBH200 HCDs
5713 *
5714 * Allocates basic resources for this USB host controller, and
5715 * then invokes the start() method for the HCD associated with it
5716 * through the hotplug entry's driver_data.
5717 */
5718static int fusbh200_hcd_probe(struct platform_device *pdev)
5719{
5720 struct device *dev = &pdev->dev;
5721 struct usb_hcd *hcd;
5722 struct resource *res;
5723 int irq;
5724 int retval = -ENODEV;
5725 struct fusbh200_hcd *fusbh200;
5726
5727 if (usb_disabled())
5728 return -ENODEV;
5729
5730 pdev->dev.power.power_state = PMSG_ON;
5731
5732 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
5733 if (!res) {
5734 dev_err(dev,
5735 "Found HC with no IRQ. Check %s setup!\n",
5736 dev_name(dev));
5737 return -ENODEV;
5738 }
5739
5740 irq = res->start;
5741
5742 hcd = usb_create_hcd(&fusbh200_fusbh200_hc_driver, dev,
5743 dev_name(dev));
5744 if (!hcd) {
5745 dev_err(dev, "failed to create hcd with err %d\n", retval);
5746 retval = -ENOMEM;
5747 goto fail_create_hcd;
5748 }
5749
5750 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
5751 if (!res) {
5752 dev_err(dev,
5753 "Found HC with no register addr. Check %s setup!\n",
5754 dev_name(dev));
5755 retval = -ENODEV;
5756 goto fail_request_resource;
5757 }
5758
5759 hcd->rsrc_start = res->start;
5760 hcd->rsrc_len = resource_size(res);
5761 hcd->has_tt = 1;
5762
5763 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
5764 fusbh200_fusbh200_hc_driver.description)) {
5765 dev_dbg(dev, "controller already in use\n");
5766 retval = -EBUSY;
5767 goto fail_request_resource;
5768 }
5769
5770 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
5771 if (!res) {
5772 dev_err(dev,
5773 "Found HC with no register addr. Check %s setup!\n",
5774 dev_name(dev));
5775 retval = -ENODEV;
5776 goto fail_request_resource;
5777 }
5778
5779 hcd->regs = ioremap_nocache(res->start, resource_size(res));
5780 if (hcd->regs == NULL) {
5781 dev_dbg(dev, "error mapping memory\n");
5782 retval = -EFAULT;
5783 goto fail_ioremap;
5784 }
5785
5786 fusbh200 = hcd_to_fusbh200(hcd);
5787
5788 fusbh200->caps = hcd->regs;
5789
5790 retval = fusbh200_setup(hcd);
5791 if (retval)
5792 goto fail_add_hcd;
5793
5794 fusbh200_init(fusbh200);
5795
5796 retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
5797 if (retval) {
5798 dev_err(dev, "failed to add hcd with err %d\n", retval);
5799 goto fail_add_hcd;
5800 }
5801 device_wakeup_enable(hcd->self.controller);
5802
5803 return retval;
5804
5805fail_add_hcd:
5806 iounmap(hcd->regs);
5807fail_ioremap:
5808 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
5809fail_request_resource:
5810 usb_put_hcd(hcd);
5811fail_create_hcd:
5812 dev_err(dev, "init %s fail, %d\n", dev_name(dev), retval);
5813 return retval;
5814}
5815
5816/**
5817 * fusbh200_hcd_remove - shutdown processing for EHCI HCDs
5818 * @dev: USB Host Controller being removed
5819 *
5820 * Reverses the effect of fotg2xx_usb_hcd_probe(), first invoking
5821 * the HCD's stop() method. It is always called from a thread
5822 * context, normally "rmmod", "apmd", or something similar.
5823 */
5824static int fusbh200_hcd_remove(struct platform_device *pdev)
5825{
5826 struct device *dev = &pdev->dev;
5827 struct usb_hcd *hcd = dev_get_drvdata(dev);
5828
5829 if (!hcd)
5830 return 0;
5831
5832 usb_remove_hcd(hcd);
5833 iounmap(hcd->regs);
5834 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
5835 usb_put_hcd(hcd);
5836
5837 return 0;
5838}
5839
5840static struct platform_driver fusbh200_hcd_fusbh200_driver = {
5841 .driver = {
5842 .name = "fusbh200",
5843 },
5844 .probe = fusbh200_hcd_probe,
5845 .remove = fusbh200_hcd_remove,
5846};
5847
5848static int __init fusbh200_hcd_init(void)
5849{
5850 int retval = 0;
5851
5852 if (usb_disabled())
5853 return -ENODEV;
5854
5855 printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
5856 set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
5857 if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
5858 test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
5859 printk(KERN_WARNING "Warning! fusbh200_hcd should always be loaded"
5860 " before uhci_hcd and ohci_hcd, not after\n");
5861
5862 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd\n",
5863 hcd_name,
5864 sizeof(struct fusbh200_qh), sizeof(struct fusbh200_qtd),
5865 sizeof(struct fusbh200_itd));
5866
5867 fusbh200_debug_root = debugfs_create_dir("fusbh200", usb_debug_root);
5868 if (!fusbh200_debug_root) {
5869 retval = -ENOENT;
5870 goto err_debug;
5871 }
5872
5873 retval = platform_driver_register(&fusbh200_hcd_fusbh200_driver);
5874 if (retval < 0)
5875 goto clean;
5876 return retval;
5877
5878 platform_driver_unregister(&fusbh200_hcd_fusbh200_driver);
5879clean:
5880 debugfs_remove(fusbh200_debug_root);
5881 fusbh200_debug_root = NULL;
5882err_debug:
5883 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
5884 return retval;
5885}
5886module_init(fusbh200_hcd_init);
5887
5888static void __exit fusbh200_hcd_cleanup(void)
5889{
5890 platform_driver_unregister(&fusbh200_hcd_fusbh200_driver);
5891 debugfs_remove(fusbh200_debug_root);
5892 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
5893}
5894module_exit(fusbh200_hcd_cleanup);